An improved two-dimensional four-scroll chaotic circuit

Abstract

The present invention relates to an improved two-dimensional four-scroll chaotic circuit, which includes a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier and a fifth operational amplifier. The first operational amplifier and the first capacitor, and the second operational amplifier and the second capacitor respectively form two sets of integral circuits. The third operational amplifier and the fourth resistor, the fifth resistor, and the fifth operational amplifier and the tenth resistor, the eleventh resistor respectively form two sets of hysteresis comparison circuits. The fourth operational amplifier and the sixth resistor, the seventh resistor, the eighth resistor, the ninth resistor and the twelfth resistor form an addition circuit. The present invention provides an improved two-dimensional four-scroll chaotic circuit with high improvement in Lyapunov exponent and increased chaotic dynamic behavior of the system.

Description

Technical Field

[0001] The present invention relates to the technical field of chaotic circuits, and in particular to an improved two-dimensional four-scroll chaotic circuit. Background Art

[0002] In 1963, Lorenz (E.N. Lorenz) first proposed a chaotic system. In 1983, Chua invented the Chua's circuit. In 1992, Oppenheim and Kocarev proposed chaotic masking secure communication, so that chaotic circuits have become a hot issue in social research.

[0003] Classic chaotic systems, such as the Lorenz chaotic system, Chua's circuit, and Chen's chaotic system, etc., are mostly three-dimensional two-scroll. By improving the classic three-dimensional two-scroll chaotic system, a multi-scroll chaotic system can be generated. Currently, for two-dimensional chaotic systems, a two-dimensional two-scroll system has been reported, and there is less research on two-dimensional four-scroll chaotic circuits.

[0004] The patent with the application number CN2017103269899 discloses a two-dimensional four-scroll chaotic circuit. This chaotic circuit outputs the waveforms, phase diagrams, and chaotic evolution curves of the two-dimensional four-scroll chaotic circuit. The waveform diagrams of the X and Y output terminals can be observed on an ordinary oscilloscope, and the X-Y phase diagram can also be observed. However, the lyapunov exponent of this circuit is relatively low, and the chaotic dynamic behavior of the system cannot be fully exerted. Summary of the Invention

[0005] The purpose of the present invention is to overcome the deficiencies in the prior art and provide an improved two-dimensional four-scroll chaotic circuit, which is suitable for college chaotic science education, experimental teaching and demonstration, science popularization experimental demonstration, etc., and can be widely applied to voice analog signal secure communication systems.

[0006] The present invention is realized through the following technical solutions:

[0007] An improved two-dimensional four-scroll chaotic circuit includes a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, and a fifth operational amplifier;

[0008] Wherein, the output terminals of the first operational amplifier and the second operational amplifier are respectively the chaotic signal test points X and Y. A first capacitor and a second capacitor are respectively connected in parallel between the inverting input terminals and the output terminals of the first operational amplifier and the second operational amplifier. The non-inverting input terminals of the first operational amplifier and the second operational amplifier are both grounded. The output terminal of the first operational amplifier is connected to the inverting input terminal of the second operational amplifier through a second resistor. The first operational amplifier and the first capacitor, and the second operational amplifier and the second capacitor respectively form two groups of integral circuits;

[0009] A fifth resistor and an eleventh resistor are respectively connected in parallel between the non-inverting input terminals and the output terminals of the third operational amplifier and the fifth operational amplifier. The non-inverting input terminals of the third operational amplifier and the fifth operational amplifier are respectively grounded through a fourth resistor and a tenth resistor. The output terminal of the third operational amplifier is connected to the inverting input terminal of the second operational amplifier through a third resistor. The inverting input terminal of the third operational amplifier is connected to the output terminal of the first operational amplifier. The third operational amplifier and the fourth resistor and the fifth resistor, and the fifth operational amplifier and the tenth resistor and the eleventh resistor respectively form two sets of hysteresis comparison circuits;

[0010] A sixth resistor is connected in parallel between the inverting input terminal and the output terminal of the fourth operational amplifier. The inverting input terminal of the fourth operational amplifier is respectively connected to the output terminals of the first operational amplifier, the second operational amplifier, the third operational amplifier and the fifth operational amplifier through a seventh resistor, an eighth resistor, a twelfth resistor and a ninth resistor. The inverting input terminal of the fourth operational amplifier is also connected to the inverting input terminal of the fifth operational amplifier through the eighth resistor. The non-inverting input terminal of the fourth operational amplifier is grounded. The output terminal of the fourth operational amplifier is connected to the inverting input terminal of the first operational amplifier through a first resistor. The fourth operational amplifier and the sixth resistor, the seventh resistor, the eighth resistor, the ninth resistor and the twelfth resistor form an adder circuit.

[0011] To further implement the present invention, the following technical solutions can be preferably selected:

[0012] Preferably, the capacitances of the first capacitor and the second capacitor are both 100 nF.

[0013] Preferably, the resistance value of the sixth resistor is 3 KΩ.

[0014] Preferably, the resistance values of the fifth resistor and the eleventh resistor are both 12.5 KΩ.

[0015] Through the above technical solutions, the beneficial effects of the present invention are:

[0016] The first operational amplifier and the second operational amplifier of the present invention form an inverting integrator, the fourth operational amplifier forms an adder, the third operational amplifier and the fifth operational amplifier form a hysteresis comparator, and the output terminal of the third operational amplifier is connected to the inverting input terminal of the fourth operational amplifier through a twelfth resistor. The lyapunov exponent of the present invention is increased to 1.3358, and the chaotic dynamic behavior of the system is increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is the circuit schematic diagram of the present invention;

[0018] Figure 2 is the X-Y output terminal phase diagram of the present invention;

[0019] Figure 3 Waveform diagram of the X output terminal of the present invention;

[0020] Figure 4 Waveform diagram of the Y output terminal of the present invention;

[0021] Figure 5 For the present invention function graph;

[0022] Figure 6 For the present invention function graph; Detailed implementation manners

[0023] In the description of the present invention, it should also be noted that, unless otherwise clearly specified and defined, the terms "arranged", "installed", "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0024] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0025] Embodiment 1:

[0026] As Figure 1 shown, an improved two-dimensional four-scroll chaotic circuit includes a first operational amplifier A1, a second operational amplifier A2, a third operational amplifier A3, a fourth operational amplifier A4, and a fifth operational amplifier A5;

[0027] Among them, the output terminals of the first operational amplifier A1 and the second operational amplifier A2 are respectively chaotic signal test points X and Y. A first capacitor C1 and a second capacitor C2 are respectively connected in parallel between the inverting input terminals and the output terminals of the first operational amplifier A1 and the second operational amplifier A2. The non-inverting input terminals of the first operational amplifier A1 and the second operational amplifier A2 are both grounded. The output terminal of the first operational amplifier A1 is connected to the inverting input terminal of the second operational amplifier A2 through a second resistor R2. The first operational amplifier A1 and the first capacitor C1, and the second operational amplifier A2 and the second capacitor C2 respectively form two groups of integral circuits;

[0028] A fifth resistor R5 and an eleventh resistor R11 are respectively connected in parallel between the non-inverting input terminals and the respective output terminals of the third operational amplifier A3 and the fifth operational amplifier A5. The non-inverting input terminals of the third operational amplifier A3 and the fifth operational amplifier A5 are respectively grounded through a fourth resistor R4 and a tenth resistor R10. The output terminal of the third operational amplifier A3 is connected to the inverting input terminal of the second operational amplifier A2 through a third resistor R3. The inverting input terminal of the third operational amplifier A3 is connected to the output terminal of the first operational amplifier A1. The third operational amplifier A3 and the fourth resistor R4, the fifth resistor R5 and the fifth operational amplifier A5 and the tenth resistor R10, the eleventh resistor R11 respectively form two sets of hysteresis comparison circuits;

[0029] A sixth resistor R6 is connected in parallel between the inverting input terminal and the output terminal of the fourth operational amplifier A4. The inverting input terminal of the fourth operational amplifier A4 is respectively connected to the output terminals of the first operational amplifier A1, the second operational amplifier A2, the third operational amplifier A3 and the fifth operational amplifier A5 through a seventh resistor R7, an eighth resistor R8, a twelfth resistor R12 and a ninth resistor R9. The inverting input terminal of the fourth operational amplifier A4 is also connected to the inverting input terminal of the fifth operational amplifier A5 through the eighth resistor R8. The non-inverting input terminal of the fourth operational amplifier A4 is grounded. The output terminal of the fourth operational amplifier A4 is connected to the inverting input terminal of the first operational amplifier A1 through a first resistor R1. The fourth operational amplifier A4 and the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9 and the twelfth resistor R12 form an addition circuit.

[0030] In order to optimize the product structure, in this embodiment, the capacitances of the first capacitor C1 and the second capacitor C2 are both 100 nF, the resistance value of the sixth resistor R6 is 3 KΩ, and the resistance values of the fifth resistor R5 and the eleventh resistor R11 are both 12.5 KΩ.

[0031] Figure 3 and Figure 4 are respectively the images of the circuit voltages at two test points, namely points X and Y, changing with time under the oscilloscope display. In the figure, the abscissa is time and the ordinate is the circuit voltage.

[0032] Figure 2 is the X-Y output phase diagram. It is a waveform diagram with the voltage at point X as the abscissa and the voltage at point Y as the ordinate under the oscilloscope display. Such a waveform diagram is called a phase diagram.

[0033] The functions of the two hysteresis comparators formed by the third operational amplifier and the fifth operational amplifier are respectively and ,

[0034]

[0035] The state equation of the chaotic circuit of this solution is as follows:

[0036]

[0037] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An improved two-dimensional four-scroll chaotic circuit, characterized in that, It includes a first operational amplifier (A1), a second operational amplifier (A2), a third operational amplifier (A3), a fourth operational amplifier (A4), and a fifth operational amplifier (A5); Among them, the output terminals of the first operational amplifier (A1) and the second operational amplifier (A2) are respectively the chaotic signal test points X and Y. A first capacitor (C1) and a second capacitor (C2) are respectively connected in parallel between the inverting input terminals and the output terminals of the first operational amplifier (A1) and the second operational amplifier (A2). The non-inverting input terminals of the first operational amplifier (A1) and the second operational amplifier (A2) are both grounded. The output terminal of the first operational amplifier (A1) is connected to the inverting input terminal of the second operational amplifier (A2) through a second resistor (R2). The first operational amplifier (A1) and the first capacitor (C1), and the second operational amplifier (A2) and the second capacitor (C2) respectively form two sets of integral circuits; A fifth resistor (R5) and an eleventh resistor (R11) are respectively connected in parallel between the non-inverting input terminals and the output terminals of the third operational amplifier (A3) and the fifth operational amplifier (A5). The non-inverting input terminals of the third operational amplifier (A3) and the fifth operational amplifier (A5) are respectively grounded through a fourth resistor (R4) and a tenth resistor (R10). The output terminal of the third operational amplifier (A3) is connected to the inverting input terminal of the second operational amplifier (A2) through a third resistor (R3). The inverting input terminal of the third operational amplifier (A3) is connected to the output terminal of the first operational amplifier (A1). The third operational amplifier (A3) and the fourth resistor (R4), the fifth resistor (R5), and the fifth operational amplifier (A5) and the tenth resistor (R10), the eleventh resistor (R11) respectively form two sets of hysteresis comparison circuits; A sixth resistor (R6) is connected in parallel between the inverting input terminal and the output terminal of the fourth operational amplifier (A4). The inverting input terminal of the fourth operational amplifier (A4) is respectively connected to the output terminals of the first operational amplifier (A1), the second operational amplifier (A2), the third operational amplifier (A3), and the fifth operational amplifier (A5) through a seventh resistor (R7), an eighth resistor (R8), a twelfth resistor (R12), and a ninth resistor (R9). The inverting input terminal of the fourth operational amplifier (A4) is also connected to the inverting input terminal of the fifth operational amplifier (A5) through the eighth resistor (R8). The non-inverting input terminal of the fourth operational amplifier (A4) is grounded. The output terminal of the fourth operational amplifier (A4) is connected to the inverting input terminal of the first operational amplifier (A1) through a first resistor (R1). The fourth operational amplifier (A4) and the sixth resistor (R6), the seventh resistor (R7), the eighth resistor (R8), the ninth resistor (R9), and the twelfth resistor (R12) form a set of addition circuits.

2. The improved two-dimensional four-scroll chaotic circuit according to claim 1, characterized in that, The capacitances of the first capacitor (C1) and the second capacitor (C2) are both 100 nF.

3. The improved two-dimensional four-scroll chaotic circuit according to claim 2, characterized in that, The resistance value of the sixth resistor (R6) is 3 KΩ.

4. The improved two-dimensional four-scroll chaotic circuit according to claim 3, characterized in that, The resistance values of the fifth resistor (R5) and the eleventh resistor (R11) are both 12.5 KΩ.

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