Magnetic field strength detection system and method

Abstract

The present invention discloses a magnetic field strength detection system and method, wherein the magnetic field strength detection system performs an absolute value sum operation on the COS-path AMR output signal and the SIN-path AMR output signal of the two-dimensional AMR magnetoresistance to realize the detection of the strength of the magnetic field; the magnetic field strength detection system comprises: a two-dimensional AMR magnetoresistance 2D-AMR, a first switch SW1, a first multiplier MULT1, a second multiplier MULT2, a second switch SW2, a variable gain amplifier PGA, a first comparator CMP1, a second comparator CMP2, an accumulator INT and a reference signal generating module VRGEN. The magnetic field strength detection system and method proposed in the present invention can realize the detection of the magnetic field strength through a simple circuit structure, thereby improving the reliability of the system; at the same time, it can reduce the error and improve the detection accuracy. The present invention uses a relatively simple circuit structure to realize the strength detection of the two-dimensional AMR magnetoresistance signal, thereby avoiding the difficult-to-handle operation such as the square operation. The components used in the present invention are all the most commonly used circuit modules, and their structure is simple and reliable.

Description

Technical Field

[0001] The present invention belongs to the technical field of magnetic field detection, and relates to a magnetic field detection system, and in particular to a magnetic field intensity detection system and method. Background Art

[0002] Anisotropic Magneto-Resistive (AMR) is an important magnetic sensor element used to detect magnetic fields. It is widely used in automobiles, industrial control, home appliances and communication equipment. According to its application method, it can be mainly divided into two categories: magnetic field angle detection and magnetic field strength detection.

[0003] Figure 1 Two groups of Wheatstone bridges, each consisting of four AMR elements, are shown, and the two groups are placed at a 45-degree angle, thus forming a two-dimensional AMR magnetoresistive sensor. R1~R8 are all AMR magnetoresistive. After applying a certain bias voltage VB, its two differential voltage outputs COS: VCOS = (vc+)-(vc-) and SIN: VSIN = (vs+)-(vs-) will change with the strength of the external magnetic field. This principle has been described in the existing patent CN111065882A. By detecting the size of the COS and SIN paths, the detection and calculation of the external magnetic field can be achieved.

[0004] Figure 2 The definition of the external magnetic field angle is shown in Figure 2. The characteristics of AMR determine that its output voltages VCOS and VSIN are only sensitive to the magnetic field B parallel to the plane (in-plane) where the AMR is located. Ideally, the relationship between VCOS and VSIN and θ is the curve VCOS = VA*cos2θ and VSIN = VA*sin2θ, and the corresponding relationship is as follows: Figure 3 As shown, VA is the full amplitude of the signal and the period is 180 degrees. In order to detect the magnetic field angle, the CORDIC algorithm well known to the industry can be used, that is, the inverse tangent method is used to solve the angle; in order to detect the magnetic field amplitude, a modulus operation is generally required, that is,

[0005] However, actual AMR generally has nonlinear distortion, which causes the output voltage characteristics to deviate from Figure 3 When the AMR reluctance has second harmonic distortion, the output characteristics of VCOS and VSIN are as follows: Figure 4 As shown in the figure, the coefficient of the second harmonic is 0.2. At this time, VCOS and VSIN have seriously deviated from the sine and cosine waveforms and are more similar to triangle waves.

[0006] The prior art has the following defects: (1) An existing implementation method, such as that shown in Chinese Patent Publication No. CN111065882A, can only detect the angle of the external magnetic field through the AMR sensor, but cannot detect the magnetic field strength; (2) The traditional method for calculating the magnetic field strength requires a modulo calculation, and the square operation involved is difficult to implement in the analog signal processing circuit; (3) The actual AMR magnetic resistance is nonlinear, causing its output voltage VCOS, VSIN to deviate from the ideal sine and cosine signals as the angle changes, so that the deviation of the modulo operation is very large.

[0007] In view of this, there is an urgent need to design a new magnetic field detection method to overcome at least part of the above-mentioned defects of the existing magnetic field detection method. Summary of the invention

[0008] The present invention provides a magnetic field strength detection system and method, which can realize the detection of magnetic field strength through a simple circuit structure, improve the reliability of the system; at the same time, can reduce errors and improve detection accuracy.

[0009] To solve the above technical problem, according to one aspect of the present invention, the following technical solution is adopted:

[0010] A magnetic field strength detection system performs an absolute value sum operation on a COS path AMR output signal and a SIN path AMR output signal of a two-dimensional AMR magnetic resistance to achieve detection of magnetic field strength.

[0011] As an embodiment of the present invention, the magnetic field strength detection system includes:

[0012] A first absolute value acquisition circuit, whose input terminal is connected to the first output signal of the AMR magnetic resistance, and acquires the absolute value of the first output signal;

[0013] A second absolute value acquisition circuit, whose input terminal is connected to the second output signal of the AMR magnetic resistance, and acquires the absolute value of the second output signal; and

[0014] The accumulator circuit has its input ends respectively connected to the first absolute value acquisition circuit and the second absolute value acquisition circuit, for accumulating the absolute value output by the first absolute value acquisition circuit and the absolute value output by the second absolute value acquisition circuit, and outputting the accumulation result as a detection signal to realize the detection of the strength of the magnetic field.

[0015] As an embodiment of the present invention, the magnetic field strength detection system includes: a first switch SW1, a first multiplier MULT1, a second multiplier MULT2, a second switch SW2, a variable gain amplifier PGA, a first comparator CMP1, a second comparator CMP2, an accumulator INT and a reference signal generating module VRGEN;

[0016] The input end of the first multiplier MULT1 is used to connect the first output signal VCOS of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the first multiplier MULT1; the output end of the first multiplier MULT1 is connected to the first end of the first switch SW1;

[0017] The input end of the second multiplier MULT2 is used to connect the second output signal VSIN of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the second multiplier MULT2; the output end of the second multiplier MULT2 is connected to the first end of the second switch SW2;

[0018] The second end of the first switch SW1 is connected to the variable gain amplifier PGA, and the second end of the second switch SW2 is connected to the variable gain amplifier PGA;

[0019] The output end of the variable gain amplifier PGA is respectively connected to the first input end of the first comparator CMP1 and the input end of the accumulator INT; the second input end of the first comparator CMP1 is grounded;

[0020] The output end of the accumulator INT is connected to the first input end of the second comparator CMP2, and the output end of the reference signal generating module VRGEN is connected to the second input end of the second comparator CMP2; the output end of the second comparator CMP2 outputs a detection signal to realize the detection of the strength of the magnetic field.

[0021] As an embodiment of the present invention, the magnetic field strength detection system includes: a first switch SW1, a first multiplier MULT1, a second multiplier MULT2, a second switch SW2, a variable gain amplifier PGA, a first comparator CMP1, an accumulator INT and a sample and hold circuit S / H;

[0022] The input end of the first multiplier MULT1 is used to connect the first output signal VCOS of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the first multiplier MULT1; the output end of the first multiplier MULT1 is connected to the first end of the first switch SW1;

[0023] The input end of the second multiplier MULT2 is used to connect the second output signal VSIN of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the second multiplier MULT2; the output end of the second multiplier MULT2 is connected to the first end of the second switch SW2;

[0024] The second end of the first switch SW1 is connected to the variable gain amplifier PGA, and the second end of the second switch SW2 is connected to the variable gain amplifier PGA;

[0025] The output end of the variable gain amplifier PGA is respectively connected to the first input end of the first comparator CMP1 and the input end of the accumulator INT; the second input end of the first comparator CMP1 is grounded;

[0026] The output end of the accumulator INT is connected to the input end of the sampling and holding circuit S / H; the output end of the sampling and holding circuit S / H outputs a detection signal to realize the detection of the strength of the magnetic field.

[0027] As an embodiment of the present invention, the magnetic field strength detection system further includes a phase generation module for generating four phases ph1, ph2, ph3, ph4 arranged sequentially in time; the system works with ph1 to ph4 as a cycle;

[0028] (1) When the system is in ph1, SW1 is closed and SW2 is disconnected. At this time, the COS path is selected to enter the PGA module for signal amplification; the function of MULT1 and MULT2 is to exchange polarity according to the value of the control signal sign, that is, to perform multiplication; when sign is 1, the polarity is not exchanged, that is, v1 = VCOS or v1 = VSIN, on the contrary, when sign is -1, the polarity needs to be exchanged, that is, v1 = -VCOS or v1 = -VSIN; at ph1, sign is set to 1, so the sign is not exchanged, v1 = VCOS is amplified by PGA to obtain v2 = K*VCOS, where K is the amplification factor; at ph1, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0029] (2) When the system is at ph2, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VCOS, and adjusts the value of v1 accordingly; if sign = 1, it means that K*VCOS is greater than 0, so the signal does not exchange polarity, v2 = K*VCOS = K*|VCOS|; if sign = -1, it means that K*VCOS is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VCOS). Since VCOS<0 at this time, v2 = K*(-VCOS) = K*|VCOS|; at ph2, the accumulator works at the same time, adding the v2 signal to v3, that is, v3 = v2 = K*|VCOS|;

[0030] (3) When the system is at ph3, SW1 is disconnected and SW2 is closed. At this time, the SIN path is selected to enter the PGA module for signal amplification; at ph3, sign is set to 1, so the sign is not exchanged, v1 = VSIN is amplified by PGA to obtain v2 = K*VSIN, where K is the amplification factor; at ph3, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0031] (4) When the system is at ph4, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VSIN, and adjusts the value of v1 according to the sign; if sign = 1, it means that K*VSIN is greater than 0, so the polarity is not swapped, v2 = K*VSIN = K*|VSIN|; if sign = -1, it means that K*VSIN is less than 0, and the polarity needs to be swapped, and v2 becomes K*(-VSIN). Since VSIN<0 at this time, v2 = K*(-VSIN) = K*|VSIN|; at ph4, the accumulator works at the same time, and the v2 signal is added to v3, and combined with the result accumulated at ph2, v3 = K*(|VCOS|+|VSIN|) is obtained; v3 represents the absolute value sum of the two AMR signals. For AMR magnetic resistance with nonlinear distortion, v3 reflects the strength of the external magnetic field B;

[0032] When the system is at ph4, comparator CMP2 also works, comparing v3 and vth, and outputting a signal dout according to the result, that is, when the magnetic field strength is greater than a certain threshold, dout is 1, otherwise dout is 0; dout is used as a digital switch quantity and is used as an actual switching element or logic control of the MCU.

[0033] As an embodiment of the present invention, the magnetic field strength detection system further comprises: at least one of a chopper circuit, a filter circuit, an analog driver and an analog-to-digital converter;

[0034] The chopper circuit is used to chop a set part of the sine wave, and the filter circuit is used to filter the input signal; the chopper circuit and the filter circuit are used to eliminate mismatch;

[0035] The analog driver is used to enhance the output driving capability; the analog-to-digital converter is used to obtain a digital signal representing the strength of the magnetic field;

[0036] The phase generating module adds an additional phase on the basis of forming ph1, ph2, ph3, and ph4, so as to obtain better signal quality and lower mismatch offset.

[0037] According to another aspect of the present invention, the following technical solution is adopted: a magnetic field strength detection method, which includes: performing an absolute value sum operation on the COS path AMR output signal and the SIN path AMR output signal of the two-dimensional AMR magnetic resistance to realize the detection of the magnetic field strength.

[0038] As an embodiment of the present invention, the magnetic field strength detection method further comprises:

[0039] Obtaining the absolute value of the first output signal of the AMR magnetoresistance;

[0040] Obtaining the absolute value of the second output signal of the AMR magnetoresistance;

[0041] The absolute value of the first output signal of the AMR magnetoresistance and the absolute value of the second output signal of the AMR magnetoresistance are accumulated, and the accumulated result is output as a detection signal.

[0042] As an implementation mode of the present invention, the magnetic field strength detection method further comprises: generating four phases ph1, ph2, ph3, ph4 arranged sequentially in time; the system works with ph1 to ph4 as a cycle;

[0043] (1) When the system is in ph1, SW1 is closed and SW2 is disconnected. At this time, the COS path is selected to enter the PGA module for signal amplification; the function of MULT1 and MULT2 is to exchange polarity according to the value of the control signal sign, that is, to perform multiplication; when sign is 1, the polarity is not exchanged, that is, v1 = VCOS or v1 = VSIN, on the contrary, when sign is -1, the polarity needs to be exchanged, that is, v1 = -VCOS or v1 = -VSIN; at ph1, sign is set to 1, so the sign is not exchanged, v1 = VCOS is amplified by PGA to obtain v2 = K*VCOS, where K is the amplification factor; at ph1, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0044] (2) When the system is at ph2, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VCOS, and adjusts the value of v1 accordingly; if sign = 1, it means that K*VCOS is greater than 0, so the signal does not exchange polarity, v2 = K*VCOS = K*|VCOS|; if sign = -1, it means that K*VCOS is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VCOS). Since VCOS<0 at this time, v2 = K*(-VCOS) = K*|VCOS|; at ph2, the accumulator works at the same time, adding the v2 signal to v3, that is, v3 = v2 = K*|VCOS|;

[0045] (3) When the system is at ph3, SW1 is disconnected and SW2 is closed. At this time, the SIN path is selected to enter the PGA module for signal amplification; at ph3, sign is set to 1, so the sign is not exchanged, v1 = VSIN is amplified by PGA to obtain v2 = K*VSIN, where K is the amplification factor; at ph3, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0046] (4) When the system is at ph4, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VSIN, and adjusts the value of v1 according to the sign; if sign = 1, it means that K*VSIN is greater than 0, so the polarity is not swapped, v2 = K*VSIN = K*|VSIN|; if sign = -1, it means that K*VSIN is less than 0, and the polarity needs to be swapped, and v2 becomes K*(-VSIN). Since VSIN<0 at this time, v2 = K*(-VSIN) = K*|VSIN|; at ph4, the accumulator works at the same time, and the v2 signal is added to v3, and combined with the result accumulated at ph2, v3 = K*(|VCOS|+|VSIN|) is obtained; v3 represents the absolute value sum of the two AMR signals. For AMR magnetic resistance with nonlinear distortion, v3 reflects the strength of the external magnetic field B;

[0047] When the system is at ph4, comparator CMP2 also works, comparing v3 and vth, and outputting a signal dout according to the result, that is, when the magnetic field strength is greater than a certain threshold, dout is 1, otherwise dout is 0; dout is used as a digital switch quantity and is used as an actual switching element or logic control of the MCU.

[0048] The beneficial effects of the present invention are as follows: the magnetic field strength detection system and method proposed in the present invention can realize the detection of magnetic field strength through a simple circuit structure, thereby improving the reliability of the system; at the same time, it can reduce errors and improve detection accuracy.

[0049] The present invention uses a relatively simple circuit structure to realize the strength detection of two-dimensional AMR magnetoresistive signals, avoiding the difficult-to-handle operation of square operation. The components used in the present invention are the most commonly used circuit modules, and the structure is simple and reliable.

[0050] For AMR magnetic resistance with nonlinear distortion, the error of absolute value sum operation is smaller than that of modulus operation (square sum and root). Because the waveforms of VCOS and VSIN are closer to triangle waves than sine and cosine waveforms, the absolute value sum operation is adopted at this time, and the change of the magnetic field amplitude detected at all angles is small.

[0051] The present invention takes into account the nonlinear distortion characteristics of the actual AMR magnetic resistance and uses the absolute value sum method to replace the square sum, so as to realize the detection of the strength of the external magnetic field. The obtained magnetic field strength detection result can be used to realize: (1) magnetic switch function: when the external magnetic field strength reaches a certain threshold, the switch is closed, otherwise the switch is opened (2) the real-time output of the magnetic field strength converted into an analog voltage signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 Schematic diagram of a two-dimensional AMR magnetoresistive Wheatstone bridge in the prior art.

[0053] Figure 2 Schematic diagram of the angle q of the external magnetic field B in the prior art.

[0054] Figure 3 Schematic diagram of the change curves of ideal VCOS and VSIN with magnetic field angle q under different magnetic field intensities in the prior art.

[0055] Figure 4 It is a schematic diagram of the curves of actual VCOS and VSIN changing with the magnetic field angle q when nonlinear distortion exists in the prior art.

[0056] Figure 5 Schematic diagram of the composition of a magnetic switch system in one embodiment of the present invention.

[0057] Figure 6 FIG. 1 is an operation sequence of a magnetic switch system in one embodiment of the present invention.

[0058] Figure 7 FIG. 4 is a schematic diagram of the composition of an analog voltage output system in one embodiment of the present invention.

[0059] Figure 8 Schematic diagram comparing the detection effects of the absolute value sum method and the modulus method on the strength of the magnetic field in one embodiment of the present invention.

[0060] Fig. 9 Schematic diagram of the composition of a magnetic field strength detection system in one embodiment of the present invention. DETAILED DESCRIPTION

[0061] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0062] In order to further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0063] The description in this section is only for several typical embodiments, and the present invention is not limited to the scope of the embodiments. The same or similar prior art means and some technical features in the embodiments are mutually replaced within the scope of the present invention.

[0064] The description of the steps in each embodiment in the specification is only for the convenience of explanation, and the implementation method of the present application is not limited by the order of implementation of the steps.

[0065] The term "connection" as used in the specification includes both direct connection and indirect connection, such as connection through some active devices, passive devices or electrically conductive media; it may also include connection through other active devices or passive devices known to those skilled in the art on the basis of achieving the same or similar functional purposes, such as connection through circuits or components such as switches and follower circuits.

[0066] The present invention discloses a magnetic field strength detection system, which performs an absolute value sum operation on a COS path AMR output signal and a SIN path AMR output signal of a two-dimensional AMR magnetic resistance to achieve detection of magnetic field strength.

[0067] In one embodiment of the present invention, the magnetic field strength detection system includes: a first absolute value acquisition circuit, a second absolute value acquisition circuit and an accumulation circuit. The input end of the first absolute value acquisition circuit is connected to the first output signal of the AMR magnetic resistance, and the absolute value of the first output signal is acquired; the input end of the second absolute value acquisition circuit is connected to the second output signal of the AMR magnetic resistance, and the absolute value of the second output signal is acquired. The input end of the accumulation circuit is respectively connected to the first absolute value acquisition circuit and the second absolute value acquisition circuit, so as to accumulate the absolute value output by the first absolute value acquisition circuit and the absolute value output by the second absolute value acquisition circuit, and output the accumulation result as a detection signal to realize the detection of the strength of the magnetic field.

[0068] Figure 5 This is a schematic diagram of the composition of a magnetic switch system in one embodiment of the present invention; please refer to Figure 5 In one embodiment of the present invention, the magnetic field strength detection system (applied to a magnetic switch system) includes: a two-dimensional AMR magnetoresistor 2D-AMR, a first switch SW1, a first multiplier MULT1, a second multiplier MULT2, a second switch SW2, a variable gain amplifier PGA, a first comparator CMP1, a second comparator CMP2, an accumulator INT and a reference signal generating module VRGEN (of course, the two-dimensional AMR magnetoresistor 2D-AMR may not be a part of the magnetic field strength detection system).

[0069] The input end of the first multiplier MULT1 is used to connect the first output signal VCOS of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the first multiplier MULT1; the two-dimensional AMR magnetoresistor 2D-AMR output end of the first multiplier MULT1 is connected to the first end of the first switch SW1.

[0070] The input end of the second multiplier MULT2 is used to connect the second output signal VSIN of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the second multiplier MULT2; the output end of the second multiplier MULT2 is connected to the first end of the second switch SW2.

[0071] The second end of the first switch SW1 is connected to the variable gain amplifier PGA, and the second end of the second switch SW2 is connected to the variable gain amplifier PGA. The output end of the variable gain amplifier PGA is respectively connected to the first input end of the first comparator CMP1 and the input end of the accumulator INT; the second input end of the first comparator CMP1 is grounded. The output end of the accumulator INT is connected to the first input end of the second comparator CMP2, and the output end of the reference signal generating module VRGEN is connected to the second input end of the second comparator CMP2; the output end of the second comparator CMP2 outputs a detection signal to detect the strength of the magnetic field.

[0072] Figure 7 FIG. 1 is a schematic diagram of the composition of an analog voltage output system in an embodiment of the present invention; please refer to FIG. Figure 7 In one embodiment of the present invention, the magnetic field strength detection system (applied to the analog voltage output system) includes: a two-dimensional AMR magnetoresistor 2D-AMR, a first switch SW1, a first multiplier MULT1, a second multiplier MULT2, a second switch SW2, a variable gain amplifier PGA, a first comparator CMP1, an accumulator INT and a sampling and holding circuit S / H (of course, the two-dimensional AMR magnetoresistor 2D-AMR may not be a part of the magnetic field strength detection system).

[0073] The input end of the first multiplier MULT1 is used to connect the first output signal VCOS of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the first multiplier MULT1; the output end of the first multiplier MULT1 is connected to the first end of the first switch SW1.

[0074] The input end of the second multiplier MULT2 is used to connect the second output signal VSIN of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the second multiplier MULT2; the output end of the second multiplier MULT2 is connected to the first end of the second switch SW2.

[0075] The second end of the first switch SW1 is connected to the variable gain amplifier PGA, and the second end of the second switch SW2 is connected to the variable gain amplifier PGA. The output end of the variable gain amplifier PGA is respectively connected to the first input end of the first comparator CMP1 and the input end of the accumulator INT; the second input end of the first comparator CMP1 is grounded. The output end of the accumulator INT is connected to the input end of the sampling and holding circuit S / H; the output end of the sampling and holding circuit S / H outputs a detection signal to detect the strength of the magnetic field.

[0076] Figure 7 Connection method and Figure 5 The difference is that the comparator CMP2 is replaced by a sample-and-hold circuit S / H, which outputs an analog voltage signal vout. The rest of the connections are the same as Figure 5 Same, no repetition.

[0077] Figure 7 The working principle and Figure 5 The difference is that at ph4, or at the falling edge of ph4, the S / H circuit samples the signal v3 = K*(|VCOS|+|VSIN|) at this time, and holds the signal at other times, thereby obtaining an analog voltage output vout. This analog voltage reflects the strength of the external magnetic field.

[0078] As a demonstration of the practical effect of the present invention, for Figure 4 The AMR magnetoresistive output with nonlinear distortion shown in the figure has a smaller change in the external magnetic field intensity after adopting the above absolute value summation method compared to the square sum root method (modulus), as shown in FIG. Figure 8 The change of the normalized magnetic field intensity calculated by the absolute value summation method at all angles is within 11%, while the change of the normalized magnetic field intensity calculated by the modulo operation can reach 22%.

[0079] Figure 5 and Figure 7 The system structures shown are all schematic diagrams, and extensions and variations based on them are all within the scope of protection of the present invention, including but not limited to the following: PGA, INT, CMP1 and CMP2, VRGEN, and S / H circuits are changed to differential structures; common technologies such as chopping circuits and filtering circuits are added to the system to eliminate mismatch (offset) (wherein the chopping circuit is used to chop the set part of the sine wave, and the filtering circuit is used to filter the input signal). Fig. 9 FIG. 1 is a schematic diagram of the composition of a magnetic field strength detection system according to an embodiment of the present invention; please refer to FIG. Fig. 9 In one embodiment of the present invention, the connection relationship between the chopper circuit and the filter circuit and other components can be as follows: Fig. 9 Of course, other connection modes may be used; or, only a chopper circuit may be provided without a filter circuit, or only a filter circuit may be provided without a chopper circuit. Figure 7 An analog driver (buffer) can be added after the S / H circuit to enhance the output drive capability; Figure 7 An analog-to-digital converter can be added after the S / H circuit to obtain a digital signal representing the strength of the magnetic field; a certain phase can be added on the basis of ph1, ph2, ph3, ph4 to obtain better signal quality and lower offset, etc.

[0080] In one embodiment of the present invention, the magnetic field strength detection system further includes a phase generation module for generating four phases ph1, ph2, ph3, ph4 arranged in sequence in time; the system works with ph1 to ph4 as a cycle (e.g. Figure 6 shown);

[0081] (1) When the system is in ph1, SW1 is closed and SW2 is disconnected. At this time, the COS path is selected to enter the PGA module for signal amplification; the function of MULT1 and MULT2 is to exchange polarity according to the value of the control signal sign, that is, to perform multiplication; when sign is 1, the polarity is not exchanged, that is, v1 = VCOS or v1 = VSIN, on the contrary, when sign is -1, the polarity needs to be exchanged, that is, v1 = -VCOS or v1 = -VSIN; at ph1, sign is set to 1, so the sign is not exchanged, v1 = VCOS is amplified by PGA to obtain v2 = K*VCOS, where K is the amplification factor; at ph1, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0082] (2) When the system is at ph2, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VCOS, and adjusts the value of v1 accordingly; if sign = 1, it means that K*VCOS is greater than 0, so the signal does not exchange polarity, v2 = K*VCOS = K*|VCOS|; if sign = -1, it means that K*VCOS is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VCOS). Since VCOS<0 at this time, v2 = K*(-VCOS) = K*|VCOS|; at ph2, the accumulator works at the same time, adding the v2 signal to v3, that is, v3 = v2 = K*|VCOS|;

[0083] (3) When the system is in ph3, the operation on VSIN is similar to ph1; SW1 is disconnected, SW2 is closed, and the SIN path is selected to enter the PGA module for signal amplification; at ph3, sign is set to 1, so the sign is not exchanged, v1 = VSIN is amplified by PGA to obtain v2 = K*VSIN, where K is the amplification factor; at ph3, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0084] (4) When the system is at ph4, the operation on VSIN is similar to that at ph2; CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VSIN, and adjusts the value of v1 according to the sign; if sign = 1, it means that K*VSIN is greater than 0, so the polarity is not swapped, v2 = K*VSIN = K*|VSIN|; if sign = -1, it means that K*VSIN is less than 0, and the polarity needs to be swapped, and v2 becomes K*(-VSIN). Since VSIN<0 at this time, v2 = K*(-VSIN) = K*|VSIN|; at ph4, the accumulator works at the same time, adding the v2 signal to v3, and combining the result accumulated at ph2 to obtain v3 = K*(|VCOS|+|VSIN|); v3 represents the absolute value sum of the two AMR signals. For AMR magnetic resistance with nonlinear distortion, v3 reflects the strength of the external magnetic field B;

[0085] When the system is at ph4, comparator CMP2 also works, comparing v3 and vth, and outputting a signal dout according to the result, that is, when the magnetic field strength is greater than a certain threshold, dout is 1, otherwise dout is 0; dout is used as a digital switch quantity and is used as an actual switching element or logic control of the MCU.

[0086] Of course, the phase generating module can add additional phases on the basis of forming ph1, ph2, ph3, and ph4, so as to obtain better signal quality and lower mismatch offset.

[0087] The present invention discloses a magnetic field strength detection method applicable to two-dimensional AMR magnetoresistance, which is particularly suitable for the case where the AMR magnetoresistance has nonlinear distortion. The absolute value summation operation is performed on the COS path AMR output signal and the SIN path AMR output signal of the two-dimensional AMR magnetoresistance to realize the detection of the magnetic field strength, thereby replacing the traditional modulus (square sum and root taking) method.

[0088] In one embodiment of the present invention, the magnetic field strength detection method further comprises:

[0089] Obtaining the absolute value of the first output signal of the AMR magnetoresistance;

[0090] Obtaining the absolute value of the second output signal of the AMR magnetoresistance;

[0091] The absolute value of the first output signal of the AMR magnetoresistance and the absolute value of the second output signal of the AMR magnetoresistance are accumulated, and the accumulated result is output as a detection signal.

[0092] In one embodiment of the present invention, the magnetic field strength detection method further comprises: generating four phases ph1, ph2, ph3, ph4 arranged sequentially in time; and the system works with ph1 to ph4 as a cycle.

[0093] (1) When the system is in ph1, SW1 is closed and SW2 is disconnected. At this time, the COS path is selected to enter the PGA module for signal amplification; the function of MULT1 and MULT2 is to exchange polarity according to the value of the control signal sign, that is, to perform multiplication; when sign is 1, the polarity is not exchanged, that is, v1 = VCOS or v1 = VSIN, on the contrary, when sign is -1, the polarity needs to be exchanged, that is, v1 = -VCOS or v1 = -VSIN; at ph1, sign is set to 1, so the sign is not exchanged, v1 = VCOS is amplified by PGA to obtain v2 = K*VCOS, where K is the amplification factor; at ph1, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0094] (2) When the system is at ph2, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VCOS, and adjusts the value of v1 accordingly; if sign = 1, it means that K*VCOS is greater than 0, so the signal does not exchange polarity, v2 = K*VCOS = K*|VCOS|; if sign = -1, it means that K*VCOS is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VCOS). Since VCOS<0 at this time, v2 = K*(-VCOS) = K*|VCOS|; at ph2, the accumulator works at the same time, adding the v2 signal to v3, that is, v3 = v2 = K*|VCOS|;

[0095] (3) When the system is in ph3, the operation on VSIN is similar to ph1; SW1 is disconnected, SW2 is closed, and the SIN path is selected to enter the PGA module for signal amplification; at ph3, sign is set to 1, so the sign is not exchanged, v1 = VSIN is amplified by PGA to obtain v2 = K*VSIN, where K is the amplification factor; at ph3, the accumulator INT and the comparator CMP2 do not work and are in a reset state;

[0096] (4) When the system is at ph4, the operation on VSIN is similar to that at ph2; CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VSIN, and adjusts the value of v1 according to the sign; if sign = 1, it means that K*VSIN is greater than 0, so the polarity is not swapped, v2 = K*VSIN = K*|VSIN|; if sign = -1, it means that K*VSIN is less than 0, and the polarity needs to be swapped, and v2 becomes K*(-VSIN). Since VSIN<0 at this time, v2 = K*(-VSIN) = K*|VSIN|; at ph4, the accumulator works at the same time, and the v2 signal is added to v3, and combined with the result accumulated at ph2, v3 = K*(|VCOS|+|VSIN|) is obtained; v3 represents the absolute value sum of the two AMR signals. For the AMR magnetic resistance with nonlinear distortion, v3 reflects the strength of the external magnetic field B;

[0097] When the system is at ph4, comparator CMP2 also works, comparing v3 and vth, and outputting a signal dout according to the result, that is, when the magnetic field strength is greater than a certain threshold, dout is 1, otherwise dout is 0; dout is used as a digital switch quantity and is used as an actual switching element or logic control of the MCU.

[0098] In summary, the magnetic field strength detection system and method proposed in the present invention can realize the detection of magnetic field strength through a simple circuit structure, thereby improving the reliability of the system; at the same time, it can reduce errors and improve detection accuracy.

[0099] The present invention uses a relatively simple circuit structure to realize the strength detection of two-dimensional AMR magnetoresistive signals, avoiding the difficult-to-handle operation of square operation. The components used in the present invention are the most commonly used circuit modules, and the structure is simple and reliable.

[0100] For AMR magnetic resistance with nonlinear distortion, the error of absolute value sum operation is smaller than that of modulus operation (square sum and root). Because the waveforms of VCOS and VSIN are closer to triangle waves than sine and cosine waveforms, the absolute value sum operation is adopted at this time, and the change of the magnetic field amplitude detected at all angles is small.

[0101] The present invention takes into account the nonlinear distortion characteristics of the actual AMR magnetic resistance and uses the absolute value sum method to replace the square sum, so as to realize the detection of the strength of the external magnetic field. The obtained magnetic field strength detection result can be used to realize: (1) magnetic switch function: when the external magnetic field strength reaches a certain threshold, the switch is closed, otherwise the switch is opened (2) the real-time output of the magnetic field strength converted into an analog voltage signal.

[0102] It should be noted that the present application can be implemented in software and / or a combination of software and hardware; for example, it can be implemented using an application-specific integrated circuit (ASIC), a general-purpose computer, or any other similar hardware device. In some embodiments, the software program of the present application can be executed by a processor to implement the above steps or functions. Similarly, the software program of the present application (including related data structures) can be stored in a computer-readable recording medium; for example, a RAM memory, a magnetic or optical drive or a floppy disk and the like. In addition, some steps or functions of the present application can be implemented in hardware; for example, as a circuit that cooperates with a processor to perform various steps or functions.

[0103] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0104] The description and application of the present invention here are illustrative, and it is not intended to limit the scope of the present invention to the above-mentioned embodiments. The effects or advantages involved in the embodiments may not be embodied in the embodiments due to interference from various factors, and the description of the effects or advantages is not used to limit the embodiments. The deformation and change of the embodiments disclosed here are possible, and the replacement of the embodiments and the various equivalent parts are well known to those of ordinary skill in the art. It should be clear to those skilled in the art that the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials and parts without departing from the spirit or essential features of the present invention. Other deformations and changes can be made to the embodiments disclosed here without departing from the scope and spirit of the present invention.

Claims

1. A magnetic field strength detection system, characterized in that: The magnetic field strength detection system performs an absolute value sum operation on the COS path AMR output signal and the SIN path AMR output signal of the two-dimensional AMR magnetic resistance to detect the strength of the magnetic field; The magnetic field strength detection system comprises: a first switch SW1, a first multiplier MULT1, a second multiplier MULT2, a second switch SW2, a variable gain amplifier PGA, a first comparator CMP1, a second comparator CMP2, an accumulator INT and a reference signal generating module VRGEN; The input end of the first multiplier MULT1 is used to connect the first output signal VCOS of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the first multiplier MULT1; the output end of the first multiplier MULT1 is connected to the first end of the first switch SW1; The input end of the second multiplier MULT2 is used to connect the second output signal VSIN of the two-dimensional AMR magnetoresistor 2D-AMR, the output end of the first comparator CMP1 is connected to the input end of the second multiplier MULT2; the output end of the second multiplier MULT2 is connected to the first end of the second switch SW2; The second end of the first switch SW1 is connected to the variable gain amplifier PGA, and the second end of the second switch SW2 is connected to the variable gain amplifier PGA; The output end of the variable gain amplifier PGA is respectively connected to the first input end of the first comparator CMP1 and the input end of the accumulator INT; the second input end of the first comparator CMP1 is grounded; The output end of the accumulator INT is connected to the first input end of the second comparator CMP2, and the output end of the reference signal generating module VRGEN is connected to the second input end of the second comparator CMP2; the output end of the second comparator CMP2 outputs a detection signal to realize the detection of the strength of the magnetic field; The magnetic field strength detection system further includes a phase generation module for generating four phases ph1, ph2, ph3, ph4 arranged sequentially in time; the system works with ph1 to ph4 as a cycle; (1) When the system is in ph1, SW1 is closed and SW2 is disconnected. At this time, the COS path is selected to enter the PGA module for signal amplification; the function of MULT1 and MULT2 is to exchange polarity according to the value of the control signal sign, that is, to perform multiplication; when sign is 1, the polarity is not exchanged, that is, v1=VCOS or v1=VSIN, on the contrary, when sign is -1, the polarity needs to be exchanged, that is, v1=-VCOS or v1=-VSIN; at ph1, sign is set to 1, so the sign is not exchanged, v1=VCOS is amplified by PGA to obtain v2=K*VCOS, where K is the amplification factor; at ph1, the accumulator INT and the second comparator CMP2 do not work and are in a reset state; (2) When the system is at ph2, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VCOS and adjust the value of v1 accordingly; if sign = 1, it means that K*VCOS is greater than 0, so the signal does not exchange polarity, v2 = K*VCOS = K*|VCOS|; if sign = -1, it means that K*VCOS is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VCOS); since VCOS<0 at this time, v2 = K*(-VCOS) = K*|VCOS|; at ph2, the accumulator works at the same time, adding the v2 signal to v3, that is, v3 = v2 = K*|VCOS|; where v3 is the voltage at the output terminal of the accumulator INT; (3) When the system is at ph3, SW1 is disconnected and SW2 is closed. At this time, the SIN path is selected to enter the PGA module for signal amplification. At ph3, sign is set to 1, so the sign is not exchanged. v1=VSIN is amplified by PGA to obtain v2=K*VSIN, where K is the amplification factor. At ph3, the accumulator INT and the second comparator CMP2 do not work and are in a reset state. (4) When the system is at ph4, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VSIN, and adjusts the value of v1 according to the sign; if sign = 1, it means that K*VSIN is greater than 0, so the polarity is not exchanged, v2 = K*VSIN = K*|VSIN|; if sign = -1, it means that K*VSIN is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VSIN); since VSIN<0 at this time, v2 = K*(-VSIN) = K*|VSIN|; at ph4, the accumulator works at the same time, adding the v2 signal to v3, and combining the result accumulated at ph2, v3 = K*(|VCOS|+|VSIN|); v3 represents the absolute value sum of the two AMR signals. For the AMR magnetic resistance with nonlinear distortion, v3 reflects the strength of the external magnetic field B; When the system is at ph4, the second comparator CMP2 also works, compares v3 with vth, and outputs a signal dout according to the result, that is, when the magnetic field strength is greater than a certain threshold, dout is 1, otherwise dout is 0; dout is a digital switch quantity, used as an actual switch element or MCU logic control; Among them, v1 is the input voltage of the variable gain amplifier PGA, and v2 is the output voltage of the variable gain amplifier PGA.

2. The magnetic field strength detection system according to claim 1, characterized in that: The magnetic field strength detection system comprises: A first absolute value acquisition circuit, whose input terminal is connected to the first output signal of the AMR magnetic resistance, and acquires the absolute value of the first output signal; A second absolute value acquisition circuit, whose input terminal is connected to the second output signal of the AMR magnetic resistance, and acquires the absolute value of the second output signal; and The accumulator circuit has its input ends respectively connected to the first absolute value acquisition circuit and the second absolute value acquisition circuit, for accumulating the absolute value output by the first absolute value acquisition circuit and the absolute value output by the second absolute value acquisition circuit, and outputting the accumulation result as a detection signal to realize the detection of the strength of the magnetic field.

3. The magnetic field strength detection system according to any one of claims 1 to 2, characterized in that: The magnetic field strength detection system further comprises: at least one of a chopper circuit, a filter circuit, an analog driver and an analog-to-digital converter; The chopper circuit is used to chop a set part of a sine wave; the filter circuit is used to filter an input signal; the chopper circuit and the filter circuit are used to eliminate mismatch; The analog driver is used to enhance the output driving capability; the analog-to-digital converter is used to obtain a digital signal representing the strength of the magnetic field; The phase generating module adds an additional phase on the basis of forming ph1, ph2, ph3, and ph4, so as to obtain better signal quality and lower mismatch offset.

4. A magnetic field strength detection method of a magnetic field strength detection system according to any one of claims 1 to 3, characterized in that: The magnetic field strength detection method comprises: performing an absolute value sum operation on a COS path AMR output signal and a SIN path AMR output signal of a two-dimensional AMR magnetoresistor to realize the detection of the strength of the magnetic field.

5. The magnetic field strength detection method according to claim 4, characterized in that: The magnetic field strength detection method further comprises: Obtaining the absolute value of the first output signal of the AMR magnetoresistance; Obtaining the absolute value of the second output signal of the AMR magnetoresistance; The absolute value of the first output signal of the AMR magnetoresistance and the absolute value of the second output signal of the AMR magnetoresistance are accumulated, and the accumulated result is output as a detection signal.

6. The magnetic field strength detection method according to claim 5, characterized in that: The magnetic field strength detection method further comprises: generating four phases ph1, ph2, ph3, ph4 arranged sequentially in time; the system works with ph1 to ph4 as a cycle; (1) When the system is in ph1, SW1 is closed and SW2 is disconnected. At this time, the COS path is selected to enter the PGA module for signal amplification; the function of MULT1 and MULT2 is to exchange polarity according to the value of the control signal sign, that is, to perform multiplication; when sign is 1, the polarity is not exchanged, that is, v1=VCOS or v1=VSIN, on the contrary, when sign is -1, the polarity needs to be exchanged, that is, v1=-VCOS or v1=-VSIN; at ph1, sign is set to 1, so the sign is not exchanged, v1=VCOS is amplified by PGA to obtain v2=K*VCOS, where K is the amplification factor; at ph1, the accumulator INT and the second comparator CMP2 do not work and are in a reset state; (2) When the system is at ph2, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VCOS, and adjusts the value of v1 accordingly; if sign = 1, it means that K*VCOS is greater than 0, so the signal does not exchange polarity, v2 = K*VCOS = K*|VCOS|; if sign = -1, it means that K*VCOS is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VCOS); since VCOS < 0 at this time, v2 = K*(-VCOS) = K*|VCOS|; at ph2, the accumulator works at the same time, adding the v2 signal to v3, that is, v3 = v2 = K*|VCOS|; (3) When the system is at ph3, SW1 is disconnected and SW2 is closed. At this time, the SIN path is selected to enter the PGA module for signal amplification. At ph3, sign is set to 1, so the sign is not exchanged. v1=VSIN is amplified by PGA to obtain v2=K*VSIN, where K is the amplification factor. At ph3, the accumulator INT and the second comparator CMP2 do not work and are in a reset state. (4) When the system is at ph4, CMP1 compares v2 with 0 (GND) to determine the sign of the input signal VSIN, and adjusts the value of v1 according to the sign; if sign = 1, it means that K*VSIN is greater than 0, so the polarity is not exchanged, v2 = K*VSIN = K*|VSIN|; if sign = -1, it means that K*VSIN is less than 0, and the polarity needs to be exchanged, and v2 becomes K*(-VSIN); since VSIN<0 at this time, v2 = K*(-VSIN) = K*|VSIN|; at ph4, the accumulator works at the same time, adding the v2 signal to v3, and combining the result accumulated at ph2, v3 = K*(|VCOS|+|VSIN|); v3 represents the absolute value sum of the two AMR signals. For the AMR magnetic resistance with nonlinear distortion, v3 reflects the strength of the external magnetic field B; When the system is at ph4, the second comparator CMP2 also works, compares v3 with vth, and outputs a signal dout according to the result, that is, when the magnetic field strength is greater than a certain threshold, dout is 1, otherwise dout is 0; dout is a digital switch quantity, used as an actual switch element or MCU logic control; Among them, v1 is the input voltage of the variable gain amplifier PGA, v2 is the output voltage of the variable gain amplifier PGA, and v3 is the output voltage of the accumulator INT.

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