Variable resistance memory device and method of manufacturing the same

By setting oxygen-deficient regions in the oxide layer in the variable resistive memory device and utilizing redox reactions to form a uniform oxygen vacancy distribution, the problem of poor operational stability is solved, achieving low power consumption and smooth switching characteristics, making it suitable for highly integrated memory devices.

CN114256413BActive Publication Date: 2026-07-24SK HYNIX INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SK HYNIX INC
Filing Date
2021-05-07
Publication Date
2026-07-24

AI Technical Summary

Technical Problem

Existing variable resistance memory devices exhibit poor operational stability during the control of the formation and disappearance of conductive filaments, making it difficult to achieve the requirements of high integration and low power consumption.

Method used

By setting an oxide layer between the first electrode and the second electrode, the oxide layer contains a first oxygen-deficient region extending in the vertical direction, and by using redox reactions to form an oxygen-deficient region where the distribution of oxygen vacancies is not biased towards the electrode, the conductive path can be controlled.

Benefits of technology

It improves the operational stability of variable resistance memory devices, reduces power consumption, and supports smooth switching characteristics, making it suitable for neural-like devices and multi-bit level memory devices.

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Abstract

A variable resistance memory device and a manufacturing method thereof are provided. The variable resistance memory device includes a first electrode, a second electrode arranged in a vertical direction from the first electrode, and an oxide layer having an oxygen deficiency region extending in the vertical direction between the second electrode and the first electrode.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0124963, filed with the Korean Intellectual Property Office on September 25, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to a storage device, and more specifically, to a variable resistance storage device and a method of manufacturing the same. Background Technology

[0004] The demand for high-performance and high-capacity memory devices is growing rapidly. Therefore, there is a need to develop a new generation of memory devices that offer high integration advantages and can operate at low power consumption.

[0005] Variable resistance memory devices can be configured as metal-insulator-metal (MIM) structures. A variable resistance layer may be included in the variable memory device. This variable resistance layer is disposed between electrodes. The variable resistance layer can be formed from various materials whose resistance states change according to the voltage applied to the electrodes.

[0006] Resistive random access memory (ReRAM), as a variable resistive storage device, allows control over the formation and disappearance of conductive filaments (CFs) in the insulator. Therefore, ReRAM can vary between a high-resistance state (HRS) and a low-resistance state (LRS). CFs can be formed using an electroforming process that induces soft breakdown in the insulator. Because it is difficult to uniformly control the formation and destruction of CFs, operational stability may deteriorate in variable resistive storage devices using the electroforming process. Summary of the Invention

[0007] According to one aspect of this disclosure, a variable resistance storage device is provided, comprising: a first electrode; a second electrode disposed above the first electrode; and a storage cell disposed between the first electrode and the second electrode, the storage cell having a resistance that varies according to the distribution density of oxygen vacancies in the storage cell, wherein the storage cell includes an oxide layer having a first oxygen-deficient region extending in a vertical direction defined as from the first electrode toward the second electrode, and wherein the oxygen vacancies are distributed in the first oxygen-deficient region.

[0008] According to another aspect of this disclosure, a method for manufacturing a variable resistance memory device is provided, the method comprising: forming a first electrode; forming a first layer on the first electrode, wherein the first layer extends in a vertical direction intersecting a surface of the first electrode; forming a second layer on a sidewall of the first layer, wherein the second layer has an oxygen affinity different from that of the first layer and extends in the vertical direction; forming an oxide layer including a first oxygen-deficient region by a redox reaction occurring at an interface between the first layer and the second layer; and forming a second electrode on the oxide layer such that it overlaps with the first oxygen-deficient region. Attached Figure Description

[0009] Examples of embodiments will now be described below with reference to the accompanying drawings; however, the concepts disclosed herein may be embodied in different forms and should not be construed as being limited to the embodiments set forth herein.

[0010] In the accompanying drawings, dimensions may be enlarged for clarity. It will be understood that when an element is referred to as being "between" two elements, it can be the only element between the two elements, or there may be one or more intermediate elements. Throughout the drawings, the same reference numerals refer to the same elements.

[0011] Figure 1A and Figure 1B This is a cross-sectional view schematically illustrating a method of manufacturing a variable resistance storage device according to an embodiment of the present disclosure.

[0012] Figure 2A and Figure 2B It is shown schematically. Figure 1B A cross-sectional view showing the operation of the variable resistance storage device.

[0013] Figure 3 The voltage-current characteristics of a variable resistive storage device according to an embodiment of the present disclosure are shown.

[0014] Figures 4A to 4C This is a cross-sectional view showing a variable resistance storage device according to an embodiment of the present disclosure.

[0015] Figure 5 It shows Figures 4A to 4C Voltage-current characteristics of variable resistive storage devices.

[0016] Figure 6 This is a cross-sectional view showing a variable resistance storage device according to an embodiment of the present disclosure.

[0017] Figure 7 The voltage-current characteristics of a variable resistive storage device according to an embodiment of the present disclosure are shown.

[0018] Figure 8A and Figure 8B This is a view showing an array of intersections according to an embodiment of the present disclosure.

[0019] Figure 9A and Figure 9B This is a view showing an array of intersections according to an embodiment of the present disclosure.

[0020] Figure 10A and Figure 10B This is a view illustrating a portion of a method for manufacturing an array of cross points according to an embodiment of the present disclosure.

[0021] Figures 11A to 11D This is a cross-sectional view illustrating a method for forming a storage cell according to an embodiment of the present disclosure.

[0022] Figure 12 It is shown Figure 11D A 3D view of the storage unit shown.

[0023] Figure 13A and Figure 13B This is a cross-sectional view illustrating a method for forming a storage cell according to an embodiment of the present disclosure.

[0024] Figure 14 It is shown Figure 13B A 3D view of the storage unit shown.

[0025] Figure 15A and Figure 15B This is a cross-sectional view illustrating a method for forming a storage cell according to an embodiment of the present disclosure.

[0026] Figure 16 It is shown Figure 15B A 3D view of the storage unit shown.

[0027] Figure 17 and Figure 18 This is a view illustrating the process performed after the formation of a memory cell according to an embodiment of the present disclosure.

[0028] Figure 19 This is a block diagram illustrating the configuration of a storage system according to an embodiment of the present disclosure.

[0029] Figure 20 This is a block diagram illustrating the configuration of a computing system according to an embodiment of the present disclosure. Detailed Implementation

[0030] The specific structural or functional descriptions disclosed herein are merely illustrative and intended to describe embodiments based on the concepts of this disclosure. Embodiments based on the concepts of this disclosure may be implemented in various forms and should not be construed as limited to the specific embodiments set forth herein.

[0031] In the following text, the terms "first" and "second" are used to distinguish one component from another. Therefore, components should not be limited by these terms.

[0032] The embodiments provide a variable resistance memory device that can improve operational stability and a method for manufacturing the memory device.

[0033] Figure 1A and Figure 1B This is a cross-sectional view schematically illustrating a method of manufacturing a variable resistance storage device according to an embodiment of the present disclosure.

[0034] refer to Figure 1A To form a variable resistance storage device, a first layer 20 and a second layer 30 may be formed on the first electrode 10. The first layer 20 and the second layer 30 may extend parallel to each other. More specifically, each of the first layer 20 and the second layer 30 may extend in a vertical direction intersecting the surface of the first electrode 10. The first layer 20 and the second layer 30 may contact each other to define an interface 23.

[0035] The first layer 20 and the second layer 30 can be made of materials with different oxygen affinities. In one embodiment, the second layer 30 can be made of a material with a higher oxygen affinity than the first layer 20. In one embodiment, the first layer 20 can include a first transition metal oxide. The second layer 30 can include aluminum, silicon, or a second transition metal oxide. The second transition metal oxide can include a transition metal with a higher oxidation rate than the transition metal of the first transition metal oxide.

[0036] When the second layer 30 comprises a conductive material such as aluminum or silicon, the second layer 30 can be formed with a narrow width, making the entire second layer 30 readily oxidized in subsequent redox reactions. In one embodiment, the width W2 of the second layer 30 can be smaller than the width W1 of the first layer 20.

[0037] refer to Figure 1B ,because Figure 1A The difference in oxygen affinity between the first layer 20 and the second layer 30 shown may lead to a redox reaction. In one embodiment, a redox reaction can occur when the second layer 30 is formed on the sidewall of the first layer 20 using an atomic layer deposition process. In another embodiment, annealing can be performed to activate the redox reaction. In yet another embodiment, a redox reaction can occur after a certain period of time following contact between the first layer 20 and the second layer 30, resulting in a thermodynamic equilibrium at the interface between the first layer 20 and the second layer 30.

[0038] The oxygen affinity difference between the first layer 20 and the second layer 30 and the annealing temperature can be controlled to change the Figure 1AThe oxide thickness of the second layer 30 is shown. For example, when... Figure 1A When the second layer 30 shown includes silicon or aluminum, the redox reaction can be controlled to make... Figure 1A The entire second layer 30 shown can be oxidized.

[0039] The redox reaction can begin at interface 23 between the first layer 20 and the second layer 30, as per reference. Figure 1A A description has been provided. (Reference) Figure 1B An oxide layer 40, including an oxygen-deficient region 60, can be formed through a redox reaction. The oxygen-deficient region 60 may include oxygen vacancies. Oxygen vacancies can be formed through a redox reaction and can be distributed extending from interface 23 on both sides of interface 23. The closer to interface 23, the greater the density of oxygen vacancies in the oxygen-deficient region 60, and the greater the density, which decreases with increasing distance from interface 23.

[0040] The oxide layer 40 may further include a first region 20A and a second region 30A. The second region 30A may include silicon oxide (SiO2). x ), aluminum oxide (AlO) x (or a second transition metal oxide.) The oxygen-deficient region 60 can be located between the first region 20A and the second region 30A.

[0041] In one embodiment, Figure 1A The first layer 20 shown can be hafnium oxide (HfO) x ),and Figure 1A The second layer 30 shown can be silicon. A mixture of silicon and hafnium oxide (Si:HfO) can be produced through the redox reaction of silicon and hafnium oxide. x A mixture of silicon and hafnium oxide (Si:HfO) x This can constitute an oxygen-deficient region 60. Additionally, the first region 20A may include remaining hafnium oxide (HfO). x Furthermore, the second region 30A may include silicon oxide (SiO2). x As the hafnium concentration moves toward the interface 23 in the first region 20A, the silicon concentration can decrease, and as the silicon concentration moves toward the interface 23 from the second region 30A, the silicon concentration can decrease.

[0042] After forming the oxide layer 40 including the oxygen-deficient region 60 as described above, a second electrode 50 covering the oxide layer 40 can be formed. The second electrode 50 can be arranged in a vertical direction from the first electrode 10. According to one embodiment of the present disclosure, each of the oxygen-deficient region 60, the first region 20A, and the second region 30A of the oxide layer 40 can extend in a vertical direction between the second electrode 50 and the first electrode 10.

[0043] As described above, according to the embodiments of this disclosure, since oxygen vacancies are generated from interface 23, oxygen vacancies in oxygen-deficient region 60 will not be biased towards either the first electrode 10 or the second electrode 50. Therefore, oxygen vacancies can be uniformly distributed in the vertical direction between the first electrode 10 and the second electrode 50.

[0044] Figure 2A and Figure 2B It is shown schematically. Figure 1B A cross-sectional view showing the operation of the variable resistance storage device.

[0045] refer to Figure 2A When an electric field is formed between the first electrode 10 and the second electrode 50, oxygen vacancies can concentrate in the oxygen-deficient region 60 in the direction in which the electric field is formed, thereby forming a conductive path similar to a conductive filament (CF). Due to this distribution of oxygen vacancies, an oxygen-deficient region 60L with a low resistance state (LRS) can be provided. In one embodiment, to achieve the setting operation of the low resistance state LRS of the variable resistance storage device, a negative (-) voltage can be applied to the first electrode 10, and a positive (+) voltage can be applied to the second electrode 50.

[0046] refer to Figure 2B To achieve the reset operation of the high resistance state (HRS) of the variable resistance memory device, a configuration can be formed in conjunction with... Figure 2A The electric field is in the opposite direction to the direction shown. In one embodiment, for a reset operation, a positive (+) voltage is applied to the first electrode 10, and a negative (-) voltage can be applied to the second electrode 50.

[0047] When a reverse electric field is formed, the distribution density of oxygen vacancies in the oxygen-deficient region 60 can decrease due to the migration of oxygen vacancies. This change in the distribution density of oxygen vacancies provides an oxygen-deficient region 60H corresponding to the high-resistivity state HRS.

[0048] Figure 3 The voltage-current characteristics of a variable resistive storage device according to an embodiment of the present disclosure are shown.

[0049] Figure 3 The solid line 1 shown represents the switching behavior of a variable resistor storage device according to an embodiment of the present disclosure. The switching behavior shown by solid line 1 can be controlled as described in reference... Figure 2A and Figure 2B The distribution density of oxygen vacancies embedded in the oxygen-deficient region is controlled.

[0050] Figure 3 The dashed line 2 shown represents the switching behavior of a variable resistive storage device based on the control of the formation and destruction of conductive filaments (CF) through an electroforming method.

[0051] Referring to solid line 1 and dashed line 2, the change in resistance state of the variable resistance storage device according to an embodiment of the present disclosure is more gradual than the change represented by dashed line 2. Referring to solid line 1 and dashed line 2, compared to the variable resistance storage device represented by dashed line 2, the variable resistance storage device according to an embodiment of the present disclosure can perform switching operations with relatively low current.

[0052] As described above, because the variable resistance memory device according to embodiments of the present disclosure is driven with low power and because the change in its resistance state is gradual, the variable resistance memory device according to embodiments of the present disclosure can be used in devices that require smooth switching characteristics and low power drive. In one embodiment, the variable resistance memory device can be applied to a neural-like device or a multi-bit level memory device.

[0053] Figures 4A to 4C This is a cross-sectional view showing a variable resistance storage device according to an embodiment of the present disclosure.

[0054] refer to Figures 4A to 4C The oxide layers 140A, 140B, and 140C of the variable resistor storage device may respectively include oxygen-deficient regions 160A, 160B, and 160C, which are substantially similar to those described above and referenced. Figure 1B The oxygen-deficient region 60 is described. For example, each of oxygen-deficient regions 160A, 160B, and 160C can be referred to as... Figure 1A and Figure 1B The description is defined by a redox reaction that utilizes the difference in oxygen affinity between the first and second layers.

[0055] Except for oxygen-deficient regions 160A, 160B, or 160C, each of oxide layers 140A, 140B, and 140C may respectively include a first region 120A, 120B, or 120C and a second region 130A, 130B, or 130C. Oxide layers 140A, 140B, and 140C are as described above and referenced. Figure 1B The oxide layer 40 is substantially the same. For example, oxygen-deficient regions 160A, 160B, or 160C can be disposed between the first region 120A, 120B, or 120C and the second region 130A, 130B, or 130C. Each of the oxygen-deficient regions 160A, 160B, or 160C, the first region 120A, 120B, or 120C, and the second region 130A, 130B, or 130C can extend vertically between the second electrode 150A, 150B, or 150C and the first electrode 110A, 110B, or 110C.

[0056] The lengths A, B, and C of the oxygen-deficient regions 160A, 160B, and 160C extending vertically can vary. The resistance of the oxygen-deficient regions 160A, 160B, and 160C increases with the increase of their lengths A, B, and C.

[0057] Figure 5 It shows Figures 4A to 4C Voltage-current characteristics of variable resistive storage devices.

[0058] refer to Figure 5 The switching behavior can be based on Figures 4A to 4C The oxygen-deficient regions 160A, 160B, and 160C shown differ in lengths A, B, and C. Specifically, when length C is greater than... Figure 4A and Figure 4B When lengths A and B are shown, as Figure 4C The operable voltage range of the oxygen-deficient region 160C with length C is wider than that of the oxygen-deficient region 160A with length A and the oxygen-deficient region 160B with length B. Similarly, the operable voltage range of the oxygen-deficient region 160B with length B is wider than that of the oxygen-deficient region 160A with length A, which is less than length B.

[0059] Based on the aforementioned switching behavior, each variable resistive memory device according to embodiments of the present disclosure can achieve a greater number of different resistance states in each voltage cycle as the length of the oxygen-deficient region increases. Therefore, in embodiments of the present disclosure, the length of the oxygen-deficient region can be varied according to the multiple resistance states to be achieved. In one embodiment, the length of the oxygen-deficient region applied to a multi-bit level variable resistive memory device can be formed to be longer than the length of the oxygen-deficient region applied to a single-bit level variable resistive memory device.

[0060] Figure 6 This is a cross-sectional view showing a variable resistance storage device according to an embodiment of the present disclosure.

[0061] refer to Figure 6 Similar to the above and refer to Figure 1B The oxide layer 40 of the variable resistance memory device includes an oxygen-deficient region 60, and the oxide layer 240 may include an oxygen-deficient region 260, a first region 220A, and a second region 230A. For example, the oxygen-deficient region 260 may be disposed between the first region 220A and the second region 230A. The oxygen-deficient region 260 may be as described in the reference. Figure 1A and Figure 1BThe region is defined by a redox reaction that utilizes the difference in oxygen affinity between the first and second layers. Each of the first region 220A, the second region 230A, and the oxygen-deficient region 260 can extend from the first electrode 210 toward the second electrode 250.

[0062] The variable resistance storage device may further include a barrier layer 270. The barrier layer 270 may be disposed between the first electrode 210 and the oxide layer 240 or between the second electrode 250 and the oxide layer 240.

[0063] The barrier layer 270 may include an insulating material and can prevent transient current from flowing into the oxygen-deficient region 260. Furthermore, self-rectifying characteristics can be induced by the barrier layer 270.

[0064] The barrier layer 270 may include a chemically stable insulating material. In one embodiment, the barrier layer 270 may include silicon dioxide (SiO2). The thickness of the barrier layer 270 may be formed within a range that allows current to flow between the first electrode 210 and the second electrode 250. In one embodiment, the thickness of the barrier layer 270 may be 10 nm or less.

[0065] Figure 7 The voltage-current characteristics of a variable resistive storage device according to an embodiment of the present disclosure are shown.

[0066] Figure 7 The dashed lines 11 and 13 shown represent the switching behavior of a variable resistive storage device that does not include any barrier layer but includes an oxygen-deficient region in which oxygen vacancies are embedded. Figure 7 Solid lines 12 and 14, as shown, represent the switching behavior of a variable resistive storage device including a barrier layer and an oxygen-deficient region in which oxygen vacancies are embedded. In other words, dashed lines 11 and 13 represent a reference... Figure 1B The voltage-current characteristics of the variable resistor storage device in the set and reset states are described, and solid lines 12 and 14 represent references. Figure 6 The voltage-current characteristics of the variable resistor storage device in its set and reset states are described.

[0067] refer to Figure 7 Based on solid lines 12 and 14 representing the switching behavior of a variable resistor memory device including a blocking layer, and dashed lines 11 and 13 representing the switching behavior of a variable resistor memory device without a blocking layer, it can be seen that the variable resistor memory device including a blocking layer operates with a relatively low current. Furthermore, when a blocking layer is included, as shown by solid line 14, the current remains low when a voltage for the reset state is applied. That is, it can be seen that including a blocking layer in the variable resistor memory device induces self-rectification characteristics.

[0068] Figure 8A and Figure 8B This is a view showing an array of intersections according to an embodiment of the present disclosure.

[0069] refer to Figure 8A and Figure 8B The intersection array may include a first line BL and a second line WL that intersect each other. The first line BL can be used as a first electrode, and the second line WL can be used as a second electrode.

[0070] The storage unit MC1 can be located at the intersection of the first line BL and the second line WL or in the area between them.

[0071] like Figure 8A As shown, the storage unit MC1 may include a variable resistor VR connected to the first line BL and the second line WL.

[0072] Figure 9A and Figure 9B This is a view showing an array of intersections according to an embodiment of the present disclosure.

[0073] refer to Figure 9A and Figure 9B Similar to Figure 8A and Figure 8B The cross-point array shown may include a first line BL and a second line WL that intersect each other. Storage cell MC2 may be located at the intersection of the first line BL and the second line WL, or in the region between them.

[0074] like Figure 9A As shown, the storage unit MC2 may include a variable resistor VR connected to the first line BL and a resistor R connected in series between the variable resistor VR and the second line WL.

[0075] refer to Figure 9B , Figure 9A The resistive device R shown can be implemented using a barrier layer RL disposed between the memory cell MC2 and the second line WL. The barrier layer RL can extend along the second line WL. Similar to the reference above. Figure 6 The described barrier layer 270, the barrier layer RL may include silicon dioxide (SiO2) and may be formed to have a thickness of 10 nm or less.

[0076] Figure 10A and Figure 10B This is a view illustrating a portion of a method for manufacturing an array of cross points according to an embodiment of the present disclosure.

[0077] refer to Figure 10AA first line 603 may be formed on a substrate structure 601. The substrate structure 601 may include a substrate covered with an insulating layer. The first lines 603 may extend parallel to each other. Each of the lines 603 may serve as a first electrode.

[0078] refer to Figure 10B An insulating layer 611 can be formed to cover the first wire 603. The insulating layer 611 can fill the space between the first wires 603.

[0079] The insulating layer 611 may comprise a chemically stable material. In one embodiment, the insulating layer 611 may comprise silicon dioxide (SiO2).

[0080] Subsequently, a storage hole 613 can be formed to penetrate the insulating layer 611. The storage hole 613 may overlap with the first line 603 in the vertical direction.

[0081] Subsequently, storage cells can be formed in storage hole 613 and on first line 603.

[0082] In the following text, references will be made along... Figure 10B The cross-sectional view taken by line I-I' describes a method of forming a storage cell according to various embodiments of the present disclosure.

[0083] Figures 11A to 11D This is a cross-sectional view illustrating a method for forming a storage cell according to an embodiment of the present disclosure. Figures 11A to 11D It is along Figure 10B The section cut by line I-I' shows a cross-sectional view of the manufacturing process.

[0084] refer to Figure 11A The storage hole 613 can penetrate the insulating layer 611 and overlap with the first line 603 disposed on the substrate structure 601. The first line 603 can be exposed through the storage hole 613.

[0085] refer to Figure 11B A first layer 620 can be formed on the sidewall of the storage hole 613. Subsequently, a second layer 630 can be formed on the sidewall of the first layer 620. Each of the first layer 620 and the second layer 630 can extend in a vertical direction intersecting the surface of the first line 603. More specifically, each of the first layer 620 and the second layer 630 can extend along the sidewall of the storage hole 613. The central region of the storage hole 613 remains open and is not filled by either the first layer 620 or the second layer 630.

[0086] The first layer 620 and the second layer 630 can be formed as material layers with different oxygen affinities. In one embodiment, the second layer 630 may include a material having a higher oxygen affinity than the first layer 620.

[0087] In one embodiment, the first layer 620 may include a first transition metal oxide. The second layer 630 may include aluminum, silicon, or a second transition metal oxide. The second transition metal oxide may include a transition metal having a higher oxidation rate than the first transition metal oxide. More specifically, the first layer 620 may include hafnium oxide (HfO). x The second layer 630 may include silicon.

[0088] refer to Figure 11C Similar to reference Figure 1B The structure, including the oxide layer 690A of the oxygen-deficient region 660A, can be formed by utilizing a redox reaction. In one embodiment, the oxide layer 690A may include the oxygen-deficient region 660A and a first region 620A and a second region 630A disposed on opposite sides of the oxygen-deficient region 660A.

[0089] The first area 620A can be Figure 11B A portion of the first layer 620 is shown. The second region 630A may be... Figure 11B The second layer 630 shown is an oxide (oxidizing material), or can be substantially similar to... Figure 11B This is a portion of the second layer 630 shown. In one embodiment, the first region 620A may include a first transition metal oxide, and the second region 630A may include aluminum oxide, silicon oxide, or a second transition metal oxide. More specifically, when Figure 11B The first layer 620 shown includes hafnium oxide (HfO). x Furthermore, when the second layer 630 includes silicon, a mixture of silicon and hafnium oxide (Si:HfO) can be generated in the oxygen-deficient region 660A. x Additionally, the first region 620A may include the remaining hafnium oxide (HfO). x Furthermore, the second region 630A may include silicon oxide (SiO2). x ).

[0090] refer to Figure 11D It can be filled with 695 insulating core layer. Figure 11C The central region of the storage hole 613 is shown. The insulating core layer 695 may include a chemically stable material. In one embodiment, the insulating core layer 695 may include silicon dioxide (SiO2).

[0091] You can refer to Figures 11A to 11D The described process is used to form a storage cell including an oxygen-deficient region 660A.

[0092] Figure 12 It is shown Figure 11D A 3D view of the storage unit shown.

[0093] refer to Figure 12 The storage cell may include an insulating core layer 695 and an oxide layer 690A surrounding the insulating core layer 695. The oxide layer 690A may include oxygen-deficient regions 660A with oxygen vacancies, and the oxygen-deficient regions 660A may surround the sidewalls of the insulating core layer 695. A first region 620A of the oxide layer 690A may surround the oxygen-deficient regions 660A, and a second region 630A of the oxide layer 690A may be disposed between the insulating core layer 695 and the oxygen-deficient regions 660A.

[0094] Figure 12 The structure of the storage cell shown can be filled Figure 10B Storage hole 613 is shown. Figure 12 The structure of the storage cell shown can be applied to Figure 8B The storage unit MC1 shown is or Figure 9B The storage unit MC2 is shown.

[0095] Figure 13A and Figure 13B This is a cross-sectional view illustrating a method for forming a storage cell according to an embodiment of the present disclosure.

[0096] refer to Figure 13A You can refer to Figure 10A and Figure 10B The process described is used to provide a storage hole 613. The storage hole 613 can penetrate the insulating layer 611 and overlap with the first line 603 on the substrate structure 601. Subsequently, a first layer 621[1], a second layer 631 and a third layer 621[2] can be sequentially formed on the sidewalls of the storage hole 613.

[0097] Each of the first layer 621[1], the second layer 631, and the third layer 621[2] may extend in a vertical direction intersecting the surface of the first line 603 and may extend along the sidewall of the storage hole 613. The central region of the storage hole 613 is open and is not filled by the first layer 621[1], the second layer 631, or the third layer 621[2].

[0098] The first layer 621[1] and the third layer 621[2] may be formed of the same material. The second layer 631 may be made of a material having a different oxygen affinity than the first layer 621[1] and the third layer 621[2]. In one embodiment, both the first layer 621[1] and the third layer 621[2] may be made of a material having a higher oxygen affinity than the second layer 631. In one embodiment, the second layer 631 may include a first transition metal oxide. Both the first layer 621[1] and the third layer 621[2] may include aluminum, silicon, or a second transition metal oxide. The second transition metal oxide may include a transition metal having a higher oxidation rate than the transition metal of the first transition metal oxide. More specifically, both the first layer 621[1] and the third layer 621[2] may include silicon, and the second layer 631 may include hafnium oxide (HfO). x ).

[0099] refer to Figure 13B ,because Figure 13A The difference in oxygen affinity between the first layer 621[1] and the second layer 631 shown, and Figure 13A The difference in oxygen affinity between the second layer 631 and the third layer 621[2] shown may lead to redox reactions. According to the reference... Figure 1B The same principle applies, allowing redox reactions to begin at the interface between the first layer 621[1] and the second layer 631, and at the interface between the second layer 631 and the third layer 621[2]. Therefore, an oxide layer 690B can be formed, comprising a first oxygen-deficient region 660B1 and a second oxygen-deficient region 660B2. Furthermore, the oxide layer 690B may include a first region 621A1 and a second region 631A disposed on both sides of the first oxygen-deficient region 660B1, and a third region 621A2 disposed on one side of the second oxygen-deficient region 660B2.

[0100] The first region 621A1 and the third region 621A2 can be respectively determined by... Figure 13A The first layer 621[1] and the third layer 621[2] shown in the figure are constituted, or may be constituted by oxides of the first layer 621[1] and the third layer 621[2], respectively. For example, the second region 631A can be configured as Figure 13A A portion of the second layer 631 shown. In one embodiment, the second region 631A may include a first transition metal oxide, and both the first region 621A1 and the third region 621A2 may include aluminum oxide, silicon oxide, or a second transition metal oxide. More specifically, when Figure 13A The second layer 631 shown includes hafnium oxide (HfO). x )and Figure 13AWhen the first layer 621[1] and the third layer 621[2] shown include silicon, the first oxygen-deficient region 660B1 and the second oxygen-deficient region 660B2 can both include a mixture of silicon and hafnium oxide (Si:HfO). x Additionally, the remaining hafnium oxide (HfO) x The second region 631A can be formed, and both the first region 621A1 and the third region 621A2 can include silicon oxide (SiO2). x ).

[0101] Subsequently, it can be filled with insulating core layer 695. Figure 13A The central area of ​​the storage hole 613 shown. (See reference...) Figure 11D The insulating core layer 695 may include silicon dioxide (SiO2).

[0102] You can refer to Figure 13A and Figure 13B The described process is used to form a storage cell including a first oxygen-deficient region 660B1 and a second oxygen-deficient region 660B2.

[0103] Figure 14 It is shown Figure 13B A 3D view of the storage unit shown.

[0104] refer to Figure 14 The storage cell may include an insulating core layer 695 and an oxide layer 690B surrounding the sidewalls of the insulating core layer 695.

[0105] The oxide layer 690B may include a first oxygen-deficient region 660B1 and a second oxygen-deficient region 660B2 having oxygen vacancies and spaced apart from each other. The first oxygen-deficient region 660B1 may surround the sidewall of the insulating core layer 695. The second oxygen-deficient region 660B2 may be disposed between the first oxygen-deficient region 660B1 and the insulating core layer 695.

[0106] A first region 621A1 of oxide layer 690B may surround a first oxygen-deficient region 660B1. A second region 631A of oxide layer 690B may be disposed between the first oxygen-deficient region 660B1 and the second oxygen-deficient region 660B2. A third region 621A2 of oxide layer 690B may be disposed between insulating core layer 695 and the second oxygen-deficient region 660B2.

[0107] Figure 14 The structure of the storage cell shown can be filled Figure 10B Storage hole 613 is shown. Figure 14 The structure of the storage cell shown can be applied to Figure 8B The storage unit MC1 shown is or Figure 9B The storage unit MC2 is shown.

[0108] Figure 15A and Figure 15B This is a cross-sectional view illustrating a method for forming a storage cell according to an embodiment of the present disclosure.

[0109] refer to Figure 15A You can refer to Figure 10A and Figure 10B The described process is used to provide a storage hole 613. The storage hole 613 can penetrate the insulating layer 611 and can overlap with the first line 603 on the substrate structure 601. Subsequently, a first layer 621'[1], a second layer 631' and a third layer 621'[2] can be sequentially formed on the sidewalls of the storage hole 613, which are formed by... Figure 13A The first layer 621[1], the second layer 631, and the third layer 621[2] shown are made of the same material. However, the second layer 631' can be formed to have a higher density than the third layer. Figure 13A The second layer 631 shown has a narrow width or a thin thickness. Each of the first layer 621'[1], the second layer 631', and the third layer 621'[2] may extend in a vertical direction intersecting the surface of the first line 603 and may extend along the sidewall of the storage hole 613. The central region of the storage hole 613 is not filled by the first layer 621'[1], the second layer 631', and the third layer 621'[2], but may remain open.

[0110] refer to Figure 15B ,because Figure 15A The difference in oxygen affinity between the first layer 621'[1] and the second layer 631' shown in the figure and Figure 15A The difference in oxygen affinity between the second layer 631' and the third layer 621'[2] shown in the figure allows for redox reactions to occur. Based on the above references... Figure 1B The same principle can be applied from... Figure 15A The redox reaction begins at the interface between the first layer 621'[1] and the second layer 631' shown in the figure, and another redox reaction can begin at the interface between the second layer 631' and the third layer 621'[2]. The redox reaction can be controlled so that... Figure 15A The entire second layer 631' shown is reduced. Therefore, an oxide layer 690C including the oxygen-deficient region 660C can be formed. Moreover, the oxide layer 690C may include a first region 621'A1 and a second region 621'A2 disposed on both sides of the oxygen-deficient region 660C.

[0111] The first region 621'A1 and the second region 621'A2 can be respectively derived from... Figure 15A The first layer 621'[1] and the third layer 621'[2] shown in the figure are composed of a portion thereof, or are respectively composed of a portion thereof. Figure 15AThe first layer 621'[1] and the third layer 621'[2] shown are composed of oxides (oxidizing material). In one embodiment, both the first region 621'A1 and the second region 621'A2 may include aluminum oxide, silicon oxide, or transition metal oxides. More specifically, when Figure 15A The second layer 631' shown includes hafnium oxide (HfO). x When the first layer 621'[1] and the second layer 621'[2] comprise silicon, the oxygen-deficient region 660C may comprise a mixture of silicon and hafnium oxide (Si:HfO). x Furthermore, both the first region 621'A1 and the second region 621'A2 may include silicon oxide (SiO2). x ).

[0112] Subsequently, it can be filled with insulating core layer 695. Figure 15A The central region of the storage hole 613 shown. The insulating core layer 695 may include silicon dioxide (SiO2).

[0113] You can refer to Figure 15A and Figure 15B The described process is used to form storage cells including an oxygen-deficient region of 660°C.

[0114] Figure 16 It is shown Figure 15B A 3D view of the storage unit shown.

[0115] refer to Figure 16 The storage cell may include an insulating core layer 695 and an oxide layer 690C surrounding the sidewalls of the insulating core layer 695. The oxide layer 690C may include oxygen-deficient regions 660C with oxygen vacancies, and the oxygen-deficient regions 660C may surround the sidewalls of the insulating core layer 695. A first region 621'A1 of the oxide layer 690C may surround the oxygen-deficient regions 660C, and a second region 621'A2 may be disposed between the insulating core layer 695 and the oxygen-deficient regions 660C.

[0116] Figure 16 The structure of the storage cell shown can be filled Figure 10B Storage hole 613 is shown. Figure 16 The structure of the storage cell shown can be applied to Figure 8B The storage unit MC1 shown is or Figure 9B The storage unit MC2 is shown.

[0117] Figure 17 and Figure 18 This is a view illustrating the process performed after the formation of a memory cell according to an embodiment of the present disclosure.

[0118] refer to Figure 17and Figure 18 You can use the reference Figure 10A and Figure 10B The described process forms a first line 603 on a substrate structure 601. The first line 603 may be covered by an insulating layer 611.

[0119] Subsequently, in order to form a storage unit including an oxygen-deficient region, a reference procedure can be performed. Figures 11A to 11D The described process can be performed according to the reference. Figure 13A and Figure 13B The described process, or a reference that can be performed. Figure 15A and Figure 15B The described process. Accordingly, memory cells are formed that penetrate the insulating layer 611 and overlap with each of the first lines 603, such that they are as follows: Figure 12 , Figure 14 or Figure 16 The diagram shows at least one oxygen-deficient region.

[0120] refer to Figure 17 It can be possessed Figure 12 , Figure 14 or Figure 16 In the structure shown, a second line 705A is formed on the insulating layer 611 through which the memory cell penetrates. The major axis direction of the second line 705A may intersect the major axis direction of the first line 603. Therefore, in the intersection region, each of the second lines 705A may be perpendicular to the first line 603 in the vertical direction. Figure 12 , Figure 14 or Figure 16 The memory cells shown are overlapped. Each of the second line 705A can be used as a second electrode.

[0121] refer to Figure 18 , in being possessed Figure 12 , Figure 14 or Figure 16 After the storage cell in the structure shown penetrates the insulating layer 611, a barrier layer 701 and a conductive layer are stacked on top. The conductive layer can then be etched to form a second line 705B. The long axis of the second line 705B may intersect the long axis of the first line 603. In the intersection region, each of the second lines 705B may be perpendicular to the first line 603 in the vertical direction. Figure 12 , Figure 14 or Figure 16 The storage cells shown overlap.

[0122] The barrier layer 701 can be patterned to have a shape substantially the same as that of the second wire 705B. The barrier layer 701 can be disposed between the second wire 705B and the insulating layer 611, and can be in contact with the second wire 705B. (See reference...) Figure 6 As described, the barrier layer 701 may include silicon dioxide (SiO2) and is formed to have a thickness of 10 nm or less.

[0123] Figure 19 This is a block diagram illustrating the configuration of a storage system according to an embodiment of the present disclosure.

[0124] refer to Figure 19 The storage system 1100 includes a storage device 1112 and a memory controller 1111.

[0125] The storage device 1112 may be a multi-chip package configured with multiple storage chips. The storage chips may be divided into multiple groups. The multiple groups may communicate with the memory controller 1111 through the first channel CH1 to the kth channel CHk (where k is an integer).

[0126] Each memory chip may include a variable resistance memory device. The variable resistance memory device may include: a first electrode; a second electrode above the first electrode; and an oxide layer having oxygen-deficient regions distributed vertically from the first electrode toward the second electrode.

[0127] Memory controller 1111 accesses storage device 1112 in response to requests from the host. For example, memory controller 1111 controls setup and reset operations, as well as background operations, of storage device 1112. Memory controller 1111 can control storage device 1112 through multiple channels CH1 to CHk.

[0128] Figure 20 This is a block diagram illustrating the configuration of a computing system according to an embodiment of the present disclosure.

[0129] refer to Figure 20 The computing system 1200 may include a central processing unit (CPU) 1220, random access memory (RAM) 1230, a user interface 1240, a modem 1250, and a storage system 1210 electrically connected to a system bus 1260. The computing system 1200 may be a mobile device.

[0130] The storage system 1210 may be configured with a storage device 1212 and a storage controller 1211. The storage device 1212 may be configured as a variable resistive storage device, which includes: a first electrode; a second electrode above the first electrode; and an oxide layer having oxygen-deficient regions distributed in a vertical direction from the first electrode toward the second electrode.

[0131] According to embodiments of this disclosure, the distribution density of oxygen vacancies in the oxygen-deficient layer can be controlled, thereby controlling the operation of the storage cell.

[0132] According to this disclosure, an oxygen-deficient region including oxygen vacancies is formed in the oxide layer, and the distribution density of oxygen vacancies is controlled, thereby changing the resistive state of the memory cell.

[0133] According to this disclosure, because oxygen vacancies are generated during the manufacturing process of the variable resistance memory device, oxygen-deficient regions can be defined in the oxide layer. Therefore, during operation of the variable resistance memory device, the distribution density of oxygen vacancies can be controlled without the need for an electroforming method to generate oxygen vacancies. This improves the operational stability of the variable resistance memory device.

[0134] According to this disclosure, oxygen vacancies can be uniformly distributed in the vertical direction from the first electrode toward the second electrode, thereby easily forming a conductive path between the first electrode and the second electrode.

Claims

1. A variable resistance storage device, comprising: First electrode; The second electrode is arranged above the first electrode; A storage cell, disposed between the first electrode and the second electrode, the storage cell having a resistance that varies according to the distribution density of oxygen vacancies in the storage cell, and An insulating core layer is disposed between the first electrode and the second electrode. The storage cell includes an oxide layer having a first oxygen-deficient region extending in a vertical direction, the vertical direction being defined as from the first electrode toward the second electrode. Wherein, the oxygen vacancies are distributed in the first oxygen-deficient region, and The oxide layer surrounds the sidewall of the insulating core layer.

2. The variable resistance storage device according to claim 1, wherein, The oxide layer further comprises: A first region, which surrounds the first oxygen-deficient region; and The second region is disposed between the insulating core layer and the first oxygen-deficient region.

3. The variable resistance storage device according to claim 2, wherein, The first region includes a first transition metal oxide, and The second region includes alumina, silicon oxide, or a second transition metal oxide, the second transition metal oxide having a higher oxygen affinity than the first transition metal oxide.

4. The variable resistance storage device according to claim 2, wherein, The first region includes hafnium oxide, and the second region includes silicon oxide, and The first oxygen-deficient region comprises a mixture of silicon and hafnium oxide.

5. The variable resistance storage device according to claim 2, wherein, Each of the first and second regions comprises a transition metal oxide, silicon oxide, or aluminum oxide.

6. The variable resistance storage device according to claim 2, wherein, Each of the first region and the second region includes silicon oxide, and The first oxygen-deficient region comprises a mixture of silicon and hafnium oxide.

7. The variable resistance storage device according to claim 1, wherein, The oxide layer further comprises: A second oxygen-deficient region is disposed between the first oxygen-deficient region and the insulating core layer; A first region, which surrounds the first oxygen-deficient region; A second region, located between the first oxygen-deficient region and the second oxygen-deficient region; and The third region is located between the insulating core layer and the second oxygen-deficient region.

8. The variable resistance storage device according to claim 7, wherein, The second region includes a first transition metal oxide, and Each of the first region and the third region comprises aluminum oxide, silicon oxide, or a second transition metal oxide having a higher oxygen affinity than the first transition metal oxide.

9. The variable resistance storage device according to claim 7, wherein, The second region includes hafnium oxide, and each of the first and third regions includes silicon oxide. Each of the first oxygen-deficient region and the second oxygen-deficient region comprises a mixture of silicon and hafnium oxide.

10. The variable resistance storage device according to claim 1, further comprising: A barrier layer is formed between either the first electrode or the second electrode and the memory cell.

11. The variable resistance storage device according to claim 1, wherein, The first electrode and the second electrode extend in intersecting directions located in a plane perpendicular to the vertical direction.

12. A method for manufacturing a variable resistance storage device, the method comprising: Form the first electrode; An insulating layer is formed covering the first electrode; A storage hole is formed that penetrates the insulating layer, and the storage hole overlaps with the first electrode in a vertical direction intersecting the surface of the first electrode. A first layer is formed on the sidewall of the storage hole, wherein the first layer extends in the vertical direction; A second layer is formed on the sidewall of the first layer, wherein the second layer has an oxygen affinity different from that of the first layer and extends in the vertical direction, and the central region of the storage hole remains open and is not filled by the first layer or the second layer; The central region of the storage hole is filled with an insulating core layer; An oxide layer comprising a first oxygen-deficient region is formed by a redox reaction occurring at the interface between the first and second layers, wherein oxygen vacancies are distributed in the first oxygen-deficient region; and A second electrode is formed on the oxide layer, overlapping the first oxygen-deficient region. The variable resistance storage device has a resistance that varies according to the distribution density of the oxygen vacancies.

13. The method of claim 12, wherein, The second layer comprises a material having a higher oxygen affinity than the first layer.

14. The method according to claim 12, wherein, The first layer comprises a first transition metal oxide, and The second layer comprises a second transition metal oxide having a higher oxygen affinity than the first transition metal oxide.

15. The method of claim 12, wherein, The first layer comprises a transition metal oxide, and The second layer includes aluminum or silicon, and The second layer is completely oxidized through the redox reaction.

16. The method of claim 12, further comprising: A third layer is formed on the sidewall of the second layer, wherein the third layer comprises the same material as the first layer and extends in the vertical direction. In the redox reaction process, a second oxygen-deficient region is defined in the oxide layer at the interface between the second layer and the third layer.

17. The method according to claim 16, wherein, Each of the first and third layers includes a material having a higher oxygen affinity than the second layer.

18. The method of claim 12, further comprising: Prior to the step of forming the second electrode, a barrier layer is formed on the oxide layer. The second electrode is formed on the barrier layer.