Circuit devices and oscillators

Abstract

A circuit device and an oscillator. This device is designed to suppress the temperature sensor circuit from becoming a noise source and thus degrading the signal characteristics of the oscillation signal of the oscillator circuit. The circuit device includes: an oscillator circuit that oscillates an oscillator to generate an oscillation signal; a temperature sensor circuit that operates intermittently; a logic circuit that performs temperature compensation processing based on the output of the temperature sensor circuit; and a power supply circuit that supplies power to the oscillator circuit. The oscillator circuit is located in the circuit region, the temperature sensor circuit and the logic circuit are located in the circuit region, and the power supply circuit is located in the circuit region between the circuit regions.

Description

Technical Field

[0001] This invention relates to circuit devices and oscillators, etc. Background Technology

[0002] Conventional circuit devices having an oscillation circuit for oscillating an oscillator such as a quartz oscillator are known. Patent Document 1 discloses a layout configuration of a circuit device having a temperature-compensated oscillation circuit. In Patent Document 1, circuit blocks with analog circuits as structural elements and circuit blocks with digital circuits as structural elements are arranged separately, so that the wiring for the electrical connection between the analog circuit and the oscillator does not overlap with the blocks of digital circuits.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2015-90973

[0004] Temperature sensor circuits are used in the temperature compensation process for the oscillation frequency of an oscillating circuit. Furthermore, the temperature compensation process targets the oscillation frequency of the oscillator. Therefore, to more accurately measure the temperature of the oscillator, the temperature sensor circuit is typically placed near the oscillating circuit, which is electrically connected to the oscillator. This is because heat from the oscillator is transferred to the oscillating circuit via metal terminals or wiring.

[0005] On the other hand, in circuit devices with temperature-compensated oscillating circuits, to achieve low power consumption, the temperature sensor circuit can be made to operate intermittently. However, when the temperature sensor circuit operates intermittently in this way, the current consumed by the temperature sensor circuit varies in an AC manner. Therefore, it is known that when such a temperature sensor circuit is close to the oscillating circuit, the temperature sensor circuit may become a noise source and degrade the signal characteristics of the oscillation signal of the oscillating circuit. Summary of the Invention

[0006] One aspect of this disclosure relates to a circuit arrangement comprising: an oscillation circuit that causes an oscillator to oscillate to generate an oscillation signal; a temperature sensor circuit that operates intermittently; a logic circuit that performs temperature compensation processing based on the output of the temperature sensor circuit; and a power supply circuit that supplies power to the oscillation circuit, the oscillation circuit being disposed in a first circuit region, the temperature sensor circuit and the logic circuit being disposed in a second circuit region, and the power supply circuit being disposed in a third circuit region between the first circuit region and the second circuit region.

[0007] Furthermore, one aspect of this disclosure relates to a circuit arrangement comprising: an oscillation circuit that causes an oscillator to oscillate to generate an oscillation signal; a temperature sensor circuit that operates intermittently; a logic circuit that performs temperature compensation processing based on the output of the temperature sensor circuit; a power supply terminal into which a power supply voltage is input; and a ground terminal into which a ground voltage is input, wherein the oscillation circuit is disposed in a first circuit region, the temperature sensor circuit and the logic circuit are disposed in a second circuit region, and the power supply terminal and the ground terminal are diagonally disposed in the second circuit region.

[0008] Furthermore, one aspect of this disclosure relates to an oscillator comprising: the circuit arrangement described above; and the oscillator. Attached Figure Description

[0009] Figure 1 This is an example of the structure of the circuit device in this embodiment.

[0010] Figure 2 This is an example of the layout configuration of the circuit device in this embodiment.

[0011] Figure 3 This is an example of the structure of an oscillating circuit.

[0012] Figure 4 This is an example of the structure of a temperature sensor circuit.

[0013] Figure 5 This is a diagram illustrating the operation of a temperature sensor circuit.

[0014] Figure 6 This is an example of the frequency deviation of a clock signal or output pulse signal relative to temperature.

[0015] Figure 7 This is a detailed structural example of a counter circuit.

[0016] Figure 8 This is a detailed diagram illustrating the operation of the temperature sensor circuit.

[0017] Figure 9 This diagram illustrates the degradation of signal characteristics of oscillating signals caused by intermittent operation.

[0018] Figure 10 This is a structural example of a ring oscillator.

[0019] Figure 11 This is an example of the structure of a regulator.

[0020] Figure 12 This is an example of the structure of a current setting circuit.

[0021] Figure 13 This is an example of the wiring of power lines and grounding lines in a circuit device.

[0022] Figure 14 This is another example of the layout configuration of the circuit device in this embodiment.

[0023] Figure 15 This is another example of the layout configuration of the circuit device in this embodiment.

[0024] Figure 16 This is an example of an oscillator construction.

[0025] Label Explanation

[0026] 4: Oscillator; 10: Vibrator; 15: Package; 16: Base; 17: Cover; 18, 19: External Terminals; 20: Circuit Device; 30: Oscillator Circuit; 40: Temperature Sensor Circuit; 42: Ring Oscillator; 44: Counter Circuit; 46: Regulator; 48: Current Setting Circuit; 50: Logic Circuit; 52: Latch Circuit; 54: Temperature Compensation Circuit; 60: Power Supply Circuit; 61, 62: Regulator; 70: Output Buffer Circuit; 80: I / O Circuit; CK: Clock Signal; CKQ: Output Clock Signal; CNT1, CNT2: Count Value; CT: Counter; CV1, CV2: Variable Capacitor Circuit; DR1, DR2, DR3, DR4: Direction; DV1, DV2: Inverter Circuit; GND: Ground Voltage; IVA1~IVA5: Inverter Circuit; LG1, LG2A LG2B, LG3: Ground lines; LV1, LV2A, LV2B, LV3: Power lines; OE: Output enable signal; OPB: Operational amplifier; OSC: Oscillator signal; RB1, RB2: Resistors; RCK: Output pulse signal; RG1, RG2, RG3: Circuit area; SD1, SD2, SD3, SD4: Edge; TA1~TA8, TB1~TB8, TC1~TC14: Transistors; TCK: Clock terminal; TECK, TEGND, TEOE, TEVDD: External terminals; TGND: Ground terminal; TOE: Output enable terminal; TSRST: Period; TSENS: Counting period; TSQ: Temperature data; TVDD: Power terminal; TX1, TX2: Terminals; VDD: Power supply voltage; VREG1~VREG3: Adjustable power supply voltage. Detailed Implementation

[0027] The following describes this embodiment. It should be noted that the embodiments described below are not intended to unduly limit the scope of the claims. Furthermore, not all structures described in this embodiment are necessarily essential structural elements.

[0028] 1. Circuit device

[0029] Figure 1An example of the structure of the circuit device 20 of this embodiment is shown. The circuit device 20 of this embodiment includes at least an oscillation circuit 30, a temperature sensor circuit 40, and a logic circuit 50. In addition, the circuit device 20 includes a power supply circuit 60. Furthermore, the oscillator 4 of this embodiment includes an oscillator 10 and the circuit device 20. The oscillator 10 is electrically connected to the circuit device 20. For example, the oscillator 10 and the circuit device 20 are electrically connected using internal wiring, bonding wires, or metal bumps of a package, wherein the package houses the oscillator 10 and the circuit device 20.

[0030] The oscillator 10 is a component that generates mechanical vibration through an electrical signal. The oscillator 10 can be implemented using a vibrating plate, such as a quartz resonator. For example, the oscillator 10 can be implemented using a tuning fork type quartz resonator, a double tuning fork type quartz resonator, or a quartz resonator that performs thickness shear vibration with an AT cut or SC cut, etc. For example, the oscillator 10 can be an oscillator built into a temperature-compensated quartz oscillator (TCXO) without a thermostat, or an oscillator built into a thermostat-equipped quartz oscillator (OCXO). Furthermore, the oscillator 10 of this embodiment can be implemented using various vibrating plates, such as those other than tuning fork type, double tuning fork type, or thickness shear vibration type, or piezoelectric resonators made of materials other than quartz. For example, the oscillator 10 can also be a SAW (Surface Acoustic Wave) resonator, or a MEMS (Micro Electro Mechanical Systems) oscillator formed using a silicon substrate as a silicon oscillator.

[0031] Circuit device 20 is an integrated circuit device called an IC (Integrated Circuit). For example, circuit device 20 is an IC manufactured using semiconductor processes, which is a semiconductor chip on a semiconductor substrate on which circuit elements are formed. Figure 1 In the circuit device 20, there are an oscillation circuit 30, a temperature sensor circuit 40, a logic circuit 50, a power supply circuit 60, an output buffer circuit 70, and an I / O circuit 80.

[0032] The oscillation circuit 30 is a circuit that causes the oscillator 10 to oscillate. For example, the oscillation circuit 30 is electrically connected to terminals TX1 and TX2, and generates an oscillation signal OSC by causing the oscillator 10 to oscillate. As an example, the oscillation circuit 30 generates an oscillation signal OSC with a frequency of 32 kHz. Terminal TX1 is the first terminal, and terminal TX2 is the second terminal. For example, the oscillation circuit 30 can be implemented using an oscillation drive circuit disposed between terminals TX1 and TX2, and active components such as capacitors or resistors. The drive circuit can be implemented, for example, using a CMOS inverter circuit or a bipolar transistor. The drive circuit is the core circuit of the oscillation circuit 30, and it drives the oscillator 10 with voltage or current, thereby causing the oscillator 10 to oscillate. The oscillation circuit 30 can use various types of oscillation circuits, such as inverter type, Pierce type, Colpitts type, or Hartley type. In addition, the oscillation circuit 30 is provided with a variable capacitor circuit, and the oscillation frequency can be adjusted by adjusting the capacitance of the variable capacitor circuit. The variable capacitor circuit can be implemented, for example, using a capacitor array and a switch array connected to the capacitor array. For example, the variable capacitor circuit includes a first capacitor array having multiple capacitors whose capacitance values ​​are weighted in a binary manner. Furthermore, the variable capacitor circuit includes a first switch array having multiple switches, each of which switches connects and disconnects the connection between each capacitor in the first capacitor array and terminal TX1. Alternatively, a first variable capacitor circuit and a second variable capacitor circuit can be provided, the first variable capacitor circuit having a first capacitor array and a first switch array connected to terminal TX1, and the second variable capacitor circuit having a second capacitor array and a second switch array connected to terminal TX2. Additionally, the variable capacitor circuit can be implemented using variable capacitor elements such as varactor diodes. Furthermore, the connection in this embodiment is an electrical connection. An electrical connection is a connection capable of transmitting electrical signals, and is a connection capable of transmitting information using electrical signals. An electrical connection can also be a connection via active components, etc.

[0033] Temperature sensor circuit 40 measures the ambient temperature or other temperatures of oscillator 10 or circuit device 20, and outputs the result as temperature data TSQ. Temperature data TSQ is data that increases or decreases monotonically relative to temperature within the operating temperature range of circuit device 20, for example, as described later. Figure 4 As shown, the temperature sensor circuit 40 is a temperature sensor that utilizes the temperature-dependent characteristic of the oscillation frequency of the ring oscillator 42. Specifically, as... Figure 4As shown, the temperature sensor circuit 40 includes a ring oscillator 42 and a counter circuit 44. During a counting period TSENS defined by a clock signal CK, the counter circuit 44 counts the oscillation signal of the ring oscillator 42, i.e., the output pulse signal RCK, and outputs its count value as temperature data TSQ. The clock signal CK is based on the oscillation signal OSC from the oscillation circuit 30. Furthermore, the temperature sensor circuit 40 is not limited to this; for example, it may also include an analog temperature sensor that outputs a temperature detection voltage utilizing the temperature dependence of the forward voltage of a PN junction, and an A / D conversion circuit that performs A / D conversion on the temperature detection voltage to output temperature data TSQ.

[0034] Furthermore, in this embodiment, the temperature sensor circuit 40 operates intermittently. For example, the temperature sensor circuit 40 operates intermittently as follows: during its operation, it calculates the temperature data TSQ corresponding to the temperature, and then stops after outputting the calculated temperature data TSQ to the logic circuit 50. Details of the intermittent operation will be described later.

[0035] The logic circuit 50 performs temperature compensation processing based on the output of the temperature sensor circuit 40. This temperature compensation processing is performed by the temperature compensation circuit 54 of the logic circuit 50. The temperature compensation processing, for example, is a process that compensates for fluctuations in the oscillation frequency caused by temperature variations. That is, the logic circuit 50 performs temperature compensation processing on the oscillation frequency of the oscillation circuit 30 so that the frequency remains constant even in the presence of temperature variations. Specifically, the logic circuit 50 performs digital temperature compensation processing based on the output of the temperature sensor circuit 40, i.e., the temperature data TSQ. For example, the logic circuit 50 calculates frequency adjustment data based on the temperature data TSQ. Then, it adjusts the capacitance value of the variable capacitor circuit of the oscillation circuit 30 based on the calculated frequency adjustment data, thereby achieving temperature compensation processing on the oscillation frequency of the oscillation circuit 30. For example, the logic circuit 50 has a storage circuit that stores a table showing the correspondence between the temperature data TSQ and the frequency adjustment data. Furthermore, the logic circuit 50 uses this table to perform temperature compensation processing to calculate the frequency adjustment data based on the temperature data TSQ. The storage circuit can be implemented, for example, using a non-volatile memory. Non-volatile memory can be, for example, EEPROM such as FAMOS or MONOS memory, but is not limited to these; it can also be OTP memory or fuse-type ROM. Alternatively, the storage circuit can be implemented using RAM or a register composed of latch circuits, etc. Furthermore, the logic circuit 50 can also perform the operation of converting temperature data TSQ into converted temperature data, and the table can be a table showing the correspondence between the converted temperature data and the frequency adjustment data. The converted temperature data, like the temperature data TSQ, is data that monotonically increases or decreases relative to the temperature; however, the slope of the converted temperature data is obtained by converting the slope of the temperature data TSQ according to the temperature range.

[0036] Furthermore, logic circuit 50 is a control circuit that performs various control processes. For example, logic circuit 50 performs overall control of circuit device 20, or controls the operating sequence of circuit device 20. Additionally, logic circuit 50 can also perform various control processes for oscillation circuit 30, or control temperature sensor circuit 40 or power supply circuit 60. Logic circuit 50 can be implemented, for example, using an ASIC (Application Specific Integrated Circuit) circuit based on automatic configuration routing, such as a gate array.

[0037] The power supply circuit 60 is supplied with a power supply voltage VDD from the power supply terminal TVDD, providing various power supply voltages used in the internal circuitry of the circuit device 20. The power supply circuit 60 can also be considered a reference signal generation circuit, which generates reference signals such as reference voltage or reference current used by the circuit device 20. For example, the power supply circuit 60 supplies power to at least the oscillation circuit 30. Furthermore, the power supply circuit 60 can also supply power to the logic circuit 50. Specifically, in... Figure 1 In this circuit, the power supply circuit 60 includes a regulator 61, which regulates the external power supply voltage, i.e., the power supply voltage VDD, and supplies the regulated power supply voltage VREG1 as the power supply for the oscillation circuit 30. Furthermore, the power supply circuit 60 includes a regulator 62, which regulates the power supply voltage VDD and supplies the regulated power supply voltage VREG2 as the power supply for the logic circuit 50. VDD is, for example, a voltage of 1.5 to 3.6V. VREG1 is, for example, a voltage of 0.9 to 1.1V, and VREG2 is, for example, a voltage of 1.1 to 1.3V. Furthermore, VREG3, described later, is, for example, a voltage of 1.25 to 1.45V.

[0038] Output buffer circuit 70 outputs an output clock signal CKQ based on oscillation signal OSC. For example, output buffer circuit 70 buffers the clock signal CK based on oscillation signal OSC and outputs it as the output clock signal CKQ to clock terminal TCK. Then, the output clock signal CKQ is output to the outside via external terminal TECK of oscillator 4. For example, output buffer circuit 70 outputs the output clock signal CKQ in the form of a single-ended CMOS signal. For example, logic circuit 50 outputs clock signal CK based on the oscillation clock signal, i.e., oscillation signal OSC, from oscillation circuit 30. For example, logic circuit 50 receives the output enable signal OE from output enable terminal TOE via I / O circuit 80. Then, when output enable signal OE is active, logic circuit 50 outputs oscillation signal OSC as clock signal CK. Then, output buffer circuit 70 buffers this clock signal CK and outputs it as output clock signal CKQ. On the other hand, when output enable signal OE is inactive, logic circuit 50 sets the clock signal CK to a fixed voltage level, such as a low level. Thus, the voltage level of clock terminal TCK is set to a fixed voltage level. Furthermore, a valid signal, for example, means a high level in positive logic and a low level in negative logic. Conversely, an invalid signal, for example, means a low level in positive logic and a high level in negative logic. Additionally, the output buffer circuit 70 can also output the output clock signal CKQ in a signal format other than CMOS.

[0039] I / O circuit 80 is a circuit that receives the output enable signal OE from the output enable terminal TOE and outputs it to the logic circuit 50. I / O circuit 80 may include, for example, analog circuits such as circuit devices 20, or test circuits for checking.

[0040] In addition, circuit device 20 includes a power supply terminal TVDD, a ground terminal TGND, and a clock terminal TCK. Furthermore, circuit device 20 includes terminals TX1 and TX2 for oscillator connection and an output enable terminal TOE. These terminals are, for example, the pads of a semiconductor chip, i.e., circuit device 20. For example, in the pad area, a metal layer is exposed from a passivation film that serves as an insulating layer, and this exposed metal layer constitutes the terminal, i.e., the pad, of circuit device 20.

[0041] The power supply terminal TVDD is the terminal to which the power supply voltage VDD is supplied. For example, the power supply voltage VDD from an external power supply device is supplied to the power supply terminal TVDD. The ground terminal TGND is the terminal to which the ground voltage, GND, is supplied. GND can also be called VSS, and the ground voltage is, for example, the ground potential. In this embodiment, ground is appropriately referred to as GND. The clock terminal TCK is the terminal to output the clock signal CKQ, which is generated based on the oscillation signal OSC of the oscillation circuit 30. The output enable terminal TOE is the terminal used to control the enabling and disabling of the output clock signal CKQ. The power supply terminal TVDD, the ground terminal TGND, the clock terminal TCK, and the output enable terminal TOE are electrically connected to the external terminals TEVDD, TEGND, TECK, and TEOE of the oscillator 4, respectively. For example, the electrical connection is made using internal wiring of the package, bonding wires, or metal bumps. Furthermore, the external terminals TEVDD, TEGND, TECK, and TEOE of the oscillator 4 are electrically connected to external devices.

[0042] The first terminal, TX1, is electrically connected to one end of the oscillator 10, and the second terminal, TX2, is electrically connected to the other end of the oscillator 10. For example, the terminals TX1 and TX2 of the oscillator 10 and the circuit device 20 are electrically connected using internal wiring, bonding wires, or metal bumps of the package, which houses the oscillator 10 and the circuit device 20.

[0043] Figure 2 An example layout of the circuit device 20 in this embodiment is shown. Figure 2 In the layout configuration example, it is shown Figure 1 The layout and configuration of each circuit in the circuit device 20 are described below. Figure 2 The image shows a top view of the configuration when viewed from a direction orthogonal to the substrate on which the circuit elements of the circuit device 20 are formed. Additionally, in... Figure 2In this context, "ESD" refers to the electrostatic discharge protection circuit, and "TEST" is the test terminal used during the inspection of the circuit device 20.

[0044] The circuit device 20 has sides SD1, SD2, SD3, and SD4. Sides SD1, SD2, SD3, and SD4 are the first side, the second side, the third side, and the fourth side, respectively. Sides SD1, SD2, SD3, and SD4 correspond to the sides of the circuit device 20, i.e., the rectangular semiconductor chip. For example, sides SD1, SD2, SD3, and SD4 are the sides of the substrate of the semiconductor chip. The semiconductor chip is also called a silicon wafer. Side SD2 is the side opposite to side SD1. Side SD3 is the side that intersects with sides SD1 and SD2. Here, the intersection is, for example, orthogonal. Side SD4 is the side opposite to side SD3. Side SD4 intersects with sides SD1 and SD2. Here, the direction from side SD1 towards side SD2 is designated as DR1, and the opposite direction of direction DR1 is designated as DR2. Furthermore, the direction from side SD3 towards side SD4 is designated as DR3, and the opposite direction of direction DR3 is designated as DR4. Directions DR1, DR2, DR3, and DR4 are the first, second, third, and fourth directions, respectively.

[0045] Moreover, such as Figure 1 As explained, the circuit device 20 of this embodiment includes an oscillation circuit 30 that oscillates the oscillator 10 to generate an oscillation signal OSC, a temperature sensor circuit 40 that operates intermittently, a logic circuit 50 that performs temperature compensation processing based on the output of the temperature sensor circuit 40, and a power supply circuit 60 that supplies power to the oscillation circuit 30. For example, the power supply circuit 60 supplies a regulated power supply voltage VREG1 to the oscillation circuit 30 as power, and the oscillation circuit 30 performs an oscillation operation that oscillates the oscillator 10 to generate the oscillation signal OSC. The temperature sensor circuit 40 detects the temperature while operating intermittently during repetitive operation and stop periods, and outputs the detection result as temperature data TSQ to the logic circuit 50. The logic circuit 50 performs temperature compensation processing based on the output of the temperature sensor circuit 40, i.e., the temperature data TSQ. For example, the logic circuit 50 performs temperature compensation processing to keep the oscillation frequency of the oscillation circuit 30 constant even when the ambient temperature changes. Specifically, based on the frequency adjustment data, i.e., the capacitance value adjustment data, obtained from the temperature data TSQ, the capacitance value of the variable capacitor circuit in the oscillation circuit 30 is adjusted, thereby realizing temperature compensation processing of the oscillation frequency.

[0046] Moreover, such as Figure 2As shown, in this embodiment, the oscillation circuit 30 is disposed in circuit region RG1. Furthermore, the temperature sensor circuit 40 and the logic circuit 50 are disposed in circuit region RG2. Moreover, the power supply circuit 60 is disposed in circuit region RG3, between circuit region RG1 and circuit region RG2. Circuit regions RG1, RG2, and RG3 are respectively the first circuit region, the second circuit region, and the third circuit region. For example, circuit region RG1 is the region along edge SD1, and circuit region RG2 is the region along the opposite edge of edge SD1, i.e., edge SD2. Furthermore, circuit region RG3 is the region located between circuit region RG1 and circuit region RG2. For example, the power supply circuit 60 is disposed in circuit region RG3 on the DR1 side of circuit region RG1 where the oscillation circuit 30 is disposed, and the temperature sensor circuit 40 and the logic circuit 50 are disposed in circuit region RG2 on the DR1 side of circuit region RG3. For example, the power supply circuit 60 is disposed between the oscillation circuit 30, the temperature sensor circuit 40, and the logic circuit 50. In other words, at least one of a power supply circuit 60 and a logic circuit 50 is disposed between the oscillation circuit 30 and the temperature sensor circuit 40. Here, the circuit region is the area where circuit elements constituting the circuit are disposed and the wiring connecting the circuit elements is arranged. The circuit elements are active components such as transistors, or passive components such as resistors and capacitors. For example, in Figure 2 In this context, circuit regions RG1, RG2, and RG3 are rectangular regions. Here, a rectangular region encompasses a roughly rectangular area. For example, circuit region RG1, where the oscillation circuit 30 is located, is a rectangular region with direction DR3 along edge SD1 as its longer side. Circuit region RG3, where the power supply circuit 60 is located, is also a rectangular region with direction DR3 as its longer side. Circuit region RG2, where the temperature sensor circuit 40 and logic circuit 50 are located, is a rectangular region with direction DR3 as its longer side; however, it could also be a rectangular region with direction DR1 along edge SD3 as its longer side. Furthermore, in... Figure 2 In the circuit, RG1, RG2, and RG3 are rectangular regions, but they can also be regions of shapes other than rectangles.

[0047] For example, in this embodiment, in order to reduce the current consumption of the circuit device 20, the temperature sensor circuit 40 is not operated continuously, but is operated intermittently. By operating the temperature sensor circuit 40 intermittently, the current consumption in the temperature sensor circuit 40 can be significantly reduced compared to the case of continuous operation, thereby achieving low power consumption of the circuit device 20.

[0048] However, when the temperature sensor circuit 40 operates intermittently in this way, as described later... Figure 9As explained in the diagram, the current consumption varies in an AC manner, and this variation in the AC mode of the current consumption degrades the signal characteristics, such as the jitter characteristics, of the oscillation signal OSC. Specifically, the variation in the AC mode of the current consumption in the temperature sensor circuit 40 propagates as noise to the oscillation circuit 30, degrading the signal characteristics, such as the jitter characteristics, of the oscillation signal OSC. As a result, the signal characteristics of the clock signal CK based on the oscillation signal OSC degrade, and the degraded output clock signal CKQ is output from the circuit device 20 and the oscillator 4.

[0049] For example, in Patent Document 1, the degradation of the clock signal characteristics is prevented by separating the analog circuit region and the digital circuit region. However, the temperature sensor circuit is not mentioned, nor is the aforementioned problem caused by the intermittent operation of the temperature sensor circuit addressed. For example, in existing temperature-compensated oscillation circuits, temperature sensor circuits using analog voltages are mostly used, and there is almost no variation in the AC current consumption. However, as in this embodiment, when the temperature sensor circuit 40 is made into a digital structure and operates intermittently, the variation in AC current consumption increases, and the temperature sensor circuit 40 becomes a noise source. Therefore, the configuration of the temperature sensor circuit 40 also needs to be considered.

[0050] Therefore, in this embodiment, a layout configuration is adopted such that the space between the temperature sensor circuit 40, which becomes a noise source due to the variation in current consumption caused by the intermittent operation of the AC mode, and the oscillation circuit 30, which consumes less current and is easily affected by noise, is separated. Specifically, as... Figure 2 As shown, the oscillation circuit 30, which is susceptible to noise, is located in circuit region RG1, while the temperature sensor circuit 40 and logic circuit 50, which are noise sources, are located in circuit region RG2. Furthermore, a power supply circuit 60 is located in circuit region RG3, between circuit region RG1 and circuit region RG2. Thus, the power supply circuit 60 located in circuit region RG3 is situated between circuit region RG1, where the oscillation circuit 30 is located, and circuit region RG2, where the temperature sensor circuit 40 and logic circuit 50 are located. Moreover, the intervention of the power supply circuit 60 in circuit region RG3 effectively separates the oscillation circuit 30 from the temperature sensor circuit 40 and logic circuit 50. As a result, the following situation can be effectively suppressed: the fluctuation of the AC mode that consumes current due to the intermittent operation of the temperature sensor circuit 40 becomes noise, adversely affecting the oscillation operation of the oscillation circuit 30, and degrading signal characteristics such as the jitter characteristics of the oscillation signal OSC.

[0051] Specifically, in this embodiment, by separating the areas of analog circuits such as the oscillation circuit 30, which consume relatively low current and are susceptible to noise, from the areas of digital circuits such as the temperature sensor circuit 40, logic circuit 50, and output buffer circuit 70, which consume relatively high current and generate noise, the impact of noise caused by interference between digital and analog circuits is reduced. For example, by separating the areas of analog circuits such as the oscillation circuit 30 or power supply circuit 60, which operate continuously, from the areas of digital circuits such as the temperature sensor circuit 40, which operate intermittently, the impact of noise caused by interference between circuits that operate continuously and circuits that operate intermittently is reduced.

[0052] For example, in digital circuits, a structure is adopted in which the output buffer circuit 70, which consumes the most current and thus becomes a noise source, is spaced as far apart as possible from the oscillation circuit 30, which consumes less current and is most susceptible to noise. This suppresses the adverse effects of noise intrusion from the oscillation circuit 30. Furthermore, the temperature sensor circuit 40 includes digital circuitry that converts temperature information into digital codes, and it operates intermittently to achieve low current consumption. Therefore, its current consumption during operation is close to that of the output buffer circuit 70, making it a noise source for the oscillation circuit 30. Therefore, by separating the oscillation circuit 30 from these noise sources—the temperature sensor circuit 40 or the output buffer circuit 70—and placing a DC power supply circuit 60, which operates less susceptible to noise than the oscillation circuit 30, between these circuits, noise intrusion from the oscillation circuit 30 is suppressed.

[0053] Furthermore, the temperature sensor circuit 40 performs intermittent operation as follows: during the operating period, it calculates the temperature data TSQ corresponding to the temperature, and then stops after outputting the calculated temperature data TSQ to the logic circuit 50. For example, the temperature sensor circuit 40 is in an enabled state during the operating period and calculates the temperature data TSQ. For example, the temperature sensor circuit 40, during its operating period, performs the following... Figure 4The ring oscillator 42, counter circuit 44, regulator 46, etc., are enabled to calculate the temperature data TSQ corresponding to the temperature. Specifically, a regulating power supply voltage VREG3 from the regulator 46 is supplied to each of these circuits, and the enable signal of each circuit (described later) becomes active, thereby turning on the operating current flowing through each circuit and enabling the circuit to operate. Then, the temperature sensor circuit 40 outputs the calculated temperature data TSQ to the logic circuit 50. That is, it outputs the temperature data TSQ corresponding to the temperature measured during the operation to the logic circuit 50. After outputting the temperature data TSQ to the logic circuit 50, the temperature sensor circuit 40, for example, becomes disabled and stops operating. For example, during the stop period of intermittent operation, the ring oscillator 42, counter circuit 44, regulator 46, etc., become disabled and stop operating. Specifically, the regulated power supply voltage VREG3 from the regulator 46 is not supplied to these circuits, and the enable signal of each circuit becomes invalid. Consequently, the operating current flowing through each circuit is disconnected, and each circuit becomes disabled. Each circuit of the temperature sensor circuit 40 stops operating, thereby saving power in the temperature sensor circuit 40. Thus, the temperature sensor circuit 40 operates intermittently during repetitive operation and stop periods, thereby achieving low power consumption. The length of the operating period of the temperature sensor circuit 40 during intermittent operation is, for example, 50 ms or less, and the current consumption during the operating period of the temperature sensor circuit 40 is, for example, 10 μA or less. Compared to the BGR (Band Gap Reference) circuit described later, the ring oscillator 42 requires a shorter start-up time; therefore, even with a shorter operating period, appropriate oscillation can begin. Moreover, by shortening the operating period of the temperature sensor circuit 40 in this way, low power consumption can be achieved. Specifically, the current consumption of the oscillation circuit 30 is, for example, about 100 to 200 nA, the current consumption of the logic circuit 50 is, for example, about 10 to 20 nA, and the current consumption of the power supply circuit 60 is, for example, about 100 nA. Moreover, if the current consumption of the temperature sensor circuit 40 during its operation is, for example, about 100 μA, by making the temperature sensor circuit 40 operate intermittently, the average current consumption of the temperature sensor circuit 40 per second can be reduced to about 2 nA.

[0054] However, during this intermittent operation between repetitive and stop periods, as described above, variations in the AC current consumption pattern occur, which can become noise and adversely affect the oscillation circuit 30. Regarding this, in this embodiment, as... Figure 2As shown, a power supply circuit 60 is provided in circuit region RG3, which is located between circuit region RG1, where the oscillation circuit 30 is located, and circuit region RG2, where the temperature sensor circuit 40 is located. This allows the oscillation circuit 30 and the temperature sensor circuit 40 to be separated. Therefore, in the event of fluctuations in the AC mode that cause current consumption due to this intermittent operation, noise caused by these fluctuations can be suppressed from being transmitted to the oscillation circuit 30, and the degradation of the signal characteristics of the oscillation signal OSC can be suppressed.

[0055] In addition, such as Figure 1 As shown, the logic circuit 50 includes a latch circuit 52 that latches the temperature data TSQ output by the temperature sensor circuit 40 during its operation. This latch circuit 52 can be implemented, for example, using a holding circuit such as a trigger circuit. Furthermore, during the shutdown period of the temperature sensor circuit 40, the logic circuit 50 also performs temperature compensation processing based on the temperature data TSQ latched in the latch circuit 52. That is, the temperature sensor circuit 40 calculates the temperature data TSQ corresponding to the temperature during its operation, but this calculated temperature data TSQ is latched in the latch circuit 52 of the logic circuit 50. Therefore, even when the temperature sensor circuit 40 stops operating after outputting the calculated temperature data TSQ, the calculated temperature data TSQ is still latched in the latch circuit 52 of the logic circuit 50. Thus, even when the temperature sensor circuit 40 stops operating during the shutdown period after an intermittent operating period, the logic circuit 50 can still appropriately perform temperature compensation processing based on the temperature data TSQ latched in the latch circuit 52. That is, the always-operating power supply circuit 60 supplies the regulated power supply voltage VREG2 to the logic circuit 50, and the logic circuit 50 operates, thereby enabling the logic circuit 50 to perform temperature compensation processing.

[0056] In addition, such as Figure 1 As shown, the circuit device 20 includes an output buffer circuit 70, which outputs an output clock signal CKQ based on the oscillation signal OSC. For example, the output buffer circuit 70 outputs the buffered clock signal CK based on the oscillation signal OSC as the output clock signal CKQ to the clock terminal TCK. Furthermore, as... Figure 2As shown, the output buffer circuit 70 is located in the second circuit region, namely circuit region RG2. That is, in addition to the temperature sensor circuit 40 and the logic circuit 50, the output buffer circuit 70 is also located in circuit region RG2. Thus, a power supply circuit 60 is located in circuit region RG3 between circuit region RG1, where the oscillation circuit 30 is located, and circuit region RG2, where the output buffer circuit 70 is located. This allows the distance between the oscillation circuit 30 and the output buffer circuit 70 to be separated. Therefore, it is possible to suppress the transmission of noise generated by the output buffer circuit 70, which buffers the clock signal CK, to the oscillation circuit 30, and to suppress the degradation of the signal characteristics of the oscillation signal OSC.

[0057] Specifically, such as Figure 2 As shown, the output buffer circuit 70 is disposed between the clock terminal TCK and the logic circuit 50. For example, the output buffer circuit 70 is disposed adjacent to the clock terminal TCK. In this way, the clock signal CK output by the logic circuit 50 according to the oscillation signal OSC is input to the output buffer circuit 70 via the shortest path and buffered, and output as the output clock signal CKQ from the clock terminal TCK. As a result, the degradation of the signal characteristics of the output clock signal CKQ caused by parasitic resistance or parasitic capacitance in this path can be suppressed.

[0058] In addition, such as Figure 2 As shown, the first circuit region, or circuit region RG1, is the circuit region along the first side, or side SD1, of the circuit device 20. Furthermore, the second circuit region, or circuit region RG2, is the circuit region along the second side, or side SD2, of the circuit device 20. For example, circuit region RG1 is a circuit region where side SD1 is the longer side, and an oscillation circuit 30 is arranged in circuit region RG1. Furthermore, circuit region RG2 is a circuit region where the opposite side of side SD1, or side SD2, is the longer side, and a temperature sensor circuit 40 and a logic circuit 50 are arranged in circuit region RG2. Thus, the oscillation circuit 30 is arranged on the side of side SD1 of the circuit device 20, and the temperature sensor circuit 40 and the logic circuit 50 are arranged on the opposite side of side SD1, or side SD2 of the circuit device 20. Therefore, in the semiconductor chip of the circuit device 20, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 and the logic circuit 50 can be separated as much as possible, further suppressing the transmission of noise from the temperature sensor circuit 40 or the logic circuit 50 to the oscillation circuit 30.

[0059] Furthermore, the circuit device 20 includes a power supply terminal TVDD for receiving the input power supply voltage VDD. That is, it includes a power supply terminal TVDD for supplying an external power supply voltage, VDD, from an external power supply device. Moreover, as... Figure 2As shown, the power supply terminal TVDD and the temperature sensor circuit 40 are arranged side-by-side along side SD3, which intersects sides SD1 and SD2 of the circuit device 20. For example, the power supply terminal TVDD and the temperature sensor circuit 40 are arranged side-by-side along side SD3 in the order of power supply terminal TVDD and temperature sensor circuit 40. For example, when the direction from side SD1 to side SD2 is defined as DR1, the temperature sensor circuit 40 is arranged on the side of the power supply terminal TVDD in the direction DR1. Direction DR1 is along the direction of side SD3. In this way, the power supply terminal TVDD and the temperature sensor circuit 40 are arranged side-by-side along side SD3, thereby enabling the supply voltage VDD from the power supply terminal TVDD to the temperature sensor circuit 40 to be supplied using the shortest path, thus significantly reducing parasitic resistance in this path. Therefore, in the case of fluctuations in the AC mode of current consumption due to the intermittent operation of the temperature sensor circuit 40, voltage fluctuations caused by parasitic resistance in the path from the power supply terminal TVDD to the temperature sensor circuit 40 can be minimized, and noise caused by fluctuations in the AC mode of current consumption can also be reduced.

[0060] Furthermore, the circuit device 20 includes a clock terminal TCK that outputs an output clock signal CKQ based on the oscillation signal OSC. The temperature sensor circuit 40 is positioned between the power supply terminal TVDD and the clock terminal TCK. When the direction from side SD1 to side SD2 is defined as DR1, the clock terminal TCK is positioned on the DR1 side of the temperature sensor circuit 40. For example, the power supply terminal TVDD, the temperature sensor circuit 40, and the clock terminal TCK are arranged side-by-side along side SD3 in the order of power supply terminal TVDD, temperature sensor circuit 40, and clock terminal TCK. Additionally, the output buffer circuit 70 is positioned near the clock terminal TCK or the temperature sensor circuit 40. Thus, by positioning the temperature sensor circuit 40 between the power supply terminal TVDD and the clock terminal TCK, the temperature sensor circuit 40, the clock terminal TCK, and the output buffer circuit 70, which are noise sources, can be centrally and uniformly arranged along side SD3. Therefore, it is easy to achieve a layout configuration that maximizes the separation of these noise sources from the oscillation circuit 30, further suppressing the transmission of noise from these noise sources to the oscillation circuit 30.

[0061] Furthermore, the circuit device 20 includes a clock terminal TCK that outputs an output clock signal CKQ based on the oscillation signal OSC. This clock terminal TCK is located at the corner where sides SD3 and SD2 of the circuit device 20 intersect. That is, the clock terminal TCK is located at the corner where sides SD3 intersects with sides SD1 and SD2. In this way, the clock terminal TCK, which can become a noise source, and the output buffer circuit 70 that outputs the clock signal CKQ to the clock terminal TCK are located at the corner where sides SD3 and SD2 intersect. Therefore, for example, the distance between the oscillation circuit 30 located in the area along side SD1, i.e., circuit area RG1, and the noise source based on the output clock signal CKQ of the clock terminal TCK can be separated as much as possible, and the transmission of noise from the noise source to the oscillation circuit 30 can be further suppressed.

[0062] Furthermore, the circuit device 20 includes a power supply terminal TVDD for receiving an input power supply voltage VDD and a ground terminal TGND for receiving an input ground voltage GND. Moreover, the power supply terminal TVDD and the ground terminal TGND are arranged diagonally within the second circuit region, i.e., circuit region RG2. For example, the power supply terminal TVDD is located at the first corner of circuit region RG2, and the ground terminal TGND is located at the second corner of circuit region RG2 diagonally opposite the first corner. Thus, as described later... Figure 13 As detailed in the description, the power supply voltage VDD of the circuit within circuit region RG2 can be supplied using a power line connected to the power supply terminal TVDD and routed through circuit region RG2, and the ground voltage GND of the circuit within circuit region RG2 can be supplied using a ground line connected to the ground terminal TGND and routed through circuit region RG2. Therefore, noise generated by the temperature sensor circuit 40 and logic circuit 50 within circuit region RG2 is absorbed by the power supply terminal TVDD or the ground terminal TGND via these power lines or ground lines routed through circuit region RG2, suppressing the transmission of this noise to the oscillation circuit 30.

[0063] 2. Oscillator circuit and temperature sensor circuit

[0064] Next, an example of the structure of the oscillation circuit 30 and the temperature sensor circuit 40 will be described. Figure 3 An example of the structure of the oscillation circuit 30 is shown. However, the oscillation circuit 30 of this embodiment is not limited to... Figure 3 The structure can be modified in various ways, such as omitting a part of the structural element, adding other structural elements, or changing the structural element to other types of structural elements.

[0065] like Figure 3As shown, the oscillation circuit 30 includes inverter circuits DV1 and DV2 and variable capacitor circuits CV1 and CV2. Inverter circuit DV1 is the driving circuit for oscillator 10, with its input node connected to one end of oscillator 10 and its output node connected to the other end of oscillator 10. Inverter circuit DV2 buffers the output signal of inverter circuit DV1 and outputs it as the oscillation signal OSC. Inverter circuits DV1 and DV2 are supplied with VREG1 as the high-potential side power supply voltage and with GND as the low-potential side power supply voltage, thus operating in operation.

[0066] One end of the variable capacitor circuit CV1 is connected to one end of the oscillator 10, and the other end is connected to the GND node. Specifically, the variable capacitor circuit CV1 includes a first capacitor array with one end connected to one end of the oscillator 10, and a first switch array with one end connected to the other end of the first capacitor array and the other end connected to the GND node. Furthermore, the capacitance value of the variable capacitor circuit CV1 is adjusted by controlling the on / off state of multiple switches in the first switch array using frequency control data generated based on temperature data TSQ. Similarly, one end of the variable capacitor circuit CV2 is connected to the other end of the oscillator 10, and the other end is connected to the GND node. Specifically, the variable capacitor circuit CV2 includes a second capacitor array with one end connected to the other end of the oscillator 10, and a second switch array with one end connected to the other end of the second capacitor array and the other end connected to the GND node. Furthermore, the capacitance value of the variable capacitor circuit CV2 is adjusted by controlling the on / off state of multiple switches in the second switch array using frequency control data generated based on temperature data TSQ. Furthermore, by adjusting the capacitance values ​​of the variable capacitor circuits CV1 and CV2, the oscillation frequency of the oscillation signal OSC of the oscillation circuit 30 is controlled, thereby achieving temperature compensation processing of the oscillation frequency.

[0067] Figure 4 An example of the structure of the temperature sensor circuit 40 is shown. However, the temperature sensor circuit 40 of this embodiment is not limited to... Figure 4 The structure can be modified in various ways, such as omitting a part of the structural element, adding other structural elements, or changing the structural element to other types of structural elements.

[0068] The temperature sensor circuit 40 includes a ring oscillator 42, a counter circuit 44, and a regulator 46. The ring oscillator 42 is a circuit consisting of multiple delay elements connected in a ring. Specifically, for example, as described later... Figure 10As shown, the ring oscillator 42 is a circuit formed by connecting an odd number of inverter circuits and other signal inversion circuits in a ring configuration. The output oscillation signal is the output pulse signal RCK. The counter circuit 44 uses a clock signal CK based on the oscillation signal OSC to count the number of pulses of the output pulse signal RCK from the ring oscillator 42. Then, it outputs temperature data TSQ based on the count value obtained through the counting process. For example, as... Figure 5 As shown, the counter circuit 44 calculates the count value of the output pulse signal RCK within the counting period TSENS specified by the clock signal CK, and thus calculates the temperature data TSQ. For example, in Figure 5 In this process, the counting period TSENS is equivalent to m = 7 clock cycles of the clock signal CK. The counter circuit 44 counts the number of pulses of the output pulse signal RCK within this counting period TSENS. The regulator 46 supplies the regulating power supply voltage VREG3 to the ring oscillator 42. Figure 4 In this circuit, regulator 46 also supplies regulated power supply voltage VREG3 to current setting circuit 48 and counter circuit 44. For example, regulator 46 regulates power supply voltage VDD to generate regulated power supply voltage VREG3. Figure 4 As shown, the regulator 46 includes an operational amplifier OPB and resistors RB1 and RB2. Furthermore, a regulated power supply voltage VREG3 is generated using a reference voltage based on the work function difference WF of the operational amplifier OPB. According to... Figure 4 The structure enables a temperature sensor circuit 40 that can operate at low power and low voltage through a small-scale circuit.

[0069] In addition, such as Figure 4 As shown, the temperature sensor circuit 40 includes a current setting circuit 48. The current setting circuit 48 operates according to the regulating power supply voltage VREG3 generated by the regulator 46, setting the operating current of the ring oscillator 42. For example, the current setting circuit 48 generates bias voltages VBP2 and VBN2, which are used to set the current flowing through the ring oscillator 42 (described later). Figure 10 The inverter circuits IVA1, IVA2, IVA3, and IVA4 of the regulator 46 shown are operating currents. These operating currents can also be considered bias currents based on bias voltages VBP2 and VBN2. By setting this current setting circuit 48 and setting the operating current of the ring oscillator 42, the oscillation frequency of the ring oscillator 42 can be controlled. For example, the current setting circuit 48 sets the bias current, i.e., the operating current, of the regulator 46 in a manner that the current value increases as the temperature rises. In this way, frequency control can be achieved, whereby the oscillation frequency of the ring oscillator 42 increases as the temperature rises.

[0070] For example, Figure 6This illustrates an example of the frequency deviation characteristics of the clock signal CK and the output pulse signal RCK relative to temperature. Figure 6 The result of magnifying the vertical axis of the characteristic example on the right becomes the characteristic example on the left. For example... Figure 6 As shown in the characteristic example on the right, as the temperature rises, the oscillation frequency of the ring oscillator 42, i.e., the frequency of the output pulse signal RCK, increases. This is achieved by controlling the operating current of the ring oscillator 42 through the current setting circuit 48.

[0071] For example, in oscillators with lower frequencies such as 32kHz, low power consumption, low voltage operation, and miniaturization are required for applications such as IoT (Internet of Things) sensor association. However, existing temperature sensor circuits present a challenge in simultaneously achieving low current consumption, low voltage operation, and a small size. For instance, high-precision oscillators with built-in temperature control require a temperature sensor circuit. However, when using a BGR (Band Gap Reference) circuit and an A / D conversion circuit to construct a temperature sensor circuit, achieving low current consumption and low voltage operation is difficult. For example, to generate a voltage proportional to temperature, a certain amount of current needs to flow through the bipolar transistor in the BGR circuit, making low power consumption difficult. Furthermore, to improve temperature detection resolution, a wide dynamic range of the voltage input to the A / D conversion circuit is required, making low-voltage operation challenging. Additionally, in capacitor-DAC type A / D conversion circuits, the large capacitor area makes miniaturization difficult to achieve while ensuring accuracy.

[0072] Therefore, in Figure 4 In this circuit, a frequency comparison type temperature sensor circuit 40 is used. Specifically, the temperature sensor circuit 40 is constructed using a built-in ring oscillator 42 whose oscillation frequency depends on temperature, and a counter circuit 44 that counts the output pulse signal RCK of the ring oscillator 42. Here, the ring oscillator 42 is an oscillation circuit controlled by a temperature-dependent bias current. Furthermore, the reference clock signal for the counter circuit 44 is the oscillation frequency of the oscillation circuit 30, for example, a clock signal CK of 32 kHz. Moreover, the temperature sensor circuit 40 operates intermittently, and during the counting period, the signal of the count value in the counter circuit 44 within the TSENS is not transmitted to the logic circuit 50, thereby suppressing current consumption.

[0073] Furthermore, to suppress noise from entering circuits other than the temperature sensor circuit 40 due to its intermittent operation, the power supply voltage of the temperature sensor circuit 40 uses a regulated power supply voltage VREG3 generated by a dedicated regulator 46. For example, regulated power supply voltages VREG1 and VREG2, which are supplied to the oscillation circuit 30 and the logic circuit 50, are also generated. Figure 1 The regulators 61 and 62 are configured in Figure 2 The power supply circuit 60 is located in this area. In contrast, it generates the regulated power supply voltage VREG3 supplied to the temperature sensor circuit 40. Figure 4 The regulator 46 is configured in Figure 2 The temperature sensor circuit area 40.

[0074] also, Figure 5 The counting period TSENS shown can vary, for example, according to the setting of the register in logic circuit 50, thus allowing the sensitivity, i.e., the resolution, of temperature detection to be customized according to specifications. Furthermore, in Figure 4 In this configuration, the frequency is compared using a counter circuit 44. Therefore, a BGR circuit or A / D conversion circuit is not required, reducing current consumption and circuit size. Furthermore, the ring oscillator 42 and the counter circuit 44 operate at a low supply voltage of approximately 1.2V, resulting in a low operating lower limit voltage. By extending the counting period (TSENS), temperature detection resolution can be ensured, thus maintaining high accuracy. Additionally, while the frequency of the ring oscillator 42 may vary slightly, it is adjusted by the logic circuit 50 following the counter circuit 44, thereby corresponding to the address range of the lookup table used for temperature compensation.

[0075] Figure 7 , Figure 8 This is a detailed diagram illustrating the operation of the temperature sensor circuit 40. Figure 7 The detailed structure of counter circuit 44 is schematically shown as an example. Figure 8 Showing the Figure 7 The signal waveform diagram is used to explain the operation of the circuit. First, in Figure 8 At time t1, the signal TSONVDD becomes active (high level), regulator 46 starts, and the regulating power supply voltage VREG3 rises. Simultaneously, the negative logic reset signal TSXRST becomes active (low level), counter circuit 44 is reset, and the count value CNT1 of counter CT becomes 0. The count value CNT2 output by the AND circuit AN1, which receives the count value CNT1, also becomes 0. Next, after a one-cycle delay from time t1, signals TSONROSC and TSONIREF become high, and ring oscillator 42 and current setting circuit 48 start. Then, signal TSONROSC becomes high, thereby fixing the output of the AND circuit AN1, which receives the inverted signal of this high-level signal (i.e., the count value CNT2), to a low level. Therefore, the count values ​​CNT1 and CNT2 within TSENS during the counting period of counter CT are not transmitted to logic circuit 50, achieving low power consumption.

[0076] Next, at time t2, after the TSRST period from time t1, the counting process of the counter CT begins. For example, after the ring oscillator 42 is started by the signal TSONROSC going high, a certain amount of time is required until the oscillation frequency stabilizes. Therefore, a period TSRST is set to ensure this time, and after the TSRST period from time t1, the counter CT begins counting the number of pulses of the output pulse signal RCK from the ring oscillator 42. The length of this TSRST period can be set by a register. Moreover, as... Figure 5 As explained, during the counting period TSENS, which is m clock cycles (m being an integer greater than or equal to 2) of the clock signal CK, the counter CT counts the number of pulses of the output pulse signal RCK, and outputs the result of the counting process as the count value CNT1. Then, at time t3, the counting process ends, and the count value CNT1 is output as temperature data TSQ via AND circuits AN1 and AN2 to logic circuit 50. Then, at time t4, the latch circuit 52 of logic circuit 50 latches the temperature data TSQ from the temperature sensor circuit 40. As a result, the temperature data TSDATA held in the latch circuit 52 is updated from the nth temperature data to the next (n+1)th temperature data. Then, logic circuit 50 performs temperature compensation processing of the oscillation frequency based on the temperature data TSDATA held in the latch circuit 52.

[0077] Figure 9 This diagram illustrates the degradation of the signal characteristics of the oscillation signal OSC caused by the intermittent operation of the temperature sensor circuit 40. When the temperature sensor circuit 40 operates intermittently, as... Figure 9 As shown in A1, the current consumption of the temperature sensor circuit 40 varies in an AC manner. Consequently, as shown in A2, noise is generated in the ground wire supplied to GND, and as shown in A3 and A4, this noise is superimposed on the signal in the oscillation circuit 30. As a result, as shown in A5, jitter occurs in the oscillation signal OSC output from the oscillation circuit 30, degrading the signal quality of the oscillation signal OSC and also degrading the signal characteristics of the clock signal CK. In this case, in this embodiment, as... Figure 2 As shown, the temperature sensor circuit 40, which operates intermittently, can be separated from the oscillation circuit 30, thus reducing the generation of such jitter.

[0078] Figure 10This is an example of the structure of a ring oscillator 42. The ring oscillator 42 includes a ring-connected NAND circuit NAA and inverter circuits IVA1, IVA2, IVA3, and IVA4. It also includes a buffer circuit, i.e., inverter circuit IVA5. These odd-numbered signal inversion circuits are connected in a ring, thereby generating an oscillation signal, i.e., an output pulse signal RCK. Furthermore, an enable signal ENROSC is input to the NAND circuit NAA to enable or disable the operation of the ring oscillator 42. This enable signal ENROSC is enabled or disabled by logic circuit 50, thereby enabling intermittent operation of the ring oscillator 42 and realizing intermittent operation of the temperature sensor circuit 40. In addition, P-type transistors TA1, TA2, TA3, and TA4 for carrying operating current are provided on the VREG3 side of inverter circuits IVA1, IVA2, IVA3, and IVA4, and N-type transistors TA5, TA6, TA7, and TA8 are provided on the GND side. Furthermore, bias voltage VBP2 from the current setting circuit 48 is input to the gates of transistors TA1 to TA4, and bias voltage VBN2 from the current setting circuit 48 is input to the gates of transistors TA5 to TA8. This controls the operating current of the ring oscillator 42, enabling the ring oscillator 42 to output, for example, an output pulse signal RCK whose frequency increases with temperature.

[0079] Figure 11 An example of the structure of regulator 46 is shown. Additionally, Figure 1 The regulators 61 and 62 can also be connected with Figure 11 It is implemented using the same circuit structure. For example... Figure 11 As shown, the regulator 46 includes an operational amplifier OPB and resistors RB1 and RB2. The operational amplifier OPB has a differential section composed of transistors TB1, TB2, TB3, TB4, and TB5, and an output section composed of transistors TB6 and TB7. Additionally, an enable signal ENVREG3 is input to transistor TB8 to enable or disable the operation of the regulator 46. This enable signal ENVREG3 is enabled or disabled by logic circuit 50, thereby enabling intermittent operation of the regulator 46 and realizing intermittent operation of the temperature sensor circuit 40. Figure 11 In this process, the work function difference WF between the N-type transistors TB3 and TB4, which constitute a differential pair, is used to generate the regulated power supply voltage VREG3. For example, the voltage of VREG3 is set according to the voltage of the work function difference WF and the resistance values ​​of resistors RB1 and RB2.

[0080] Figure 12 An example of the structure of the current setting circuit 48 is shown. Figure 12In this circuit, a bias voltage VBN1 is generated by a bias voltage generation circuit consisting of transistors TC1, TC2, TC3, TC4, TC5, TC6, TC7, and TC8. Furthermore, a current mirror circuit consisting of transistors TC9, TC10, TC11, and TC12 generates bias voltages VBP2 and VBN2 corresponding to the bias voltage VBN1, which are then supplied to... Figure 10 The operating current of the ring oscillator 42 is set. Additionally, enable signals ENIREF and XENIREF are input to transistors TC13 and TC14 to enable or disable the operation of the current setting circuit 48. These enable signals ENIREF and XENIREF are enabled or disabled by logic circuit 50, thereby enabling intermittent operation of the current setting circuit 48 and realizing intermittent operation of the temperature sensor circuit 40.

[0081] 3. Wiring of power cords and grounding wires

[0082] Figure 13 This diagram shows an example of the wiring of the power supply line and the grounding line in the circuit device 20 of this embodiment. For example... Figure 13 As shown, the circuit device 20 of this embodiment includes an oscillation circuit 30, a temperature sensor circuit 40 that operates intermittently, a logic circuit 50 that performs temperature compensation processing, a power supply terminal TVDD for which a power supply voltage VDD is input, and a ground terminal TGND for which a ground voltage GND is input. Furthermore, the oscillation circuit 30 is disposed in circuit region RG1, and the temperature sensor circuit 40 and the logic circuit 50 are disposed in circuit region RG2. Moreover, as... Figure 13 As shown, the power supply terminal TVDD and the ground terminal TGND are arranged diagonally within the circuit region RG2. Specifically, the power supply terminal TVDD is located at the first corner of the circuit region RG2, and the ground terminal TGND is located at the second corner opposite the first corner. Thus, the power supply voltage VDD for the circuit within the circuit region RG2 can be supplied using a power line connected to the power supply terminal TVDD and routed through the circuit region RG2, and the ground voltage GND for the circuit within the circuit region RG2 can be supplied using a ground line connected to the ground terminal TGND and routed through the circuit region RG2. Therefore, the transmission of noise generated by the temperature sensor circuit 40 or logic circuit 50, etc., within the circuit region RG2 to the oscillation circuit 30 can be effectively suppressed.

[0083] Specifically, such as Figure 13As shown, circuit device 20 includes a power supply line LV1 and a ground line LG1. LV1 is the first power supply line, and LG1 is the first ground line. Power supply line LV1 is connected to the power supply terminal TVDD and is routed in circuit region RG1, supplying power supply voltage VDD to the oscillation circuit 30 in circuit region RG1. Ground line LG1 is connected to the ground terminal TGND and is routed in circuit region RG1, supplying ground voltage GND to the oscillation circuit 30 in circuit region RG1. In addition, circuit device 20 includes power supply lines LV2A and LV2B and ground lines LG2A and LG2B. LV2A and LV2B are second power supply lines, and LG2A and LG2B are second ground lines. Power supply lines LV2A and LV2B are connected to the power supply terminal TVDD and branch off from the power supply terminal TVDD along with power supply line LV1, and are routed in circuit region RG2, supplying power supply voltage VDD to the temperature sensor circuit 40, logic circuit 50, etc. in circuit region RG2. Specifically, power line LV2A supplies VDD to the temperature sensor circuit 40 and the output buffer circuit 70, and power line LV2B supplies VDD to the logic circuit 50. Furthermore, ground lines LG2A and LG2B are connected to the ground terminal TGND, and ground line LG1 branches off from the ground terminal TGND and is routed to circuit region RG2, supplying ground voltage GND to the temperature sensor circuit 40, logic circuit 50, etc., in circuit region RG2. Specifically, ground line LG2A supplies GND to the temperature sensor circuit 40 and the output buffer circuit 70, and ground line LG2B supplies GND to the logic circuit 50. Additionally, circuit device 20 may include power line LV3 and ground line LG3. LV3 is the third power line, and LG3 is the third ground line. Power line LV3 is connected to the power terminal TVDD, and power lines LV1, LV2A, and LV2B branch off from the power terminal TVDD and are routed to circuit region RG3, supplying power voltage VDD to the power circuit 60 in circuit region RG3. In addition, grounding wire LG3 is connected to grounding terminal TGND, and grounding wires LG1, LG2A, and LG2B branch off from grounding terminal TGND and are routed to circuit area RG3 to supply grounding voltage GND to power circuit 60 in circuit area RG3.

[0084] Thus, in Figure 13In the oscillation circuit 30, VDD is supplied via power line LV1, which is routed from the power supply terminal TVDD, and GND is supplied via ground line LG1, which is routed from the ground terminal TGND. On the other hand, for the temperature sensor circuit 40, logic circuit 50, etc., VDD is supplied via power lines LV2A and LV2B, which branch from the power supply terminal TVDD and power line LV1, and GND is supplied via ground lines LG2A and LG2B, which branch from the ground terminal TGND and ground line LG1. That is, power lines LV1 and LV2A and LV2B are routed from the power supply terminal TVDD. Furthermore, for the oscillation circuit 30, VDD is supplied via power line LV1, and for the temperature sensor circuit 40, logic circuit 50, etc., VDD is supplied via power lines LV2A and LV2B. Additionally, ground lines LG1 and LG2A and LG2B are routed from the ground terminal TGND. Furthermore, regarding the oscillation circuit 30, GND is supplied through grounding line LG1, and regarding the temperature sensor circuit 40, logic circuit 50, etc., GND is supplied through grounding lines LG2A and LG2B. In this way, noise generated by the temperature sensor circuit 40, logic circuit 50, etc., in circuit area RG2 is absorbed by the power supply terminal TVDD or the ground terminal TGND via power supply lines LV2A and LV2B or grounding lines LG2A and LG2B. Moreover, this noise is less likely to propagate to the power supply line LV1 or grounding line LG1, which have a higher wiring impedance compared to the power supply terminal TVDD or ground terminal TGND. As a result, the transmission of noise generated by the temperature sensor circuit 40, logic circuit 50, etc., to the oscillation circuit 30, thus preventing the degradation of the signal characteristics of the oscillation signal OSC, can be effectively suppressed.

[0085] In addition, Figure 13In the circuit region RG2, the power supply terminal TVDD and the ground terminal TGND are arranged diagonally. This diagonal arrangement of the power supply terminal TVDD and the ground terminal TGND facilitates branching wiring of power lines LV1 and LV2A / LV2B at the power supply terminal TVDD, and branching wiring of ground lines LG1 and LG2A / LG2B at the ground terminal TGND. For example, power line LV2A and ground line LG2A can be easily routed, for example, along the direction of side SD3, by passing near the temperature sensor circuit 40 or the output buffer circuit 70. Furthermore, power line LV2B and ground line LG2B can be easily routed, for example, in a loop surrounding the logic circuit 50. On the other hand, power line LV1 and ground line LG1 are led out from the circuit region RG2 with the diagonally arranged power supply terminal TVDD and ground terminal TGND towards, for example, side SD1. This facilitates branching wiring of the circuit region RG1 of the oscillation circuit 30 located on the side SD1 relative to circuit region RG2. Therefore, noise transmission from circuit region RG2 to circuit region RG1 can be suppressed, and power lines or ground lines can be routed using an efficient layout configuration. Furthermore, circuits that are noise sources, such as the temperature sensor circuit 40, logic circuit 50, and output buffer circuit 70, are uniformly configured in circuit region RG2, where power terminals TVDD and ground terminals TGND are arranged diagonally. Noise from these sources is more easily absorbed by the power terminals TVDD and TGND arranged diagonally in circuit region RG2. Therefore, both efficient layout configuration and noise reduction can be achieved simultaneously.

[0086] Furthermore, noise in circuit region RG2 is sometimes transmitted to circuit region RG1 via, for example, a P-type substrate of circuit device 20. Regarding this, in Figure 13 In this design, circuit region RG3 is positioned between circuit region RG2 and circuit region RG1. This arrangement separates the distance between circuit region RG2 and circuit region RG1 and effectively suppresses noise transmitted through the substrate.

[0087] 4. Another layout configuration example

[0088] Figure 14 Another layout configuration example of the circuit device 20 in this embodiment is shown. Figure 14 Layout configuration and Figure 2 The difference lies in the placement of the temperature sensor circuit 40. Figure 2 In the middle, the temperature sensor circuit 40 is configured along edge SD3, however, in Figure 14In the circuit, it is configured along the opposite side of edge SD3, namely edge SD4. Specifically, circuit device 20 includes a ground terminal TGND that receives the input ground voltage GND. Figure 14 In this configuration, the temperature sensor circuit 40 and the ground terminal TGND are arranged side-by-side along side SD4, which intersects sides SD1 and SD2 of the circuit device 20. For example, the temperature sensor circuit 40 and the ground terminal TGND are arranged side-by-side along side SD4 in the order of temperature sensor circuit 40 and ground terminal TGND. For example, when the direction from side SD1 to side SD2 is defined as DR1, the ground terminal TGND is arranged on the DR1 side of the temperature sensor circuit 40. In this way, the temperature sensor circuit 40 and the ground terminal TGND are arranged side-by-side along side SD4, thereby enabling the supply of ground voltage GND from the ground terminal TGND to the temperature sensor circuit 40 using the shortest path, thus significantly reducing parasitic resistance in this path. Therefore, in the event of fluctuations in the AC mode of current consumption due to the intermittent operation of the temperature sensor circuit 40, voltage fluctuations caused by parasitic resistance in the path from the temperature sensor circuit 40 to the ground terminal TGND can be minimized, and the noise level caused by fluctuations in the AC mode of current consumption can also be reduced.

[0089] Thus, in this embodiment, as Figure 2 , Figure 14 As shown, the power supply terminal TVDD or ground terminal TGND and the temperature sensor circuit 40 are arranged side by side along the side that intersects with side SD1 and side SD2, namely side SD3 or side SD4.

[0090] Figure 15 Another layout configuration example of the circuit device 20 in this embodiment is also shown. Figure 15 Layout configuration and Figure 2 The difference lies in the placement of the temperature sensor circuit 40. Figure 2 In the middle, the temperature sensor circuit 40 is configured along edge SD3, however, in Figure 14 In the middle, configured along edge SD2. For example, in Figure 15 In this configuration, the oscillation circuit 30 is arranged along edge SD1, and the temperature sensor circuit 40 is arranged along the opposite edge SD1, i.e., edge SD2. For example, the oscillation circuit 30 is arranged along edge SD1 with edge SD1 as the longer side, and the temperature sensor circuit 40 is arranged along edge SD2 with edge SD2 as the longer side. If the temperature sensor circuit 40 is arranged along edge SD2, the opposite edge of edge SD1 where the oscillation circuit 30 is located, then... Figure 2 or Figure 14In comparison, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 can be increased. This further suppresses the transmission of noise from the intermittent operation of the temperature sensor circuit 40 to the oscillation circuit 30. Furthermore, the layout of the circuit device 20 in this embodiment is not limited to... Figure 2 , Figure 14 , Figure 15 The configuration example allows for various variations.

[0091] 5. Oscillator

[0092] Figure 16 An example of the construction of the oscillator 4 according to this embodiment is shown. The oscillator 4 includes an oscillator 10, a circuit device 20, and a package 15 for housing the oscillator 10 and the circuit device 20. The package 15 is formed of, for example, ceramic, and has a housing space inside, in which the oscillator 10 and the circuit device 20 are housed. The housing space is hermetically sealed, preferably in a near-vacuum state, i.e., a depressurized state. Through the package 15, the oscillator 10 and the circuit device 20 can be appropriately protected from the effects of impact, dust, heat, moisture, etc.

[0093] Package 15 includes a base 16 and a cover 17. Specifically, package 15 comprises a base 16 supporting the oscillator 10 and the circuit device 20, and a cover 17 engaged with the upper surface of the base 16 to form a receiving space between the cover and the base 16. The oscillator 10 is supported via terminal electrodes on a stepped portion disposed inside the base 16. Furthermore, the circuit device 20 is disposed on the inner bottom surface of the base 16. Specifically, the circuit device 20 is disposed with its active surface facing the inner bottom surface of the base 16. The active surface is the surface of the circuit device 20 on which circuit elements are formed. Furthermore, bumps BMP are formed on the terminals of the circuit device 20. The circuit device 20 is supported on the inner bottom surface of the base 16 via conductive bumps BMP. The conductive bumps BMP are, for example, metal bumps, and the oscillator 10 and the circuit device 20 are electrically connected via these bumps BMP, internal wiring of package 15, or terminal electrodes. Furthermore, the circuit device 20 is electrically connected to the external terminals 18 and 19 of the oscillator 4 via the internal wiring of the bump BMP or package 15. The external terminals 18 and 19 are formed on the outer bottom surface of the package 15. The external terminals 18 and 19 are connected to external devices via external wiring. The external wiring may be, for example, wiring formed on a circuit board on which the external device is mounted. Thus, clock signals can be output to external devices.

[0094] In addition, Figure 16 In this embodiment, the circuit device 20 is mounted upside down with its active surface facing downwards. However, this embodiment is not limited to this mounting. For example, the circuit device 20 can also be mounted with its active surface facing upwards. That is, the circuit device 20 is mounted with its active surface facing the oscillator 10.

[0095] As described above, the circuit arrangement of this embodiment includes: an oscillation circuit that causes an oscillator to oscillate and generate an oscillation signal; a temperature sensor circuit that operates intermittently; a logic circuit that performs temperature compensation processing based on the output of the temperature sensor circuit; and a power supply circuit that supplies power to the oscillation circuit. The oscillation circuit is disposed in a first circuit region, the temperature sensor circuit and the logic circuit are disposed in a second circuit region, and the power supply circuit is disposed in a third circuit region between the first circuit region and the second circuit region.

[0096] According to this embodiment, power is supplied to the oscillation circuit from the power supply circuit. The oscillation circuit performs an oscillation operation to cause the oscillator to oscillate, generating an oscillation signal. The temperature sensor circuit detects the temperature while operating intermittently, and the logic circuit performs temperature compensation processing based on the output of the temperature sensor circuit. Furthermore, in this embodiment, the oscillation circuit is located in the first circuit region, the temperature sensor circuit and the logic circuit are located in the second circuit region, and the power supply circuit is located in the third circuit region between the first and second circuit regions. Thus, the power supply circuit located in the third circuit region is situated between the first circuit region where the oscillation circuit is located and the second circuit region where the temperature sensor circuit and the logic circuit are located. This allows for separation of the distance between the oscillation circuit and the temperature sensor circuit and the logic circuit, effectively suppressing the situation where the fluctuation of the AC current consumption due to the intermittent operation of the temperature sensor circuit becomes noise, adversely affecting the oscillation operation of the oscillation circuit and degrading the signal characteristics of the oscillation signal.

[0097] Furthermore, in this embodiment, the temperature sensor circuit performs intermittent operation as follows: during the operation period, it calculates the temperature data corresponding to the temperature, and stops after outputting the temperature data to the logic circuit.

[0098] In this way, the temperature sensor circuit operates intermittently during repetitive operation and during periods of inactivity, thereby achieving low power consumption of the circuit device.

[0099] Furthermore, in this embodiment, the logic circuit has a latch circuit that latches the temperature data output by the temperature sensor circuit during operation. During the shutdown period of the temperature sensor circuit, the logic circuit also performs temperature compensation processing based on the latched temperature data.

[0100] In this way, even if the temperature sensor circuit stops working during the downtime after the working period, the logic circuit can still perform appropriate temperature compensation processing based on the temperature data latched in the latch circuit.

[0101] Furthermore, in this embodiment, the temperature sensor circuit includes: a ring oscillator; a counter circuit that uses a clock signal based on the oscillation signal to count the output pulse signal of the ring oscillator and outputs temperature data based on the count value obtained through the counting process; and a regulator that supplies a regulating power supply voltage to the ring oscillator. The regulator supplies the regulating power supply voltage to the ring oscillator during intermittent operation.

[0102] Based on this structure, a low-power temperature sensor circuit that can operate at low voltage can be realized with a small-scale circuit.

[0103] Furthermore, in this embodiment, the temperature sensor circuit includes a current setting circuit, which operates according to the adjusted power supply voltage to set the operating current of the ring oscillator.

[0104] By setting this current setting circuit and setting the operating current of the ring oscillator, frequency control can be achieved to change the oscillation frequency of the ring oscillator according to the temperature.

[0105] Furthermore, in this embodiment, the circuit device includes an output buffer circuit that outputs an output clock signal based on an oscillation signal, and the output buffer circuit is configured in the second circuit region.

[0106] In this way, by configuring a power supply circuit in the third circuit region between the first circuit region where the oscillation circuit is configured and the second circuit region where the output buffer circuit is configured, the distance between the oscillation circuit and the output buffer circuit can be separated.

[0107] Furthermore, in this embodiment, the first circuit region is the circuit region along the first side of the circuit device, and the second circuit region is the circuit region along the second side of the circuit device that is the opposite side of the first side.

[0108] In this way, by arranging an oscillation circuit on the first side of the circuit device, and arranging a temperature sensor circuit and a logic circuit on the second side opposite to the first side of the circuit device, the distance between the oscillation circuit and the temperature sensor circuit and the logic circuit can be separated.

[0109] Furthermore, in this embodiment, the circuit device includes: a power supply terminal that receives a power supply voltage; and a ground terminal that receives a ground voltage. The power supply terminal or the ground terminal is arranged side by side with the temperature sensor circuit along the side that intersects the first side and the second side.

[0110] In this way, the power supply voltage or ground voltage can be supplied to the temperature sensor circuit using the shortest path. In the event of fluctuations in the AC mode that consume current due to the intermittent operation of the temperature sensor circuit, voltage fluctuations such as parasitic resistance in the path from the power supply terminal or ground terminal to the temperature sensor circuit can be suppressed.

[0111] Furthermore, in this embodiment, the circuit device includes a clock terminal that outputs an output clock signal based on an oscillation signal, and the temperature sensor circuit is disposed between the power supply terminal and the clock terminal.

[0112] In this way, the temperature sensor circuit or clock terminal, which serves as a noise source, can be configured along the side that intersects with the first and second sides, thereby suppressing the transmission of noise from the noise source to the oscillation circuit.

[0113] Furthermore, in this embodiment, the oscillation circuit is arranged along the first side, and the temperature sensor circuit is arranged along the second side.

[0114] Thus, the temperature sensor circuit, which becomes a noise source, is configured along the second side opposite to the first side, thereby suppressing the transmission of noise from the noise source to the oscillation circuit configured along the first side.

[0115] Furthermore, in this embodiment, the circuit device includes a clock terminal that outputs an output clock signal based on an oscillation signal. The clock terminal is disposed at the corner where the third side and the second side of the circuit device intersect, and the third side intersects with the first side and the second side.

[0116] This allows the oscillator circuit located in the first circuit region to be separated from the clock terminal, thus suppressing the transmission of noise from the output clock signal in the clock terminal to the oscillator circuit.

[0117] Furthermore, in this embodiment, the circuit device includes: a power supply terminal that receives a power supply voltage; and a ground terminal that receives a ground voltage, the power supply terminal and the ground terminal being diagonally arranged in the second circuit region.

[0118] In this way, the noise generated by the temperature sensor circuit or logic circuit in the second circuit area is absorbed by the power supply terminal or ground terminal side via the power supply line or ground line wire routed in the second circuit area, which can suppress the noise from being transmitted to the oscillation circuit.

[0119] Furthermore, the circuit arrangement of this embodiment includes: an oscillation circuit that causes an oscillator to oscillate and generate an oscillation signal; a temperature sensor circuit that operates intermittently; a logic circuit that performs temperature compensation processing based on the output of the temperature sensor circuit; a power supply terminal that receives a power supply voltage; and a ground terminal that receives a ground voltage. The oscillation circuit is disposed in a first circuit region, and the temperature sensor circuit and the logic circuit are disposed in a second circuit region. The power supply terminal and the ground terminal are arranged diagonally in the second circuit region.

[0120] According to this embodiment, power is supplied to the oscillation circuit from the power supply circuit. The oscillation circuit performs an oscillation operation to cause the oscillator to oscillate, generating an oscillation signal. The temperature sensor circuit operates intermittently while detecting the temperature, and the logic circuit performs temperature compensation processing based on the output of the temperature sensor circuit. Furthermore, in this embodiment, the oscillation circuit is disposed in the first circuit region, and the temperature sensor circuit and logic circuit are disposed in the second circuit region. The power supply terminal and the ground terminal are arranged diagonally in the second circuit region. Therefore, noise generated by the temperature sensor circuit or logic circuit in the second circuit region is absorbed by the power supply terminal or ground terminal side via the power supply line or ground line wired in the second circuit region, and the transmission of this noise to the oscillation circuit can be suppressed.

[0121] Furthermore, in this embodiment, the circuit device includes: a first power line connected to a power terminal and routed in a first circuit region to supply power voltage to the oscillation circuit in the first circuit region; a first ground line connected to a ground terminal and routed in the first circuit region to supply ground voltage to the oscillation circuit in the first circuit region; a second power line connected to a power terminal and branching from the power terminal to the first power line in a second circuit region to supply power voltage to the temperature sensor circuit and logic circuit in the second circuit region; and a second ground line connected to a ground terminal and branching from the ground terminal to the first ground line in a second circuit region to supply ground voltage to the temperature sensor circuit and logic circuit in the second circuit region.

[0122] In this way, noise generated by the temperature sensor circuit or logic circuit in the second circuit region is absorbed by the power supply terminal side or ground terminal side via the second power supply line or the second ground line, and the noise is not easily transmitted to the first power supply line or the first ground line side. Therefore, it is possible to suppress the transmission of noise generated by the temperature sensor circuit or logic circuit to the oscillation circuit, thereby preventing the degradation of the signal characteristics of the oscillation signal.

[0123] Furthermore, this embodiment relates to an oscillator that includes the circuitry and oscillator described above.

[0124] Furthermore, while this embodiment has been described in detail above, those skilled in the art will readily understand that various modifications can be made without substantially departing from the novel aspects and effects of this disclosure. Therefore, all such modifications are included within the scope of this disclosure. For example, in the specification or drawings, a term described at least once with a different term that is more general or synonymous can be replaced with that different term at any point in the specification or drawings. Moreover, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. Furthermore, the structure and operation of the circuit device, oscillator, etc., are not limited to the structure and operation described in this embodiment, and various modifications can be implemented.

Claims

1. A circuit arrangement, characterized by It includes: an oscillation circuit that oscillates a vibrator to generate an oscillation signal; a temperature sensor circuit that intermittently operates; a logic circuit that performs a temperature compensation process based on an output of the temperature sensor circuit; a power supply circuit that supplies a power source to the oscillation circuit; a power source terminal to which a power source voltage is input; and a ground terminal to which a ground voltage is input, the oscillation circuit being arranged in a first circuit region, the temperature sensor circuit and the logic circuit being arranged in a second circuit region, the power supply circuit being arranged in a third circuit region between the first circuit region and the second circuit region, the power source terminal and the ground terminal being diagonally arranged in the second circuit region, the circuit device further including: a first power source line connected to the power source terminal, routed in the first circuit region, and supplying the power source voltage to the oscillation circuit in the first circuit region; a first ground line connected to the ground terminal, routed in the first circuit region, and supplying the ground voltage to the oscillation circuit in the first circuit region; a second power source line connected to the power source terminal, routed in the second circuit region, branched from the first power source line at the power source terminal, and supplying the power source voltage to the temperature sensor circuit and the logic circuit in the second circuit region; and a second ground line connected to the ground terminal, routed in the second circuit region, branched from the first ground line at the ground terminal, and supplying the ground voltage to the temperature sensor circuit and the logic circuit in the second circuit region.

2. The circuit device according to claim 1, wherein the temperature sensor circuit performs the intermittent operation of obtaining temperature data corresponding to a temperature during an operation period and stopping after outputting the temperature data to the logic circuit.

3. The circuit device according to claim 2, wherein the logic circuit has a latch circuit that latches the temperature data output from the temperature sensor circuit during the operation period, and the logic circuit also performs the temperature compensation process based on the latched temperature data during a stop period of the temperature sensor circuit.

4. The circuit device according to claim 1, wherein the temperature sensor circuit includes: a ring oscillator; a counter circuit that performs a counting process of an output pulse signal of the ring oscillator using a clock signal based on the oscillation signal, and outputs temperature data based on a count value obtained by the counting process; and a regulator that supplies a regulated power source voltage to the ring oscillator, the regulator supplying the regulated power source voltage to the ring oscillator during the intermittent operation.

5. The circuit device according to claim 4, wherein the temperature sensor circuit includes a current setting circuit that operates based on the regulated power source voltage and sets an operating current of the ring oscillator.

6. The circuit device according to any one of claims 1 to 5, wherein ​ ​ ​ ​ The circuit device includes an output buffer circuit that outputs an output clock signal based on the oscillation signal, the output buffer circuit being disposed in the second circuit region.

7. The circuit device according to any one of claims 1 to 5, wherein The first circuit region is a circuit region along a first side of the circuit device, and the second circuit region is a circuit region along a second side of the circuit device that is opposite to the first side.

8. The circuit device according to claim 7, wherein The power supply terminal or the ground terminal is disposed side by side with the temperature sensor circuit along a side that intersects the first side and the second side.

9. The circuit device according to claim 8, wherein The circuit device includes a clock terminal that outputs an output clock signal based on the oscillation signal, the temperature sensor circuit being disposed between the power supply terminal and the clock terminal.

10. The circuit device according to claim 7, wherein The oscillation circuit is disposed along the first side, and the temperature sensor circuit is disposed along the second side.

11. The circuit device according to claim 7, wherein The circuit device includes a clock terminal that outputs an output clock signal based on the oscillation signal, the clock terminal being disposed at a corner of the circuit device where a third side that intersects the first side and the second side intersects the second side.

12. A circuit arrangement, characterized by It includes: an oscillation circuit that oscillates a vibrator to generate an oscillation signal; a temperature sensor circuit that intermittently operates; a logic circuit that performs temperature compensation processing based on an output of the temperature sensor circuit; a power supply terminal to which a power supply voltage is input; and a ground terminal to which a ground voltage is input, the oscillation circuit being disposed in a first circuit region, the temperature sensor circuit and the logic circuit being disposed in a second circuit region, the power supply terminal and the ground terminal being diagonally disposed within the second circuit region, The circuit device further includes: a first power supply line connected to the power supply terminal, routed in the first circuit region, and supplying the power supply voltage to the oscillation circuit of the first circuit region; a first ground line connected to the ground terminal, routed in the first circuit region, and supplying the ground voltage to the oscillation circuit of the first circuit region; a second power supply line connected to the power supply terminal, routed in the second circuit region, branched from the first power supply line at the power supply terminal, and supplying the power supply voltage to the temperature sensor circuit and the logic circuit of the second circuit region; and a second ground line connected to the ground terminal, routed in the second circuit region, branched from the first ground line at the ground terminal, and supplying the ground voltage to the temperature sensor circuit and the logic circuit of the second circuit region. It includes: the circuit device according to any one of claims 1 to 12; and 13. An oscillator characterized by the vibrator. ​ ​

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