Differential amplifier
By dynamically adjusting the output current through the current source and compensation circuit of the differential amplifier, the problem of the reference voltage being easily affected by noise in low-noise LDO regulators is solved, resulting in smaller filter capacitors and higher circuit stability.
Patent Information
- Application Number
- CN202111123288.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-09-25
- Filing Date
- 2021-09-24
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2041-09-24
AI Technical Summary
In low-noise low-dropout (LDO) regulators, the reference voltage of the dynamically biased differential amplifier is susceptible to noise and requires a large filter capacitor to stabilize the reference voltage, leading to noise problems and increased capacitor size.
The differential amplifier design, including a current source, transistors, and compensation circuitry, reduces reference voltage variations, noise, and the capacitance requirement of the filter capacitor by dynamically adjusting the output current and generating a compensation voltage.
This effectively reduces the noise of the reference voltage, decreases the capacitance requirement of the filter capacitor, and improves the stability and noise performance of the circuit.
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Figure CN114257183B_ABST
Abstract
Description
Technical Field
[0001] This document relates to differential amplifiers. Specifically, it relates to a dynamically biased differential amplifier that can be used in low-noise, low-dropout (LDO) regulators. On-chip technology is used to filter the reference voltage. Background Technology
[0002] For example, in the field of high-performance cameras used in smartphones, there is an increasing demand for low-noise, low-dropout (LDO) regulators. Figure 1 A simplified schematic diagram of a dynamically biased differential amplifier 1 for a low-noise LDO is shown. This dynamically biased differential amplifier includes a current source 11 for injecting a dynamically adaptive current I+Idyn into transistors 12 and 13. For example, the injected current can vary from 0.25µA(I) to 160µA(I+Idyn). A filtered reference voltage Vref is applied to the gate of transistor 12, and a feedback voltage is applied to the gate of transistor 13. Typically, the filter capacitor 14 is designed to be large enough to stabilize the reference voltage Vref.
[0003] However, in low-noise applications, the gate-source capacitance of reference transistor 12 is relatively high (due to low-noise requirements and the inability to apply chopping techniques at the input stage), which can lead to significant coupling between the source and gate of reference transistor 12. For example, if the output load of the LDO increases, the current injected into transistors 12 and 13 can increase, for example, from 0.25uA to 160uA. Consequently, the voltage at the common source 15 of transistors 12 and 13 can decrease by 130mV, which in turn affects the gate-source capacitance C of transistor 12. GS This coupling is applied to the reference voltage. Ultimately, this coupling can cause the reference voltage to drop by 1mV.
[0004] Generally speaking, the change in the reference voltage ΔVref can be expressed by the following formula:
[0005]
[0006] Where Cfilt represents the capacitance of filter capacitor 14, V gs (I+Idyn) represents the gate-source voltage of transistor 12 caused by the injected current I+Idyn, and V gs (I) represents the gate-source voltage of transistor 12 caused by the injected current I. Therefore, a larger filter capacitor 14 may be needed to compensate for the change in reference voltage ΔVref.
[0007] This document addresses the aforementioned technical issues. Specifically, this document addresses the technical problem of providing a dynamically biased differential amplifier that is robust to noise caused by dynamic bias and / or requires a small filter capacitor. Summary of the Invention
[0008] A differential amplifier may include a current source, a first transistor, a second transistor, and compensation circuitry. A reference voltage may be applied to a first terminal of the first transistor, and a second terminal of the first transistor may be coupled to the output of the current source. A feedback voltage may be applied to a first terminal of the second transistor, and a second terminal of the second transistor may be coupled to the output of the current source. The compensation circuitry may include a capacitor element coupled to the first terminal of the first transistor, and the compensation circuitry may be configured to reduce variations in the reference voltage at the first terminal of the first transistor.
[0009] The transistor can be a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), a MOS gate thyristor, or other suitable transistor. For example, the first terminal of the first transistor can be the gate terminal, the first terminal of the second transistor can be the gate terminal, the second terminal of the first transistor can be the source terminal, and the second terminal of the second transistor can also be the source terminal. Furthermore, the third terminal of the first transistor can be the drain terminal, and the third terminal of the second transistor can also be the drain terminal.
[0010] A differential amplifier can be configured to generate a voltage / current at the third terminal of the first and second transistors based on the difference between the feedback voltage and the reference voltage. Depending on the application, the feedback voltage may, for example, originate from a node within an LDO regulator.
[0011] As will be discussed in more detail below, variations in the output current supplied by the current source can cause undesirable variations in the reference voltage at the first terminal of the first transistor. The proposed compensation circuit makes it possible to reduce or even minimize such variations and quickly stabilize the reference voltage at a constant value. Therefore, noise in the reference voltage can be significantly reduced. Alternatively, if the same noise level is maintained, the capacitance of the capacitor typically used to stabilize the reference voltage (and which may be coupled to the first terminal of the first transistor) can be reduced.
[0012] The capacitive element can be, for example, a capacitor or another device capable of storing electrical energy in an electric field. A current source can be coupled between the output terminal of the current source and a reference potential. In this document, the term "reference potential" is used in its broadest possible sense. Specifically, a reference potential is not limited to ground potential, i.e., a reference potential having a direct physical connection to the earth. Rather, the term "reference potential" can refer to any reference point from which current can flow or from which voltage can be measured. Furthermore, it should be mentioned that the reference potential mentioned in this document may not necessarily refer to the same physical contact. Rather, the reference potential mentioned in this document may involve different physical contacts, but "this" reference potential is referred to for ease of presentation.
[0013] The current source can be configured to dynamically adjust the output current at the output terminal of the current source, and the compensation circuit can be configured to reduce the variation of the reference voltage at the first terminal of the first transistor based on the output current.
[0014] Specifically, the current source can be configured to dynamically adjust the output current injected into the second terminal of the first transistor and the second terminal of the second transistor. Therefore, the voltage at the output of the current source can change in response to changes in the output current. In other words, the differential amplifier can be configured to be dynamically biased by the output current of the current source. For example, the current source can be configured to dynamically adjust the output current based on the load current at the output of the external LDO power converter. Specifically, if the load current at the output of the external LDO power converter increases, the current source can be configured to dynamically increase the output current. By adjusting the output current, the bandwidth of the differential amplifier can be increased, the power supply rejection ratio (PSRR) can be increased, and noise can be reduced.
[0015] Therefore, the compensation circuit can be regarded as a feedback circuit, which is capacitively coupled to the reference voltage and configured to adjust the reference voltage based on the output current.
[0016] The differential amplifier may also include a filter capacitor coupled to a first terminal of the first transistor. For example, the filter capacitor may be coupled between the first terminal of the first transistor and a reference potential. Furthermore, the first terminal of the first transistor may be a high-impedance terminal.
[0017] As described above, the first terminal of the first transistor can be the gate of the first transistor, and the second terminal of the first transistor can be the source of the first transistor. The capacitance of the capacitor element can be equal to the gate-source capacitance of the first transistor.
[0018] A capacitor may be coupled between the compensation node and the first terminal of the first transistor. The compensation circuit may be configured to generate a compensation voltage at the compensation node, wherein the change in the compensation voltage is inversely proportional to the change in voltage at the output terminal of the current source caused by the change in output current.
[0019] Specifically, the compensation circuit may also include a unity-gain inverting amplifier configured to generate a compensation voltage at the compensation node by inverting the voltage at the output of the current source.
[0020] Alternatively or otherwise, the compensation circuit may include a compensation transistor and an additional current source. The compensation transistor may be coupled between the additional current source and the compensation node. Specifically, the gate of the compensation transistor may be coupled to the compensation node, the source of the compensation transistor may be coupled to a reference potential, the drain of the compensation transistor may be coupled to the additional current source, and the drain of the compensation transistor may be coupled to the gate of the compensation transistor.
[0021] An additional current source can be positioned between the supply voltage and the drain terminal of the compensation transistor. The additional current source can be configured to provide an output current corresponding to half the output current of the current source. The compensation transistor can have a similar or equal (maximum) current density to the first transistor. For example, the compensation transistor and the first transistor can be identical.
[0022] Alternatively or otherwise, the current source may include a primary current source and a current mirror, the current mirror including a first mirror transistor and a second mirror transistor. The primary current source may be configured to inject current into the first mirror transistor. The first mirror transistor may be configured to convert the injected current into an intermediate voltage. The second mirror transistor may be configured to convert the intermediate voltage into current injected into both the first and second transistors. A capacitor element may be coupled between a first terminal of the first transistor and the intermediate voltage.
[0023] According to another aspect, a method of operating a differential amplifier is described. This method may include steps corresponding to the features of the differential amplifier described in this document. Specifically, the differential amplifier may include a current source, a first transistor, a second transistor, and a compensation circuit having a capacitor element. The method may include applying a reference voltage to a first terminal of the first transistor. The method may include coupling a second terminal of the first transistor to the output of the current source. The method may include applying a feedback voltage to a first terminal of the second transistor. The method may include coupling a second terminal of the second transistor to the output of the current source. The method may include coupling a capacitor element to the first terminal of the first transistor. The method may include reducing the variation of the reference voltage at the first terminal of the first transistor by the compensation circuit.
[0024] Furthermore, the method may include dynamically adjusting the output current at the output terminal of the current source. The method may also include reducing the change in the reference voltage at the first terminal of the first transistor based on the output current using a compensation circuit.
[0025] The differential amplifier may include a filter capacitor coupled to a first terminal of a first transistor. The first terminal of the first transistor may be the gate of the first transistor, the second terminal of the first transistor may be the source of the first transistor, and the capacitance of the capacitor element may be equal to the gate-source capacitance of the first transistor.
[0026] The method may include coupling a capacitor element between the compensation node and a first terminal of the first transistor. The method may also include generating a compensation voltage at the compensation node by a compensation circuit, such that a change in the compensation voltage is inversely proportional to a change in voltage at the output terminal of the current source caused by a change in the output current.
[0027] The compensation circuit may also include a unity-gain inverting amplifier. The method may include generating a compensation voltage at the compensation node by inverting the voltage at the output of the current source using the unity-gain inverting amplifier.
[0028] The compensation circuit may further include a compensation transistor and an additional current source. The method may include coupling the compensation transistor between the additional current source and the compensation node. More specifically, the method may include coupling the gate of the compensation transistor to the compensation node. The method may include coupling the source of the compensation transistor to a reference potential. The method may include coupling the drain of the compensation transistor to the additional current source. The method may include coupling the drain of the compensation transistor to the gate of the compensation transistor.
[0029] Furthermore, the current source may include a primary current source and a current mirror, the current mirror including a first mirror transistor and a second mirror transistor. The method may include injecting current into the first mirror transistor from the primary current source. The method may include converting the injected current into an intermediate voltage using the first mirror transistor. The method may include converting the intermediate voltage into current injected into both the first and second mirror transistors using the second mirror transistor. The method may include coupling a capacitor element between a first terminal of the first transistor and the intermediate voltage.
[0030] It should be noted that the methods and systems, including their preferred embodiments as outlined in this document, can be used independently or in combination with other methods and systems disclosed in this document. Furthermore, the features outlined in the context of the system also apply to the corresponding methods. Moreover, all aspects of the methods and systems outlined in this document can be combined arbitrarily. Specifically, the features of the claims can be combined with each other in any manner.
[0031] In this document, the terms “coupled” or “coupled” mean that components are electrically connected to each other, whether by means of a direct connection via a wire or by some other means. Attached Figure Description
[0032] The invention is explained below by way of example with reference to the accompanying drawings, wherein similar or identical reference numerals denote similar or identical elements, and wherein...
[0033] Figure 1 A simplified schematic diagram of a dynamically biased differential amplifier is shown.
[0034] Figure 2 A first embodiment of a dynamically biased differential amplifier with compensation circuitry is shown;
[0035] Figure 3 A second embodiment of a dynamically biased differential amplifier with compensation circuitry is shown; and
[0036] Figure 4 A third embodiment of a dynamically biased differential amplifier with compensation circuitry is shown. Detailed Implementation
[0037] Figure 2 A first embodiment of a dynamically biased differential amplifier 2 with compensation circuitry is shown. This exemplary circuit includes a current source 11 for injecting a dynamic adaptive current I+Idyn into transistors 12 and 13. For example, the injected current can vary from 0.25µA(I) to 160µA(I+Idyn). A filtered reference voltage Vref is applied to the gate of transistor 12, and a feedback voltage is applied to the gate of transistor 13. Figure 2 As shown, the gate of transistor 12 has a high impedance and is coupled to ground via filter capacitor 14. For low-noise applications, transistors 12 and 13 need to be in strong inversion and require a large area. This increases their gate-source capacitance and therefore increases the coupling between the common source node and the reference voltage.
[0038] like Figure 2 As shown, the compensation circuit includes a compensation transistor 22, an additional current source 21, and a capacitor element 23. The compensation transistor 22 is coupled between the additional current source 21 and the compensation node. Specifically, the gate of the compensation transistor 22 is coupled to the compensation node, the source of the compensation transistor 22 is coupled to a reference potential, the drain of the compensation transistor 22 is coupled to the additional current source 21, and the drain of the compensation transistor 22 is coupled to its gate. The additional current source 21 is positioned between the supply voltage and the drain terminal of the compensation transistor 22. (As shown in...) Figure 2 As can be seen, the additional current source 21 can be configured to provide an output current corresponding to half of the output current of the current source 11. The compensation transistor 22 may have a (maximum) current density similar to or equal to that of the transistor 12. Alternatively, the compensation transistor 22 may have a gate-source capacitance similar to or equal to that of the transistor 12. For example, the compensation transistor 22 and the first transistor 12 may be identical.
[0039] That is, similar to transistor 12, compensation transistor 22 is dynamically biased. Therefore, the gate-source voltage V... gs_rep With the gate-source voltage V gs A similar approach is taken. In both cases, the gate-source voltage increases, but in the compensation transistor 22, the gate voltage increases, similar to the decrease in the source voltage of transistor 12. The capacitor element 23 may have a capacitance value similar to the inherent gate-source capacitance of transistor 12. Therefore, the positive offset of the gate of the compensation transistor 22 eliminates the negative offset seen at the source of transistor 12, minimizing the variation in the reference voltage value caused by bias.
[0040] Figure 3 A second embodiment of the dynamically biased differential amplifier 3 with compensation circuitry is shown. In this second embodiment, the intermediate voltage generated within the current source itself is reused / tappled as a compensation voltage. Therefore, an additional current source is not required. Figure 3 In this embodiment, the current source includes a primary current source 32 and a current mirror, which includes a first mirror transistor 33 and a second mirror transistor 34. The primary current source 32 injects current into the first mirror transistor 33. The first mirror transistor 33 converts the injected current into an intermediate voltage at the compensation node 35. As already mentioned, this intermediate voltage serves as the compensation voltage in this embodiment. The second mirror transistor 34 converts the intermediate voltage / compensation voltage into current injected into both the first transistor 12 and the second transistor 13. A capacitor element 31 is coupled between the gate terminal of transistor 12 and the compensation node 35. In this embodiment, the capacitance of capacitor element 31 may also be selected to be different from the gate-source capacitance of transistor 12 to obtain the correct gain for compensation.
[0041] at last, Figure 4 A third embodiment of a dynamically biased differential amplifier 4 with compensation circuitry is shown. In this case, the compensation circuitry includes a unity-gain inverting amplifier 42, which generates a compensation voltage at compensation node 43 by inverting the voltage at the output of the current source. This compensation voltage is also coupled to the gate of transistor 12 via a suitable capacitor element 41.
[0042] In summary, this document presents a novel amplifier for a low-noise LDO regulator, where noise in the LDO reference voltage is reduced by an integrated (on-chip) filter, resulting in high impedance at one input of the LDO regulator. In the LDO regulator, the bias current of the input transistor pair can be significantly modulated (e.g., as a function of the load current) to improve circuit performance. For example, the low-noise LDO regulator can utilize an internal ultra-low noise reference and can incorporate dynamic biasing of the internal circuitry (as a function of the output load current) to achieve the desired performance.
[0043] Dynamic bias modifies the operating point, and this affects the filtered low-noise reference. Changes in the operating point can increase or decrease the absolute value of the reference. In this document, the same dynamic bias is used to generate the inverse effect, and the capacitor is coupled back to the reference value to eliminate or minimize the change in absolute value. As an advantage, even with the increased size of the differential pair (transistors 12 and 13), the filtered capacitor can be further reduced to improve noise performance.
[0044] It should be noted that the specification and accompanying drawings only illustrate the principles of the proposed methods and systems. Although not explicitly described or shown herein, those skilled in the art will be able to implement various arrangements embodying the principles of the invention and included within the spirit and scope of the invention. Furthermore, all examples and embodiments outlined in this document are explicitly and primarily intended for illustrative purposes only to aid the reader in understanding the principles of the proposed methods and systems. In addition, all statements of the principles, aspects, and embodiments of the invention, along with specific examples thereof, are provided herein to cover their equivalents.
Claims
1. A differential amplifier, the differential amplifier comprising: - Current source - A first transistor, wherein a reference voltage is applied to a first terminal of the first transistor, and wherein a second terminal of the first transistor is coupled to the output of the current source. - A second transistor, wherein a feedback voltage is applied to a first terminal of the second transistor, and wherein a second terminal of the second transistor is coupled to the output terminal of the current source, and - A compensation circuit having a capacitive element coupled to the first terminal of the first transistor, wherein the compensation circuit is configured to reduce the variation of the reference voltage at the first terminal of the first transistor.
2. The differential amplifier of claim 1, wherein the current source is configured to dynamically adjust the output current at the output terminal of the current source, and wherein the compensation circuit is configured to reduce the change in the reference voltage at the first terminal of the first transistor based on the output current.
3. The differential amplifier according to claim 1 further includes a filter capacitor coupled to the first terminal of the first transistor.
4. The differential amplifier according to claim 1, wherein the first terminal of the first transistor is the gate of the first transistor, the second terminal of the first transistor is the source of the first transistor, and the capacitance of the capacitor element is equal to the gate-source capacitance of the first transistor.
5. The differential amplifier according to claim 2, wherein The capacitor element is coupled between the compensation node and the first terminal of the first transistor, and - The compensation circuit is configured to generate a compensation voltage at the compensation node, wherein the change in the compensation voltage is inversely proportional to the change in voltage at the output terminal of the current source caused by the change in the output current.
6. The differential amplifier of claim 5, wherein the compensation circuit further comprises a unity-gain inverting amplifier configured to generate the compensation voltage at the compensation node by inverting the voltage at the output of the current source.
7. The differential amplifier of claim 5, wherein the compensation circuit further comprises a compensation transistor and an additional current source, and wherein the compensation transistor is coupled between the additional current source and the compensation node.
8. The differential amplifier according to claim 7, wherein The gate of the compensation transistor is coupled to the compensation node. The source of the compensation transistor is coupled to a reference potential. The drain of the compensation transistor is coupled to the additional current source, and - The drain of the compensation transistor is coupled to the gate of the compensation transistor.
9. The differential amplifier of claim 1, wherein the current source comprises a primary current source and a current mirror, the current mirror comprising a first mirror transistor and a second mirror transistor, and wherein... The primary current source is configured to inject current into the first mirror transistor. - The first mirror transistor is configured to convert the injected current into an intermediate voltage. - The second mirror transistor is configured to convert the intermediate voltage into current injected into both the first transistor and the second transistor, and The capacitor element is coupled between the first terminal of the first transistor and the intermediate voltage.
10. A method of operating a differential amplifier, the differential amplifier comprising a current source, a first transistor, a second transistor, and a compensation circuit having a capacitor element, the method comprising: - Apply a reference voltage to the first terminal of the first transistor. - Couple the second terminal of the first transistor to the output terminal of the current source. - Apply the feedback voltage to the first terminal of the second transistor. - Couple the second terminal of the second transistor to the output terminal of the current source. - The capacitor element is coupled to the first terminal of the first transistor, and The compensation circuit reduces the variation of the reference voltage at the first terminal of the first transistor.
11. The method of claim 10, comprising: - The output current at the output terminal of the current source is dynamically adjusted by the current source, and The compensation circuit reduces the change in the reference voltage at the first terminal of the first transistor based on the output current.
12. The method of claim 10, wherein the differential amplifier includes a filter capacitor coupled to the first terminal of the first transistor.
13. The method of claim 10, wherein the first terminal of the first transistor is the gate of the first transistor, the second terminal of the first transistor is the source of the first transistor, and the capacitance of the capacitor element is equal to the gate-source capacitance of the first transistor.
14. The method of claim 11, comprising: - The capacitor element is coupled between the compensation node and the first terminal of the first transistor, and - The compensation circuit generates a compensation voltage at the compensation node such that the change in the compensation voltage is inversely proportional to the change in voltage at the output terminal of the current source caused by the change in the output current.
15. The method of claim 14, wherein the compensation circuit further comprises a unity-gain inverting amplifier, and the method comprises: The compensation voltage at the compensation node is generated by the unity-gain inverting amplifier by inverting the voltage at the output of the current source.
16. The method of claim 14, wherein the compensation circuit further comprises a compensation transistor and an additional current source, and the method comprises: - The compensation transistor is coupled between the additional current source and the compensation node.
17. The method of claim 16, comprising: - The gate of the compensation transistor is coupled to the compensation node. - The source of the compensation transistor is coupled to a reference potential. - Couple the drain of the compensation transistor to the additional current source, and - The drain of the compensation transistor is coupled to the gate of the compensation transistor.
18. The method of claim 10, wherein the current source comprises a primary current source and a current mirror, the current mirror comprising a first mirror transistor and a second mirror transistor, and wherein the method comprises: Current is injected into the first mirror transistor by the primary current source. The injected current is converted into an intermediate voltage by the first mirror transistor. - The intermediate voltage is converted into current injected into both the first transistor and the second transistor by the second mirror transistor, and - The capacitor element is coupled between the first terminal of the first transistor and the intermediate voltage.
Citation Information
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