Ultra-high-speed bldc motor counter electromotive voltage monitoring method

Abstract

The embodiment of the application discloses a kind of ultra-high-speed BLDC motor counter electromotive force voltage monitoring methods, including the frequency of setting PWM chopping timer, output comparison interrupt and overflow interrupt enable;The frequency and overflow interrupt enable of setting counter electromotive force monitoring timer, wherein the frequency of counter electromotive force monitoring timer is higher than the frequency of PWM chopping timer;Motor is started and PWM chopping timer is opened;Counter electromotive force monitoring timer is opened in the process of the output comparison interrupt of PWM chopping timer;Motor counter electromotive force zero-crossing monitoring is executed;Motor commutation is executed at commutation moment;Counter electromotive force monitoring timer is closed in the overflow interrupt enable of PWM chopping timer.The precision of detecting counter electromotive force zero-crossing and motor commutation is improved, and PWM chopping frequency does not need to be improved, effectively avoid the increase of power device switching loss.

Description

Technical Field

[0001] This invention relates to the field of motors, and more specifically to a method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor. Background Technology

[0002] In traditional sensorless brushless DC motor control systems, the commutation speed of the sensorless motor is limited by the PWM chopping cycle (PWM carrier frequency) of the drive motor. This is because the algorithms for monitoring the zero-crossing point of the motor's back EMF and the motor commutation algorithm are both executed during PWM carrier interrupts. However, this very fact allows the control system to synchronously monitor the zero-crossing point of the motor's back EMF and accurately identify the commutation moment. But with ultra-high-speed motors, the commutation frequency is high. If the control system uses a lower back EMF zero-crossing monitoring frequency, the monitoring accuracy will be insufficient, leading to missed commutation points and further causing commutation errors. In severe cases, this can damage the controller's power devices. Therefore, the only way to improve the accuracy of back EMF zero-crossing monitoring and commutation accuracy is to increase the PWM carrier frequency to meet control requirements. However, increasing the PWM carrier frequency increases switching losses in the power devices and causes severe overheating in the controller. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] Firstly, a method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor, the method comprising:

[0006] Configure the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt;

[0007] Configure the frequency of the back EMF monitoring timer and enable the overflow interrupt, wherein the frequency of the back EMF monitoring timer is higher than the frequency of the PWM chopper timer;

[0008] Start the motor and activate the PWM chopper timer;

[0009] Enabling the back EMF monitoring timer during the output compare interrupt of the PWM chopper timer;

[0010] Perform zero-crossing monitoring of the motor's back electromotive force;

[0011] Motor commutation is performed at the commutation moment;

[0012] Disable the back EMF monitoring timer in the overflow interrupt enable of the PWM chopper timer.

[0013] The further technical solution is as follows: the frequency of the back EMF monitoring timer is N times the frequency of the PWM chopper timer, where N is greater than or equal to 5.

[0014] The further technical solution is as follows: the zero-crossing monitoring of the back EMF of the actuator specifically includes:

[0015] Monitor the back electromotive force voltage amplitude of the non-conducting phase and the bus input voltage amplitude;

[0016] Determine whether the back electromotive force voltage amplitude is greater than 0.5 times the bus input voltage amplitude;

[0017] If so, the zero-crossing point of the back electromotive force voltage is obtained.

[0018] The further technical solution is as follows: the motor commutation is performed at the commutation moment, specifically including:

[0019] Digital filtering and commutation delay are applied to the commutation process.

[0020] Determine whether the commutation delay time is met;

[0021] If so, the PWM output channel switching action is executed according to the power-on sequence logic.

[0022] Secondly, an ultra-high-speed BLDC motor back electromotive force voltage monitoring device, the device comprising a first setting unit, a second setting unit, a first starting unit, a second starting unit, a first execution unit, a second execution unit, and a shut-off unit;

[0023] The first setting unit is used to set the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt;

[0024] The second setting unit is used to set the frequency of the back EMF monitoring timer and enable the overflow interrupt, wherein the frequency of the back EMF monitoring timer is higher than the frequency of the PWM chopper timer;

[0025] The first starting unit is used to start the motor and enable the PWM chopper timer;

[0026] The second startup unit is used to start the back EMF monitoring timer during the output comparison interrupt of the PWM chopper timer;

[0027] The first execution unit is used to perform zero-crossing monitoring of the motor's back electromotive force;

[0028] The second execution unit is used to perform motor commutation at the commutation moment;

[0029] The shutdown unit is used to disable the back EMF monitoring timer during the overflow interrupt enable of the PWM chopper timer.

[0030] The further technical solution is as follows: the frequency of the back EMF monitoring timer is N times the frequency of the PWM chopper timer, where N is greater than or equal to 5.

[0031] The further technical solution is as follows: the first execution unit includes a monitoring module, a first judgment module, and an acquisition module;

[0032] The detection module is used to monitor the back electromotive force voltage amplitude of the non-conducting phase and the bus input voltage amplitude;

[0033] The first judgment module is used to determine whether the back electromotive force voltage amplitude is greater than 0.5 times the bus input voltage amplitude;

[0034] The acquisition module is used to obtain the zero-crossing point of the back electromotive force voltage.

[0035] The further technical solution is as follows: the second execution unit includes a switching module, a second judgment module, and an execution module;

[0036] The switching module is used to input digital filtering and commutation delay for phase switching;

[0037] The second judgment module is used to determine whether the commutation delay time is met;

[0038] The execution module is used to perform PWM output channel switching actions according to the power-on sequence logic.

[0039] Thirdly, a computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, performs the method steps as described above.

[0040] Fourthly, a storage medium storing a computer program, the computer program including program instructions that, when executed by a processor, cause the processor to perform the method steps described above.

[0041] The beneficial effects of this invention compared with the prior art are as follows: This invention introduces a back EMF monitoring timer. The back EMF monitoring timer is enabled during the output comparison interrupt of the PWM chopper timer and disabled during the overflow interrupt enable of the PWM chopper timer. This allows the back EMF monitoring timer to be synchronized with the PWM chopper timer, improving the accuracy of detecting the zero-crossing point of the back EMF and the commutation of the motor. Moreover, the PWM chopping frequency does not need to be increased, effectively avoiding the increase of switching losses of power devices.

[0042] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other objects, features and advantages of the present invention more obvious and understandable, preferred embodiments are described in detail below. Attached Figure Description

[0043] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 A flowchart illustrating a method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor, provided in a specific embodiment of the present invention;

[0045] Figure 2 A schematic block diagram of a back electromotive force voltage monitoring device for an ultra-high-speed BLDC motor provided in a specific embodiment of the present invention;

[0046] Figure 3 A schematic block diagram of a computer device provided for a specific embodiment of the present invention;

[0047] Figure 4 This is a graph showing the experimental data of the present invention. Detailed Implementation

[0048] To better understand the technical content of the present invention, the technical solution of the present invention will be further introduced and explained below with reference to specific embodiments, but is not limited thereto.

[0049] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0050] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0051] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0052] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0053] This invention is mainly used for back EMF voltage monitoring of ultra-high-speed motors. It can improve the accuracy of detecting the zero-crossing point of the back EMF and the commutation of the motor, and effectively avoid the increase of switching losses of power devices. The invention is described below through specific embodiments.

[0054] like Figure 1 As shown, the method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor includes the following steps: S10, S20, S30, S40, S50, S60 and S70.

[0055] S10: Set the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt.

[0056] After system initialization, set the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt.

[0057] S20. Set the frequency of the back EMF monitoring timer and enable the overflow interrupt. The frequency of the back EMF monitoring timer is higher than the frequency of the PWM chopper timer.

[0058] The frequency of the back EMF monitoring timer is N times the frequency of the PWM chopper timer, where N is greater than or equal to 5.

[0059] In this embodiment, the frequency of the back EMF monitoring timer is 5 times the frequency of the PWM chopper timer, the frequency of the PWM chopper timer is 10kHz, and the frequency of the back EMF monitoring timer is 50kHz.

[0060] S30, start the motor and enable the PWM chopper timer.

[0061] S40. Enable the back EMF monitoring timer during the output compare interrupt of the PWM chopper timer.

[0062] S50, performs zero-crossing monitoring of the motor's back EMF.

[0063] Step S50 specifically includes the following steps:

[0064] S501, monitor the back electromotive force voltage amplitude of the non-conducting phase and the bus input voltage amplitude.

[0065] S502. Determine whether the back EMF voltage amplitude is greater than 0.5 times the bus input voltage amplitude. If yes, S503. Obtain the zero-crossing point of the back EMF voltage. If no, return to step S501.

[0066] The AD module in the starter motor reads the non-conducting back electromotive force voltage, obtains the amplitude of the non-conducting back electromotive force voltage Vbemf, and compares the amplitude with half of the bus input voltage Vcc. If Vbemf > 1 / 2Vcc, then that moment is the zero-crossing point of the back electromotive force.

[0067] S60, Perform motor commutation at the commutation time.

[0068] Step S60 specifically includes the following steps:

[0069] S601, Digital filtering and commutation delay for entering commutation.

[0070] S602. Determine whether the commutation delay time is met. If yes, S603. Execute the PWM output channel switching action according to the power-on sequence logic. If no, return to step S501.

[0071] The digital filter and commutation delay are entered into the commutation process. If the commutation delay is met, the PWM output channel switching action is executed according to the power-on sequence logic to complete the motor commutation.

[0072] S70. Disable the back EMF monitoring timer in the overflow interrupt enable of the PWM chopper timer.

[0073] More specifically, given the high commutation frequency of ultra-high-speed motors, using a low PWM carrier frequency to monitor the zero-crossing point of the back EMF will inevitably lead to missed zero-crossing points. Therefore, this patent proposes using a back EMF monitoring timer to replace the PWM chopper timer for back EMF zero-crossing monitoring and motor commutation. For example, if the PWM carrier frequency is 10kHz, then the set frequency of the back EMF monitoring timer replacing the PWM chopper timer is 50kHz, which can improve the accuracy of both back EMF zero-crossing monitoring and motor commutation by 5 times. However, there will be a synchronization problem between these two timers, which will seriously affect the timing of the back EMF zero-crossing monitoring, leading to inaccurate back EMF zero-crossing monitoring.

[0074] To resolve the time synchronization issue between the PWM chopper timer and the electromotive force monitoring timer, the following methods are employed:

[0075] The electromotive force (EMF) monitoring timer is off by default. An output comparison interrupt is set for the PWM chopper timer, and the EMF monitoring timer is started within this interrupt (at time T0). The EMF monitoring timer is then turned off by the timer overflow interrupt of the PWM chopper timer (at time T1). This generates a time window ΔT (ΔT = T1 - T0) for synchronous back EMF zero-crossing sampling and motor commutation. Within ΔT, the EMF monitoring timer will repeatedly perform back EMF zero-crossing monitoring, starting the AD module to read the non-conducting back EMF voltage, obtaining its amplitude Vbemf, and comparing it with half of the bus input voltage Vcc. If Vbemf > 1 / 2 Vcc, then this moment is the back EMF zero-crossing point, and the digital filtering and commutation delay are initiated. If the commutation delay is satisfied, the PWM output channel switching action is executed according to the power-on sequence logic to complete the motor commutation. By disabling the electromotive force monitoring timer in the PWM chopper timer overflow interrupt, the high commutation frequency requirement of the ultra-high speed motor can be met, while the PWM carrier frequency is still maintained at 10KHz.

[0076] like Figure 4 As shown, within the time window ΔT, the system synchronously detects the back EMF voltage of the motor through the interrupt of the EMF monitoring timer, monitors the zero-crossing point of the back EMF, and performs motor commutation at the commutation time. The EMF monitoring timer and the PWM chopper timer are synchronized to improve the accuracy of detecting the zero-crossing point of the back EMF and the motor commutation, but the PWM chopper frequency does not need to be increased, effectively avoiding the increase of switching losses of power devices.

[0077] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0078] Corresponding to the above-described method for monitoring the back EMF voltage of an ultra-high-speed BLDC motor, this invention also provides a device for monitoring the back EMF voltage of an ultra-high-speed BLDC motor.

[0079] like Figure 2 As shown, the ultra-high speed BLDC motor back EMF voltage monitoring device 100 includes a first setting unit 110, a second setting unit 120, a first starting unit 130, a second starting unit 140, a first execution unit 150, a second execution unit 160, and a shut-off unit 170.

[0080] The first setting unit 110 is used to set the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt.

[0081] After system initialization, set the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt.

[0082] The second setting unit 120 is used to set the frequency of the back EMF monitoring timer and enable the overflow interrupt, wherein the frequency of the back EMF monitoring timer is higher than the frequency of the PWM chopper timer.

[0083] The frequency of the back EMF monitoring timer is N times the frequency of the PWM chopper timer, where N is greater than or equal to 5.

[0084] In this embodiment, the frequency of the back EMF monitoring timer is 5 times the frequency of the PWM chopper timer, the frequency of the PWM chopper timer is 10kHz, and the frequency of the back EMF monitoring timer is 50kHz.

[0085] The first starting unit 130 is used to start the motor and enable the PWM chopper timer.

[0086] The second startup unit 140 is used to start the back EMF monitoring timer during the output comparison interruption of the PWM chopper timer.

[0087] The first execution unit 150 is used to perform zero-crossing monitoring of the motor's back electromotive force.

[0088] The first execution unit 150 includes a monitoring module, a first judgment module, and an acquisition module.

[0089] The detection module is used to monitor the back electromotive force voltage amplitude of the non-conducting phase and the bus input voltage amplitude.

[0090] The first judgment module is used to determine whether the back electromotive force voltage amplitude is greater than 0.5 times the bus input voltage amplitude.

[0091] The acquisition module is used to obtain the zero-crossing point of the back electromotive force voltage.

[0092] The AD module in the starter motor reads the non-conducting back electromotive force voltage, obtains the amplitude of the non-conducting back electromotive force voltage Vbemf, and compares the amplitude with half of the bus input voltage Vcc. If Vbemf > 1 / 2Vcc, then that moment is the zero-crossing point of the back electromotive force.

[0093] The second execution unit 160 is used to perform motor commutation at the commutation time.

[0094] The second execution unit includes a switching module, a second judgment module, and an execution module.

[0095] The switching module is used to input digital filtering and commutation delay for commutation.

[0096] The second judgment module is used to determine whether the commutation delay time is met.

[0097] The execution module is used to perform PWM output channel switching actions according to the power-on sequence logic.

[0098] The digital filter and commutation delay are entered into the commutation process. If the commutation delay is met, the PWM output channel switching action is executed according to the power-on sequence logic to complete the motor commutation.

[0099] Shutdown unit 170 is used to disable the back EMF monitoring timer in the overflow interrupt enable of the PWM chopper timer.

[0100] More specifically, given the high commutation frequency of ultra-high-speed motors, using a low PWM carrier frequency to monitor the zero-crossing point of the back EMF will inevitably lead to missed zero-crossing points. Therefore, this patent proposes using a back EMF monitoring timer to replace the PWM chopper timer for back EMF zero-crossing monitoring and motor commutation. For example, if the PWM carrier frequency is 10kHz, then the set frequency of the back EMF monitoring timer replacing the PWM chopper timer is 50kHz, which can improve the accuracy of both back EMF zero-crossing monitoring and motor commutation by 5 times. However, there will be a synchronization problem between these two timers, which will seriously affect the timing of the back EMF zero-crossing monitoring, leading to inaccurate back EMF zero-crossing monitoring.

[0101] To resolve the time synchronization issue between the PWM chopper timer and the electromotive force monitoring timer, the following methods are employed:

[0102] The electromotive force (EMF) monitoring timer is off by default. An output comparison interrupt is set for the PWM chopper timer, and the EMF monitoring timer is started within this interrupt (at time T0). The EMF monitoring timer is then turned off by the timer overflow interrupt of the PWM chopper timer (at time T1). This generates a time window ΔT (ΔT = T1 - T0) for synchronous back EMF zero-crossing sampling and motor commutation. Within ΔT, the EMF monitoring timer will repeatedly perform back EMF zero-crossing monitoring, starting the AD module to read the non-conducting back EMF voltage, obtaining its amplitude Vbemf, and comparing it with half of the bus input voltage Vcc. If Vbemf > 1 / 2 Vcc, then this moment is the back EMF zero-crossing point, and the digital filtering and commutation delay are initiated. If the commutation delay is satisfied, the PWM output channel switching action is executed according to the power-on sequence logic to complete the motor commutation. By disabling the electromotive force monitoring timer in the PWM chopper timer overflow interrupt, the high commutation frequency requirement of the ultra-high speed motor can be met, while the PWM carrier frequency is still maintained at 10KHz.

[0103] like Figure 4As shown, within the time window ΔT, the system synchronously detects the back EMF voltage of the motor through the interrupt of the EMF monitoring timer, monitors the zero-crossing point of the back EMF, and performs motor commutation at the commutation time. The EMF monitoring timer and the PWM chopper timer are synchronized to improve the accuracy of detecting the zero-crossing point of the back EMF and the motor commutation, but the PWM chopper frequency does not need to be increased, effectively avoiding the increase of switching losses of power devices.

[0104] like Figure 3 As shown in the figure, a specific embodiment of the present invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the ultra-high speed BLDC motor back electromotive force voltage monitoring method as described above.

[0105] The computer device 700 can be a terminal or a server. The computer device 700 includes a processor 720, a memory, and a network interface 750 connected via a system bus 710, wherein the memory may include a non-volatile storage medium 730 and internal memory 740.

[0106] The non-volatile storage medium 730 can store an operating system 731 and a computer program 732. When the computer program 732 is executed, it enables the processor 720 to execute any method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor.

[0107] The processor 720 provides computing and control capabilities to support the operation of the entire computer device 700.

[0108] The internal memory 740 provides an environment for the operation of the computer program 732 in the non-volatile storage medium 730. When the computer program 732 is executed by the processor 720, the processor 720 can execute any method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor.

[0109] This network interface 750 is used for network communication, such as sending assigned tasks. Those skilled in the art will understand that... Figure 3 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device 700 to which the present application is applied. The specific computer device 700 may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements. The processor 720 is used to run program code stored in memory to implement the following steps:

[0110] Configure the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt;

[0111] Configure the frequency of the back EMF monitoring timer and enable the overflow interrupt, wherein the frequency of the back EMF monitoring timer is higher than the frequency of the PWM chopper timer;

[0112] Start the motor and activate the PWM chopper timer;

[0113] Enabling the back EMF monitoring timer during the output compare interrupt of the PWM chopper timer;

[0114] Perform zero-crossing monitoring of the motor's back electromotive force;

[0115] Motor commutation is performed at the commutation moment;

[0116] Disable the back EMF monitoring timer in the overflow interrupt enable of the PWM chopper timer.

[0117] The further technical solution is as follows: the frequency of the back EMF monitoring timer is N times the frequency of the PWM chopper timer, where N is greater than or equal to 5.

[0118] The further technical solution is as follows: the zero-crossing monitoring of the back EMF of the actuator specifically includes:

[0119] Monitor the back electromotive force voltage amplitude of the non-conducting phase and the bus input voltage amplitude;

[0120] Determine whether the back electromotive force voltage amplitude is greater than 0.5 times the bus input voltage amplitude;

[0121] If so, the zero-crossing point of the back electromotive force voltage is obtained.

[0122] The further technical solution is as follows: the motor commutation is performed at the commutation moment, specifically including:

[0123] Digital filtering and commutation delay are applied to the commutation process.

[0124] Determine whether the commutation delay time is met;

[0125] If so, the PWM output channel switching action is executed according to the power-on sequence logic.

[0126] It should be understood that in the embodiments of this application, the processor 720 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0127] Those skilled in the art will understand that Figure 3 The structure of the computer device 700 shown does not constitute a limitation on the computer device 700, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0128] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of the present invention, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0129] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above device can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0130] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0131] In the embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0132] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0133] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor, characterized in that, The method of using a back EMF monitoring timer to replace the PWM chopper timer for back EMF zero-crossing monitoring and motor commutation includes: Configure the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt; Set the frequency of the back EMF monitoring timer and enable the overflow interrupt. The frequency of the back EMF monitoring timer is higher than the frequency of the PWM chopper timer, and the frequency of the back EMF monitoring timer is N times the frequency of the PWM chopper timer, where N is greater than or equal to 5. Start the motor and activate the PWM chopper timer; Enabling the back EMF monitoring timer during the output compare interrupt of the PWM chopper timer; Perform zero-crossing monitoring of the motor's back electromotive force; Motor commutation is performed at the commutation moment; Disable the back EMF monitoring timer in the overflow interrupt enable of the PWM chopper timer.

2. The method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor according to claim 1, characterized in that, The aforementioned monitoring of the zero-crossing point of the back electromotive force of the motor specifically includes: Monitor the back electromotive force voltage amplitude of the non-conducting phase and the bus input voltage amplitude; Determine whether the back electromotive force voltage amplitude is greater than 0.5 times the bus input voltage amplitude; If so, the zero-crossing point of the back electromotive force voltage is obtained.

3. The method for monitoring the back electromotive force voltage of an ultra-high-speed BLDC motor according to claim 1, characterized in that, The aforementioned execution of motor commutation at the commutation moment specifically includes: Digital filtering and commutation delay are applied to the commutation process. Determine whether the commutation delay time is met; If so, the PWM output channel switching action is executed according to the power-on sequence logic.

4. A back EMF voltage monitoring device for ultra-high-speed BLDC motors, characterized in that, The device uses a back EMF monitoring timer to replace the PWM chopper timer to perform back EMF zero-crossing monitoring and motor commutation. The device includes a first setting unit, a second setting unit, a first starting unit, a second starting unit, a first execution unit, a second execution unit, and a shutdown unit. The first setting unit is used to set the frequency of the PWM chopper timer, and enable the output compare interrupt and overflow interrupt; The second setting unit is used to set the frequency of the back EMF monitoring timer and enable the overflow interrupt, wherein the frequency of the back EMF monitoring timer is higher than the frequency of the PWM chopper timer, and the frequency of the back EMF monitoring timer is N times the frequency of the PWM chopper timer, where N is greater than or equal to 5. The first starting unit is used to start the motor and enable the PWM chopper timer; The second startup unit is used to start the back EMF monitoring timer during the output comparison interrupt of the PWM chopper timer; The first execution unit is used to perform zero-crossing monitoring of the motor's back electromotive force; The second execution unit is used to perform motor commutation at the commutation moment; The shutdown unit is used to disable the back EMF monitoring timer during the overflow interrupt enable of the PWM chopper timer.

5. The ultra-high-speed BLDC motor back EMF voltage monitoring device according to claim 4, characterized in that, The first execution unit includes a monitoring module, a first judgment module, and an acquisition module; The monitoring module is used to monitor the back electromotive force voltage amplitude of the non-conducting phase and the bus input voltage amplitude; The first judgment module is used to determine whether the back electromotive force voltage amplitude is greater than 0.5 times the bus input voltage amplitude; The acquisition module is used to obtain the zero-crossing point of the back electromotive force voltage.

6. The ultra-high-speed BLDC motor back EMF voltage monitoring device according to claim 4, characterized in that, The second execution unit includes a switching module, a second judgment module, and an execution module; The switching module is used to input digital filtering and commutation delay for phase switching; The second judgment module is used to determine whether the commutation delay time is met; The execution module is used to perform PWM output channel switching actions according to the power-on sequence logic.

7. A computer device, characterized in that, The method includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the steps of the method as described in any one of claims 1 to 3.

8. A storage medium, characterized in that, The storage medium stores a computer program, the computer program including program instructions, which, when executed by a processor, cause the processor to perform the steps of the method as described in any one of claims 1 to 3.

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