Modulation and Demodulation Circuit for Anti-Common-Mode Interference

Abstract

The present invention discloses a modulation and demodulation circuit for anti-common mode interference. The modulation and demodulation circuit includes a modulation circuit and a demodulation circuit. The demodulation circuit includes a high-pass filter and a comparator. The modulation circuit is electrically connected to the high-pass filter, and the high-pass filter is electrically connected to the comparator. The modulation circuit is used to convert an input signal into a modulated signal and transmit the modulated signal to the high-pass filter. The high-pass filter is used to filter out the common mode interference signal in the modulated signal. The comparator is used to convert the filtered modulated signal into a digital signal corresponding to the input signal. By reasonably setting the carrier signal frequency, the cut-off frequencies of the high-pass filter and the low-pass filter in the modulation and demodulation circuit, the present invention can effectively suppress the common mode interference signal while completing the signal modulation and demodulation function, thereby reducing the bit error rate of signal transmission.

Description

Technical Field

[0001] The present invention relates to the technical field of anti-interference modulation and demodulation, and particularly relates to a modulation and demodulation circuit for anti-common-mode interference. Background Art

[0002] In the prior art, when data is transmitted between two chips, as Figure 1 shown, the input data is modulated in chip A, and then the modulated signal is transmitted to chip B through a capacitor. The signal is demodulated in chip B, and the original data is restored. Usually, chip A and chip B work in different power domains respectively. Therefore, in the case of a relatively fast transient jump interference signal between GND1 and GND2 of chip A and chip B, if not processed, the interference signal will be demodulated by the demodulator as a useful signal, resulting in the generation of error codes. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to overcome the defect in the prior art that error codes are generated due to interference signals between the grounds of chips during data transmission, and to provide a modulation and demodulation circuit for anti-common-mode interference.

[0004] The present invention solves the above technical problem through the following technical solutions:

[0005] The present invention provides a modulation and demodulation circuit for anti-common-mode interference. The modulation and demodulation circuit includes a modulation circuit and a demodulation circuit. The demodulation circuit includes a high-pass filter and a comparator;

[0006] The modulation circuit is electrically connected to the high-pass filter, and the high-pass filter is electrically connected to the comparator;

[0007] The modulation circuit is used to convert an input signal into a modulated signal and transmit the modulated signal to the high-pass filter;

[0008] The high-pass filter is used to filter out the common-mode interference signal in the modulated signal;

[0009] The comparator is used to convert the filtered modulated signal into a digital signal corresponding to the input signal.

[0010] Preferably, the modulation circuit includes an AND gate and an inverter;

[0011] The input end of the AND gate is used to receive the input signal. The output end of the AND gate is electrically connected to the input end of the inverter, and the output end of the inverter is electrically connected to the high-pass filter;

[0012] The input signal includes a low-frequency digital signal and a high-frequency clock signal;

[0013] The AND gate is used to AND the low-frequency digital signal and the high-frequency clock signal to obtain a modulated signal;

[0014] The inverter is configured to convert the modulated signal into an inverted modulated signal, and transmit the modulated signal and the inverted modulated signal to the high-pass filter.

[0015] Preferably, the modulation circuit further includes a delay device, a first buffer and a second buffer;

[0016] The input end of the delayer is electrically connected to the output end of the AND gate, the output end of the delayer is electrically connected to the input end of the first buffer, and the output end of the first buffer is electrically connected to the high-pass filter;

[0017] An input terminal of the second buffer is electrically connected to an output terminal of the inverter, and an output terminal of the second buffer is electrically connected to the high-pass filter.

[0018] Preferably, the demodulation circuit further includes a resistor-capacitor coupling circuit, a differential amplifier, a full-wave rectifier and a low-pass filter;

[0019] One end of the RC coupling circuit is electrically connected to the high-pass filter, the other end of the RC coupling circuit is electrically connected to the input end of the differential amplifier, the output end of the differential amplifier is electrically connected to one end of the full-wave rectifier, the other end of the full-wave rectifier is electrically connected to the low-pass filter, and the low-pass filter is electrically connected to the comparator;

[0020] The RC coupling circuit is used to reset the DC component in the modulated signal transmitted by the high-pass filter and retain the AC component in the modulated signal;

[0021] The differential amplifier is used to receive and amplify the modulated signal transmitted by the resistance-capacitance coupling circuit;

[0022] The full-wave rectifier is used to receive and convert the AC modulated signal transmitted by the differential amplifier into a DC signal corresponding to the AC modulated signal;

[0023] The low-pass filter is used to receive and extract the DC signal from the modulated signal transmitted by the full-wave rectifier;

[0024] The comparator is specifically configured to convert the DC signal transmitted by the low-pass filter into a digital signal corresponding to the input signal.

[0025] Preferably, the demodulation circuit further includes a Schmitt trigger;

[0026] The Schmitt trigger is electrically connected to the comparator;

[0027] The Schmidt trigger is used to shape the digital signal corresponding to the input signal to obtain an input signal with common-mode interference filtered out.

[0028] Preferably, the high-pass filter includes a first capacitor, a second capacitor, a first resistor, and a second resistor;

[0029] One end of the first capacitor is electrically connected to the output end of the first buffer, the other end of the first capacitor is respectively electrically connected to one end of the first resistor and the positive input end of the comparator, one end of the second capacitor is electrically connected to the output end of the second buffer, the other end of the second capacitor is respectively electrically connected to one end of the second resistor and the negative input end of the comparator, and the other ends of the first resistor and the second resistor are both grounded.

[0030] Preferably, the resistor-capacitor coupling circuit includes a third capacitor, a fourth capacitor, a third resistor, and a fourth resistor;

[0031] One end of the third capacitor and one end of the fourth capacitor are respectively electrically connected to the high-pass filter, the other end of the third capacitor is respectively electrically connected to one end of the third resistor and the positive input end of the differential amplifier, the other end of the fourth capacitor is respectively electrically connected to one end of the fourth resistor and the negative input end of the differential amplifier, and the other ends of the third resistor and the fourth resistor are electrically connected.

[0032] Preferably, the low-pass filter includes a fifth resistor, a sixth resistor, a fifth capacitor, and a sixth capacitor;

[0033] One end of the fifth resistor and one end of the sixth resistor are respectively electrically connected to the other end of the full-wave rectifier, the other end of the fifth resistor is respectively electrically connected to one end of the fifth capacitor and the positive input end of the comparator, the other end of the sixth resistor is respectively electrically connected to one end of the sixth capacitor and the negative input end of the comparator, and the other ends of the fifth capacitor and the sixth capacitor are both grounded.

[0034] Preferably, the cut-off frequency of the high-pass filter is greater than the frequency of the common-mode interference signal in the modulated signal, and the cut-off frequency of the high-pass filter is less than the frequency of the carrier signal in the modulated signal.

[0035] Preferably, the cut-off frequency of the low-pass filter is less than the frequency of the carrier signal in the modulated signal, and the cut-off frequency of the low-pass filter is greater than the frequency of the modulation signal in the modulated signal.

[0036] The positive and progressive effects of the present invention are as follows:

[0037] By reasonably setting the carrier signal frequency, the cut-off frequencies of the high-pass filter and the low-pass filter in the modulation and demodulation circuit, while completing the signal modulation and demodulation functions, the common-mode interference signal can be effectively suppressed, thereby reducing the bit error rate of signal transmission. Description of the Drawings

[0038] Figure 1 It is a schematic diagram of data transmission between two chips in the prior art.

[0039] Figure 2 It is a circuit diagram of a modulation and demodulation circuit for anti-common-mode interference provided by an exemplary embodiment of the present invention. Detailed Embodiment

[0040] The present invention will be further described below by way of examples, but the present invention is not limited to the scope of the described examples.

[0041] A modulation and demodulation circuit for anti-common-mode interference provided in this embodiment, as Figure 2 shown, the modulation and demodulation circuit includes a modulation circuit 1 and a demodulation circuit 2, and the demodulation circuit 2 includes a high-pass filter 21 and a comparator 22;

[0042] The modulation circuit 1 is electrically connected to the high-pass filter 21, and the high-pass filter 21 is electrically connected to the comparator 22;

[0043] The modulation circuit 1 is used to convert the input signal into a modulated signal and transmit the modulated signal to the high-pass filter 21;

[0044] The high-pass filter 21 is used to filter out the common-mode interference signal in the modulated signal;

[0045] The comparator 22 is used to convert the filtered modulated signal into a digital signal corresponding to the input signal.

[0046] In this embodiment, the input signal is a modulation signal.

[0047] In this embodiment, the cut-off frequency of the high-pass filter 21 is greater than the frequency of the common-mode interference signal in the modulated signal, and the cut-off frequency of the high-pass filter 21 is less than the frequency of the carrier signal in the modulated signal.

[0048] It should be noted that the cut-off frequency of the high-pass filter is much greater than the frequency of the common-mode interference signal in the modulated signal, and the setting of the cut-off frequency of the high-pass filter can also be adjusted according to the actual situation, and no specific limitation is made here.

[0049] In an implementable solution, as Figure 2 shown, the modulation circuit 1 includes an AND gate 11 and an inverter 12;

[0050] The input terminal of the AND gate 11 is used to receive an input signal. The output terminal of the AND gate 11 is electrically connected to the input terminal of the inverter 12, and the output terminal of the inverter 12 is electrically connected to the high-pass filter 21;

[0051] The input signal includes a low-frequency digital signal and a high-frequency clock signal;

[0052] The AND gate 11 is used to perform an AND operation on the low-frequency digital signal and the high-frequency clock signal to obtain a modulated signal;

[0053] The inverter 12 is used to convert the modulated signal into an inverted modulated signal and transmit the modulated signal and the inverted modulated signal to the high-pass filter 21.

[0054] In an implementable solution, as Figure 2 shown, the modulation circuit 1 further includes a delay element 13, a first buffer 14, and a second buffer 15;

[0055] The input terminal of the delay element 13 is electrically connected to the output terminal of the AND gate 11. The output terminal of the delay element 13 is electrically connected to the input terminal of the first buffer 14, and the output terminal of the first buffer 14 is electrically connected to the high-pass filter 21;

[0056] The input terminal of the second buffer 15 is electrically connected to the output terminal of the inverter 12, and the output terminal of the second buffer 15 is electrically connected to the high-pass filter 21.

[0057] In an implementable solution, as Figure 2 shown, the demodulation circuit 2 further includes a resistor-capacitor coupling circuit 23, a differential amplifier 24, a full-wave rectifier 25, and a low-pass filter 26;

[0058] One end of the resistor-capacitor coupling circuit 23 is electrically connected to the high-pass filter 21. The other end of the resistor-capacitor coupling circuit 23 is electrically connected to the input terminal of the differential amplifier 24. The output terminal of the differential amplifier 24 is electrically connected to one end of the full-wave rectifier 25, and the other end of the full-wave rectifier 25 is electrically connected to the low-pass filter 26. The low-pass filter 26 is electrically connected to the comparator 22;

[0059] The resistor-capacitor coupling circuit 23 is used to reset the DC component in the modulated signal transmitted by the high-pass filter 21 and retain the AC component in the modulated signal;

[0060] The differential amplifier 24 is used to receive and amplify the modulated signal transmitted by the resistor-capacitor coupling circuit 23;

[0061] The full-wave rectifier 25 is used to receive and convert the AC modulated signal transmitted by the differential amplifier 24 into a DC signal corresponding to the AC modulated signal;

[0062] The low-pass filter 26 is used to receive and extract the DC signal in the modulated signal transmitted by the full-wave rectifier 25;

[0063] It should be noted that the full-wave rectifier converts the AC signal into a DC signal and an AC signal. The specific principle is as follows: the AC signal containing positive and negative half-axes is all converted into the positive half-axis, including the DC component and the AC component. Then, the AC signal is filtered out by the low-pass filter, and the DC signal is retained, which is called envelope extraction.

[0064] The comparator 22 is specifically used to convert the DC signal transmitted by the low-pass filter into a digital signal corresponding to the input signal.

[0065] In this embodiment, the cut-off frequency of the low-pass filter 26 is less than the frequency of the carrier signal in the modulated signal, and the cut-off frequency of the low-pass filter 26 is greater than the frequency of the modulation signal (i.e., the input signal) in the modulated signal.

[0066] It should be noted that the cut-off frequency of the low-pass filter is much less than the frequency of the carrier signal in the modulated signal. The setting of the cut-off frequency of the low-pass filter can also be adjusted according to the actual situation, and no specific limitation is made here.

[0067] In an implementable solution, as Figure 2 shown, the demodulation circuit 2 further includes a Schmitt trigger 27;

[0068] The Schmitt trigger 27 is electrically connected to the comparator 22;

[0069] The Schmitt trigger 27 is used to shape the digital signal corresponding to the input signal to obtain the input signal with common-mode interference filtered out.

[0070] In an implementable solution, as Figure 2 shown, the high-pass filter 21 includes a first capacitor C1, a second capacitor C2, a first resistor R1, and a second resistor R2;

[0071] One end of the first capacitor C1 is electrically connected to the output end of the first buffer 14, and the other end of the first capacitor C1 is respectively electrically connected to one end of the first resistor R1 and the positive input end of the comparator 22. One end of the second capacitor C2 is electrically connected to the output end of the second buffer 15, and the other end of the second capacitor C2 is respectively electrically connected to one end of the second resistor R2 and the negative input end of the comparator 22. The other ends of the first resistor R1 and the second resistor R are both grounded.

[0072] In this embodiment, the capacitance values of the first capacitor C1 and the second capacitor C2 are both 50 pF, and the resistance values of the first resistor R1 and the second resistor R2 are both 1 kΩ.

[0073] In an implementable solution, asFigure 2 As shown, the resistor-capacitor coupling circuit 23 includes a third capacitor C3, a fourth capacitor C4, a third resistor R3, and a fourth resistor R4;

[0074] One end of the third capacitor C3 and one end of the fourth capacitor C4 are respectively electrically connected to the high-pass filter 21. The other end of the third capacitor C3 is respectively electrically connected to one end of the third resistor R3 and the positive input terminal of the differential amplifier 24. The other end of the fourth capacitor C4 is respectively electrically connected to one end of the fourth resistor R4 and the negative input terminal of the differential amplifier 24. The other ends of the third resistor and the fourth resistor are electrically connected.

[0075] In this embodiment, the capacitance values of the third capacitor C3 and the fourth capacitor C4 are both 200 pF, and the resistance values of the third resistor R3 and the fourth resistor R4 are both 50 Ω.

[0076] In an implementable solution, as Figure 2 shown, the low-pass filter 26 includes a fifth resistor R5, a sixth resistor R6, a fifth capacitor C5, and a sixth capacitor C6;

[0077] One end of the fifth resistor R5 and one end of the sixth resistor R6 are respectively electrically connected to the other end of the full-wave rectifier 25. The other end of the fifth resistor R5 is respectively electrically connected to one end of the fifth capacitor C5 and the positive input terminal of the comparator 22. The other end of the sixth resistor R6 is respectively electrically connected to one end of the sixth capacitor C6 and the negative input terminal of the comparator 22. The other ends of the fifth capacitor C5 and the sixth capacitor C6 are both grounded.

[0078] In this embodiment, the capacitance values of the fifth capacitor C5 and the sixth capacitor C6 are both 100 pF, and the resistance values of the fifth resistor R5 and the sixth resistor R6 are both 100 Ω.

[0079] Specifically, as Figure 2As shown, the output terminals of the AND gate 11 are electrically connected to the input terminals of the inverter 12 and the input terminals of the delay element 13 respectively. The output terminal of the delay element 13 is electrically connected to the input terminal of the first buffer 14. The output terminal of the inverter 12 is electrically connected to the input terminal of the second buffer 15. The output terminals of the first buffer 14 and the second buffer 15 are electrically connected to one end of the first capacitor C1 and one end of the second capacitor C2 respectively. The other end of the first capacitor C1 is electrically connected to one end of the first resistor R1 and one end of the third capacitor C3 respectively. The other end of the second capacitor C2 is electrically connected to one end of the second resistor R2 and one end of the fourth capacitor C4 respectively. The other ends of the first resistor R1 and the second resistor R2 are both grounded. The other end of the third capacitor C3 is electrically connected to one end of the third resistor R3 and the positive input terminal of the differential amplifier 24 respectively. The other end of the fourth capacitor C4 is electrically connected to one end of the fourth resistor R4 and the negative input terminal of the differential amplifier 24 respectively. The other ends of the third resistor and the fourth resistor are electrically connected. The power supply terminal V of the differential amplifier 24 com is electrically connected to the other end of the third resistor. The output terminal of the differential amplifier 24 is electrically connected to one end of the full-wave rectifier 25. The other end of the full-wave rectifier 25 is electrically connected to one end of the fifth resistor R5 and one end of the sixth resistor R6 respectively. The other end of the fifth resistor R5 is electrically connected to one end of the fifth capacitor C5 and the positive input terminal of the comparator 22 respectively. The other end of the sixth resistor R6 is electrically connected to one end of the sixth capacitor C6 and the negative input terminal of the comparator 22 respectively. The other ends of the fifth capacitor C5 and the sixth capacitor C6 are both grounded. The output terminal of the comparator 22 is electrically connected to the input terminal of the Schmitt trigger 27. The output terminal of the Schmitt trigger 27 is used to output the shaped input signal with common-mode interference filtered out.

[0080] It should be noted that the modulation and demodulation circuit for anti-common-mode interference in this embodiment can be an OOK (On-off Keying) modulation and demodulation circuit for anti-common-mode interference.

[0081] In the specific implementation process, the OOK modulation circuit in the OOK modulation and demodulation circuit ANDs the low-frequency digital signal (i.e., the low-frequency digital encoded data Data) and the high-frequency clock signal (i.e., the high-frequency digital clock carrier Clock) to obtain the modulated signal, and then transmits the modulated signal to the inverter to obtain its inverted signal. At the same time, the in-phase signal passes through the delay element to be phase-synchronized with the inverted signal, so as to obtain a group of differential modulated signals. Finally, the modulated signals are sent out by driving the subsequent capacitors through the first buffer (BUF1) and the second buffer (BUF2) respectively.

[0082] The OOK demodulation circuit in the OOK modulation and demodulation circuit first passes through a high-pass filter whose cut-off frequency is greater than the frequency of the common-mode interference signal in the modulated signal and less than the frequency of the carrier signal in the modulated signal. This high-pass filter is used to filter out the common-mode interference signal in the modulated signal, and then the AC component in the modulated signal is coupled to the input end of the differential amplifier through a resistor-capacitor coupling circuit, and the common-mode level of the power supply terminal of the differential amplifier is reset to V com , and this differential amplifier is used to receive and amplify the modulated signal transmitted by the resistor-capacitor coupling circuit and suppress the common-mode interference signal in the modulated signal. Then, through a full-wave rectifier and a low-pass filter, the cut-off frequency of this low-pass filter is set to be less than the frequency of the carrier signal in the modulated signal and greater than the frequency of the modulation signal in the modulated signal, and the DC signal in the modulated signal transmitted by the full-wave rectifier (that is, the envelope of the modulated signal) can be taken out. Then, through a comparator, the input signal (that is, the modulation signal) is demodulated, and finally, through a Schmitt trigger, the digital signal corresponding to the input signal is shaped to obtain the input signal with common-mode interference filtered out, completing the entire modulation and demodulation process, thereby reducing the error code generated by common-mode interference during the OOK modulation and demodulation process.

[0083] It should be noted that the modulation signal is the signal to be transmitted and is used to modulate the carrier signal, that is, the modulation signal is the input signal; the carrier signal is also called the modulated signal, that is, the carrier signal is modulated by the input signal; the modulated signal is the signal after the carrier signal is modulated by the modulation signal (that is, the input signal), and the modulated signal includes the modulation signal (that is, the input signal) and the carrier signal.

[0084] The OOK modulation and demodulation circuit of this embodiment has strong anti-common-mode interference ability. By reasonably setting the carrier signal frequency, the cut-off frequency of the high-pass filter and the low-pass filter in the modulation and demodulation circuit, while completing the signal modulation and demodulation function, it can effectively suppress the common-mode interference signal, thereby reducing the error rate of signal transmission.

[0085] Although the specific implementation manners of the present invention have been described above, those skilled in the art should understand that this is only an example, and the protection scope of the present invention is defined by the appended claims. Without departing from the principles and essence of the present invention, those skilled in the art can make various changes or modifications to these implementation manners, but these changes and modifications all fall within the protection scope of the present invention.

Claims

1. A modulation and demodulation circuit for anti-common mode interference, characterized in that The modulation and demodulation circuit includes a modulation circuit and a demodulation circuit, and the demodulation circuit includes a high-pass filter and a comparator; The modulation circuit is electrically connected to the high-pass filter, and the high-pass filter is electrically connected to the comparator; The modulation circuit is used to convert an input signal into a modulated signal and transmit the modulated signal to the high-pass filter; The high-pass filter is used to filter out the common-mode interference signal in the modulated signal; The comparator is used to convert the filtered modulated signal into a digital signal corresponding to the input signal; The demodulation circuit further includes a resistor-capacitor coupling circuit, a differential amplifier, a full-wave rectifier, and a low-pass filter; One end of the resistor-capacitor coupling circuit is electrically connected to the high-pass filter, the other end of the resistor-capacitor coupling circuit is electrically connected to the input end of the differential amplifier, the output end of the differential amplifier is electrically connected to one end of the full-wave rectifier, the other end of the full-wave rectifier is electrically connected to the low-pass filter, and the low-pass filter is electrically connected to the comparator; The resistor-capacitor coupling circuit is used to reset the DC component in the modulated signal transmitted by the high-pass filter and retain the AC component in the modulated signal; The differential amplifier is used to receive and amplify the modulated signal transmitted by the resistor-capacitor coupling circuit; The full-wave rectifier is used to receive and convert the AC modulated signal transmitted by the differential amplifier into a DC signal corresponding to the AC modulated signal; The low-pass filter is used to receive and extract the DC signal in the modulated signal transmitted by the full-wave rectifier; The comparator is specifically used to convert the DC signal transmitted by the low-pass filter into a digital signal corresponding to the input signal.

2. The modulation and demodulation circuit for anti-common mode interference according to claim 1, characterized in that The modulation circuit includes an AND gate and an inverter; The input end of the AND gate is used to receive an input signal, the output end of the AND gate is electrically connected to the input end of the inverter, and the output end of the inverter is electrically connected to the high-pass filter; The input signal includes a low-frequency digital signal and a high-frequency clock signal; The AND gate is used to perform an AND operation on the low-frequency digital signal and the high-frequency clock signal to obtain a modulated signal; The inverter is used to convert the modulated signal into an inverted modulated signal and transmit the modulated signal and the inverted modulated signal to the high-pass filter.

3. The modulation and demodulation circuit for anti-common mode interference according to claim 2, wherein The modulation circuit further includes a delay element, a first buffer, and a second buffer; The input end of the delay element is electrically connected to the output end of the AND gate, the output end of the delay element is electrically connected to the input end of the first buffer, and the output end of the first buffer is electrically connected to the high-pass filter; The input end of the second buffer is electrically connected to the output end of the inverter, and the output end of the second buffer is electrically connected to the high-pass filter.

4. The modulation and demodulation circuit for anti-common mode interference according to claim 1, characterized in that, The demodulation circuit further includes a Schmitt trigger; The Schmitt trigger is electrically connected to the comparator; The Schmitt trigger is used to shape the digital signal corresponding to the input signal to obtain an input signal with common-mode interference filtered out.

5. The modulation and demodulation circuit for anti-common mode interference according to claim 3, characterized in that, The high-pass filter includes a first capacitor, a second capacitor, a first resistor, and a second resistor; One end of the first capacitor is electrically connected to the output end of the first buffer, and the other end of the first capacitor is respectively electrically connected to one end of the first resistor and the positive input end of the comparator. One end of the second capacitor is electrically connected to the output end of the second buffer, and the other end of the second capacitor is respectively electrically connected to one end of the second resistor and the negative input end of the comparator. The other ends of the first resistor and the second resistor are both grounded.

6. The modulation and demodulation circuit for anti-common mode interference according to claim 1, characterized in that, The resistive-capacitive coupling circuit includes a third capacitor, a fourth capacitor, a third resistor, and a fourth resistor; One end of the third capacitor and one end of the fourth capacitor are respectively electrically connected to the high-pass filter. The other end of the third capacitor is respectively electrically connected to one end of the third resistor and the positive input end of the differential amplifier. The other end of the fourth capacitor is respectively electrically connected to one end of the fourth resistor and the negative input end of the differential amplifier. The other ends of the third resistor and the fourth resistor are electrically connected.

7. The modulation and demodulation circuit for anti-common mode interference according to claim 1, characterized in that, The low-pass filter includes a fifth resistor, a sixth resistor, a fifth capacitor, and a sixth capacitor; One end of the fifth resistor and one end of the sixth resistor are respectively electrically connected to the other end of the full-wave rectifier. The other end of the fifth resistor is respectively electrically connected to one end of the fifth capacitor and the positive input end of the comparator. The other end of the sixth resistor is respectively electrically connected to one end of the sixth capacitor and the negative input end of the comparator. The other ends of the fifth capacitor and the sixth capacitor are both grounded.

8. The modulation and demodulation circuit for anti-common mode interference according to claim 1, characterized in that, The cut-off frequency of the high-pass filter is greater than the frequency of the common-mode interference signal in the modulated signal and less than the frequency of the carrier signal in the modulated signal.

9. The modulation and demodulation circuit for anti-common mode interference according to claim 1, characterized in that The cut-off frequency of the low-pass filter is less than the frequency of the carrier signal in the modulated signal and greater than the frequency of the modulation signal in the modulated signal.

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