Adaptive motion vector resolution for affine mode

Abstract

The electronic device performs a method for calculating a motion vector difference (MVD) for a current block in an inter-frame prediction mode. The electronic device first receives a first semantic element indicating a first MVD resolution set in a plurality of MVD resolution sets from a video bitstream, wherein the first semantic element is signaled at a predefined partition level, and wherein the first MVD resolution set includes a plurality of MVD resolution values. Subsequently, the electronic device receives a second semantic element indicating a first MVD resolution value in the first MVD resolution set and a third semantic element indicating an MVD associated with the current block from the video bitstream. The electronic device then reconstructs the MVD to its actual value based on the second semantic element and the third semantic element.

Description

Technical Field

[0001] The present application relates generally to video data encoding and decoding, and in particular, to methods and systems for improving the efficiency of signaling motion vectors in affine mode. Background Art

[0002] Various electronic devices (such as digital televisions, laptop or desktop computers, tablet computers, digital cameras, digital recording devices, digital media players, video game consoles, smart phones, video teleconferencing devices, video streaming devices, etc.) support digital video. Electronic devices transmit, receive, encode, decode and / or store digital video data by implementing video compression / decompression standards defined by MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Codec (AVC), High Efficiency Video Codec (HEVC) and Versatile Video Codec (VVC) standards. Video compression typically includes performing spatial (intra-frame) prediction and / or temporal (inter-frame) prediction to reduce or remove redundancy inherent in video data. For block-based video codecs, a video frame is partitioned into one or more slices, each with multiple video blocks, which may also be referred to as codec tree units (CTUs). Each CTU may contain a codec unit (CU), or may be recursively split into smaller CUs until a predefined minimum CU size is reached. Each CU (also called a leaf-CU) contains one or more transform units (TUs), and each CU also contains one or more prediction units (PUs). Each CU can be coded in intra mode, inter mode, or IBC mode. Video blocks in an intra-coded (I) slice of a video frame are coded using spatial prediction of reference samples in neighboring blocks within the same video frame. Video blocks in an inter-coded (P or B) slice of a video frame can use spatial prediction of reference samples in neighboring blocks within the same video frame or temporal prediction of reference samples in other previous and / or future reference video frames.

[0003] A prediction block for the current video block to be coded is derived based on spatial prediction or temporal prediction of previously coded reference blocks (e.g., neighboring blocks). The process of finding a reference block can be accomplished by a block matching algorithm. The residual data representing the pixel differences between the current block to be coded and the prediction block is called a residual block or prediction error. Inter-coded blocks are coded according to motion vectors and residual blocks, and the motion vectors point to reference blocks in a reference frame that form the prediction block. The process of determining motion vectors is generally referred to as motion estimation. Intra-coded blocks are coded according to intra-prediction modes and residual blocks. For further compression, the residual block is transformed from the pixel domain to a transform domain (e.g., frequency domain) to derive residual transform coefficients, which can then be quantized. The quantized transform coefficients, initially arranged in a two-dimensional array, can be scanned to produce a one-dimensional vector of transform coefficients and then entropy encoded into a video bitstream to achieve even greater compression.

[0004] The coded video bitstream is then stored in a computer-readable storage medium (e.g., a flash memory) for access by another electronic device with digital video capabilities, or is directly sent to the electronic device by wire or wirelessly. The electronic device then performs video decompression (which is the reverse process of the video compression described above), for example, by parsing the coded video bitstream to obtain semantic elements from the bitstream, and reconstructing digital video data from the coded video bitstream to its original format based at least in part on the semantic elements obtained from the bitstream, and the electronic device presents the reconstructed digital video data on a display of the electronic device. Summary of the invention

[0005] The present application describes embodiments related to video data encoding and decoding, and more particularly, the embodiments relate to systems and methods for video encoding and decoding that improve the efficiency of signaling motion vectors in affine mode.

[0006] According to a first aspect of the present application, a method for calculating a motion vector difference (MVD) for a current block in an inter-frame prediction mode, the method comprising: receiving a first semantic element indicating a first MVD resolution set among multiple MVD resolution sets from a video bitstream, wherein the first semantic element is sent with a signal at a predefined partition level, and wherein the first MVD resolution set includes multiple MVD resolution values; receiving a second semantic element indicating a first MVD resolution value in the first MVD resolution set and a third semantic element indicating an MVD associated with the current block from the video bitstream; and reconstructing the MVD of the current block into its actual value based on the second semantic element and the third semantic element.

[0007] According to a second aspect of the present application, an electronic device includes one or more processing units, a memory, and a plurality of programs stored in the memory. When the programs are executed by the one or more processing units, the electronic device performs the above-described operation for calculating a motion vector difference for a current block in an inter-frame prediction mode.

[0008] According to a third aspect of the present application, a non-transitory computer-readable storage medium stores a plurality of programs for execution by an electronic device having one or more processing units. When the programs are executed by the one or more processing units, the electronic device performs the above-described operation for calculating a motion vector difference for a current block in an inter-frame prediction mode.

[0009] According to the fourth aspect of the present application, a method for calculating a control point motion vector CPMV for a current block in an affine inter-frame prediction mode, the method comprising: receiving a first semantic element indicating a first motion vector difference resolution set from a video bitstream, wherein the first MVD resolution set includes multiple MVD resolution values, each MVD resolution value corresponding to a corresponding CPMV of the current block; for each CPMV in the CPMV associated with the current block: receiving a second semantic element indicating the MVD of the CPMV from the video bitstream; and reconstructing the MVD of the CPMV into its actual value based on the first semantic element and the second semantic element.

[0010] According to a fifth aspect of the present application, an electronic device includes one or more processing units, a memory, and a plurality of programs stored in the memory. When the programs are executed by the one or more processing units, the electronic device performs the above-described operation for calculating a control point motion vector for a current block in an affine inter-frame prediction mode.

[0011] According to a sixth aspect of the present application, a non-transitory computer-readable storage medium stores a plurality of programs for execution by an electronic device having one or more processing units. When the programs are executed by the one or more processing units, the electronic device performs the above-described operation for calculating a control point motion vector for a current block in an affine inter-frame prediction mode. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The accompanying drawings, which are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification, illustrate the described embodiments and together with the description serve to explain the basic principles. Like reference numerals designate corresponding parts.

[0013] Figure 1 is a block diagram illustrating an exemplary video encoding and decoding system according to some embodiments of the present disclosure.

[0014] Figure 2 is a block diagram illustrating an exemplary video encoder according to some embodiments of the present disclosure.

[0015] Figure 3 is a block diagram illustrating an exemplary video decoder according to some embodiments of the present disclosure.

[0016] FIG. 4A to FIG. 4E is a block diagram illustrating how a frame may be recursively partitioned into multiple video blocks of different sizes and shapes according to some embodiments of the present disclosure.

[0017] Figure 5A and Figure 5B are block diagrams illustrating a 4-parameter block-based affine motion model and a 6-parameter block-based affine motion model, respectively, according to some embodiments of the present disclosure.

[0018] Figure 5C is a block diagram illustrating an exemplary motion vector distribution of a 4×4 sub-block derived from a 4-parameter affine motion model according to some embodiments of the present disclosure.

[0019] Figure 5D is a block diagram illustrating a spatial relationship between a sub-block within an inter-predicted current block and a neighboring affine block according to some embodiments of the present disclosure.

[0020] Fig. 6A is a flow chart illustrating a process for decoding using adaptive motion vector resolution precision sets according to some embodiments of the present disclosure.

[0021] Figure 6B is a flowchart illustrating a process of calculating a control point motion vector for an image block according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0022] Reference will now be made in detail to specific embodiments, examples of which are illustrated in the accompanying drawings. In the following detailed description, numerous non-limiting specific details are set forth to aid in understanding the subject matter presented herein. However, it will be apparent to one of ordinary skill in the art that various alternatives may be used without departing from the scope of the claims, and that the subject matter may be practiced without these specific details. For example, it will be apparent to one of ordinary skill in the art that the subject matter presented herein may be implemented on many types of electronic devices having digital video capabilities.

[0023] Figure 1 is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel according to some embodiments of the present disclosure. Figure 1As shown in , system 10 includes a source device 12 that generates and encodes video data to be later decoded by a destination device 14. Source device 12 and destination device 14 may include any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some implementations, source device 12 and destination device 14 are equipped with wireless communication capabilities.

[0024] In some embodiments, the target device 14 may receive the encoded video data to be decoded via the link 16. The link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the target device 14. In one example, the link 16 may include a communication medium that enables the source device 12 to directly send the encoded video data to the target device 14 in real time. The encoded video data may be modulated according to a communication standard (such as a wireless communication protocol) and sent to the target device 14. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network (such as a local area network, a wide area network, or a global network, such as the Internet). The communication medium may include a router, a switch, a base station, or any other equipment that may be beneficial to facilitate communication from the source device 12 to the target device 14.

[0025] In some other embodiments, the encoded video data may be sent from the output interface 22 to the storage device 32. Subsequently, the encoded video data in the storage device 32 may be accessed by the target device 14 via the input interface 28. The storage device 32 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a DVD, a CD-ROM, a flash memory, a volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data. In a further example, the storage device 32 may correspond to a file server or another intermediate storage device that may hold the encoded video data generated by the source device 12. The target device 14 may access the stored video data from the storage device 32 via streaming or downloading. The file server may be any type of computer capable of storing encoded video data and sending the encoded video data to the target device 14. Exemplary file servers include web servers (e.g., for websites), FTP servers, network attached storage (NAS) devices, or local disk drives. The target device 14 may access the encoded video data through any standard data connection suitable for accessing encoded video data stored on a file server, including a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., DSL, cable modem, etc.), or a combination of both. The transmission of the encoded video data from the storage device 32 may be a streaming transmission, a download transmission, or a combination of both.

[0026] like Figure 1 As shown in , source device 12 includes video source 18, video encoder 20 and output interface 22. Video source 18 may include sources such as or a combination of such sources: a video capture device (e.g., a camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video. As an example, if video source 18 is a camera of a security monitoring system, source device 12 and target device 14 may form a camera phone or a video phone. However, the embodiments described in the present application may be generally applicable to video encoding and decoding, and may be applied to wireless and / or wired applications.

[0027] Captured, pre-captured or computer-generated video may be encoded by video encoder 20. The encoded video data may be sent directly to target device 14 via output interface 22 of source device 12. The encoded video data may also (or alternatively) be stored on storage device 32 for later access by target device 14 or other devices for decoding and / or playback. Output interface 22 may further include a modem and / or a transmitter.

[0028] Target device 14 includes input interface 28, video decoder 30, and display device 34. Input interface 28 may include a receiver and / or a modem and receives encoded video data via link 16. The encoded video data communicated via link 16 or provided on storage device 32 may include various semantic elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such semantic elements may be included in the encoded video data sent over a communication medium, stored on a storage medium, or stored on a file server.

[0029] In some implementations, the target device 14 may include a display device 34, which may be an integrated display device and an external display device configured to communicate with the target device 14. The display device 34 displays the decoded video data to a user and may include any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0030] The video encoder 20 and the video decoder 30 can operate according to a proprietary standard or an industry standard (such as VVC, HEVC, MPEG-4, Part 10, Advanced Video Codec AVC) or an extension of such a standard. It should be understood that the present application is not limited to a specific video codec / decoding standard and can be applied to other video codec / decoding standards. It is generally believed that the video encoder 20 of the source device 12 can be configured to encode video data according to any of these current standards or future standards. Similarly, it is also generally believed that the video decoder 30 of the target device 14 can be configured to decode video data according to any of these current standards or future standards.

[0031] The video encoder 20 and the video decoder 30 can be implemented as any of a variety of suitable encoder circuit systems, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When partially implemented in software, the electronic device can store instructions for the software in a suitable non-transitory computer-readable medium, and use one or more processors to execute the instructions in the hardware to perform the video encoding / decoding operations disclosed in the present disclosure. Each of the video encoder 20 and the video decoder 30 can be included in one or more encoders or decoders, and either of the encoders or decoders can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device.

[0032] Figure 22 is a block diagram illustrating an exemplary video encoder 20 according to some embodiments described herein. The video encoder 20 may perform intra-frame prediction codecs and inter-frame prediction codecs for video blocks within a video frame. Intra-frame prediction codecs rely on spatial predictions to reduce or remove spatial redundancy in video data within a given video frame or picture. Inter-frame prediction codecs rely on temporal predictions to reduce or remove temporal redundancy in video data within adjacent video frames or pictures of a video sequence.

[0033] like Figure 2 As shown in , the video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy coding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a segmentation unit 45, an intra-frame prediction processing unit 46, and an intra-frame block copy (BC) unit 48. In some embodiments, the video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. A deblocking filter (not shown) may be located between the adder 62 and the DPB 64 to filter the block boundaries to remove block effects from the reconstructed video. In addition to the deblocking filter, a loop filter (not shown) may also be used to filter the output of the adder 62. The video encoder 20 may take the form of a fixed or programmable hardware unit, or may be dispersed in one or more of the fixed or programmable hardware units described.

[0034] The video data memory 40 may store video data to be encoded by the components of the video encoder 20. The video data in the video data memory 40 may be obtained, for example, from the video source 18. The DPB 64 is a buffer that stores reference video data for use by the video encoder 20 (e.g., in an intra-frame or inter-frame prediction codec mode) when encoding the video data. The video data memory 40 and the DPB 64 may be formed by any of a variety of memory devices. In various examples, the video data memory 40 may be formed on-chip with other components of the video encoder 20, or off-chip with respect to those components.

[0035] like Figure 2As shown in , after receiving the video data, the segmentation unit 45 within the prediction processing unit 41 segments the video data into video blocks. This segmentation may also include segmenting the video frame into strips, tiles, or other larger codec units (CUs) according to a predefined splitting structure (such as a quadtree structure) associated with the video data. The video frame may be divided into a plurality of video blocks (or sets of video blocks, referred to as tiles). The prediction processing unit 41 may select one of a plurality of possible prediction codec modes for the current video block based on the error result (e.g., codec rate and distortion level), such as one of one or more inter-frame prediction codec modes in a plurality of intra-frame prediction codec modes. The prediction processing unit 41 may provide the resulting intra-frame prediction codec block or inter-frame prediction codec block to the adder 50 to generate a residual block, and to the adder 62 to reconstruct the coded block for subsequent use as part of a reference frame. The prediction processing unit 41 also provides semantic elements (such as motion vectors, intra-frame mode indicators, segmentation information, and other such semantic information) to the entropy coding unit 56.

[0036] In order to select an appropriate intra-frame prediction codec mode for the current video block, intra-frame prediction processing unit 46 within prediction processing unit 41 may perform intra-frame prediction codec of the current video block relative to one or more neighboring blocks to provide spatial prediction, the one or more neighboring blocks being in the same frame as the current block to be coded. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 perform inter-frame prediction codec of the current video block relative to one or more prediction blocks in one or more reference frames to provide temporal prediction. Video encoder 20 may perform multiple codec passes, for example, to select an appropriate codec mode for each block of video data.

[0037] In some embodiments, the motion estimation unit 42 determines the inter-prediction mode for the current video frame by generating a motion vector according to a predetermined pattern within the sequence of video frames, the motion vector indicating the displacement of a prediction unit (PU) of a video block within the current video frame relative to a prediction block within a reference video frame. Motion estimation performed by the motion estimation unit 42 is the process of generating a motion vector, which estimates the motion for a video block. The motion vector may, for example, indicate the displacement of a PU of a video block within the current video frame or picture relative to a prediction block (or other coded unit) within a reference frame, the prediction block being relative to a current block (or other coded unit) being coded within the current frame. The predetermined pattern may designate the video frames in the sequence as P frames or B frames. The intra BC unit 48 may determine a vector (e.g., a block vector) for intra BC coding in a manner similar to how the motion estimation unit 42 determines a motion vector for inter prediction, or may utilize the motion estimation unit 42 to determine the block vector.

[0038] A prediction block is a block of a reference frame that is considered to closely match the PU of the video block to be coded in terms of pixel differences, which may be determined by the sum of absolute differences (SAD), the sum of squared differences (SSD), or other difference metrics. In some embodiments, the video encoder 20 may calculate values ​​for sub-integer pixel positions of the reference frame stored in the DPB 64. For example, the video encoder 20 may interpolate values ​​for quarter-pixel positions, eighth-pixel positions, or other fractional pixel positions of the reference frame. Thus, the motion estimation unit 42 may perform a motion search relative to full pixel positions and fractional pixel positions, and output a motion vector with fractional pixel accuracy.

[0039] Motion estimation unit 42 calculates a motion vector for a PU of a video block in an inter-prediction codec frame by comparing the position of the PU with the position of a prediction block of a reference frame selected from a first reference frame list (list 0) or a second reference frame list (list 1), each of which identifies one or more reference frames stored in DPB 64. Motion estimation unit 42 sends the calculated motion vector to motion compensation unit 44 and then to entropy encoding unit 56.

[0040] The motion compensation performed by the motion compensation unit 44 may involve extracting or generating a prediction block based on the motion vector determined by the motion estimation unit 42. Upon receiving the motion vector for the PU of the current video block, the motion compensation unit 44 may locate the prediction block pointed to by the motion vector in one of the reference frame lists, retrieve the prediction block from the DPB 64, and forward the prediction block to the adder 50. The adder 50 then forms a residual video block of pixel difference values ​​by subtracting the pixel values ​​of the prediction block provided by the motion compensation unit 44 from the pixel values ​​of the current video block being encoded and decoded. The pixel difference values ​​forming the residual video block may include a luminance difference component or a chrominance difference component or both. The motion compensation unit 44 may also generate semantic elements associated with the video block of the video frame for use by the video decoder 30 when decoding the video block of the video frame. The semantic elements may include, for example, semantic elements defining a motion vector for identifying the prediction block, any flag indicating a prediction mode, or any other semantic information described herein. Note that the motion estimation unit 42 and the motion compensation unit 44 may be highly integrated, but are described separately for conceptual purposes.

[0041] In some embodiments, the intra BC unit 48 may generate vectors and extract prediction blocks in a manner similar to that described above in conjunction with the motion estimation unit 42 and the motion compensation unit 44, but these prediction blocks are in the same frame as the current block being encoded and decoded, and these vectors are referred to as block vectors rather than motion vectors. Specifically, the intra BC unit 48 may determine the intra prediction mode to be used to encode the current block. In some examples, the intra BC unit 48 may encode the current block using various intra prediction modes, for example, during multiple separate encoding passes, and test their performance through rate-distortion analysis. Next, the intra BC unit 48 may select a suitable intra prediction mode to use from among the various tested intra prediction modes, and generate an intra mode indicator accordingly. For example, the intra BC unit 48 may calculate rate-distortion values ​​for various tested intra prediction modes using rate-distortion analysis, and select an intra prediction mode with the best rate-distortion characteristics from among the tested modes as a suitable intra prediction mode to use. The rate-distortion analysis typically determines the amount of distortion (or error) between a coded block and the original uncoded block that was coded to produce the coded block, and the bit rate (i.e., the number of bits) used to produce the coded block. The intra BC unit 48 may calculate a ratio from the distortion and rate for the various coded blocks to determine which intra-prediction mode exhibits the best rate-distortion value for the block.

[0042] In other examples, intra BC unit 48 may use, in whole or in part, motion estimation unit 42 and motion compensation unit 44 to perform such functions for intra BC prediction in accordance with embodiments described herein. In either case, for intra block copying, the prediction block may be a block that is considered to closely match the block to be encoded and decoded in terms of pixel differences, which may be determined by sum of absolute differences (SAD), sum of squared differences (SSD), or other difference metrics, and identification of the prediction block may include calculating values ​​for sub-integer pixel positions.

[0043] Regardless of whether the prediction block is from the same frame according to intra-frame prediction or from a different frame according to inter-frame prediction, the video encoder 20 can form a residual video block by subtracting the pixel values ​​of the prediction block from the pixel values ​​of the current video block being decoded. The pixel difference values ​​forming the residual video block may include both luma component differences and chroma component differences.

[0044] As an alternative to the inter-frame prediction performed by the motion estimation unit 42 and the motion compensation unit 44 or the intra-frame block copy prediction performed by the intra BC unit 48 as described above, the intra-frame prediction processing unit 46 can perform intra-frame prediction on the current video block. Specifically, the intra-frame prediction processing unit 46 can determine the intra-frame prediction mode used to encode the current block. To do so, the intra-frame prediction processing unit 46 can encode the current block using various intra-frame prediction modes, for example during multiple separate encoding passes, and the intra-frame prediction processing unit 46 (or in some examples, the mode selection unit) can select the appropriate intra-frame prediction mode to be used from the tested intra-frame prediction modes. The intra-frame prediction processing unit 46 can provide information indicating the intra-frame prediction mode selected for the block to the entropy coding unit 56. The entropy coding unit 56 can encode the information indicating the selected intra-frame prediction mode in the bitstream.

[0045] After prediction processing unit 41 determines a prediction block for the current video block via inter-prediction or intra-prediction, adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more transform units (TUs) and provided to transform processing unit 52. Transform processing unit 52 transforms the residual video data into residual transform coefficients using a transform (such as a discrete cosine transform DCT or a conceptually similar transform).

[0046] Transform processing unit 52 may send the resulting transform coefficients to quantization unit 54. Quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process may also reduce the bit depth associated with some or all of the coefficients. The degree of quantization may be modified by adjusting a quantization parameter. In some examples, quantization unit 54 may then perform a scan of the matrix including the quantized transform coefficients. Optionally, entropy encoding unit 56 may perform the scan.

[0047] After quantization, entropy encoding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, for example, context adaptive variable length coding (CAVLC), context adaptive binary arithmetic coding (CABAC), semantic-based context adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or another entropy coding method or technique. The encoded bitstream may then be sent to video decoder 30, or archived in storage device 32 for later sending to or retrieval by video decoder 30. Entropy encoding unit 56 may also entropy encode motion vectors and other semantic elements for the current video frame being encoded or decoded.

[0048] Inverse quantization unit 58 and inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct the residual video block in the pixel domain for use in generating reference blocks for predicting other video blocks. As noted above, motion compensation unit 44 may generate a motion compensated prediction block from one or more reference blocks of a frame stored in DPB 64. Motion compensation unit 44 may also apply one or more interpolation filters to the prediction block to calculate sub-integer pixel values ​​for use in motion estimation.

[0049] Adder 62 adds the reconstructed residual block to the motion compensated prediction block produced by motion compensation unit 44 to produce a reference block to be stored in DPB 64. The reference block may then be used as a prediction block by intra BC unit 48, motion estimation unit 42, and motion compensation unit 44 to inter-predict another video block in a subsequent video frame.

[0050] Figure 3 30 is a block diagram showing an exemplary video decoder 30 according to some embodiments of the present application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra-frame prediction unit 84, and an intra-frame BC unit 85. The video decoder 30 may perform the above-mentioned Figure 2 The encoding process described with respect to video encoder 20 is generally the inverse of the decoding process. For example, motion compensation unit 82 may generate prediction data based on motion vectors received from entropy decoding unit 80, while intra-prediction unit 84 may generate prediction data based on intra-prediction mode indicators received from entropy decoding unit 80.

[0051] In some examples, units of the video decoder 30 may be tasked to perform embodiments of the present application. In addition, in some examples, embodiments of the present disclosure may be dispersed in one or more of the multiple units of the video decoder 30. For example, the intra BC unit 85 may perform embodiments of the present application alone or in combination with other units of the video decoder 30 (such as the motion compensation unit 82, the intra prediction unit 84, and the entropy decoding unit 80). In some examples, the video decoder 30 may not include the intra BC unit 85, and the functions of the intra BC unit 85 may be performed by other components of the prediction processing unit 81 (such as the motion compensation unit 82).

[0052] The video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of the video decoder 30. The video data stored in the video data memory 79 may be obtained, for example, from the storage device 32, from a local video source (such as a camera), via a wired or wireless network communication of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). The video data memory 79 may include a codec picture buffer (CPB) that stores the encoded video data in the encoded video bitstream. The decoded picture buffer (DPB) 92 of the video decoder 30 stores reference video data for use by the video decoder 30 when decoding the video data (e.g., in an intra-frame or inter-frame prediction codec mode). The video data memory 79 and the DPB 92 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. For illustrative purposes, the video data memory 79 and the DPB 92 are stored in a plurality of memory devices. Figure 3 9 as two different components of the video decoder 30. However, it will be apparent to those skilled in the art that the video data memory 79 and the DPB 92 may be provided by the same memory device or by separate memory devices. In some examples, the video data memory 79 may be formed on-chip with the other components of the video decoder 30, or formed off-chip relative to those components.

[0053] During the decoding process, the video decoder 30 receives an encoded video bitstream, which represents video blocks and associated semantic elements of the encoded video frames. The video decoder 30 can receive the semantic elements at the video frame level and / or the video block level. The entropy decoding unit 80 of the video decoder 30 entropy decodes the bitstream to generate quantization coefficients, motion vectors or intra-frame prediction mode indicators, and other semantic elements. The entropy decoding unit 80 then forwards the motion vectors and other semantic elements to the prediction processing unit 81.

[0054] When a video frame is encoded and decoded as an intra-frame prediction codec (I) frame or an intra-frame codec prediction block in other types of frames, the intra-frame prediction unit 84 of the prediction processing unit 81 can generate prediction data for the video block of the current video frame based on the intra-frame prediction mode sent by the signal and the reference data from the previously decoded block of the current frame.

[0055] When the video frame is encoded and decoded as an inter-frame prediction codec (i.e., B or P) frame, the motion compensation unit 82 of the prediction processing unit 81 generates one or more prediction blocks for the video block of the current video frame based on the motion vector and other semantic elements received from the entropy decoding unit 80. Each prediction block in the prediction block can be generated from a reference frame in one of the reference frame lists. The video decoder 30 can construct the reference frame lists - List 0 and List 1 based on the reference frames stored in the DPB 92 using a default construction technique.

[0056] In some examples, when the video block is encoded and decoded according to the intra BC mode described herein, intra BC unit 85 of prediction processing unit 81 generates a prediction block for the current video block based on the block vector and other semantic elements received from entropy decoding unit 80. The prediction block can be within the reconstructed region of the same picture as the current video block defined by video encoder 20.

[0057] The motion compensation unit 82 and / or the intra BC unit 85 determine prediction information for a video block of the current video frame by parsing the motion vector and other semantic elements, and then use the prediction information to generate a prediction block for the current video block being decoded. For example, the motion compensation unit 82 uses some of the received semantic elements to determine a prediction mode (e.g., intra prediction or inter prediction) for encoding and decoding a video block of a video frame, an inter prediction frame type (e.g., B or P), construction information for one or more reference frame lists in a reference frame list for a frame, motion vectors for each inter prediction coded video block of a frame, inter prediction states for each inter prediction coded video block of a frame, and other information for decoding a video block in the current video frame.

[0058] Similarly, the intra BC unit 85 may use some of the received semantic elements, such as flags, to determine that the current video block is predicted using the intra BC mode, construction information of video blocks of the frame that are within the reconstruction region and should be stored in the DPB 92, block vectors for each intra BC predicted video block of the frame, intra BC prediction status for each intra BC predicted video block of the frame, and other information for decoding video blocks in the current video frame.

[0059] Motion compensation unit 82 may also perform interpolation using interpolation filters as used by video encoder 20 during encoding of the video block to compute interpolated values ​​for sub-integer pixels for a reference block. In this case, motion compensation unit 82 may determine the interpolation filters used by video encoder 20 from the received syntax elements and use these interpolation filters to produce the prediction block.

[0060] Inverse quantization unit 86 inverse quantizes the quantized transform coefficients provided in the bitstream and entropy decoded by entropy decoding unit 80, using the same quantization parameters calculated by video encoder 20 for each video block in the video frame to determine the degree of quantization. Inverse transform processing unit 88 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients to reconstruct the residual block in the pixel domain.

[0061] After the motion compensation unit 82 or the intra BC unit 85 generates a prediction block for the current video block based on the vector and other semantic elements, the adder 90 reconstructs the decoded video block for the current video block by adding the residual block from the inverse transform processing unit 88 to the corresponding prediction block generated by the motion compensation unit 82 and the intra BC unit 85. A loop filter (not shown) may be located between the adder 90 and the DPB 92 to further process the decoded video block. The decoded video blocks in a given frame are then stored in the DPB 92, which stores reference frames for subsequent motion compensation of the next video block. The DPB 92 or a memory device separate from the DPB 92 may also store the decoded video for later presentation on a display device such as a video display. Figure 1 on a display device 34).

[0062] In a typical video encoding and decoding process, a video sequence usually includes an ordered set of frames or pictures. Each frame may include three sample arrays, denoted as SL, SCb, and SCr. SL is a two-dimensional array of luma samples. SCb is a two-dimensional array of Cb chroma samples. SCr is a two-dimensional array of Cr chroma samples. In other cases, a frame may be monochrome and therefore include only a two-dimensional array of luma samples.

[0063] like Figure 4A As shown in , the video encoder 20 (or more specifically, the segmentation unit 45) generates an encoded representation of a frame by first segmenting the frame into a set of codec tree units (CTUs). A video frame may include an integer number of CTUs ordered consecutively from left to right and from top to bottom in a raster scan order. Each CTU is the largest logical codec unit, and the width and height of the CTU are signaled by the video encoder 20 in a sequence parameter set so that all CTUs in a video sequence have the same size, one of 128×128, 64×64, 32×32, and 16×16. It should be noted, however, that the present application is not necessarily limited to a particular size. As Figure 4BAs shown in , each CTU may include one codec tree block (CTB) of luma samples, two corresponding codec tree blocks of chroma samples, and semantic elements for encoding and decoding the samples of the codec tree blocks. The semantic elements describe the properties of different types of units of codec pixel blocks and how the video sequence can be reconstructed at the video decoder 30, including inter-frame prediction or intra-frame prediction, intra-frame prediction mode, motion vectors and other parameters. In a monochrome picture or a picture with three separate color planes, a CTU may include a single codec tree block and semantic elements for encoding and decoding the samples of the codec tree block. The codec tree block may be an N×N sample block.

[0064] To achieve better performance, the video encoder 20 may recursively perform tree partitioning, such as binary tree partitioning, ternary tree partitioning, quadtree partitioning, or a combination of both, on the codec tree block of the CTU and divide the CTU into smaller codec units (CUs). Figure 4C As depicted in , a 64×64 CTU 400 is first divided into four smaller CUs, each CU having a block size of 32×32. Among the four smaller CUs, CU 410 and CU 420 are respectively divided into four CUs with a block size of 16×16. Two 16×16 CUs 430 and CU 440 are further divided into four CUs with a block size of 8×8. Figure 4D Depicts a quadtree data structure showing Figure 4C The final result of the partitioning process of the CTU 400 depicted in FIG. 4 is that each leaf node of the quadtree corresponds to a CU of various sizes ranging from 32×32 to 8×8. Figure 4B Each CU may include a codec block (CB) of luma samples and two corresponding codec blocks of chroma samples of the same size frame, as well as semantic elements for encoding and decoding the samples of the codec block. In a monochrome picture or a picture with three separate color planes, a CU may include a single codec block and semantic structures for encoding and decoding the samples of the codec block. It should be noted that Figure 4C and Figure 4D The quadtree partitioning depicted in FIG. 1 is for illustrative purposes only, and one CTU may be split into multiple CUs based on quadtree partitioning / ternary tree partitioning / binary tree partitioning to adapt to varying local characteristics. In a multi-type tree structure, one CTU is partitioned according to a quadtree structure, and each quadtree leaf CU may be further partitioned according to a binary and ternary tree structure. Figure 4E As shown, there are five possible partitioning types for a codec block with a width of W and a height of H, namely, quadruple partitioning, horizontal binary partitioning, vertical binary partitioning, horizontal ternary partitioning, and vertical ternary partitioning.

[0065] In some embodiments, the video encoder 20 may further partition the codec block of the CU into one or more M×N prediction blocks (PBs). A prediction block is a rectangular (square or non-square) block of samples to which the same prediction (inter or intra) is applied. The prediction unit (PU) of the CU may include a prediction block of luma samples, two corresponding prediction blocks of chroma samples, and semantic elements for predicting the prediction blocks. In a monochrome picture or a picture with three separate color planes, a PU may include a single prediction block and a semantic structure for predicting the prediction block. The video encoder 20 may generate a predicted luma block, a predicted Cb block, and a predicted Cr block for the luma prediction block, the Cb prediction block, and the Cr prediction block of each PU of the CU.

[0066] Video encoder 20 may use intra prediction or inter prediction to generate a prediction block for a PU. If video encoder 20 uses intra prediction to generate a prediction block for a PU, video encoder 20 may generate the prediction block for the PU based on decoded samples of a frame associated with the PU. If video encoder 20 uses inter prediction to generate a prediction block for a PU, video encoder 20 may generate the prediction block for the PU based on decoded samples of one or more frames other than the frame associated with the PU.

[0067] After the video encoder 20 generates the predicted luma block, the predicted Cb block, and the predicted Cr block for one or more PUs of a CU, the video encoder 20 may generate a luma residual block for the CU by subtracting the predicted luma block of the CU from its original luma codec block, so that each sample in the luma residual block of the CU indicates the difference between a luma sample in one of the predicted luma blocks of the CU and a corresponding sample in the original luma codec block of the CU. Similarly, the video encoder 20 may generate a Cb residual block and a Cr residual block for the CU, respectively, so that each sample in the Cb residual block of the CU indicates the difference between a Cb sample in one of the predicted Cb blocks of the CU and a corresponding sample in the original Cb codec block of the CU, and each sample in the Cr residual block of the CU may indicate the difference between a Cr sample in one of the predicted Cr blocks of the CU and a corresponding sample in the original Cr codec block of the CU.

[0068] In addition, if Figure 4CAs shown in , the video encoder 20 can use quadtree partitioning to decompose the luma residual block, Cb residual block and Cr residual block of the CU into one or more luma transform blocks, Cb transform blocks and Cr transform blocks. A transform block is a rectangular (square or non-square) sample block to which the same transform is applied. The transform unit (TU) of the CU may include a transform block of luma samples, two corresponding transform blocks of chroma samples, and semantic elements for transforming the transform block samples. Therefore, each TU of the CU may be associated with a luma transform block, a Cb transform block and a Cr transform block. In some examples, the luma transform block associated with the TU may be a sub-block of the luma residual block of the CU. The Cb transform block may be a sub-block of the Cb residual block of the CU. The Cr transform block may be a sub-block of the Cr residual block of the CU. In a monochrome picture or a picture with three separate color planes, a TU may include a single transform block and a semantic structure for transforming the samples of the transform block.

[0069] The video encoder 20 may apply one or more transforms to the luma transform block of the TU to generate a luma coefficient block for the TU. The coefficient block may be a two-dimensional array of transform coefficients. The transform coefficient may be a scalar. The video encoder 20 may apply one or more transforms to the Cb transform block of the TU to generate a Cb coefficient block for the TU. The video encoder 20 may apply one or more transforms to the Cr transform block of the TU to generate a Cr coefficient block for the TU.

[0070] After generating a coefficient block (e.g., a luma coefficient block, a Cb coefficient block, or a Cr coefficient block), the video encoder 20 may quantize the coefficient block. Quantization generally refers to a process in which transform coefficients are quantized to potentially reduce the amount of data used to represent the transform coefficients, thereby providing further compression. After the video encoder 20 quantizes the coefficient block, the video encoder 20 may entropy encode a semantic element indicating the quantized transform coefficients. For example, the video encoder 20 may perform context adaptive binary arithmetic coding (CABAC) on the semantic element indicating the quantized transform coefficients. Finally, the video encoder 20 may output a bitstream including a sequence of bits that form a representation of a coded frame and associated data, and the bitstream is stored in the storage device 32 or sent to the target device 14.

[0071] After receiving the bitstream generated by the video encoder 20, the video decoder 30 can parse the bitstream to obtain semantic elements from the bitstream. The video decoder 30 can reconstruct a frame of video data based at least in part on the semantic elements obtained from the bitstream. The process of reconstructing video data is generally inverse to the encoding process performed by the video encoder 20. For example, the video decoder 30 can perform an inverse transform on a coefficient block associated with a TU of the current CU to reconstruct a residual block associated with the TU of the current CU. The video decoder 30 also reconstructs the codec block of the current CU by adding samples of the prediction block for the PU of the current CU to corresponding samples of the transform block of the TU of the current CU. After reconstructing the codec block for each CU of the frame, the video decoder 30 can reconstruct the frame.

[0072] As the quality of digital video changes from high definition to 4K×2K or even 8K×4K, the amount of video data to be encoded / decoded grows exponentially. How to encode / decode video data more efficiently while maintaining the image quality of the decoded video data is an ever-present problem. Various video codec standards have adopted different approaches to solve this problem. For example, it has been found that the translation motion model performs poorly for motion compensation prediction when there are many types of motion (e.g., zoom-in / zoom-out, rotation, perspective motion, and other irregular motions in the real world). Therefore, multiple block-based affine motion models have been proposed to increase the accuracy of motion compensation prediction.

[0073] Figure 5A and Figure 5B are block diagrams respectively illustrating a 4-parameter block-based affine motion model and a 6-parameter block-based affine motion model according to some embodiments of the present disclosure. Figure 5A As depicted in FIG. 5 , the current block 510 is related to the reference block (not shown) by the following two motion vectors: MV0 (mv 0x ,mv 0y ) and MV1 (mv 1x ,mv 1y MV0(mv 0x ,mv 0y ) and MV1(mv 1x ,mv 1y ) is also called a control point motion vector (CPMV). Assuming that the width of the current block 510 is W, the motion vector MV (mv x ,mv y ) is defined by the linear affine motion model as follows:

[0074]

[0075] Similarly, if Figure 5B As depicted in FIG. 5 , another current block 520 is related to a reference block (not shown) by the following three motion vectors: MV0 (mv 0x ,mv 0y ), MV1 (mv ) at the upper right corner control point of the current block 520 1x ,mv 1y ), and MV2 (mv 2x ,mv 2y Assuming that the width and height of the current block 520 are W and H respectively, the motion vector MV (mv x ,mv y ) is defined by the linear affine motion model as follows:

[0076]

[0077] The CPMV is stored in a buffer separate from the decoder picture buffer. The stored CPMV is only used to generate affine CPMV prediction values ​​in affine merge mode (i.e., the affine CPMV is inherited from the CPMV of the adjacent affine block) and affine explicit mode (i.e., the affine CPMV is signaled according to a prediction-based scheme). In these affine modes, the sub-block motion vectors derived from the CPMV (e.g., based on equation (2) above) are used for motion compensation, motion vector prediction of translation motion vectors, and deblocking.

[0078] In some embodiments, to avoid an increase in the picture line buffer size due to additional storage requests for CPMV, the affine motion data inheritance from the codec block located in the upper CTU and the affine motion data inheritance from the neighboring block located in the same CTU are treated differently. Specifically, for the current CU, if the spatial neighbor for affine motion data inheritance is located in the upper CTU, the sub-block MV in the line buffer is used for affine MV prediction value (MVP) derivation for the current CU instead of the CPMV in the upper CTU. In this way, the CPMV is stored only in the local buffer instead of the line buffer. If the candidate CU is encoded and decoded using a 6-parameter affine model, the affine model is downgraded to a 4-parameter model.

[0079] In the Versatile Video Codec (VVC) standard, affine non-merge mode can be applied to codec blocks whose width and height are both greater than or equal to 16. For affine non-merge mode, up to four or six CPMVs are signaled in the bitstream for the CU (depending on whether a 4-parameter affine model or a 6-parameter affine model is applied and whether the prediction is unidirectional or bidirectional). Specifically, an affine flag in the CU level is first signaled to indicate whether the affine mode is used. Afterwards, another flag is signaled to select between a 4-parameter affine model and a 6-parameter affine model. The affine CPMV candidate list size is 2, and it is generated by adding four types of CPMV candidates according to the following order:

[0080] 1) Inherited affine CPMV candidates derived from the CPMV of adjacent codec blocks

[0081] 2) Constructed affine CPMV candidates derived using the MVs of neighboring 4×4 sub-blocks

[0082] 3) Translation MV from adjacent codec blocks

[0083] 4) Zero MV

[0084] In addition, in order to reduce signaling overhead, the difference between each CPMV and its predicted value is sent from the encoder to the decoder with a signal. The difference between the MV and its predicted value is called a motion vector difference (or MVD). The MVD includes an x-component MVD and a y-component MVD. Because the 4-parameter affine model has two CPMVs, two MVDs are signaled for unidirectionally predicted affine blocks, and four MVDs are signaled for bidirectionally predicted affine blocks. On the other hand, in the case of a 6-parameter affine model with three CPMVs, three MVDs and six MVDs are signaled for unidirectionally predicted affine blocks and bidirectionally predicted affine blocks, respectively.

[0085] In the High Efficiency Video Codec (HEVC) standard, the MVD of a block coded in inter non-merging mode is always signaled in quarter-pixel units. In VVC, an inter-coding tool called Adaptive Motion Vector Resolution (AMVR) is introduced to reduce the MVD signaling overhead. Specifically, AMVR allows the MVD of an inter non-merging block to be coded at various resolutions. Depending on whether the current coded block is coded in regular inter non-merging mode or affine non-merging mode, the resolution of the MVD of the coded block can be adaptively selected as:

[0086] Regular inter-frame non-binning modes: quarter-pixel, integer-pixel, and quad-pixel

[0087] Affine non-binning modes: quarter-pixel, sixteenth-pixel, and integer-pixel

[0088] Based on the existing AMVR design, if the current codec block has at least one non-zero MVD component, an AMVR indication flag is conditionally signaled. If all MVD components (i.e., both horizontal MVD and vertical MVD for reference list L0 and reference list L1) are zero, a quarter-pel MVD resolution is inferred.

[0089] For a codec block with at least one non-zero MVD component, a first flag (i.e., amvr_flag) is signaled to indicate whether quarter-pixel MVD resolution is used for the codec block. If the first flag is 0, no additional semantics are signaled and quarter-pixel MVD resolution is used for the current block. Otherwise, a second flag (i.e., amvr_precision_flag) is signaled to indicate whether integer-pixel or four-pixel MVD resolution is used for regular inter-frame non-merged blocks. The same second flag is used to indicate whether one-sixteenth-pixel or integer-pixel MVD precision is used for affine non-merged blocks. In addition, to ensure that the reconstructed MV has the expected resolution, the MV prediction values ​​for regular inter-frame non-merged mode and the CPMV prediction values ​​for affine non-merged mode will be rounded to the same resolution as the resolution of the corresponding MVD before generating the final MV / CPMV.

[0090] Therefore, two different MVD resolution sets are applied to the regular inter-frame non-merging mode and the affine non-merging mode, the set of {1 / 4 pixel, 1 pixel, 4 pixels} is used for the regular inter-frame non-merging mode, and {1 / 4 pixel, 1 / 16 pixel, 1 pixel} is used for the affine non-merging mode. From the perspective of standardization, this non-uniform design may not be optimal.

[0091] On the other hand, the current set of MVD resolutions allowed for affine AMVR may not always be optimal. For example, although 1 / 16th pixel can improve the accuracy of affine CPMV, it consumes more codec bits in signaling. In addition, the CPMVs of an affine block are not used directly for motion compensation; instead, they are only used to derive the MVs of sub-blocks within the block. Therefore, using a higher MVD resolution may not always be optimal in terms of codec efficiency. For example, compared with small-resolution video sequences (e.g., VGA and WQVGA), the characteristics of samples within an inter-frame block in a large-resolution video sequence (e.g., HD, 4K, or even 8K video) tend to be more consistent, and their corresponding MVs are typically much larger. In such a case, it may not be worth increasing the CPMV resolution of an affine block to the 1 / 16 pixel level due to the poor trade-off in this case.

[0092] Therefore, please refer to Fig. 6Aand related description below regarding a proposed approach to address problems associated with current designs, including allowing the use of different sets of MVD resolutions, as signaled from an encoder to a decoder.

[0093] Figure 5C is a block diagram showing an exemplary motion vector distribution of a 4×4 sub-block of samples derived from a 4-parameter block-based affine motion model as described above according to some embodiments of the present disclosure. By applying the coordinates of each sample point within the 4×4 sub-block to equation (1) above, the motion vector prediction MV is calculated at the sample point (i, j). (i,j) , as indicated by the corresponding arrow symbols. The motion vectors based on the affine motion model can be used by the video encoder 20 in the affine inter prediction mode for sub-block based affine motion compensation to improve the accuracy of the predicted pixel values. After the sub-block based affine motion compensation is performed, the luma prediction samples can be further refined by adding the differences derived from the optical flow equation.

[0094] First, assume that after sub-block based affine motion compensation is performed, the luminance prediction at sample (i, j) is I(i, j). Using a 3-tap filter [-1, 0, 1], the spatial gradient g of the sub-block luminance prediction is x (i, j) and g y (i, j) is calculated at each sample position within the sub-block as follows:

[0095]

[0096] Note that the sub-block luma prediction is extended by one pixel on each side for gradient computation. To reduce memory bandwidth and complexity, pixels on the extended boundaries of the sub-block are copied from the nearest integer pixel position in the reference picture to avoid extra interpolation for padding areas.

[0097] According to the optical flow equation, the brightness prediction refinement ΔI(i, j) is the inner product of the pixel value gradient vector and the motion vector difference as the pixel value difference, which is defined as follows:

[0098] ΔI(i, j) = g x (i, j)*Δmv x (i, j)+g y (i, j)*Δmv y (i, j) (4)

[0099] Where Δmv(i, j) is the motion vector difference between the motion vector calculated for the sample position (i, j) (denoted by mv(i, j)) and the motion vector of the sub-block to the pixel (i, j). The motion vector difference Δmv(i, j) can be calculated using one of a 4-parameter affine motion model and a 6-parameter affine motion model or other affine models known to those skilled in the art.

[0100] For illustrative purposes, a 4-parameter affine motion model is used below. Figure 5C As depicted in , assuming that i and j are the horizontal x offset and vertical y offset from the pixel position to the upper left point of the current sub-block, the motion vector mv(i, j) of any sample point in the current sub-block can be derived by the following equation:

[0101]

[0102] As described above, for a 4-parameter affine motion model, the parameters of the above equation are:

[0103]

[0104] For the 6-parameter affine model, the parameters of the above equation are:

[0105]

[0106] Where (mv 0x ,mv 0y )、(mv 1x ,mv 1y )、(mv 2x ,mv 2y ) are the upper left control point motion vector, the upper right control point motion vector and the lower left control point motion vector of the current block, and W and H are the width and height of the current block.

[0107] Given the above definition of motion vector mv(i, j), the motion vector difference Δmv(i, j) of any sample point in the current sub-block can be derived by the following equation:

[0108]

[0109] in is the motion vector of the current sub-block. By sub-block brightness prediction spatial gradient g x (i, j) and g y By inserting Δmv(i, j) and the motion vector difference Δmv(i, j) into equation (4), the pixel value difference, i.e., the brightness prediction refinement, can be determined.

[0110] Finally, the luma prediction refinement is added to the luma prediction I(i, j) at sample (i, j) derived from the affine model motion prediction, and the final prediction I′(i, j) is generated as follows:

[0111] I′(i,j)=I(i,j)+ΔI(i,j) (9)

[0112] In some embodiments, the method described above can be extended to CUs in non-affine inter prediction modes, especially when the CU has neighboring blocks that are inter predicted according to the affine mode. In this case, the affine model control point motion vector for the current block can be derived from the affine model control point motion vector of the selected neighboring block. In some embodiments, the current block will directly use the affine model of the selected neighboring block to derive the affine motion for each sample point in the current block.

[0113] Figure 5D is a block diagram showing the spatial relationship between sub-blocks and neighboring affine blocks within a current block 530 that is inter-predicted according to some embodiments of the present disclosure. Assuming that the neighboring block 540-1 is inter-predicted according to an affine motion model and is located to the left of the current block 530, it is possible that the sub-blocks (e.g., the 4×4 sub-block 530-1) within the current block 530 that are near the neighboring block 540-1 may be able to benefit from the optical flow-based prediction refinement as described above due to their spatial proximity (e.g., the 4×4 sub-block 530-1 and the neighboring block 540-1 may be part of the same object). Similarly, if the neighboring block 540-2 is an inter-predicted block according to an affine motion model, the 4×4 sub-block 530-2 within the current block 530 that is located below the neighboring block 540-2 may also benefit from the optical flow-based prediction refinement as described above due to their spatial proximity. Note that if the neighboring block (not shown) to the left of the 4×4 sub-block 530-2 is also a block that is inter-predicted according to an affine motion model, the 4×4 sub-block 530-2 may also be able to benefit from the neighboring block for the same reasons described above. In this case, the selection of which neighboring block is used to perform prediction refinement on the sub-block 530-2 is a design choice.

[0114] Since the current block is inter-predicted according to a non-affine mode, it may not have Figure 5A (4-parameter affine model) and Figure 5B (6-parameter affine model) is a affine model control point motion vector such as the affine model control point motion vector described in (6-parameter affine model). It is necessary to determine the corresponding set of affine model control point motion vectors for the current block (more specifically, a particular subblock). For example, suppose x and y represent the horizontal offset and vertical offset from the pixel position in the current block to the upper left point of the selected adjacent affine block, and (mv 0x ,mv0y )、(mv 1x ,mv 1y )、(mv 2x ,mv 2y ) are the upper left control point motion vector, the upper right control point motion vector and the lower left control point motion vector of the selected adjacent affine block, then the motion vector of the pixel position can be derived using equation (1) for the 4-parameter affine model or equation (2) for the 6-parameter affine model. Alternatively, the motion vectors in the adjacent blocks can be used directly to derive the affine motion vector for each pixel in the current block. In either case, the final prediction I' is generated according to the following equation:

[0115] I′(i,j)=I(i,j)+w*ΔI(i,j) (10)

[0116] Where w is a weighting factor used to adjust the impact of ΔI(i, j) on the non-affine mode brightness prediction I(i, j) at sample (i, j). In one example, w is set equal to 1. In another example, w is set to less than 1, such as 0.5. Note that this weighting factor can be modified from one CU to another or remain the same for the entire picture. Of course, the value of the weighting factor should be signaled to the video decoder 30 in the video bitstream.

[0117] Since the current block is inter-predicted according to a non-affine mode, it may not have an affine model.

[0118] Fig. 6A 6 is a flow chart illustrating a process 600 for video decoding using an adaptive motion vector resolution precision set according to some embodiments of the present disclosure. Note that the process can be employed by a video encoder or a video decoder. For illustrative purposes, the process will be described as part of a video decoding process performed by a decoder (e.g., video decoder 30).

[0119] In existing video coding and decoding methods, a fixed MVD resolution set is used for inter-frame blocks in a video sequence (regular inter-frame mode or affine mode); therefore, since the MVD resolution set is implicitly determined (for example, (1 / 4 pixel, 1 pixel, 4 pixels) for regular inter-frame non-merged blocks and (1 / 4 pixel, 1 / 16 pixel and 1 pixel) for affine non-merged blocks), there is no need to signal those MVD resolution sets from the encoder to the decoder. It is proposed to use different MVD resolution sets for regular inter-frame mode and affine mode, and to signal the selected set from the encoder to the decoder. For example, based on specific resolution requirements, higher or lower MVD resolutions can be used. According to the present disclosure, different signaling methods can be used. In one method, the encoder can determine the desired MVD resolution sets on the fly and signal them in the bitstream. In this case, the number of allowed MVD resolutions and the actual resolutions are completely flexible to select. For example, the number does not necessarily have to be three. In another approach, multiple MVD resolution sets may be predefined and signaled at a higher codec level (e.g., sequence parameter set SPS and / or picture parameter set PPS), while at a lower level, such as in each picture, slice and / or tile, a specific set may be selected. In this case, only the index value of the selected set needs to be signaled at the lower level.

[0120] As a first step, the decoder receives from a video bitstream a first semantic element indicating a first MVD resolution set in a plurality of motion vector difference MVD resolution sets (610). The first semantic element is signaled at a predefined partition level, and the first MVD resolution set includes a plurality of MVD resolution values. For example, to represent the MVD of an affine block with general precision translational motion and the MVD of an affine block with high precision scaling / rotational motion, a resolution set (1 / 4 pixel, 1 / 8 pixel, 1 / 8 pixel) may be used. To represent the MVD of an affine block with coarse translational motion and the MVD of an affine block with general precision scaling / rotational motion, a resolution set (1 pixel, 1 / 4 pixel, 1 / 4 pixel) may be used. In some embodiments, depending on the total number of the first MVD resolution sets, the first semantic element is an N-bit binary code (see Table 1 below). For example, if there are a total of four different MVD resolution sets to be used, the first semantic element is a 2-bit binary code ("00", "01", "10" and "11").

[0121] Next, the decoder receives from the video bitstream a second semantic element indicating a first MVD resolution value in a first MVD resolution set and a third semantic element indicating an MVD associated with a current block (620). The second semantic element indicates which resolution value in the first MVD resolution set is to be used to reconstruct the MVD of the current block. Similar to the first semantic element, the second semantic element is an M-bit binarization code depending on the total number of resolution values ​​within the selected MVD resolution set (see Tables 2 to 5 below).

[0122] After determining a first MVD resolution value in a first MVD resolution set (from the second semantic element) and determining the MVD associated with the current block (from the third semantic element), the decoder then reconstructs the MVD into an actual MVD value for the current block based on the second semantic element and the third semantic element (630).

[0123] In some embodiments, the inter prediction mode comprises a conventional non-merging inter prediction mode or an affine non-merging inter prediction mode.

[0124] In some embodiments, the first syntax element is signaled in a sequence parameter set (SPS), a picture parameter set (PPS), a slice header, a tile header, or a block header.

[0125] In some embodiments, a corresponding MVD resolution set in a plurality of MVD resolution sets includes an MVD resolution of 1 / 32 pixels, an MVD resolution of 1 / 16 pixels, an MVD resolution of 1 / 8 pixels, an MVD resolution of 1 / 4 pixels, an MVD resolution of 1 / 2 pixels, an MVD resolution of 1 pixel, or an MVD resolution of 4 pixels.

[0126] In some embodiments, multiple MVD resolution sets are signaled at a partition level higher than a predefined partition level (e.g., multiple MVD resolution sets are signaled at an SPS or PPS level, while a first MVD resolution set is signaled at a slice level or a tile level).

[0127] In some embodiments, the selection of AMVR precision in affine AMVR mode depends on the position of CPMV. In the existing design, in affine AMVR mode, the same MVD resolution is used to represent all CPMV values ​​of an affine block. However, in practice, CPMVs at different positions of an affine block have different physical meanings and importance. For example, the CPMV at the upper left corner of an affine block controls the translational motion of the entire block, while the CPMVs at the upper right and lower left corners (when a 6-parameter affine model is applied) control the scaling and rotational motion of the block. In general, in terms of the trade-off between signaling overhead and prediction efficiency, it may be more beneficial to represent translational motion with low precision and scaling and rotational motion with higher precision. Based on this consideration, it is proposed to use different AMVR precisions to signal the MVD of CPMVs at different positions. Specifically, in this method, the precision of two or three CPMVs is jointly signaled depending on whether a 4-parameter affine model or a 6-parameter affine model is applied. Let (S0, S1, S2) represent the AMVR precision of the CPMV applied to the upper left, upper right, and lower left corners of an affine block. In one example, the following three affine AMVR resolution sets may be selected for an affine non-merged block: {(1 / 4 pixel, 1 / 4 pixel, 1 / 4 pixel), (1 / 4 pixel, 1 / 8 pixel, 1 / 8 pixel), and (1 pixel, 1 / 4 pixel, 1 / 4 pixel)}. Since the default MVD resolution in VVC is 1 / 4 pixel, (1 / 4 pixel, 1 / 4 pixel, 1 / 4 pixel) is used here to represent the MVD of a general precision affine block, and (1 / 4 pixel, 1 / 8 pixel, 1 / 8 pixel) is used to represent the MVD of an affine block with general precision translation motion and high precision scaling / rotation motion, and (1 pixel, 1 / 4 pixel, 1 / 4 pixel) is used to represent the MVD of an affine block with coarse translation motion and general precision scaling / rotation motion. Table 1 shows an exemplary binarization method when the proposed CPMV position-dependent AMVR method is applied to the affine mode. It is worth mentioning that, in practice, based on the same design spirit of the embodiment, other binarization methods and / or different AMVR resolution combinations can be used to represent the MVD resolution at different CPMV positions. For example, based on the same design spirit, at least codewords of 10 and 11 can be interchangeable.

[0128] MVD resolution Binarization (1 / 4 pixel, 1 / 4 pixel, 1 / 4 pixel) 0 (1 / 4 pixel, 1 / 8 pixel, 1 / 8 pixel) 10 (1 pixel, 1 / 4 pixel, 1 / 4 pixel) 11

[0129] Table 1 Binarization methods used for the proposed joint AMVR method for affine patterns

[0130] Figure 6B6 is a flow chart showing a process 650 of calculating a CPMV for an image block to implement position-dependent selection of AMVR precision for each CPMV in an affine AMVR mode. First, the decoder receives a first semantic element indicating a first motion vector difference MVD resolution set from a video bitstream, wherein the first MVD resolution set includes a plurality of MVD resolution values, each MVD resolution value corresponding to a respective CPMV of a current block (660). For each CPMV in the CPMV associated with the current block, the decoder then receives a second semantic element indicating an MVD of the CPMV from the video bitstream (670), and reconstructs the MVD of the CPMV to its actual value based on the first semantic element and the second semantic element (680).

[0131] In some embodiments, when the affine inter prediction mode is a 4-parameter mode, there are two MVD resolution values ​​in the first MVD resolution set for the two CPMVs at the upper left and upper right corners of the current block, and the MVD resolution for the upper right corner is finer than the MVD resolution for the upper left corner.

[0132] In some embodiments, when the affine inter prediction mode is a 6-parameter mode, there are three MVD resolution values ​​in the first MVD resolution set for the three CPMVs at the upper left corner, upper right corner, and lower left corner of the current block; the MVD resolution for the upper right corner is finer than the MVD resolution for the upper left corner, and the MVD resolution for the lower left corner is finer than the MVD resolution for the upper left corner.

[0133] In some embodiments, the first MVD resolution set includes (1 / 4 pixel, 1 / 4 pixel, 1 / 4 pixel), (1 / 4 pixel, 1 / 8 pixel, 1 / 8 pixel), or (1 pixel, 1 / 4 pixel, 1 / 4 pixel) as a default mode.

[0134] In the current VVC, the AMVR semantic elements amvr_flag and amvr_precision_flag use different context models for regular inter AMVR and affine AMVR. The context models and binarization of the amvr_flag flag and amvr_precision_flag flag in the current VVC are described in Tables 2 and 3.

[0135]

[0136] Table 2 Context model for conventional inter-frame AMVR

[0137]

[0138]

[0139] Table 3 Context model for affine AMVR

[0140] To simplify context modeling, according to the present disclosure, for amvr_flag, one unified context model will be used for both regular inter-AMVR and affine AMVR, and for amvr_precision_flag, another unified context model will be used for both regular inter-AMVR and affine AMVR. As shown in Tables 4 and 5, the total number of context models is reduced from 4 to 2.

[0141]

[0142] Table 4 Unified context model for conventional inter-frame AMVR

[0143]

[0144] Table 5 Unified context model for affine AMVR

[0145] In one or more examples, the functions described can be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions can be stored on or transmitted by a computer-readable medium as one or more instructions or codes, and executed by a hardware-based processing unit. A computer-readable medium may include a computer-readable storage medium or a communication medium, and a computer-readable storage medium corresponds to a tangible medium such as a data storage medium, and a communication medium includes any medium that facilitates the transfer of a computer program from one place to another (e.g., according to a communication protocol). In this way, a computer-readable medium can generally correspond to (1) a non-transient tangible computer-readable storage medium, or (2) a communication medium, such as a signal or carrier wave. A data storage medium can be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the embodiments described in this application. A computer program product may include a computer-readable medium.

[0146] The terms used in the description of the embodiments herein are only used for the purpose of describing specific embodiments, and are not intended to limit the scope of the claims. As used in the description of the embodiments and the appended claims, the singular forms "a", "an" and "the" are intended to also include plural forms, unless the context clearly indicates otherwise. It will also be understood that the term "and / or" as used herein refers to and covers any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms "including" and / or "including ... " when used in this specification, specify the presence of stated features, elements and / or components, but do not exclude the presence or addition of one or more other features, elements, components and / or groups thereof.

[0147] It will also be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the embodiment, the first electrode may be referred to as the second electrode, and similarly, the second electrode may be referred to as the first electrode. Both the first electrode and the second electrode are electrodes, but they are not the same electrode.

[0148] The description of the present application has been presented for the purpose of illustration and description, and is not intended to be exhaustive or limited to the invention in the disclosed form. With the benefit of the teachings presented in the foregoing description and the associated drawings, many modifications, variations and alternative embodiments will be apparent to those of ordinary skill in the art. The embodiments are selected and described in order to best explain the principles of the invention, the practical application, and to enable other persons skilled in the art to understand the invention for various embodiments, and to best utilize the basic principles and various embodiments with various modifications suitable for the intended specific use. Therefore, it will be understood that the scope of the claims is not limited to the specific examples of the disclosed embodiments, and modifications and other embodiments are intended to be included within the scope of the appended claims.

Claims

1. A method for calculating a motion vector difference MVD for a current block in an inter-frame prediction mode, the method comprising: receiving, from a video bitstream, a first syntax element indicating a first MVD resolution set of a plurality of MVD resolution sets, wherein the first syntax element is signaled at a predefined partition level, and wherein the first MVD resolution set includes a plurality of MVD resolution values; receiving from the video bitstream a second semantic element indicating a first MVD resolution value in the first MVD resolution set and a third semantic element indicating an MVD associated with the current block; as well as The MVD of the current block is reconstructed into its actual value based on the second semantic element and the third semantic element. 2 . The method of claim 1 , wherein the inter prediction mode comprises a normal non-merging inter prediction mode or an affine non-merging inter prediction mode.

3. The method according to any one of claims 1 to 2, wherein the first syntax element is signaled in a sequence parameter set, a picture parameter set, a slice header, a tile header or a block header.

4. The method of claim 1, wherein a corresponding MVD resolution set in the plurality of MVD resolution sets comprises an MVD resolution of 1 / 32 pixel, 1 / 16 pixel, 1 / 8 pixel, 1 / 4 pixel, 1 / 2 pixel, 1 pixel or 4 pixels.

5. The method of claim 1, wherein the plurality of MVD resolution sets are signaled at a partition level higher than the predefined partition level.

6. A computing device comprising: one or more processors; a memory coupled to the one or more processors; as well as A plurality of programs are stored in the memory, and when the plurality of programs are executed by the one or more processors, the computing device performs the method according to any one of claims 1 to 5.

7. A non-transitory computer-readable storage medium storing a plurality of programs for execution by a computing device having one or more processors, wherein the plurality of programs, when executed by the one or more processors, causes the computing device to perform the method according to any one of claims 1 to 5.

8. A method for calculating a control point motion vector CPMV for a current block in an affine inter-frame prediction mode, the method comprising: Receiving from a video bitstream a first syntax element indicating a first MVD resolution set of a plurality of motion vector difference MVD resolution sets, wherein the first MVD resolution set includes a plurality of MVD resolution values, each MVD resolution value corresponding to a respective CPMV of the current block; For each of the CPMVs associated with the current block: receiving from the video bitstream a second syntax element of the MVD indicating the CPMV; and The MVD of the CPMV is reconstructed into its actual value based on the first semantic element and the second semantic element.

9. The method according to claim 8, wherein when the affine inter-frame prediction mode is a 4-parameter mode, there are two MVD resolution values ​​for two CPMVs at the upper left corner and the upper right corner of the current block in the first MVD resolution set, and the MVD resolution value for the upper right corner is finer than the MVD resolution value for the upper left corner.

10. The method according to claim 8, wherein when the affine inter-frame prediction mode is a 6-parameter mode, there are three MVD resolution values ​​for three CPMVs at the upper left corner, upper right corner and lower left corner of the current block in the first MVD resolution set; and wherein the MVD resolution value for the upper right corner is finer than the MVD resolution value for the upper left corner, and wherein the MVD resolution value for the lower left corner is finer than the MVD resolution value for the upper left corner.

11. The method according to any one of claims 8 to 10, wherein the first MVD resolution set includes (1 / 4 pixel, 1 / 4 pixel, 1 / 4 pixel), (1 / 4 pixel, 1 / 8 pixel, 1 / 8 pixel) or (1 pixel, 1 / 4 pixel, 1 / 4 pixel).

12. A computing device comprising: one or more processors; a memory coupled to the one or more processors; as well as A plurality of programs are stored in the memory, and when the plurality of programs are executed by the one or more processors, the plurality of programs cause the computing device to perform the method according to any one of claims 8 to 11.

13. A non-transitory computer-readable storage medium storing a plurality of programs for execution by a computing device having one or more processors, wherein the plurality of programs, when executed by the one or more processors, cause the computing device to perform the method according to any one of claims 8 to 11.

14. A computer program product, comprising a plurality of programs, the plurality of programs being executed by an electronic device having one or more processors, wherein the plurality of programs, when executed by the one or more processors, causes the electronic device to perform a method according to any one of claims 1 to 5 or claims 8 to 11.

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