Dual clock source switching method and system

Abstract

The present application relates to a dual clock source switching method and system, the method comprising obtaining the operating environment parameters of the circuit board detected by the environmental detection circuit, detecting whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtaining the detection result; if the detection result is no, configuring the phase-locked loop circuit to switch and lock the first clock source; if the detection result is yes, configuring the phase-locked loop circuit to switch and lock the second clock source. The present application is used to solve the existing problem of manually switching the clock source.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a dual clock source switching method and system. Background Art

[0002] In communication networks, existing devices are usually designed with dual clock sources, but different clock sources are used in different scenarios. For example, when only a circuit board is in operation, the system clock is not required to be from the same source as the reference clock, but when the entire device is in operation, the system clock and the reference clock must be from the same source. However, during use, different configuration files need to be manually replaced according to different scenarios so that the corresponding scenarios correspond to the corresponding clock sources. However, this manual replacement of configuration files is cumbersome and time-consuming. Summary of the invention

[0003] The present application provides a dual clock source switching method and system to solve the existing problem of requiring manual switching of clock sources.

[0004] In a first aspect, the present application provides a dual clock source switching method, which is applied to a controller of a circuit board, wherein the circuit board is provided with an environment detection circuit for detecting its own operating environment, a first clock source, and a phase-locked loop circuit, the configuration port of the phase-locked loop circuit is connected to the controller, the circuit board can be pluggably installed on a host, the host is provided with a second clock source, the first clock source is used to provide a clock signal for the circuit board in a single-board operating state, the second clock source is used to provide a clock signal for the circuit board and the host in a whole machine operating state, the first clock source and the second clock source can both input clock signals to the phase-locked loop circuit, the method includes:

[0005] Acquire the operating environment parameters of the circuit board detected by the environment detection circuit, detect whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtain the detection result;

[0006] If the detection result is no, configuring the phase-locked loop circuit to switch and lock the first clock source;

[0007] If the detection result is yes, the phase-locked loop circuit is configured to switch and lock the second clock source.

[0008] Optionally, before acquiring the operating environment parameters of the circuit board detected by the environment detection circuit, the method further includes:

[0009] Pre-configuring the phase-locked loop circuit to lock the first clock source, and detecting a first parameter of a clock pulse signal output by the phase-locked loop circuit;

[0010] If it is determined that the first parameter of the output is the same as a parameter of the first clock source, it is determined that the phase-locked loop circuit has locked the first clock source.

[0011] Optionally, if the detection result is no, configuring the phase-locked loop circuit to switch and lock the first clock source includes:

[0012] If the detection result is no, configuring the phase-locked loop circuit to switch to the first clock source, and determining a second parameter of the clock pulse signal output by the phase-locked loop circuit;

[0013] Determine whether the second parameter output by the phase-locked loop circuit is the same as the parameter of the first clock source; if so, determine that the phase-locked loop circuit has switched and locked the first clock source; otherwise, reconfigure the phase-locked loop circuit to switch and lock the first clock source.

[0014] Optionally, the second parameter and the parameter of the first clock source include frequency and period jitter respectively;

[0015] Determining whether the second parameter output by the phase-locked loop circuit is the same as the parameter of the first clock source, and if so, determining that the phase-locked loop circuit has switched and locked the first clock source; otherwise, reconfiguring the phase-locked loop circuit to switch and lock the first clock source, including:

[0016] Determine whether the first frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the first clock source, and whether the first period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the first clock source;

[0017] If so, determining that the phase-locked loop circuit has switched and locked the first clock source;

[0018] Otherwise, the phase-locked loop circuit is reconfigured to switch and lock the first clock source.

[0019] Optionally, if the detection result is yes, configuring the phase-locked loop circuit to switch and lock the second clock source includes:

[0020] If the detection result is yes, configuring the phase-locked loop circuit to switch to the second clock source, and determining a third parameter of the clock pulse signal output by the phase-locked loop circuit;

[0021] Determine whether the third parameter output by the phase-locked loop circuit is the same as the parameter of the second clock source; if so, determine that the phase-locked loop circuit has switched and locked the second clock source; otherwise, reconfigure the phase-locked loop circuit to switch and lock the second clock source.

[0022] Optionally, the third parameter and the parameter of the second clock source include frequency and period jitter respectively;

[0023] Determining whether the third parameter output by the phase-locked loop circuit is the same as the parameter of the second clock source, and if so, determining that the phase-locked loop circuit has switched and locked the second clock source, and otherwise, reconfiguring the phase-locked loop circuit to switch and lock the second clock source, including:

[0024] Determine whether the second frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the second clock source, and whether the second period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the second clock source;

[0025] If so, determining that the phase-locked loop circuit has switched and locked the second clock source;

[0026] Otherwise, the phase-locked loop circuit is reconfigured to switch and lock the second clock source.

[0027] In a second aspect, the present application provides a dual clock source switching system, comprising:

[0028] A circuit board and a host, wherein the circuit board can be pluggably installed in the host;

[0029] The circuit board is provided with a controller, an environment detection circuit, a phase-locked loop circuit, and a first clock source; the host is provided with a second clock source; the configuration port of the phase-locked loop circuit is connected to the controller, the first clock source provides a clock signal for the circuit board in a single-board operation state, and inputs it into the phase-locked loop circuit; the second clock source provides a clock signal for the circuit board and the host in a whole-machine operation state, and inputs it into the phase-locked loop circuit;

[0030] The environment detection circuit is used to obtain the operating environment parameters of the circuit board and transmit the operating environment parameters to the controller;

[0031] The controller is used to obtain the operating environment parameters of the circuit board detected by the environment detection circuit, detect whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtain the detection result; if the detection result is no, configure the phase-locked loop circuit to switch and lock the first clock source; if the detection result is yes, configure the phase-locked loop circuit to switch and lock the second clock source;

[0032] The phase-locked loop circuit is used to switch and lock the first clock source according to the configuration of the controller, or to switch and lock the second clock source according to the configuration of the controller.

[0033] Optionally, the controller is also used to pre-configure the phase-locked loop circuit to lock the first clock source, and detect a first parameter of a clock pulse signal output by the phase-locked loop circuit; if it is determined that the first parameter of the output is the same as a parameter of the first clock source, then it is determined that the phase-locked loop circuit has locked the first clock source.

[0034] Optionally, the controller is specifically used to configure the phase-locked loop circuit to switch to the first clock source if the detection result is no, and determine the second parameter of the clock pulse signal output by the phase-locked loop circuit; determine whether the second parameter output by the phase-locked loop circuit is the same as the parameter of the first clock source, and if so, determine that the phase-locked loop circuit has switched and locked the first clock source; otherwise, reconfigure the phase-locked loop circuit to switch and lock the first clock source.

[0035] Optionally, the second parameter and the parameter of the first clock source include frequency and period jitter respectively;

[0036] The controller is specifically used to determine whether the first frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the first clock source, and whether the first period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the first clock source; if so, determine that the phase-locked loop circuit has switched and locked the first clock source; otherwise, reconfigure the phase-locked loop circuit to switch and lock the first clock source.

[0037] The above-mentioned technical scheme provided by the embodiment of the present application has the following advantages over the prior art: the method provided by the embodiment of the present application obtains the operating environment parameters of the circuit board detected by the environmental detection circuit, detects whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtains the detection result. If the detection result is no, the phase-locked loop circuit is configured to switch and lock the first clock source. If the detection result is yes, the phase-locked loop circuit is configured to switch and lock the second clock source. The present application automatically switches and locks the first clock source or the second clock source according to the detection result, thereby avoiding manual operation and improving work efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0040] Figure 1 This is a schematic diagram of the dual clock source switching method in an embodiment of the present application;

[0041] Figure 2 A schematic diagram of a process of pre-configuring a phase-locked loop circuit to lock a first clock source in an embodiment of the present application;

[0042] Figure 3 A schematic diagram of a process for configuring a phase-locked loop circuit to switch and lock a first clock source in an embodiment of the present application;

[0043] Figure 4 A schematic diagram of a flow chart of configuring a phase-locked loop circuit to switch and lock a second clock source in an embodiment of the present application;

[0044] Figure 5 This is a schematic diagram of a specific implementation of the dual clock source switching method in an embodiment of the present application;

[0045] Figure 6 This is a schematic diagram of the structure of a dual clock source switching system in an embodiment of the present application;

[0046] Figure 7 This is a schematic diagram of the circuit board structure in the embodiment of the present application;

[0047] Figure 8 This is a schematic diagram of the host structure in an embodiment of the present application. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0049] The first embodiment of the present application provides a dual clock source switching method, which is applied to a controller of a circuit board, wherein the circuit board is provided with an environment detection circuit for detecting its own operating environment, a first clock source, and a phase-locked loop circuit, the configuration port of the phase-locked loop circuit is connected to the controller, the circuit board can be pluggably installed on a host, the host is provided with a second clock source, the first clock source is used to provide a clock signal for the circuit board in a single-board operating state, the second clock source is used to provide a clock signal for the circuit board and the host in a whole-machine operating state, the first clock source and the second clock source can both input clock signals to the phase-locked loop circuit, specifically, the implementation of the method is as follows Figure 1 As shown:

[0050] Among them, the circuit board operation status in this application refers to the situation where the circuit board is not installed on the host and is in an operation state. The whole machine operation status in this application refers to the situation where the circuit board is installed on the host and both the circuit board and the host are in an operation state.

[0051] Step 101, obtaining the operating environment parameters of the circuit board detected by the environment detection circuit, detecting whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtaining the detection result.

[0052] The operation signal transmitted by the whole machine is a power-on signal of the whole machine or a trigger signal that the whole machine is about to start.

[0053] In a specific embodiment, before obtaining the operating environment parameters of the circuit board detected by the environment detection circuit, the controller needs to pre-configure the phase-locked loop circuit to lock the first clock source to ensure that the circuit board can operate normally, as shown in the following example. Figure 2 As shown:

[0054] Step 201: pre-configure a phase-locked loop circuit to lock a first clock source, and detect a first parameter of a clock pulse signal output by the phase-locked loop circuit.

[0055] Specifically, the first parameters of the clock pulse signal output by the phase-locked loop circuit include frequency and period jitter.

[0056] The controller may be a complex programmable logic device (CPLD), a microcontroller unit (MCU), a central processing unit (CPU), or the like.

[0057] Step 202: determine that the output first parameter is the same as the parameter of the first clock source, and then determine that the phase-locked loop circuit has locked the first clock source.

[0058] Specifically, the parameters of the first clock source include frequency and period jitter. When it is determined that the frequency of the first parameter is the same as the frequency of the parameter of the first clock source, and the period jitter of the first parameter is the same as the period jitter of the first clock source, it is determined that the phase-locked loop circuit has locked the first clock source. At this time, the circuit board can operate normally; otherwise, it is determined that the phase-locked loop circuit is unlocked, the output signal is abnormal, and the phase-locked loop circuit needs to be reconfigured to lock the first clock source until the circuit board can operate normally.

[0059] Step 102: If the detection result is no, configure the phase-locked loop circuit to switch and lock the first clock source.

[0060] In a specific embodiment, if the detection result is no, the specific implementation process of configuring the phase-locked loop circuit to switch and lock the first clock source is as follows: Figure 3 As shown:

[0061] Step 301: If the detection result is no, configure the phase-locked loop circuit to switch to the first clock source, and determine the second parameter of the clock pulse signal output by the phase-locked loop circuit.

[0062] Specifically, if the controller fails to obtain the operating parameters of the entire machine transmission through the environmental detection circuit, it configures the phase-locked loop circuit to switch to the first clock source, receives and determines the second parameters of the clock pulse signal of the first clock source output by the phase-locked loop circuit, and the second parameters include: the frequency and period jitter of the clock pulse signal.

[0063] Step 302, determine whether the second parameter output by the phase-locked loop circuit is the same as the parameter of the first clock source, if so, determine that the phase-locked loop circuit has switched and locked the first clock source, otherwise, reconfigure the phase-locked loop circuit to switch and lock the first clock source.

[0064] In a specific embodiment, the controller determines whether the first frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the first clock source, and whether the first period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the first clock source; if so, it is determined that the phase-locked loop circuit has switched and locked the first clock source, and the circuit board is operating normally at this time; otherwise, it is determined that the phase-locked loop circuit has lost lock, the output signal is abnormal, and the phase-locked loop circuit is reconfigured to switch and lock the first clock source until the circuit board can operate normally.

[0065] Step 103: If the detection result is yes, configure the phase-locked loop circuit to switch and lock the second clock source.

[0066] In a specific embodiment, if the detection result is yes, the specific implementation process of configuring the phase-locked loop circuit to switch and lock the second clock source is as follows: Figure 4 As shown:

[0067] Step 401: If the detection result is yes, configure the phase-locked loop circuit to switch to the second clock source, and determine the third parameter of the clock pulse signal output by the phase-locked loop circuit.

[0068] Specifically, the controller obtains the operating parameters of the entire machine transmission through the environmental detection circuit, and then configures the phase-locked loop circuit to switch to the second clock source, receives and determines the third parameter of the clock pulse signal of the second clock source output by the phase-locked loop circuit, and the third parameter includes: the frequency and period jitter of the clock pulse signal.

[0069] Step 402, determine whether the third parameter output by the phase-locked loop circuit is the same as the parameter of the second clock source, if so, determine that the phase-locked loop circuit has switched and locked the second clock source, otherwise, reconfigure the phase-locked loop circuit to switch and lock the second clock source.

[0070] In a specific embodiment, the controller determines whether the second frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the second clock source, and whether the second period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the second clock source; if so, it is determined that the phase-locked loop circuit has switched and locked the second clock source, and the circuit board and the whole machine use the second clock source together and operate normally; otherwise, it is determined that the phase-locked loop circuit is unlocked, the output signal is abnormal, and the phase-locked loop circuit is reconfigured to switch and lock the second clock source until the whole machine and the circuit board can operate normally.

[0071] Specifically, when the second frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the second clock source, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit is different from the period jitter of the second clock source, it is determined that the phase-locked loop circuit is unlocked, and an abnormal output signal prompt is given; or, when the second frequency of the clock pulse signal output by the phase-locked loop circuit is different from the frequency of the second clock source, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the second clock source, it is determined that the phase-locked loop circuit is unlocked, and an abnormal output signal prompt is given; or, when the second frequency of the clock pulse signal output by the phase-locked loop circuit is different from the frequency of the second clock source, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit is different from the period jitter of the second clock source, it is determined that the phase-locked loop circuit is unlocked, and an abnormal output signal prompt is given.

[0072] That is, if any one of the second frequency of the clock pulse signal output by the phase-locked loop circuit and the frequency of the second clock source, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit and the period jitter of the second clock source are different, or if both of them are different, it means that the clock pulse signal is invalid, then it is determined that the phase-locked loop circuit is unlocked, the output signal is abnormal, and the phase-locked loop circuit is reconfigured to switch and lock the second clock source until the entire machine and the circuit board can operate normally.

[0073] Specifically, through Figure 5 The following is an overall description of the dual clock source switching method:

[0074] Step 501: pre-configure a phase-locked loop circuit to lock a first clock source.

[0075] Step 502 , obtaining the operating environment parameters of the circuit board through the environmental detection circuit detection, and detecting whether the operating environment parameters include the operating parameters transmitted by the whole machine. If so, execute step 503 , otherwise, execute step 509 .

[0076] Step 503 , detect whether there is a clock pulse signal sent by the second clock source, if so, execute step 504 , otherwise, execute step 505 .

[0077] Step 504: configure the phase-locked loop circuit to lock the second clock source.

[0078] Step 505, prompting that the second clock source is invalid, and continuing detection.

[0079] Step 506, detecting whether the phase-locked loop circuit is in a locked state, if so, executing step 507, otherwise, executing step 508.

[0080] Step 507: the whole machine enters the running state.

[0081] Step 508, prompting that the phase-locked loop circuit is out of lock, and reconfiguring the second clock source.

[0082] Step 509 , detecting whether the phase-locked loop circuit is in a locked state, if so, executing step 510 , otherwise, executing step 511 .

[0083] Step 510, the circuit board enters the operating state.

[0084] Step 511, prompting that the phase-locked loop circuit is out of lock, and reconfiguring the first clock source.

[0085] The method provided in the embodiment of the present application obtains the operating environment parameters of the circuit board detected by the environmental detection circuit, detects whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtains the detection result. If the detection result is no, the phase-locked loop circuit is configured to switch and lock the first clock source. If the detection result is yes, the phase-locked loop circuit is configured to switch and lock the second clock source. The present application automatically switches and locks the first clock source or the second clock source according to the detection result, thereby avoiding manual operation and improving work efficiency.

[0086] The second embodiment of the present application provides a dual clock source switching system. The specific implementation of the system can refer to the description of the method embodiment part, and the repeated parts will not be repeated. Figure 6 As shown, the system includes: a circuit board 601 and a host 602 , and the circuit board 601 can be installed in the host 602 in a pluggable manner.

[0087] Specifically, Figure 7As shown, the circuit board 601 includes: a controller 701, an environment detection circuit 702, a phase-locked loop circuit 703 and a first clock source 704. The controller 701, the environment detection circuit 702, the phase-locked loop circuit 703 and the first clock source 704 are arranged on the circuit board 601. The configuration port of the phase-locked loop circuit 703 is connected to the controller 701. The first clock source 704 provides a clock signal for the circuit board 601 in the single-board running state, and inputs it to the phase-locked loop circuit 703. Figure 8 As shown, the host 602 is provided with a second clock source 801, which provides a clock signal for the circuit board 601 and the host 602 in the running state of the whole machine, and inputs the clock signal to the phase-locked loop circuit 703;

[0088] The environment detection circuit 702 is used to obtain the operating environment parameters of the circuit board 601 and transmit the operating environment parameters to the controller 701;

[0089] The controller 701 is used to obtain the operating environment parameters of the circuit board 601 detected by the environment detection circuit 702, detect whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtain the detection result; if the detection result is no, the phase-locked loop circuit 703 is configured to switch and lock the first clock source 704; if the detection result is yes, the phase-locked loop circuit 703 is configured to switch and lock the second clock source 801;

[0090] The phase-locked loop circuit 703 is used to switch and lock the first clock source 704 according to the configuration of the controller 701, or switch and lock the second clock source 801 according to the configuration of the controller.

[0091] In a specific embodiment, the controller 701 is also used to pre-configure the phase-locked loop circuit 703 to lock the first clock source 704, and detect the first parameter of the clock pulse signal output by the phase-locked loop circuit 703; if it is determined that the output first parameter is the same as the parameter of the first clock source 704, it is determined that the phase-locked loop circuit 703 has locked the first clock source 704.

[0092] In a specific embodiment, the controller 701 is specifically used to configure the phase-locked loop circuit 703 to switch to the first clock source 704 if the detection result is no, and determine the second parameter of the clock pulse signal output by the phase-locked loop circuit 703; determine whether the second parameter output by the phase-locked loop circuit 703 is the same as the parameter of the first clock source 704, if so, determine that the phase-locked loop circuit 703 has switched and locked the first clock source 704, otherwise, reconfigure the phase-locked loop circuit 703 to switch and lock the first clock source 704.

[0093] In a specific embodiment, the second parameter and the parameter of the first clock source 704 include frequency and period jitter respectively;

[0094] The controller 701 is specifically used to determine whether the first frequency of the clock pulse signal output by the phase-locked loop circuit 703 is the same as the frequency of the first clock source 704, and whether the first period jitter of the clock pulse signal output by the phase-locked loop circuit 703 is the same as the period jitter of the first clock source 704; if so, it is determined that the phase-locked loop circuit 703 has switched and locked the first clock source 704; otherwise, the phase-locked loop circuit 703 is reconfigured to switch and lock the first clock source 704.

[0095] Specifically, when the second frequency of the clock pulse signal output by the phase-locked loop circuit 703 is the same as the frequency of the second clock source 704, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit 703 is different from the period jitter of the second clock source 704, it is determined that the phase-locked loop circuit 703 is unlocked, and an abnormal output signal prompt is given; or, when the second frequency of the clock pulse signal output by the phase-locked loop circuit 703 is different from the frequency of the second clock source 704, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit 703 is the same as the period jitter of the second clock source 704, it is determined that the phase-locked loop circuit is unlocked, and an abnormal output signal prompt is given; or, when the second frequency of the clock pulse signal output by the phase-locked loop circuit 703 is different from the frequency of the second clock source 704, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit 703 is different from the period jitter of the second clock source 704, it is determined that the phase-locked loop circuit 703 is unlocked, and an abnormal output signal prompt is given.

[0096] That is, the second frequency of the clock pulse signal output by the phase-locked loop circuit 703 and the frequency of the second clock source 704, and the second period jitter of the clock pulse signal output by the phase-locked loop circuit 703 and the period jitter of the second clock source 704, if any one of these two conditions is different, or if both of them are different, it means that the clock pulse signal is invalid, then it is determined that the phase-locked loop circuit 703 is unlocked, the output signal is abnormal, and the phase-locked loop circuit 703 is reconfigured to switch and lock the second clock source until the entire machine and the circuit board 601 can operate normally.

[0097] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0098] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A dual clock source switching method, characterized in that: In a controller applied to a circuit board, wherein the circuit board is provided with an environment detection circuit for detecting its own operating environment, a first clock source, and a phase-locked loop circuit, the configuration port of the phase-locked loop circuit is connected to the controller, the circuit board can be pluggably installed on a host, the host is provided with a second clock source, the first clock source is used to provide a clock signal for the circuit board in a single-board operating state, the second clock source is used to provide a clock signal for the circuit board and the host in a whole machine operating state, the first clock source and the second clock source can both input clock signals to the phase-locked loop circuit, and the method comprises: Acquire the operating environment parameters of the circuit board detected by the environment detection circuit, detect whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtain the detection result; If the detection result is no, configuring the phase-locked loop circuit to switch and lock the first clock source; if the detection result is no, configuring the phase-locked loop circuit to switch and lock the first clock source includes: If the detection result is no, configuring the phase-locked loop circuit to switch to the first clock source, and determining a second parameter of the clock pulse signal output by the phase-locked loop circuit; Determining whether the second parameter output by the phase-locked loop circuit is the same as the parameter of the first clock source, and if so, determining that the phase-locked loop circuit has switched and locked the first clock source, otherwise, reconfiguring the phase-locked loop circuit to switch and lock the first clock source; the second parameter and the parameter of the first clock source respectively include frequency and period jitter; determining whether the second parameter output by the phase-locked loop circuit is the same as the parameter of the first clock source, and if so, determining that the phase-locked loop circuit has switched and locked the first clock source, otherwise, reconfiguring the phase-locked loop circuit to switch and lock the first clock source, including: Determine whether the first frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the first clock source, and whether the first period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the first clock source; If so, determining that the phase-locked loop circuit has switched and locked the first clock source; Otherwise, reconfigure the phase-locked loop circuit to switch and lock the first clock source; If the detection result is yes, configuring the phase-locked loop circuit to switch and lock the second clock source; if the detection result is yes, configuring the phase-locked loop circuit to switch and lock the second clock source includes: If the detection result is yes, configuring the phase-locked loop circuit to switch to the second clock source, and determining a third parameter of the clock pulse signal output by the phase-locked loop circuit; Determine whether the third parameter output by the phase-locked loop circuit is the same as the parameter of the second clock source, and if so, determine that the phase-locked loop circuit has switched and locked the second clock source, otherwise, reconfigure the phase-locked loop circuit to switch and lock the second clock source; The third parameter and the parameter of the second clock source include frequency and period jitter respectively; judging whether the third parameter output by the phase-locked loop circuit is the same as the parameter of the second clock source, and if so, determining that the phase-locked loop circuit has switched and locked the second clock source, otherwise, reconfiguring the phase-locked loop circuit to switch and lock the second clock source, comprising: Determine whether the second frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the second clock source, and whether the second period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the second clock source; If so, determining that the phase-locked loop circuit has switched and locked the second clock source; Otherwise, the phase-locked loop circuit is reconfigured to switch and lock the second clock source.

2. The dual clock source switching method according to claim 1, characterized in that: Before obtaining the operating environment parameters of the circuit board detected by the environment detection circuit, the method further includes: Pre-configuring the phase-locked loop circuit to lock the first clock source, and detecting a first parameter of a clock pulse signal output by the phase-locked loop circuit; If it is determined that the first parameter of the output is the same as a parameter of the first clock source, it is determined that the phase-locked loop circuit has locked the first clock source.

3. A dual clock source switching system, characterized in that: include: A circuit board and a host, wherein the circuit board can be pluggably installed in the host; The circuit board is provided with a controller, an environment detection circuit, a phase-locked loop circuit, and a first clock source; the host is provided with a second clock source; the configuration port of the phase-locked loop circuit is connected to the controller, and the first clock source provides a clock signal for the circuit board in a single-board running state and inputs it into the phase-locked loop circuit; The second clock source provides a clock signal for the circuit board and the host in the whole machine running state, and inputs the clock signal into the phase-locked loop circuit; The environment detection circuit is used to obtain the operating environment parameters of the circuit board and transmit the operating environment parameters to the controller; The controller is used to obtain the operating environment parameters of the circuit board detected by the environment detection circuit, detect whether the operating environment parameters contain the operating signal transmitted by the whole machine, and obtain the detection result; If the detection result is no, configuring the phase-locked loop circuit to switch and lock the first clock source; If the detection result is yes, configuring the phase-locked loop circuit to switch and lock the second clock source; The phase-locked loop circuit is used to switch and lock the first clock source according to the configuration of the controller, or to switch and lock the second clock source according to the configuration of the controller; the controller is also used to pre-configure the phase-locked loop circuit to lock the first clock source and detect a first parameter of a clock pulse signal output by the phase-locked loop circuit; Determining that the first parameter of the output is the same as the parameter of the first clock source, then determining that the phase-locked loop circuit has locked the first clock source; the controller is further specifically used to configure the phase-locked loop circuit to switch to the first clock source if the detection result is no, and determine the second parameter of the clock pulse signal output by the phase-locked loop circuit; judging whether the second parameter output by the phase-locked loop circuit is the same as the parameter of the first clock source, and if so, determining that the phase-locked loop circuit has switched and locked the first clock source, otherwise, reconfiguring the phase-locked loop circuit to switch and lock the first clock source; The second parameter and the parameter of the first clock source include frequency and period jitter respectively; The controller is further used to determine whether the first frequency of the clock pulse signal output by the phase-locked loop circuit is the same as the frequency of the first clock source, and whether the first period jitter of the clock pulse signal output by the phase-locked loop circuit is the same as the period jitter of the first clock source; If so, determining that the phase-locked loop circuit has switched and locked the first clock source; Otherwise, the phase-locked loop circuit is reconfigured to switch and lock the first clock source.

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