A single-ended to differential conversion circuit, control method and digital-to-analog converter

Abstract

This invention discloses a single-ended to differential conversion circuit, a control method, and a digital-to-analog converter (DAC), relating to the field of circuit design technology, to achieve synchronous control of a current switch, thereby significantly improving the dynamic performance of the DAC. The single-ended to differential conversion circuit includes: a first inverter, and a first branch, a second branch, and a third branch respectively coupled to the first inverter. The second branch includes two transmission circuits, each coupled to the third branch. The first inverter inverts the input signal to obtain an inverted input signal. The first branch obtains a first differential signal based on the inverted input signal. The third branch controls one of the transmission circuits to conduct based on the inverted input signal. The transmission circuit outputs a second differential signal based on the inverted input signal when in the conducting state. The control method is executed by the single-ended to differential conversion circuit described above. The method provided by this invention is used to achieve synchronous control of a current switch.

Description

Technical Field

[0001] This invention relates to the field of circuit design technology, and in particular to a single-ended to differential conversion circuit, a control method, and a digital-to-analog converter. Background Technology

[0002] With the increasing demands for information capacity and throughput in modern society, electronic systems are placing higher requirements on data transmission rates. As the key to converting digital signals into analog signals, ultra-high-speed digital-analog converters (DACs) have increasingly broad application prospects in broadband wireless communication, fiber optic communication, measurement and control instruments, and radar and electronic countermeasures.

[0003] Currently, DACs typically include current-steering DACs. A current-steering DAC usually consists of a set of weighted current sources and corresponding current switches. The input digital signal guides the current weighting and summarizing to form an analog signal output by controlling the conduction and shutdown of the current switches. The current switches are usually composed of a set of differential pair transistors. The current switches require the input signal to be a differential signal. In current-steering DACs, the input signal to the current switches is usually made differential by a single-ended to single-ended to differential conversion circuit.

[0004] Traditional single-ended to differential conversion circuits consist of two branches, each with an even number of inverters and an odd number of inverters. One branch is an inverter chain, while the other uses a normally open transmission gate instead of an inverter. The purpose of the transmission gate is to cancel the time delay caused by the inverter, so that two output signals with opposite phases are obtained from the two branches, which are only used to drive the current switch.

[0005] However, due to structural differences, the output signal obtained from one branch after passing through the transmission gate and the output signal obtained from the other branch have timing offsets and transition edge differences, which makes it impossible to control the current switch synchronously. Furthermore, this leads to a significant reduction in the dynamic performance of the DAC. Summary of the Invention

[0006] The purpose of this invention is to provide a single-ended to differential conversion circuit, a control method, and a digital-to-analog converter to solve the problem that the current switch cannot be controlled synchronously, which further leads to a significant reduction in the dynamic performance of the digital-to-analog converter.

[0007] In a first aspect, the present invention provides a single-ended to differential conversion circuit, comprising: a first inverter, and a first branch, a second branch and a third branch respectively coupled to the first inverter, wherein the second branch includes two transmission circuits both coupled to the third branch;

[0008] The first inverter is used to invert the input signal to obtain an inverted input signal;

[0009] The first branch is used to obtain a first differential signal based on the inverted input signal;

[0010] The third branch is used to control one of the transmission circuits to turn on according to the inverted input signal;

[0011] The transmission circuit is used to output a second differential signal according to the inverted input signal when it is in the on state.

[0012] With the above technical solution, the single-ended to differential conversion circuit introduces a third branch and a second circuit including two transmission circuits. The third branch controls one of the transmission circuits to conduct according to the inverted input signal. The transmission circuit can output a second differential signal according to the inverted input signal when it is in the conducting state. The first differential signal obtained by the first branch and the second differential signal are inverted signals, so that the single-ended to differential conversion circuit has a unit differential conversion function. Since one of the transmission circuits is controlled to conduct while the other transmission circuit is in a pre-determined off state, that is, controlling an independent transmission circuit to output a second differential signal, the timing of the obtained second differential signal and the first differential signal obtained by the first branch are precisely aligned, so that synchronous control of the current switch can be achieved, further improving the dynamic performance of the digital-to-analog converter.

[0013] In one possible implementation, the third branch includes a coupled inverting circuit and a potential adjustment circuit; each transmission circuit includes a first control device and a second control device connected in series, one end of the first control device is connected to the output of the first inverter, the other end of the first control device is connected to the inverting circuit, one end of the second control device is connected to the inverting circuit, and the other end of the second control device is connected to the potential adjustment circuit; the inverting circuit is used to obtain a control signal based on the inverted input signal to control the first control device included in one of the transmission circuits to turn off, and the first control device included in the other transmission circuit to turn off;

[0014] The potential adjustment circuit is used to adjust the control terminal potential of the corresponding second control device of the first control device in the off state according to the control signal, so that the corresponding second control device of the first control device in the off state is turned on.

[0015] In one possible implementation, the first controller and the second controller have opposite polarities; wherein,

[0016] The first control devices included in the two transmission circuits have different polarities, and the second control devices included in the two transmission circuits have different polarities.

[0017] In one possible implementation, the inverting circuit includes a second inverter for obtaining a control signal based on the inverted input signal.

[0018] In one possible implementation, the potential adjustment circuit includes a first adjustment sub-circuit and a second adjustment sub-circuit. The control terminal of the first adjustment sub-circuit is connected to the control terminal of the first control device in the corresponding transmission circuit, and the output terminal of the first adjustment sub-circuit is connected to the control terminal of the second control device. The control terminal of the second adjustment sub-circuit is connected to the control terminal of the first control device in the corresponding transmission circuit, and the output terminal of the first adjustment sub-circuit is connected to the control terminal of the second control device.

[0019] In one possible implementation, the second control device in the transmission circuit to which the first regulating sub-circuit is connected has the same polarity as the first regulating sub-circuit.

[0020] The second control device in the transmission circuit connected to the second regulating sub-circuit has the same polarity as the second regulating sub-circuit.

[0021] In one possible implementation, the first branch comprises an even number of inverters connected in series.

[0022] In a second aspect, the present invention also provides a control method applied to the single-ended to differential conversion circuit described in the first aspect, the method comprising:

[0023] The first inverter inverts the input signal to obtain an inverted input signal.

[0024] The first branch obtains the first differential signal based on the inverted input signal;

[0025] The third branch controls one of the transmission circuits to be turned on according to the inverted input signal;

[0026] The transmission circuit is used to output a second differential signal according to the inverted input signal when it is in the on state.

[0027] In one possible implementation, the third branch includes a coupled inverting circuit and a potential adjustment circuit, wherein the third branch controls one of the transmission circuits to conduct according to the inverted input signal, including:

[0028] The inverting circuit obtains a control signal based on the inverted input signal, and controls the first control device included in one of the transmission circuits to turn off, and the first control device included in the other transmission circuit to turn off;

[0029] The potential adjustment circuit adjusts the control terminal potential of the corresponding second control device of the first control device in the off state according to the control signal, so that the corresponding second control device of the first control device in the off state is turned on.

[0030] The beneficial effects of the control method provided in the second aspect are the same as those of the single-ended to differential conversion circuit described in the first aspect or any possible implementation of the first aspect, and will not be repeated here.

[0031] Thirdly, the present invention also provides a digital-to-analog converter, including the single-ended to differential conversion circuit described in any one of the first aspects.

[0032] The advantages of the digital-to-analog converter provided in the third aspect are the same as those of the single-ended to differential conversion circuit described in the first aspect or any possible implementation of the first aspect, and will not be repeated here. Attached Figure Description

[0033] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0034] Figure 1 A circuit diagram of a conventional single-ended to differential converter circuit is shown.

[0035] Figure 2 A circuit diagram of a single-ended to differential conversion circuit according to an embodiment of the present invention is shown;

[0036] Figure 3 A circuit diagram of another single-ended to differential conversion circuit provided in an embodiment of this application is shown;

[0037] Figure 4 A circuit diagram of yet another single-ended to differential conversion circuit provided in an embodiment of this application is shown;

[0038] Figure 5 A circuit diagram of another single-ended to differential conversion circuit provided in an embodiment of this application is shown;

[0039] Figure 6 A simulation diagram of a single-ended to differential conversion circuit provided in an embodiment of this application is shown;

[0040] Figure 7A flowchart illustrating a control method provided in an embodiment of this application is shown;

[0041] Figure 8 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0042] To facilitate a clear description of the technical solutions in the embodiments of the present invention, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. For example, the first threshold and the second threshold are merely used to distinguish different thresholds and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that the terms "first" and "second" are not necessarily different.

[0043] It should be noted that in this invention, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0044] In this invention, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c, where a, b, and c can be single or multiple.

[0045] Figure 1 The diagram shows a conventional single-ended to differential converter circuit, such as... Figure 1As shown, a traditional single-ended to differential converter circuit includes a first branch 01 and a second branch 02. The first branch 01 includes a first inverter 011, and the second branch 02 includes a coupled transmission gate 021 and a second branch inverter 022. In a traditional single-ended to differential converter circuit, the gate of the N-type metal-oxide-semiconductor (NMOS) transistor in the transmission gate is always connected to a high potential, and the gate of the P-type metal-oxide-semiconductor (PMOS) transistor is always connected to ground. Therefore, within the range of the transmission gate's turn-on voltage, both the NMOS and PMOS transistors are always turned on simultaneously. Figure 1 In the single-ended to differential converter circuit shown, the charging and discharging process of node Y1 is directly completed by the PMOS and NMOS transistors of the inverter. However, the charging and discharging process of node Y2 is related not only to the transmission gate but also to the preceding circuitry. Therefore, in traditional single-ended to differential converter circuits, the transmission gate in the second branch needs to be larger to ensure that it achieves the same delay effect as the inverter in the first branch and has sufficient driving capability to drive the inverter. However, parasitic requirements and layout constraints limit the size of the transmission gate, making it difficult for the transmission gate in the second branch to achieve the same delay effect as the inverter in the first branch. Furthermore, in traditional single-ended to differential converter circuits, to ensure that the rise time and fall time of the signal transition are equal, each branch needs to have equal charging and discharging speeds. For node Y1, this can be adjusted by changing the size ratio of the inverter, but for node Y2, this is difficult to guarantee, leading to asymmetry in the rise and fall times of the transmission gate signal. This results in asynchronous control of the current switch, and further, significantly reduces the dynamic performance of the DAC.

[0046] Figure 2 The diagram shows a circuit schematic of a single-ended to differential conversion circuit according to an embodiment of the present invention, as shown below. Figure 2 As shown, the single-ended to differential conversion circuit includes: a first inverter 101, and a first branch 102, a second branch 103 and a third branch 104 respectively coupled to the first inverter 101, wherein the second branch 103 includes two transmission circuits 1031 that are both coupled to the third branch 104.

[0047] The first inverter 101 is used to invert the input signal to obtain an inverted input signal; the first branch 102 is used to obtain a first differential signal based on the inverted input signal; the third branch 104 is used to control one of the transmission circuits to be turned on based on the inverted input signal; and the transmission circuit 1031 is used to output a second differential signal based on the inverted input signal when it is turned on.

[0048] In summary, this single-ended to differential converter circuit introduces a third branch and a second circuit comprising two transmission circuits. The third branch controls one of the transmission circuits to conduct based on the inverted input signal. The transmission circuit, in its conducting state, outputs a second differential signal based on the inverted input signal. The first differential signal obtained by the first branch and the second differential signal are inverted signals, enabling the single-ended to differential converter circuit to perform unit differential conversion. Since only one transmission circuit is controlled to conduct while the other is in a pre-determined off state, it effectively controls an independent transmission circuit to output the second differential signal. This ensures precise timing alignment between the obtained second differential signal and the first differential signal obtained by the first branch, enabling synchronous control of the current switch and further improving the dynamic performance of the digital-to-analog converter.

[0049] Optional, Figure 3 This paper illustrates a circuit diagram of another single-ended to differential conversion circuit provided in an embodiment of this application, as shown below. Figure 3 As shown, the third branch 104 includes a coupled inverting circuit 1041 and a potential adjustment circuit 1042; each transmission circuit 1031 includes a first control device 1031a and a second control device 1031b connected in series. One end of the first control device 1031a is connected to the output terminal of the first inverter 101, and the other end of the first control device 1031a is connected to the inverting circuit 1041. One end of the second control device 1031b is connected to the inverting circuit 1041, and the other end of the second control device 1031b is connected to the potential adjustment circuit 1042.

[0050] Optionally, the inverting circuit 1041 is used to obtain a control signal based on the inverted input signal, and control the first control device 1031a included in one of the transmission circuits 1031 to be in the on state, and the first control device 1031a included in the other transmission circuit 1031 to be turned off.

[0051] Optionally, the potential adjustment circuit 1042 is used to adjust the control terminal potential of the corresponding second control device 1031b of the first control device 1031a in the off state according to the control signal, so that the corresponding second control device 1031b of the first control device 1031a in the off state is turned on.

[0052] In this application, the single-ended to differential conversion circuit enables only one controller to be driven at a time, thus eliminating the need for a large controller size to ensure switching speed and driving capability, and facilitating the achievement of a delay equal to that of the first branch.

[0053] Optionally, the first control device 1031a and the second control device 1031b have opposite polarities; wherein the first control device 1031a included in the two transmission circuits 1031 has different polarities, and the second control device 1031b included in the two transmission circuits 1031 has different polarities.

[0054] Optional, Figure 4 This application provides a circuit diagram of another single-ended to differential conversion circuit, as illustrated in the embodiment of the present application. Figure 4 As shown, the inverter circuit 1041 includes a second inverter 1041a, which is used to obtain a control signal based on the inverted input signal.

[0055] Optional, see Figure 4 The potential adjustment circuit 1042 includes a first adjustment sub-circuit 1042a and a second adjustment sub-circuit 1042b. The control terminal of the first adjustment sub-circuit 1042a is connected to the control terminal of the first control device 1031a of the corresponding transmission circuit 1031, and the output terminal of the first adjustment sub-circuit 1042a is connected to the control terminal of the second control device 1031b. The control terminal of the second adjustment sub-circuit 1042b is connected to the control terminal of the first control device 1031a of the corresponding transmission circuit 1031, and the output terminal of the first adjustment sub-circuit 1042a is connected to the control terminal of the second control device 1031b.

[0056] Optional, see Figure 4 The second control device 1031b in the transmission circuit 1031 connected to the first regulating sub-circuit 1042a has the same polarity as the first regulating sub-circuit 1042a.

[0057] The second control device 1031b in the transmission circuit 1031, which is connected to the second regulating sub-circuit 1042b, has the same polarity as the second regulating sub-circuit 1042b.

[0058] Among them, the potential adjustment circuit 1042 can ensure the normal operation of the subsequent inverter. The potential adjustment circuit always has one adjustment sub-circuit on and the other adjustment sub-circuit off.

[0059] Optional, see Figure 4 The first branch 102 includes an even number of inverters 1021 connected in series.

[0060] Example, Figure 5 This application provides a schematic diagram of another single-ended to differential conversion circuit according to an embodiment of the present application. Figure 5As shown, the first control device includes a fifth P transistor and a fifth N transistor, the second control device includes a sixth P transistor and a sixth N transistor, the inverting circuit includes a fourth P transistor and a fourth N transistor, the first regulating sub-circuit includes a seventh P transistor, and the second regulating sub-circuit includes a seventh N transistor.

[0061] In this configuration, the source of the fifth N transistor is connected to the gate of the sixth P transistor; the source of the fifth P transistor is connected to the gate of the sixth N transistor.

[0062] The sources of both the fourth P transistor and the fourth N transistor are connected to the gate of the seventh N transistor.

[0063] The gates of the fifth P transistor, the fifth N transistor, the seventh N transistor, and the seventh transistor are connected.

[0064] For example, see Figure 5 In the case where the first branch includes two inverters, that is, one inverter consisting of a second P transistor and a second N transistor, and another inverter consisting of a third P transistor and a third N transistor, and the first inverter includes a first P transistor and a first N transistor.

[0065] The gate of the second P transistor and the gate of the second N transistor are connected to the drain of the first P transistor and the drain of the first N transistor in the first inverter.

[0066] The drains of the second P transistor and the second N transistor are connected to the gates of the third P transistor and the third N transistor.

[0067] The drain of the third P transistor is connected to the drain of the third N transistor.

[0068] For example, see Figure 5 When the input signal D is high, the potential at node X1 becomes low after passing through the first inverter. For the first branch, the potential at node X2 is inversely related to that of X1 and is high, while the output terminal OP is inversely related to that of X2 and is low.

[0069] For the third branch, the potentials of node X5 and X1 are out of phase and are at a high level. The potential of X5 also serves as the gate voltage of NM7 and PM7 to control the conduction and turn-off of NM7 and PM7. Since X5 is at a high level at this time, NM7 is in the conducting state and PM7 is in the turn-off state.

[0070] For the second branch, the potential of X5 also serves as the gate voltage of NM5 and PM5 to control the on / off state of NM5 and PM5. Since X5 is high at this time, NM5 is in the on state and PM5 is in the off state.

[0071] When NM5 is in the ON state, the signal from node X1 is transmitted to node X3, and X3 is at a low level, which controls PM6 to be turned on.

[0072] With NM7 in the ON state, node X4 is at a low level, and therefore NM6 is in the OFF state.

[0073] In summary, when PM6 is turned on and NM6 is turned off, the ON output will become high, which is the opposite of the low output from the OP terminal.

[0074] For another example, see Figure 5 When the input signal D is low, the potential at node X1 becomes high after passing through the first inverter. For the first branch, the potential at node X2 is inversely related to that of X1 and is low, while the output terminal OP is inversely related to the potential of X2 and is high.

[0075] For the third branch, the potentials of node X5 and X1 are out of phase and are at a low level. The potential of X5 also serves as the gate voltage of NM7 and PM7 to control the conduction and turn-off of NM7 and PM7. Since X5 is at a low level at this time, NM7 is in the off state and PM7 is in the on state.

[0076] For the second branch, the potential of X5 also serves as the gate voltage of NM5 and PM5 to control the on / off state of NM5 and PM5. Since X5 is low at this time, NM5 is in the off state and PM5 is in the on state.

[0077] When PM5 is in the ON state, the signal from node X1 is transmitted to node X3, and X3 is at a high level, which controls NM6 to be ON.

[0078] PM7 is in the ON state, so node X4 is at a high level, and therefore PM6 is in the OFF state.

[0079] In summary, when PM6 is off and NM6 is on, the ON output will become low, which is the opposite of the high level output from the OP terminal.

[0080] As can be seen from the two examples above, this single-ended to differential conversion circuit has a single-ended differential conversion function.

[0081] In the embodiments of this application, see Figure 5Taking a high-level input signal D as an example, NM5 and PM7 are simultaneously turned on. Node X3 is charged through NM5, while node X4 is discharged through NM7. Therefore, for the transmission gate switch (NM5 / PM5), which are the two first control devices in this application, the load that needs to be driven each time is only one transistor. This ensures that the transistor size does not need to be too large to guarantee the switching speed and driving capability, thus facilitating the achievement of a delay equal to that of the inverter. Furthermore, the charging and discharging processes of nodes X3 and X4 at the same time are relatively independent, so by adjusting the size of each transistor in the circuit, it is easy to achieve approximately equal transition times.

[0082] Example, Figure 6 This paper illustrates a simulation diagram of a single-ended to differential conversion circuit according to an embodiment of this application. Figure 6 As shown, the first line is the input signal, the second line is the output OP signal, and the third line is the output ON signal. Each curve alternates between high (1) and low (0) levels. However, the transition between high and low levels takes a certain amount of time. Therefore, please refer to [the diagram]. Figure 6 The lines connecting the high and low points in the diagram are slightly slanted. The lines from low to high represent rising edges, and the lines from high to low represent falling edges; together, these are called transition edges. Figure 6 It can be seen that setting the data transmission rate of the input signal to 50 megabits (Gbps) can also achieve good differential output results.

[0083] In summary, this single-ended to differential converter circuit introduces a third branch and a second circuit comprising two transmission circuits. The third branch controls one of the transmission circuits to conduct based on the inverted input signal. The transmission circuit, in its conducting state, outputs a second differential signal based on the inverted input signal. The first differential signal obtained by the first branch and the second differential signal are inverted signals, enabling the single-ended to differential converter circuit to perform unit differential conversion. Since only one transmission circuit is controlled to conduct while the other is in a pre-determined off state, it effectively controls an independent transmission circuit to output the second differential signal. This ensures precise timing alignment between the obtained second differential signal and the first differential signal obtained by the first branch, enabling synchronous control of the current switch and further improving the dynamic performance of the digital-to-analog converter.

[0084] Figure 7 This illustration shows a flowchart of a control method provided in an embodiment of this application, applied to the aforementioned single-ended to differential conversion circuit, such as... Figure 7 As shown, the method includes:

[0085] Step 201: The first inverter inverts the input signal to obtain an inverted input signal.

[0086] The function of the first inverter is to reverse the phase of the input signal by 180 degrees. When the phase of the input signal is high, the output level of the inverter is low, and when the phase of the input signal is low, the output level of the inverter is high.

[0087] After the first inverter inverts the input signal to obtain an inverted input signal, step 202 is executed.

[0088] Step 202: The first branch obtains the first differential signal based on the inverted input signal.

[0089] The first branch may include an even number of inverters. In this application embodiment, the specific number of inverters is not limited and can be adjusted according to the actual application scenario.

[0090] An inverter's function is to reverse the phase of an input signal by 180 degrees. When the input signal is at a high level, the output level of an inverter is low, and when the input signal is at a low level, the output level of an inverter is high.

[0091] The first differential signal can then be obtained through the first branch.

[0092] After the first branch obtains the first differential signal based on the inverted input signal, step 203 is executed.

[0093] Step 203: The third branch controls one of the transmission circuits to turn on based on the inverted input signal.

[0094] Specifically, the inverting circuit in the third branch obtains a control signal based on the inverted input signal, which controls the first control device in one of the transmission circuits to be in the on state, and the first control device in the other transmission circuit to be turned off.

[0095] Then, the potential adjustment circuit in the third branch adjusts the control terminal potential of the corresponding second control device of the first control device in the off state according to the control signal, so that the corresponding second control device of the first control device in the off state is turned on.

[0096] In this application, the single-ended to differential conversion circuit enables only one controller to be driven at a time, thus eliminating the need for a large controller size to ensure switching speed and driving capability, and facilitating the achievement of a delay equal to that of the first branch.

[0097] After the third branch controls one of the transmission circuits to be turned on according to the reverse input signal, step 204 is executed.

[0098] Step 204: The transmission circuit is used to output a second differential signal based on the inverted input signal in the on state.

[0099] In summary, this single-ended to differential converter circuit, by introducing a third branch and a second circuit including two transmission circuits, enables the third branch to control one of the transmission circuits to conduct based on the inverted input signal. The transmission circuit can then output a second differential signal based on the inverted input signal while in the conducting state. The first differential signal obtained by the first branch and the second differential signal are inverted signals, giving the single-ended to differential converter circuit a unit differential conversion function. Since only one transmission circuit is controlled to conduct while the other is in a pre-determined off state, it effectively controls an independent transmission circuit to output the second differential signal. This ensures precise timing alignment between the obtained second differential signal and the first differential signal obtained by the first branch, enabling synchronous control of the current switch and further improving the dynamic performance of the digital-to-analog converter.

[0100] For example, see Figure 5 When the input signal D is high, the potential at node X1 becomes low after passing through the first inverter. For the first branch, the potential at node X2 is inversely related to that of X1 and is high, while the output terminal OP is inversely related to that of X2 and is low.

[0101] For the third branch, the potentials of node X5 and X1 are out of phase and are at a high level. The potential of X5 also serves as the gate voltage of NM7 and PM7 to control the conduction and turn-off of NM7 and PM7. Since X5 is at a high level at this time, NM7 is in the conducting state and PM7 is in the turn-off state.

[0102] For the second branch, the potential of X5 also serves as the gate voltage of NM5 and PM5 to control the on / off state of NM5 and PM5. Since X5 is high at this time, NM5 is in the on state and PM5 is in the off state.

[0103] When NM5 is in the ON state, the signal from node X1 is transmitted to node X3, and X3 is at a low level, which controls PM6 to be turned on.

[0104] With NM7 in the ON state, node X4 is at a low level, and therefore NM6 is in the OFF state.

[0105] In summary, when PM6 is turned on and NM6 is turned off, the ON output will become high, which is the opposite of the low output from the OP terminal.

[0106] For another example, see Figure 5When the input signal D is low, the potential at node X1 becomes high after passing through the first inverter. For the first branch, the potential at node X2 is inversely related to that of X1 and is low, while the output terminal OP is inversely related to the potential of X2 and is high.

[0107] For the third branch, the potentials of node X5 and X1 are out of phase and are at a low level. The potential of X5 also serves as the gate voltage of NM7 and PM7 to control the conduction and turn-off of NM7 and PM7. Since X5 is at a low level at this time, NM7 is in the off state and PM7 is in the on state.

[0108] For the second branch, the potential of X5 also serves as the gate voltage of NM5 and PM5 to control the on / off state of NM5 and PM5. Since X5 is low at this time, NM5 is in the off state and PM5 is in the on state.

[0109] When PM5 is in the ON state, the signal from node X1 is transmitted to node X3, and X3 is at a high level, which controls NM6 to be ON.

[0110] PM7 is in the ON state, so node X4 is at a high level, and therefore PM6 is in the OFF state.

[0111] In summary, when PM6 is off and NM6 is on, the ON output will become low, which is the opposite of the high level output from the OP terminal.

[0112] This invention also provides a digital-to-analog converter, including the single-ended to differential conversion circuit provided in the above embodiments.

[0113] Compared with the prior art, the beneficial effects of the digital-to-analog converter provided in the embodiments of the present invention are the same as those of the single-ended to differential conversion circuit provided in the above embodiments, and will not be repeated here.

[0114] Figure 8 A schematic diagram of the hardware structure of an electronic device according to an embodiment of the present invention is shown. Figure 8 As shown, the electronic device 300 includes a processor 310 and a digital-to-analog converter.

[0115] like Figure 8 As shown, the processor 310 described above can be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits used to control the execution of the program of the present invention.

[0116] like Figure 8As shown, the electronic device 300 may further include a communication line 340. The communication line 340 may include a path for transmitting information between the components.

[0117] Optional, such as Figure 8 As shown, the above-described electronic device may further include a communication interface 320. There may be one or more communication interfaces 320. The communication interface 320 can use any transceiver-like device for communicating with other devices or communication networks.

[0118] Optional, such as Figure 8 As shown, the electronic device may further include a memory 330. The memory 330 stores computer execution instructions for implementing the present invention, and its execution is controlled by a processor. The processor executes the computer execution instructions stored in the memory to implement the method provided in the embodiments of the present invention.

[0119] like Figure 8 As shown, memory 330 can be read-only memory (ROM) or other types of static storage devices capable of storing static information and instructions, random access memory (RAM) or other types of dynamic storage devices capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. Memory 330 can exist independently and be connected to processor 310 via communication line 340. Memory 330 can also be integrated with processor 310.

[0120] Optionally, the computer execution instructions in the embodiments of the present invention may also be referred to as application code, and the embodiments of the present invention do not specifically limit this.

[0121] In a specific implementation, as one example, such as Figure 8 As shown, processor 310 may include one or more CPUs, such as Figure 8 CPU0 and CPU1 in the CPU.

[0122] In a specific implementation, as one example, such as Figure 8 As shown, the terminal device may include multiple processors, such as Figure 8 The processors 310 and 350 are included. Each of these processors can be a single-core processor or a multi-core processor.

[0123] On the one hand, a computer-readable storage medium is provided, which stores instructions that, when executed, implement the functions performed by the terminal device in the above embodiments.

[0124] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present invention are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video disc (DVD); or it can be a semiconductor medium, such as a solid-state drive (SSD).

[0125] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, the disclosure, and the appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0126] Although the invention has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made therein without departing from the spirit and scope of the invention. Accordingly, this specification and drawings are merely exemplary descriptions of the invention as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. Clearly, those skilled in the art can make various alterations and modifications to the invention without departing from its spirit and scope. Thus, if such modifications and modifications of the invention fall within the scope of the claims and their equivalents, the invention is also intended to include such modifications and modifications.

Claims

1. A single-ended to differential conversion circuit, characterized in that, include: The first inverter, and a first branch, a second branch and a third branch respectively coupled to the first inverter, wherein the second branch includes two transmission circuits both coupled to the third branch; The first inverter is used to invert the input signal to obtain an inverted input signal; The first branch is used to obtain a first differential signal based on the inverted input signal; The third branch is used to control one of the transmission circuits to turn on according to the inverted input signal; The transmission circuit is used to output a second differential signal according to the inverted input signal in the on state; The third branch includes a coupled inverting circuit and a potential adjustment circuit; each of the transmission circuits includes a first controller and a second controller connected in series. One end of the first control device is connected to the output terminal of the first inverter, and the other end of the first control device is connected to the inverting circuit. One end of the second control device is connected to the inverting circuit, and the other end of the second control device is connected to the potential adjustment circuit. The inverting circuit is used to obtain a control signal based on the inverted input signal, and control one of the first control devices in the transmission circuit to turn off, and the other of the first control devices in the transmission circuit to turn off. The potential adjustment circuit is used to adjust the control terminal potential of the corresponding second control device of the first control device in the off state according to the control signal, so that the corresponding second control device of the first control device in the off state is turned on.

2. The single-ended to differential conversion circuit according to claim 1, characterized in that, The first control device and the second control device have opposite polarities; wherein, the first control devices included in the two transmission circuits have different polarities, and the second control devices included in the two transmission circuits have different polarities.

3. The single-ended to differential conversion circuit according to claim 1, characterized in that, The inverting circuit includes a second inverter, which is used to obtain a control signal based on the inverted input signal.

4. The single-ended to differential conversion circuit according to claim 1, characterized in that, The potential adjustment circuit includes a first adjustment sub-circuit and a second adjustment sub-circuit. The control terminal of the first adjustment sub-circuit is connected to the control terminal of the first control device in the corresponding transmission circuit, and the output terminal of the first adjustment sub-circuit is connected to the control terminal of the second control device. The control terminal of the second adjustment sub-circuit is connected to the control terminal of the first control device in the corresponding transmission circuit, and the output terminal of the first adjustment sub-circuit is connected to the control terminal of the second control device.

5. The single-ended to differential conversion circuit according to claim 4, characterized in that, The second control device in the transmission circuit connected to the first adjustment sub-circuit has the same polarity as the first adjustment sub-circuit; The second control device in the transmission circuit connected to the second regulating sub-circuit has the same polarity as the second regulating sub-circuit.

6. The single-ended to differential conversion circuit according to any one of claims 1 to 5, characterized in that, The first branch includes an even number of inverters connected in series.

7. A control method, characterized in that, The method, applied to the single-ended to differential conversion circuit of claim 1, comprises: The first inverter inverts the input signal to obtain an inverted input signal. The first branch obtains the first differential signal based on the inverted input signal; The third branch controls one of the transmission circuits to be turned on according to the inverted input signal; the transmission circuit is used to output a second differential signal according to the inverted input signal when it is turned on.

8. The method according to claim 7, characterized in that, The third branch includes a coupled inverting circuit and a potential adjustment circuit. The third branch controls one of the transmission circuits to conduct according to the inverting input signal, including: The inverting circuit obtains a control signal based on the inverted input signal, and controls the first control device included in one of the transmission circuits to turn off, and the first control device included in the other transmission circuit to turn off; The potential adjustment circuit adjusts the control terminal potential of the corresponding second control device of the first control device in the off state according to the control signal, so that the corresponding second control device of the first control device in the off state is turned on.

9. A digital-to-analog converter, characterized in that, Includes the single-ended to differential conversion circuit as described in any one of claims 1 to 6.

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