Data processing method and device based on solid state disk
By automatically storing and retrieving abnormal data in the flash memory of the solid-state drive, the problems of complex operation and easy data loss in the prior art are solved, and the operation is simplified and the data reliability is improved.
Patent Information
- Application Number
- CN202111555075.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-17
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2041-12-17
AI Technical Summary
The existing technology for obtaining real-time data on abnormal multi-core processors of solid-state drives is complex and prone to data loss, especially when the problem occurs intermittently and is difficult to recover after power failure or restart.
Abnormal data is automatically stored in the flash memory of the solid-state drive and retrieved through a preset interface, simplifying the operation process and preventing data loss.
It simplifies operations, automatically stores abnormal on-site data, avoids data loss, and improves the reliability of data acquisition.
Smart Images

Figure CN114327972B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of solid-state drive (SSD) data processing technology, and more specifically, to a data processing method and apparatus based on a solid-state drive. Background Technology
[0002] When a multi-core processor on a Solid State Disk (SSD) malfunctions, we need to obtain the CPU state at the point of the error and examine all the data within that state in order to troubleshoot and resolve the issue. Common methods for obtaining SSD multi-core processor error state data are as follows: Method 1: Using a debugging tool that connects an external integrated development environment (IDE) to a multi-core CPU simulation interface, the error state data is read out core by core through the IDE. Method 2: Using a serial debugging interface that connects a PC to the multi-core CPU, the error state data is read out core by core using a general-purpose serial port tool on the PC, based on the serial interface commands supported by the firmware running on the CPU.
[0003] However, existing methods have the following problems:
[0004] (1) The operability of reading is relatively complex. The first method above is particularly complex. It requires the use of an integrated development environment and the use of a simulation debugging interface to connect to the cores of a multi-core CPU one by one to read out the abnormal field data.
[0005] (2) When an anomaly occurs, it is necessary to go to or access the anomaly site and use tools to connect to a multi-core CPU in order to obtain the anomaly site data.
[0006] (3) If the abnormal site data is not read in time when an abnormality occurs, the abnormal site data will be lost when the power is cut off or the SSD device is restarted.
[0007] In particular, in point (3), if the problem is intermittent, it will be difficult to obtain abnormal field data again if a power outage or restart occurs, resulting in significant losses.
[0008] There is currently no effective solution to the above problems. Summary of the Invention
[0009] This invention provides a data processing method and apparatus based on a solid-state drive (SSD) to at least solve the technical problem in the related art that the operation of obtaining abnormal field data from a SSD is relatively complex and easily leads to the loss of abnormal field data.
[0010] According to one aspect of the present invention, a data processing method based on a solid-state drive (SSD) is provided, wherein the SSD includes at least a CPU core, and includes: if an anomaly occurs during data processing, storing the data corresponding to the anomaly in the flash memory of the SSD; and retrieving the data corresponding to the anomaly stored in the flash memory.
[0011] Optionally, before storing the data corresponding to the anomaly in the flash memory of the solid-state drive, the method further includes: allocating a corresponding counter according to the CPU core, wherein the counting state of the counter corresponding to the CPU core is consistent with the running state of the CPU core.
[0012] Optionally, if the data processing encounters an anomaly, the following steps are taken: if the counter status is normal, and if an anomaly occurs, an interrupt instruction is sent to the CPU core corresponding to the counter, and the data of the CPU core corresponding to the counter is used as the data corresponding to the anomaly.
[0013] Optionally, storing the data corresponding to the anomaly in the flash memory of the solid-state drive includes: copying the data corresponding to the anomaly to a shared memory area, and then flushing the data corresponding to the anomaly to a predetermined location in the flash memory for storage.
[0014] Optionally, before detecting whether the counter state is normal, the method further includes: initializing the monitoring clock and the system clock in the CPU core, and executing the interrupt routine of the system clock.
[0015] Optionally, initializing the monitor clock and system clock in the CPU core includes: setting the monitor clock as a timeout interrupt in the CPU core, disabling the timeout reset system function of the monitor clock, and setting the system clock as a timer interrupt.
[0016] Optionally, obtaining the data corresponding to the anomaly stored in the flash memory includes: reading the data corresponding to the anomaly from the flash memory based on a preset interface of the solid-state drive, and storing it as a binary file and / or a text file.
[0017] According to another aspect of the present invention, a data processing device based on a solid-state drive is also provided. The solid-state drive includes at least a CPU core and includes: a storage module, configured to store data corresponding to the abnormality in the flash memory of the solid-state drive if an abnormality occurs during data processing; and an acquisition module, configured to acquire the data corresponding to the abnormality stored in the flash memory.
[0018] According to another aspect of the present invention, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored program, wherein, when the program is executed, it controls the device where the computer-readable storage medium is located to perform the data processing method based on solid-state drive described in any one of the above embodiments.
[0019] According to another aspect of the present invention, a processor is also provided, the processor being used to run a program, wherein the program, when running, executes the solid-state drive-based data processing method described in any one of the above embodiments.
[0020] In this embodiment of the invention, if an anomaly occurs in the data processing, the data corresponding to the anomaly is stored in the flash memory of the solid-state drive (SSD); the data corresponding to the anomaly stored in the flash memory is retrieved. By storing the data corresponding to the anomaly in the flash memory when the CPU core of the SSD experiences a runtime anomaly, and retrieving the data corresponding to the anomaly from the flash memory, the operation is simplified, and the abnormal situation data is automatically stored. This achieves the technical effect of more effectively storing abnormal situation data and avoiding the loss of abnormal situation data, thereby solving the technical problem in related technologies that the operation of retrieving abnormal situation data from the SSD is relatively complex and easily leads to the loss of abnormal situation data. Attached Figure Description
[0021] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with their description, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings:
[0022] Figure 1 This is a flowchart of a data processing method based on a solid-state drive according to an embodiment of the present invention;
[0023] Figure 2 This is a structural diagram of a solid-state drive and a host according to an optional embodiment of the present invention;
[0024] Figure 3 This is a flowchart of a data processing method based on a solid-state drive according to an optional embodiment of the present invention;
[0025] Figure 4 This is a flowchart of copying data to shared memory according to an optional embodiment of the present invention;
[0026] Figure 5 This is a flowchart of the data collected by the brush according to an optional embodiment of the present invention;
[0027] Figure 6 This is a schematic diagram of a solid-state drive-based data processing device according to an embodiment of the present invention. Detailed Implementation
[0028] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0029] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0030] Example 1
[0031] According to an embodiment of the present invention, a method embodiment of a data processing method based on a solid-state drive is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.
[0032] Figure 1 This is a flowchart of a data processing method based on a solid-state drive according to an embodiment of the present invention, such as... Figure 1 As shown, this solid-state drive-based data processing method includes the following steps:
[0033] Step S102: If an abnormality occurs during data processing, the data corresponding to the abnormality is stored in the flash memory of the solid-state drive.
[0034] The aforementioned solid-state drive includes at least a CPU core. The data corresponding to the aforementioned anomaly is all the data when the CPU core of the solid-state drive experiences an anomaly. Optionally, the data corresponding to the aforementioned anomaly includes, but is not limited to, the registers of each core, the stack information of each core, all system registers, system running data, internal memory data, cache data, external memory data, DRAM data, and shared memory regions.
[0035] Step S104: Obtain the data corresponding to the exception stored in the flash memory.
[0036] The aforementioned preset interface can be the host interface of the solid-state drive, such as the SATA interface, PCIe_NVME interface, etc.
[0037] It should be noted that using the host tool to obtain the data corresponding to the anomaly stored in the flash memory based on the default interface of the solid-state drive can save the complicated operations of connecting various tools and installing environments, thereby simplifying the operation.
[0038] Through the above steps, if an anomaly occurs during data processing, the data corresponding to the anomaly is stored in the flash memory of the solid-state drive (SSD); the data corresponding to the anomaly stored in the flash memory is retrieved. By storing the data corresponding to the anomaly in the CPU core of the SSD in the flash memory when an anomaly occurs, and retrieving the data corresponding to the anomaly from the flash memory, the operation is simplified and the abnormal situation data is automatically stored. This achieves the technical effect of more effectively storing abnormal situation data and avoiding the loss of abnormal situation data. In turn, it solves the technical problem that the operation of retrieving abnormal situation data from the SSD is relatively complicated and easily leads to the loss of abnormal situation data in related technologies.
[0039] In an optional implementation, before storing the data corresponding to the exception in the flash memory of the solid-state drive, the method further includes: allocating a corresponding counter according to the CPU core, wherein the counting state of the counter corresponding to the CPU core is kept consistent with the running state of the CPU core. Further, when an exception occurs during data processing, the state of the counter can be checked for normality; if an exception occurs, an interrupt instruction is sent to the CPU core corresponding to the counter, and the data of the CPU core corresponding to the counter is used as the data corresponding to the exception.
[0040] In one optional implementation, storing the data corresponding to the anomaly in the flash memory of the solid-state drive (SSD) includes: copying the data corresponding to the anomaly to a shared memory area, and then flushing the data corresponding to the anomaly to a predetermined location in the flash memory for storage. This implementation method allows the storage of data corresponding to anomalies of the multi-core processor of the SSD in the flash memory, automatically storing the data and improving the accuracy of storing the anomaly-related data.
[0041] Optionally, before checking whether the counter status is normal, the above method further includes: initializing the monitor clock and system clock in the CPU core, and executing the system clock interrupt routine. This implementation allows for the initialization of the monitor clock and system clock, and the execution of system clock-related interrupt routines after initialization.
[0042] In one alternative implementation, initializing the monitor clock and system clock in the CPU core includes: setting the monitor clock to a timeout interrupt in the CPU core, disabling the timeout reset system function of the monitor clock, and setting the system clock to a timer interrupt.
[0043] In practice, a multi-core processor includes multiple CPU cores. Initialization can be performed on the first CPU core, or on any other CPU core. Specifically, the monitor clock can be set as a timeout interrupt, and its timeout reset function can be disabled; alternatively, the system clock can be set as a timer interrupt. After completing these initialization steps, the system clock interrupt routine can be executed.
[0044] In one optional implementation, obtaining the data corresponding to the anomaly stored in the flash memory includes: reading the data corresponding to the anomaly from the flash memory based on a preset interface of the solid-state drive, and storing it as a binary file and / or a text file.
[0045] In practice, after a power outage or restart, the host tool can read the data corresponding to the anomaly using a preset interface on the solid-state drive, and then store the data as a binary file and / or a text file. This method not only allows data acquisition without physically visiting the anomaly site, reducing costs, but also eliminates concerns about data loss after a power outage or restart.
[0046] The following is a detailed description of an optional embodiment of the present invention.
[0047] Figure 2 This is a structural diagram of a solid-state drive and a host according to an optional embodiment of the present invention, such as... Figure 2 As shown, in scenarios where SSDs experience multi-core CPU malfunctions, all data related to the malfunctioning multi-core CPU is immediately stored in flash memory for permanent storage upon occurrence of the malfunction. This eliminates concerns about data loss during power outages or restarts. After the next power-on, a data reading tool on the host machine can use the SSD's host interface to retrieve all data related to the multi-core CPU malfunction and store it as a binary or text file for later viewing.
[0048] The stored exception data includes every kernel register, every kernel stack information, all system registers, critical system operation data, internal memory data, cache data, external memory data, DRAM data, shared memory regions, and other critical data.
[0049] Figure 3This is a flowchart of a data processing method based on a solid-state drive according to an optional embodiment of the present invention, such as... Figure 3 As shown, this implementation retrieves data corresponding to multi-core CPU malfunctions on an SSD, with a focus on storing the data corresponding to the malfunctions. The specific implementation steps are as follows:
[0050] Step 1: Allocate a heartbeat counter for each kernel in the shared memory region of the multi-core system, start a heartbeat mechanism in each kernel, and maintain the kernel's heartbeat counter.
[0051] Step 2: Initialize a watchdog timer in a kernel, initialize the watchdog timer to generate an interrupt after a sufficient timeout, and disable the watchdog timer's timeout reset function.
[0052] Step 3: In the same kernel that initializes the Watchdog timer, initialize the System clock (System timer) as a timer interrupt and enter the execution interrupt routine SYS_ISR;
[0053] Step 4: Check if the heartbeat counter of each kernel is normal in the SYS_ISR of the System timer;
[0054] When each kernel is running normally, the heartbeat counters of all kernels will remain normal, and the watchdog operation will be performed. After that, the watchdog will not generate a timeout interrupt.
[0055] When the heartbeat counter of one of the cores is abnormal, an IPI interrupt is sent to the core corresponding to the abnormal heartbeat counter, and the watchdog feeding operation is no longer performed. The core that initializes the watchdog timer will generate a watchdog interrupt.
[0056] Step 5: The kernel that receives the IPI interrupt enters the IPI interrupt routine IPI_ISR and copies all kernel information to the shared memory area; Figure 4 This is a flowchart of copying data to shared memory according to an optional embodiment of the present invention, such as... Figure 4 As shown.
[0057] Step Six: After waiting for a sufficient amount of time, the Watchdog timer times out. The kernel that initializes the Watchdog timer enters the execution interrupt routine WDT_ISR. It organizes each kernel register, each kernel stack information, all system registers, critical system operation data, internal memory data, cache data, external memory data, DRAM data, shared memory area, and other critical data according to a certain format and then flushes them to a fixed location in the flash memory. Figure 5This is a flowchart of the data collected by the brush according to an optional embodiment of the present invention, such as... Figure 5 As shown, after waiting for a sufficient amount of time, the Watchdog timer times out. The kernel that initializes the Watchdog timer then enters the execution interrupt routine WDT_ISR, which includes collecting all data, reinitializing NFC, and swiping the data header, followed by swiping the collected data.
[0058] Step 7: After powering off or restarting, use the data reading tool on the host to read the data corresponding to the multi-core CPU failure of the SSD through the host (SATA or PCIE_NVME) interface of the SSD according to the storage format, and store the data content as binary files respectively.
[0059] Example 2
[0060] According to another aspect of the present invention, a data processing apparatus based on a solid-state drive is also provided. Figure 6 This is a schematic diagram of a solid-state drive-based data processing device according to an embodiment of the present invention, such as... Figure 6 As shown, the solid-state drive-based data processing device includes a storage module 62 and an acquisition module 64. The solid-state drive-based data processing device will now be described in detail.
[0061] Storage module 62 is used to store the data corresponding to the abnormality in the flash memory of the solid-state drive if an abnormality occurs during data processing; acquisition module 64 is connected to the storage module 62 and is used to acquire the data corresponding to the abnormality stored in the flash memory.
[0062] It should be noted that the above modules can be implemented by software or hardware. For example, for the latter, they can be implemented in the following ways: the above modules can be located in the same processor; and / or, the above modules can be located in different processors in any combination.
[0063] In the above embodiments, the solid-state drive-based data processing device can simplify operations and automatically store abnormal situation data when the CPU core of the solid-state drive malfunctions, by storing the data corresponding to the abnormality in the flash memory and retrieving the data corresponding to the abnormality from the flash memory. This achieves the technical effect of more effectively storing abnormal situation data and avoiding the loss of abnormal situation data, thereby solving the technical problem in related technologies that the operation of obtaining abnormal situation data from the solid-state drive is relatively complicated and easily leads to the loss of abnormal situation data.
[0064] It should be noted that the storage module 62 and the acquisition module 64 mentioned above correspond to steps S102 to S104 in Embodiment 1. The examples and application scenarios implemented by the above modules and the corresponding steps are the same, but are not limited to the content disclosed in Embodiment 1.
[0065] Optionally, the above device further includes: an allocation module, used to allocate a corresponding counter according to the CPU core before storing the data corresponding to the exception to the flash memory of the solid-state drive, wherein the counting state of the counter corresponding to the CPU core is kept consistent with the running state of the CPU core.
[0066] Optionally, the storage module 62 includes: a detection unit, used to detect whether the counter status is normal; if an abnormality occurs, an interrupt instruction is sent to the CPU core corresponding to the counter, and the data of the CPU core corresponding to the counter is used as the data corresponding to the abnormality.
[0067] Optionally, the storage module 62 includes a storage unit for copying the data corresponding to the exception to a shared memory area, and then flushing the data corresponding to the exception to a predetermined location in the flash memory for storage.
[0068] Optionally, the above device further includes: an initialization module, used to initialize the monitoring clock and system clock in the CPU core and execute the system clock interrupt routine before detecting whether the counter status is normal.
[0069] Optionally, the initialization module includes: a setting unit, used to set the monitor clock to a timeout interrupt in the CPU core, disable the timeout reset system function of the monitor clock, and set the system clock to a timer interrupt.
[0070] Optionally, the acquisition module 64 includes a reading unit, used to read the data corresponding to the anomaly from the flash memory based on a preset interface of the solid-state drive, and store it as a binary file and / or a text file.
[0071] Example 3
[0072] According to another aspect of the present invention, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored program, wherein, when the program is executed, it controls the device where the computer-readable storage medium is located to perform any of the above-described solid-state hard disk-based data processing methods.
[0073] Optionally, in this embodiment, the computer-readable storage medium may be located in any computer terminal in a group of computer terminals in a computer network, and / or in any mobile terminal in a group of mobile terminals, and the computer-readable storage medium includes a stored program.
[0074] Optionally, during program execution, the device containing the computer-readable storage medium may be controlled to perform the following functions: if an exception occurs during data processing, the data corresponding to the exception is stored in the flash memory of the solid-state drive; the data corresponding to the exception stored in the flash memory is retrieved.
[0075] Optionally, before storing the data corresponding to the exception in the flash memory of the solid-state drive, the above method further includes: allocating a corresponding counter according to the CPU core, and keeping the counting state of the counter corresponding to the CPU core consistent with the running state of the CPU core.
[0076] Optionally, if an anomaly occurs in data processing, the following steps are taken: check if the counter status is normal; if an anomaly occurs, send an interrupt instruction to the CPU core corresponding to the counter, and use the data of the CPU core corresponding to the counter as the data corresponding to the anomaly.
[0077] Optionally, storing the data corresponding to the exception in the flash memory of the solid-state drive includes: copying the data corresponding to the exception to a shared memory area, and then flushing the data corresponding to the exception to a predetermined location in the flash memory for storage.
[0078] Optionally, before checking whether the counter status is normal, the above method further includes: initializing the monitor clock and system clock in the CPU core, and executing the system clock interrupt routine.
[0079] Optionally, the monitor clock and system clock are initialized in the CPU core, including: setting the monitor clock to a timeout interrupt in the CPU core and disabling the timeout reset function of the monitor clock, and setting the system clock to a timer interrupt.
[0080] Optionally, the data corresponding to the anomaly stored in the flash memory can be obtained by: reading the data corresponding to the anomaly from the flash memory using a preset interface of the solid-state drive, and storing it as a binary file and / or a text file.
[0081] Example 4
[0082] According to another aspect of the present invention, a processor is also provided for running a program, wherein the program executes any of the above-described solid-state drive-based data processing methods.
[0083] This invention provides a device including a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, it performs the following steps: if an exception occurs during data processing, the data corresponding to the exception is stored in the flash memory of a solid-state drive; the data corresponding to the exception stored in the flash memory is retrieved.
[0084] Optionally, before storing the data corresponding to the exception in the flash memory of the solid-state drive, the above method further includes: allocating a corresponding counter according to the CPU core, and keeping the counting state of the counter corresponding to the CPU core consistent with the running state of the CPU core.
[0085] Optionally, if an anomaly occurs in data processing, the following steps are taken: check if the counter status is normal; if an anomaly occurs, send an interrupt instruction to the CPU core corresponding to the counter, and use the data of the CPU core corresponding to the counter as the data corresponding to the anomaly.
[0086] Optionally, storing the data corresponding to the exception in the flash memory of the solid-state drive includes: copying the data corresponding to the exception to a shared memory area, and then flushing the data corresponding to the exception to a predetermined location in the flash memory for storage.
[0087] Optionally, before checking whether the counter status is normal, the above method further includes: initializing the monitor clock and system clock in the CPU core, and executing the system clock interrupt routine.
[0088] Optionally, the monitor clock and system clock are initialized in the CPU core, including: setting the monitor clock to a timeout interrupt in the CPU core and disabling the timeout reset function of the monitor clock, and setting the system clock to a timer interrupt.
[0089] Optionally, the data corresponding to the anomaly stored in the flash memory can be obtained by: reading the data corresponding to the anomaly from the flash memory using a preset interface of the solid-state drive, and storing it as a binary file and / or a text file.
[0090] The present invention also provides a computer program product, which, when executed on a data processing device, is suitable for executing an initialization program with the following method steps: if an exception occurs in data processing, storing the data corresponding to the exception in the flash memory of a solid-state drive; and retrieving the data corresponding to the exception stored in the flash memory.
[0091] Optionally, before storing the data corresponding to the exception in the flash memory of the solid-state drive, the above method further includes: allocating a corresponding counter according to the CPU core, and keeping the counting state of the counter corresponding to the CPU core consistent with the running state of the CPU core.
[0092] Optionally, if an anomaly occurs in data processing, the following steps are taken: check if the counter status is normal; if an anomaly occurs, send an interrupt instruction to the CPU core corresponding to the counter, and use the data of the CPU core corresponding to the counter as the data corresponding to the anomaly.
[0093] Optionally, storing the data corresponding to the exception in the flash memory of the solid-state drive includes: copying the data corresponding to the exception to a shared memory area, and then flushing the data corresponding to the exception to a predetermined location in the flash memory for storage.
[0094] Optionally, before checking whether the counter status is normal, the above method further includes: initializing the monitor clock and system clock in the CPU core, and executing the system clock interrupt routine.
[0095] Optionally, the monitor clock and system clock are initialized in the CPU core, including: setting the monitor clock to a timeout interrupt in the CPU core and disabling the timeout reset function of the monitor clock, and setting the system clock to a timer interrupt.
[0096] Optionally, the data corresponding to the anomaly stored in the flash memory can be obtained by: reading the data corresponding to the anomaly from the flash memory using a preset interface of the solid-state drive, and storing it as a binary file and / or a text file.
[0097] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0098] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0099] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.
[0100] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0101] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0102] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.
[0103] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A data processing method based on a solid-state drive (SSD), wherein the SSD includes at least a CPU core, characterized in that, include: If an anomaly occurs during data processing, the data corresponding to the anomaly will be stored in the flash memory of the solid-state drive. Obtain the data corresponding to the anomaly stored in the flash memory; Before storing the data corresponding to the anomaly in the flash memory of the solid-state drive, the method further includes: According to the CPU core, a corresponding counter is allocated. In the shared memory area of the CPU core, a counter is allocated for each core. The counting state of the counter corresponding to the CPU core is kept consistent with the running state of the CPU core. Before detecting whether the counter status is normal, the method further includes: The monitoring clock and system clock are initialized in the CPU core, and the interrupt routine of the system clock is executed. Initialize the monitor clock and system clock in the CPU core, including: In the CPU core, the monitoring clock is set to a timeout interrupt, and the timeout reset of the monitoring clock is disabled, and the system clock is set to a timer interrupt; in the timer interrupt of the system clock, the counter of each core is checked to see if it is normal.
2. The method according to claim 1, characterized in that, The data processing encountered an anomaly, including: The system checks whether the counter status is normal. If an abnormality occurs, an interrupt instruction is sent to the CPU core corresponding to the counter, and the data of the CPU core corresponding to the counter is used as the data corresponding to the abnormality.
3. The method according to claim 1, characterized in that, Storing the data corresponding to the anomaly in the flash memory of the solid-state drive includes: The data corresponding to the anomaly is copied to the shared memory area, and then the data corresponding to the anomaly is flushed to a predetermined location in the flash memory for storage.
4. The method according to claim 1, characterized in that, Retrieving the data corresponding to the anomaly stored in the flash memory includes: Based on the preset interface of the solid-state drive, the data corresponding to the anomaly is read from the flash memory and stored as a binary file and / or a text file.
5. A data processing device based on a solid-state drive (SSD), wherein the SSD includes at least a CPU core, characterized in that, include: A storage module is used to store the data corresponding to the abnormality in the flash memory of the solid-state drive if an abnormality occurs in the data processing. The acquisition module is used to acquire the data corresponding to the anomaly stored in the flash memory; The device further includes: The allocation module is used to allocate a corresponding counter according to the CPU core, and allocate a counter for each core in the shared memory area of the CPU core. The counting state of the counter corresponding to the CPU core is kept consistent with the running state of the CPU core. The device further includes: An initialization module is used to initialize the monitoring clock and system clock in the CPU core and execute the interrupt routine of the system clock. The initialization module includes: The setting unit is used to set the monitoring clock as a timeout interrupt in the CPU core, disable the timeout reset of the monitoring clock, and set the system clock as a timer interrupt; and to detect whether the counter of each core is normal in the timer interrupt of the system clock.
6. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein, when the program is executed, it controls the device containing the computer-readable storage medium to perform the data processing method based on a solid-state drive as described in any one of claims 1 to 4.
7. A processor, characterized in that, The processor is used to run a program, wherein the program executes the solid-state drive-based data processing method according to any one of claims 1 to 4.
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