Method of forming fin structure and method of forming finfet device

Abstract

The application provides a fin structure forming method and a FinFET device forming method. The fin structure forming method comprises the following steps: providing a substrate, wherein the substrate has at least two fin groups arranged at intervals; forming an isolation film, which fills the fins and the fin groups; forming a patterned mask layer, wherein the openings of the patterned mask layer expose the isolation film between the fin groups; breaking the molecular bonds of at least part of the isolation film by using the patterned mask layer; performing a heat treatment on the isolation film; and removing the isolation film to a preset depth to expose the fins as the fin structure. In the application, the expansion rate of the isolation film between the fin groups during the heat treatment is adjusted by breaking the molecular bonds of at least part of the isolation film between the fin groups, so that the stress of the isolation film on both sides of the fins in the fin group is balanced after the heat treatment, thereby improving the bending or tilting problem of the fins.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit manufacturing technology, and in particular to a method for forming a fin structure and a method for forming a FinFET device. Background Technology

[0002] With the continuous development of semiconductor technology, traditional planar devices can no longer meet people's needs for high-performance devices. Fin-Field-Effect Transistor (FinFET) is a three-dimensional device, which includes fins vertically formed on the substrate and gate structures covering both sides of the fins. This design can significantly improve circuit control and reduce leakage current, while also significantly shortening the gate length of the transistor.

[0003] However, during the formation of the fin structure (fin) of FinFET devices, fin deformation (bending or tilting) is very likely to occur, which is not conducive to subsequent process technology (such as the formation of source and drain structures in the fin and the formation of gate structures on the fin). Moreover, it will also lead to leakage between the gate and the source and drain, which will seriously affect the performance and reliability of FinFET devices. Summary of the Invention

[0004] The purpose of this invention is to provide a method for forming a fin structure and a method for forming a FinFET device, so as to solve the problem of fin structure tilting or bending.

[0005] To solve the above-mentioned technical problems, the present invention provides a method for forming a fin structure, comprising: providing a substrate having at least two spaced-apart fin groups on the substrate, each fin group including at least two spaced-apart fins, the gap between the fin groups being larger than the gap between the fins within the fin group; forming an isolation membrane that fills the gap between the fin groups and the gap between the fins, and covers the top surface of the fins; forming a patterned mask layer with an opening above the gap between the fin groups; using the patterned mask layer to break at least some of the molecular bonds of the isolation membrane between the fin groups; performing heat treatment on the isolation membrane; and removing the isolation membrane to a predetermined depth to expose the fins as the fin structure.

[0006] Optionally, the isolation membrane is formed using an FCVD process. The method for breaking the molecular bonds of the isolation membrane between at least a portion of the fins includes: using the patterned mask layer as a mask, performing an ion implantation process on the isolation membrane between the fins to break the molecular bonds of at least a portion of the isolation membrane. The ions used in the ion implantation process include inert gas ions or ions in which at least a portion of the isolation membrane itself contains elements.

[0007] Optionally, the material of the separator includes silicon oxide, silicon oxynitride, or silicon carbonitride.

[0008] Optionally, the ions used in the ion implantation process include one or more of inert gas ions, silicon ions, oxygen ions, carbon ions, and nitrogen ions.

[0009] Optionally, a rigid dielectric layer is further formed on the isolation membrane, the rigid dielectric layer covering the isolation membrane, and the patterned mask layer is formed on the isolation membrane.

[0010] Optionally, after forming the hard dielectric layer, a planarization process is performed on the hard dielectric layer, and then the patterned mask layer is formed on the hard dielectric layer, the opening of the patterned mask layer exposing the hard dielectric layer above the gap between the fins.

[0011] Optionally, the material of the rigid dielectric layer is the same as the material of the isolation membrane.

[0012] Optionally, the implantation dose range of the ion implantation process is 1×10⁻⁶. 18 atom / cm 2 ~5×10 21 atom / cm 2 .

[0013] Optionally, the process gas for the heat treatment includes one or more of water vapor, hydrogen, oxygen, and nitrogen.

[0014] Based on another aspect of the present invention, this embodiment also provides a method for forming a FinFET device, wherein the fin structure of the FinFET device is formed using the fin structure forming method described above.

[0015] In summary, the fin structure formation method and FinFET device formation method provided by the present invention adjust the expansion rate of the isolation membrane between fin groups during heat treatment by breaking the molecular bonds of at least some of the isolation membranes between fin groups. This results in a more balanced stress on the isolation membranes on both sides of the fins within the fin group after heat treatment, thereby improving the problem of fin bending or tilting. Attached Figure Description

[0016] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention.

[0017] Figure 1 This is a flowchart of the method for forming the fin structure provided in this embodiment;

[0018] Figures 2a to 2g A schematic diagram of the corresponding steps in the method for forming the fin structure provided in this embodiment.

[0019] In the attached image:

[0020] 10-Substrate; 11-Fin assembly; 111-Fin;

[0021] 21-Isolation membrane; 22-Rigid dielectric layer; 23-Mask layer. Detailed Implementation

[0022] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.

[0023] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; and the term “at least two” is generally used to mean “two or more”. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature, unless otherwise expressly indicated.

[0024] Figure 1 This is a flowchart of the method for forming the fin structure provided in the embodiments of this application.

[0025] like Figure 1 As shown, the method for forming the fin structure provided in this embodiment includes the following steps:

[0026] S01: A substrate is provided, the substrate having at least two spaced-apart fin groups, each fin group including at least two spaced-apart fins, the gap between the fin groups being greater than the gap between the fins in the fin group;

[0027] S02: Form an isolation membrane that fills the gaps between the fin groups and the gaps between the fins, and covers the top surface of the fins;

[0028] S03: Form a patterned mask layer, wherein the opening of the patterned mask layer is located above the gap between the fin groups;

[0029] S04: Using the patterned mask layer, break the molecular bonds of at least a portion of the isolation membranes between the fin groups;

[0030] S05: Perform heat treatment on the isolation membrane;

[0031] S06: Remove the isolation membrane to a predetermined depth to expose the fins as the fin structure.

[0032] Figures 2a to 2g The structural diagrams corresponding to the steps of the fin structure formation method provided in this embodiment are shown below. Next, we will combine... Figures 2a to 2g The method for forming the fin structure is described in detail.

[0033] First, please refer to Figure 2a In step S01, a substrate 10 is provided, on which at least two spaced-apart fin groups 11 are provided, each fin group 11 including at least two spaced-apart fins 111, and the gap between the fin groups 11 is greater than the gap between the fins 111 within the fin group 11.

[0034] The substrate 10 can be any suitable substrate material well known to those skilled in the art, such as at least one of the following: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-on-insulator (S-SiGeOI), silicon-on-insulator (SiGeOI), and germanium-on-insulator (GeOI). In this embodiment, silicon is used as an example to illustrate the material of the substrate 10.

[0035] Specifically, a self-aligned multi-patterning technique can be used to form multiple spaced fins 111 on the surface of the substrate 10, with a hard mask layer (not shown in the figure) remaining on the top wall of each fin 111. The spacing between the fins 111 within the fin group 11 and the spacing between fin groups 11 can be determined according to actual needs and is not limited by the spacing between the fins 111. In this embodiment, the fin group 11 includes four fins 111, and the four fins 111 within the fin group 11 are evenly spaced to balance the stress on both sides of the fins 111 as much as possible. Of course, in practice, the number of fins 111 in different fin groups 11 can also be different.

[0036] Next, please refer to Figure 2b In step S02, an isolation membrane 21 is formed. The isolation membrane 21 fills the gaps between fins 111 and between fin groups 11, and extends to cover the top surface of fins 111. The isolation membrane 21 is formed using the FCVD process.

[0037] Specifically, the separator 21 is made of materials such as silicon oxide, silicon oxynitride, or silicon carbonitride, and is formed using FCVD (Flowable CVD) technology. This facilitates better filling of the gaps between fins 111 within the fin assembly 11 and between fin assemblies 11, while also minimizing cost. It should be understood that the gaps between fins 111 within the fin assembly 11 have a large aspect ratio, which places high demands on the step coverage of the filling (forming separator 21) process. Conversely, the gaps between fin assemblies 11 have a smaller aspect ratio, which places higher demands on the filling amount and filling speed of the filling process.

[0038] In this embodiment, the isolation membrane 21 can be made of silicon oxide. The isolation membrane 21 fills and covers the top surface of the fin 111, and its specific filling depth corresponds to the height of the fin 111, for example, 100 angstroms to 3000 angstroms. Since the isolation membrane 21 is not cured (not fully cured), the isolation membrane 21 on both sides of the fin 111 (side fin) near the outer side of the fin assembly 11 has a relatively balanced stress compared to after heat treatment.

[0039] In particular, such as Figure 2c The process may further include forming a hard dielectric layer 22 to cover the separator 21, and performing a planarization process on the hard dielectric layer 22 to facilitate subsequent process platforms. The hard dielectric layer 22 is made of, for example, silicon oxide or silicon nitride, and has a relatively thin thickness (e.g., 50 angstroms to 500 angstroms) to facilitate its formation and removal. In this embodiment, the hard dielectric layer 22 is made of the same material as the separator 21 (e.g., silicon oxide) to simplify the subsequent removal process of the hard dielectric layer 22. Preferably, the hard dielectric layer 22 can be formed using a low-temperature process (e.g., below 500°C) to reduce the thermal budget of the separator 21 (not fully cured) and prevent the separator 21 from completely curing during this process, which would be detrimental to subsequent process steps. The low-temperature process may be, for example, PECVD.

[0040] Of course, in practice, the release membrane 21 can also be pre-cured (at a temperature, for example, below 500°C) and then planarized, so that the release membrane 21 can be used as a platform for subsequent processes.

[0041] Next, please refer to Figure 2d Step S03 is executed to form a patterned mask layer 23. The patterned mask layer 23 is located on the hard dielectric layer 22, and the opening of the patterned mask layer 23 is located in the gap between the fin groups 11.

[0042] The patterned mask layer 23 can be any suitable mask layer, such as a patterned photoresist layer.

[0043] It should be noted that the openings of the patterned mask layer 23 can expose all the gaps between the fin assemblies 11, or only some of the gaps between the fin assemblies 11. The distribution pattern of its openings can match the distribution pattern of fin deformation (bending or tilting) in the actual process (experience). Furthermore, the width of the openings of the patterned mask layer 23, that is, the width of the gaps exposed between the fin assemblies 11, can also match the degree of fin deformation in the actual process. For example, if the degree of fin deformation in the actual process is relatively small, the opening width of the patterned mask layer 23 can be reduced accordingly.

[0044] Next, please refer to Figure 2e In step S04, the molecular bonds of the isolation membrane 21 between at least some of the fin groups 11 are broken using the patterned mask layer 23.

[0045] Electromagnetic wave energy can be used to break the molecular bonds of the isolation membrane 21 between the fin assemblies 11 exposed by the opening of the patterned mask layer 23, so as to adjust the internal properties (such as pressure, expansion rate, etc.) of the isolation membrane 21 between the fin assemblies 11.

[0046] Preferably, an ion implantation process can be performed on the isolation membrane 21 between the fin assemblies 11 to break at least a portion of the molecular bonds in the isolation membrane 21 between the fin assemblies 11. The ions used in the ion implantation process include inert gas ions or ions in which at least a portion of the isolation membrane 21 itself contains elements. It should be understood that the rigid dielectric layer 22 covering the isolation membrane 21 actually performs ion implantation on the isolation membrane 21 between the fin assemblies 11 through the rigid dielectric layer 22. The ion implantation of the rigid dielectric layer 22 is not shown in the figures for illustrative purposes.

[0047] In one specific embodiment, the ions implanted are inert gas ions, such as helium ions or argon ions. The inert gas ions are implanted into the isolation membrane 21 between the fins 11 to break some of the molecular bonds of the isolation membrane 21.

[0048] In another specific embodiment, the ions implanted are ions of elements that the isolation membrane 21 itself contains, such as silicon ions, oxygen ions, or nitrogen ions, which can break some of the molecular bonds of the isolation membrane 21 without introducing impurity ions.

[0049] In this process, the implantation angle can be perpendicular to or as perpendicular as possible to the horizontal direction of the substrate 10. The implantation energy, implantation dose, and type of implanted ions are matched with the degree of deformation of the fins 111 in the actual process. Based on the type of ions, an appropriate ion implantation energy is selected to ensure that the depth of implanted ions is the same as or as close as possible to the depth of the isolation film 21, thereby achieving balanced ion implantation in the depth direction. The preferred ion implantation dose is 1×10⁻⁶. 18 atom / cm 2 ~5×10 21atom / cm 2 Those skilled in the art know how to select the appropriate ion implantation energy based on the type of ions implanted and the depth of ion implantation, and will not elaborate further here.

[0050] It should be understood that the isolation membrane 21 between fin groups 11 is located in an open area with low pattern density, resulting in greater thermal expansion and relatively higher internal stress. Conversely, the isolation membrane 21 within the fin group 11 is located in a dense area with high pattern density, resulting in less thermal expansion and relatively lower internal stress. The outermost fin 111 (referred to as the side fin) within the fin group 11 has an isolation membrane in an open area and a denser isolation membrane on its sides, leading to uneven stress on both sides of the fin 111 and deformation. Of course, this uneven stress mainly manifests after the isolation membrane 21 has been cured (heat-treated). By using ion implantation technology to implant ions into the isolation membrane 21, for example, the Si-H, Si-O, or Si-N molecular bonds of the isolation membrane 21 can be broken, adjusting the thermal expansion rate (thermal contraction rate) of the isolation membrane 21 between fin groups 11. This reduces or reverses the stress (tensile stress) of the isolation membrane 21 between fin groups 11 after heat treatment (curing), thereby resulting in more uniform stress on both sides of the cured fin 111, and thus improving the deformation of the fin 111. The fin 111 here mainly refers to the outermost fin 111 (side fin) in the fin group 11. Of course, due to the force transmission, the stress on both sides of the side fin is improved, which is also beneficial to the stress improvement of other fins 111 in the fin group 11.

[0051] Next, please refer to Figure 2f Step S05 is executed to perform heat treatment on the separator 21.

[0052] Specifically, the patterned mask layer 23 can be removed using wet etching or ashing processes, and then the isolation film 21 can be heat-treated (annealed) to solidify the isolation film 21 and make the isolation film in the ion implantation region and the isolation film in other regions become isolation films 21 with balanced internal stress. Preferably, the process gas for the above heat treatment includes one or more of water vapor, hydrogen, oxygen, and nitrogen to improve the heat treatment effect, and the heat treatment temperature is, for example, 450°C to 1100°C. Since the aforementioned ion implantation process adjusts the thermal expansion coefficient properties of the isolation film 21 between the fin groups 11, the stress of the isolation film 21 on both sides of the edge fin is relatively balanced after heat treatment, reducing or avoiding the risk of deformation of the fin 111 due to uneven stress on both sides.

[0053] Next, please refer to Figure 2g Step S06 is executed to remove the isolation membrane 21 at a preset depth, so that the exposed fins 111 serve as the fin structure.

[0054] Specifically, the hard dielectric layer 22 is removed first, followed by the isolation film 21 at a predetermined depth, to expose the fins 111 on the isolation film 21 as fin structures, facilitating subsequent process implementation, such as forming active drain and gate structures on the fins 111. Preferably, the hard dielectric layer 22 is made of the same material as the isolation film 21, so it can be easily removed together. Of course, during the removal of the hard dielectric layer 22 and the isolation film 21, the hard mask layer located on the top surface of the fins 111 is also removed.

[0055] This application also provides a method for forming a FinFET device, which includes a fin structure. The method for forming the FinFET device uses the fin structure forming method described above to form the fin structure.

[0056] In summary, the fin structure formation method and FinFET device formation method provided by the present invention adjust the expansion rate of the isolation membrane between fin groups during heat treatment by breaking the molecular bonds of at least some of the isolation membranes between fin groups. This results in a more balanced stress on the isolation membranes on both sides of the fins within the fin group after heat treatment, thereby improving the problem of fin bending or tilting.

[0057] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A method for forming a fin structure, characterized in that, include: A substrate is provided having at least two spaced-apart fin groups, each fin group including at least two spaced-apart fins, the gap between the fin groups being larger than the gap between the fins within the fin groups; An isolation membrane is formed, which fills the gaps between the fin groups and the gaps between the fins, and covers the top surface of the fins; A patterned mask layer is formed, wherein the opening of the patterned mask layer is located above the gap between the fin groups; Using the patterned mask layer, the molecular bonds of at least some of the isolation membranes between the fins are broken by electromagnetic wave energy or ion implantation process. The ions in the ion implantation process include inert gas ions or ions in at least some of the isolation membranes themselves that have elements. The separator membrane is subjected to heat treatment; Remove the isolation membrane to a predetermined depth to expose the fins as the fin structure.

2. The method for forming the fin structure according to claim 1, characterized in that, The separator is formed using the FCVD process.

3. The method for forming the fin structure according to claim 2, characterized in that, The material of the separator includes silicon oxide, silicon oxynitride, or silicon carbonitride.

4. The method for forming the fin structure according to claim 3, characterized in that, The ions used in the ion implantation process include one or more of inert gas ions, silicon ions, oxygen ions, carbon ions, and nitrogen ions.

5. The method for forming the fin structure according to claim 1, characterized in that, A rigid dielectric layer is also formed on the isolation membrane, the rigid dielectric layer covers the isolation membrane, and the patterned mask layer is formed on the isolation membrane.

6. The method for forming the fin structure according to claim 5, characterized in that, After forming the hard dielectric layer, a planarization process is performed on the hard dielectric layer, and then the patterned mask layer is formed on the hard dielectric layer. The opening of the patterned mask layer exposes the hard dielectric layer above the gap between the fins.

7. The method for forming the fin structure according to claim 6, characterized in that, The material of the rigid dielectric layer is the same as that of the isolation membrane.

8. The method for forming the fin structure according to any one of claims 1 to 7, characterized in that, The implantation dose range of the ion implantation process is 1×10⁻⁶. 18 atom / cm 2 ~5×10 21 atom / cm 2 .

9. The method for forming the fin structure according to any one of claims 1 to 7, characterized in that, The process gases for the heat treatment include one or more of water vapor, hydrogen, oxygen, and nitrogen.

10. A method for forming a FinFET device, characterized in that, include: The fin structure of a FinFET device is formed using the fin structure formation method as described in any one of claims 1 to 9.

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