A Method and Device for Extracting Equivalent Circuit Parameters of Through-Silicon Via Inductance Based on Neural Network

Abstract

The present invention discloses a method and device for extracting equivalent circuit parameters of through-silicon via inductors based on a neural network, which realizes the extraction of the equivalent circuit of through-silicon via inductors in three-dimensional integrated circuits to efficiently obtain the electrical parameters of through-silicon via inductors. According to the characteristics of through-silicon via inductors, the specific structure of a two-port equivalent circuit is designed, and a simple artificial neural network model is constructed to extract the equivalent circuit of through-silicon via inductors. The input of the network is the design parameters of the through-silicon via inductor and the theoretically calculated inductance, and the output is the component values in the equivalent circuit. Using this model, the equivalent circuit can be extracted and the Y parameters of the through-silicon via inductor can be calculated. The method and device of the present invention can quickly extract the equivalent circuit of through-silicon via inductors, and have high accuracy and efficiency compared with simulation software.

Description

Technical Field

[0001] The present invention relates to the field of three-dimensional integrated circuits, and particularly to a method and device for extracting equivalent circuit parameters of through-silicon via inductors based on neural networks. Background Art

[0002] In recent years, due to the limitation of the physical size limit of transistors, Moore's Law has encountered unprecedented challenges. In order to meet the requirements of chip computing power and storage in related fields, various solutions have emerged in the chip industry, among which three-dimensional integrated circuits have been widely studied. A three-dimensional integrated circuit refers to stacking multiple chips vertically, so that more components can be integrated on one chip, improving the density of the integrated circuit and further enhancing the performance of the chip. Through-silicon via packaging technology is one of the widely used packaging technologies for three-dimensional integrated circuits. Multiple chips communicate through through-silicon vias, which can effectively improve the interconnection performance, increase the operating speed and reduce the power consumption.

[0003] To implement related circuit functions, a certain number of inductors are usually included in the chip. Traditional on-chip inductors will occupy a large chip area, consume a large amount of metal wiring resources, reduce the device density, and affect the performance of the chip. Therefore, there is an urgent need to propose an on-chip inductor structure with small size and high density. For reliability considerations during the chip manufacturing process, a large number of through-silicon vias will be inserted into the circuit, and not all of them will be utilized. Therefore, there are usually many redundant through-silicon vias in the chip. By using these redundant through-silicon vias and metal wires, through-silicon via inductors in three-dimensional integrated circuits can be formed. To further improve the performance of through-silicon via inductors, a magnetic core can be added to the inductor to obtain a magnetic core through-silicon via inductor with higher inductance density.

[0004] In actual circuit design, the verification and simulation of the physical model of through-silicon via inductors require a lot of time. Therefore, it is necessary to extract the equivalent circuit of through-silicon vias for fast simulation calculations to improve the efficiency of chip design. In addition, after determining the equivalent circuit structure, how to determine the component values in the circuit becomes a problem to be studied. One solution is to use the iterative method to fit the component values in the equivalent circuit. However, this method depends on the selection of initial conditions and requires multiple iterations to obtain the equivalent circuit, which has the disadvantage of low efficiency. Considering that the electrical characteristics of through-silicon via inductors will change with the change of design parameters, it is proposed to use neural networks to solve this problem, and use the design parameters and process parameters of through-silicon via inductors to extract the equivalent circuit of through-silicon via inductors, so as to quickly obtain relevant electrical parameters. Summary of the Invention

[0005] Aiming at the deficiencies of the prior art, the present invention proposes a method and device for extracting equivalent circuit parameters of through-silicon via inductors based on neural networks.

[0006] The object of the present invention is achieved by the following technical solutions: A method for extracting equivalent circuit parameters of a through-silicon via inductor based on a neural network, characterized in that the method comprises the following steps:

[0007] 1) Extract the parameters of the through-silicon via inductor: Simulate the through-silicon via inductor to obtain the Y-parameters of the through-silicon via inductor at different frequencies. By changing the design parameters of the through-silicon via inductor, including the diameter d of the through-silicon via tsv , the distance d between the through-silicon via and the core cavity sep , the distance w between the two core cavities mag and the height of the through-silicon via, multiple groups of data are obtained, and the theoretical inductance value of the through-silicon via inductor is calculated;

[0008] 2) According to the electrical characteristics of the through-silicon via inductor, construct a π-type equivalent circuit of the through-silicon via inductor composed of sub-circuits Y S and Y shunt . A Y S is connected in series at both ends respectively with a Y shunt . The other ends of the two Ys shunt are grounded. Among them, the specific structure of Y S is that the resistor R2 and the capacitor C1 are first connected in parallel and then connected in series with the resistor R1 and the inductor L1. The specific structure of Y shunt is that the resistor R3 and the capacitor C3 are first connected in parallel and then connected in series with the capacitor C2;

[0009] 3) Use the neural network model to extract the equivalent circuit parameters of the through-silicon via inductor. The input of the network is the design parameters and the theoretical inductance value of the through-silicon via inductor. The output of the network is the resistance value, inductance value and capacitance value corresponding to the resistance, inductance and capacitance in the equivalent circuit of the through-silicon via inductor. Calculate the Y-parameters predicted by the neural network according to the specific element values in the equivalent circuit of the through-silicon via inductor, and jointly constitute a loss function with the actual Y-parameters and the regularization term constructed by the difference between the theoretical inductance value and the predicted L1. Train the network to obtain the equivalent circuit parameter extraction model of the through-silicon via inductor;

[0010] 4) Given the design parameters of the through-silicon via inductor, use the trained equivalent circuit parameter extraction model of the through-silicon via inductor to calculate the element values in the equivalent circuit, and then quickly calculate the Y-parameters.

[0011] Further, the through-silicon via inductor is composed of a through-silicon via and a metal wire connected to form a ring-shaped inductance structure, and is provided with a CoZrTa core. The core is perpendicular to the through-silicon via, and there are two core cavities between the core and the through-silicon via.

[0012] Further, in step 2), the equivalent circuit of the through-silicon via inductor uses a two-port π model, and its Y-parameters are expressed as:

[0013]

[0014] Among them, Y 11 , Y 12 , Y 21 and Y 22 are complex numbers that vary with frequency. In the equivalent circuit, there is Y 11 = Y 22 , Y 12 = Y 21 ; According to the relationship between the equivalent circuit and the Y parameters, the Y parameters of the sub - circuit are expressed as:

[0015] Y S = -Y 12 ,

[0016] Y shunt = Y 11 + Y 12 .

[0017] Furthermore, the calculation method of the theoretical inductance value in step 3) is:

[0018] L = n ２ ·μ·w mag ·t mag ·n lam / l m

[0019] Where n is the number of turns of the through - silicon - via inductance, μ is the magnetic permeability of CoZrTa, t mag is the thickness of the magnetic core, n lam is the number of magnetic - core laminations, l m is the effective average magnetic - path length, and the calculation method is:

[0020]

[0021] Among them, the calculation methods of h and w are:

[0022] h = n·(d ind + d tsv ) - d ind + 2d sep

[0023] w = d tsv + 2d sep

[0024] Where d ind is the distance between through - silicon - vias.

[0025] Furthermore, the method for calculating the equivalent - circuit Y parameters using the component values predicted by the neural network in step 4) is:

[0026]

[0027]

[0028] where ω is the angular frequency, and j 2 = -1, R1, R2, and R3 are the resistance values in the equivalent circuit predicted by the neural network, L1 is the inductance value in the equivalent circuit predicted by the neural network, and C1, C2, and C3 are the capacitance values in the equivalent circuit predicted by the neural network; and are the equivalent circuit Y parameters calculated using the component values predicted by the neural network.

[0029] Furthermore, in step 4), two neural network models are trained for the sub - circuit Y s and Y shunt respectively. Both the Y s model and the Y shunt model contain several linear layers and several activation layers. The ReLU function is used for all activation layers. The loss functions of Y s and Y shunt are respectively:

[0030]

[0031]

[0032] where Z s represents the Z parameter of the sub - circuit Y s converted from the simulation results, represents the Z parameter converted from the predicted by the neural network, λ is the regularization coefficient, ||·||2 represents the L2 norm. For the single - port circuit Y s , the conversion relationship between the Y parameter and the Z parameter is:

[0033]

[0034] The present invention also provides a through - silicon - via inductance equivalent circuit parameter extraction device based on a neural network, including a memory and one or more processors. The memory stores executable code, and when the processor executes the executable code, it is used to implement the steps of the through - silicon - via inductance equivalent circuit parameter extraction method based on a neural network.

[0035] The present invention also provides a computer - readable storage medium, on which a program is stored. When the program is executed by a processor, it implements the steps of the through - silicon - via inductance equivalent circuit parameter extraction method based on a neural network.

[0036] The beneficial effects of the present invention are as follows: The present invention provides a method and device for extracting equivalent circuit parameters of a through-silicon via inductor based on a neural network. The proposed two-port equivalent circuit of the through-silicon via inductor can effectively characterize the electrical characteristics of the through-silicon via. At the same time, by means of the neural network, the element values in the equivalent circuit can be calculated according to the design parameters and process parameters of the through-silicon via inductor, so that the equivalent circuit of the through-silicon via inductor can be quickly extracted, and the relevant parameters of the through-silicon via inductor can be calculated. Compared with the three-dimensional electromagnetic simulation software HFSS, the equivalent circuit extraction model of the through-silicon via inductor proposed by the present invention has high accuracy and speed, can quickly calculate the Y-parameters and S-parameters of the through-silicon via inductor with very small errors. The equivalent circuit extraction method of the through-silicon via inductor proposed by the present invention can be used in circuit design. By using the neural network, the equivalent circuit and its characteristics of the through-silicon via inductor under different design parameters can be quickly obtained, and the best design parameters of the through-silicon via inductor can be selected from them, so that modules containing through-silicon via inductors, such as integrated voltage regulators, can achieve the expected performance. Compared with the time-consuming simulation software, the design efficiency of three-dimensional integrated circuits can be effectively improved. Description of the Drawings

[0037] Figure 1 is the flow block diagram of the equivalent circuit parameter extraction of the through-silicon via inductor of the present invention;

[0038] Figure 2 is the structure of the through-silicon via inductor used in the present invention;

[0039] Figure 3 is the equivalent circuit structure of the through-silicon via inductor of the present invention;

[0040] Figure 4 is the equivalent circuit diagram of the through-silicon via inductor of the present invention;

[0041] Figure 5 is the result comparison diagram of the S-parameter extraction of the through-silicon via inductor by the model proposed by the present invention and the simulation software;

[0042] Figure 6 is the structure diagram of the device for extracting equivalent circuit parameters of the through-silicon via inductor based on a neural network in the embodiment of the present invention. Detailed Embodiments

[0043] The following further details the specific embodiments of the present invention with reference to the drawings.

[0044] As Figure 1 shown, a method for extracting equivalent circuit parameters of a through-silicon via inductor based on a neural network provided by the present invention has the following specific implementation steps:

[0045] 1) Extract the parameters of the through-silicon via inductor. The structure of the through-silicon via inductor used in the present invention is as Figure 2As shown, a ring-shaped through silicon via inductor is formed by connecting the through silicon vias and metal wires in a three-dimensional integrated circuit. The through silicon vias are divided into two parallel groups on the left and the right, which are perpendicular to the metal wires. The lower end of the first through silicon via on the right is connected to the metal wire as a port of the inductor, the upper end of the first through silicon via on the left and the upper end of the first through silicon via on the right are connected by a metal wire, the lower end of the first through silicon via on the left and the lower end of the second through silicon via on the right are connected by a metal wire, the upper end of the second through silicon via on the left and the upper end of the second through silicon via on the right are connected by a metal wire, and so on. The lower end of the last through silicon via on the left is another port of the inductor. The through silicon via inductor contains a CoZrTa core perpendicular to the through silicon via, and there are two core voids between the core and the through silicon via. The through silicon via inductor is simulated using HFSS simulation software to obtain the Y parameters of the through silicon via inductor at different frequencies. By changing some design parameters of the through silicon via inductor, including the diameter d of the through silicon via, the through silicon via inductor can be easily obtained. tsv , the distance d between the TSV and the core void sep , the distance w between the two core voids mag and the height of the TSV h tsv , other design parameters remain unchanged, and a variety of inductors with different electrical properties can be obtained. They are simulated by HFSS respectively to obtain multiple groups of Y parameters of TSV inductors at different frequencies, and the above design parameters of TSV inductors are recorded to form a data set, in which the design parameters of TSV inductors are features and the corresponding Y parameters are labels.

[0046] The simulation frequency range selected by the present invention is 1kHz-1GHz, the simulation frequency is sampled at logarithmic intervals to obtain 19 sampling frequencies, and each through silicon via inductor is simulated at the sampling frequency to obtain Y parameters at 19 frequencies.

[0047] 2) According to the electrical characteristics of the through silicon via inductor, construct a sub-circuit Y S and Y shunt The equivalent circuit of the π-type silicon via inductor, Y S Connect a Y in series at both ends shunt , two Y shunt The other end of the through silicon via inductor equivalent circuit constructed by the present invention is as follows: Figure 3 As shown, Y S Connect a Y in series at both ends shunt , two Y shunt The other end of the TSV inductor is grounded. Since the TSV inductor equivalent circuit uses a two-port π model, its Y parameter can be expressed as:

[0048]

[0049] where Y 11 , Y 12 , Y 21and Y 22 is a complex number varying with frequency. In the equivalent circuit proposed by the present invention, there is Y 11 = Y 22 , Y 12 = Y 21 . According to the relationship between the equivalent circuit and the Y parameters, the Y parameters of the sub - circuit can be expressed as:

[0050] Y S = - Y 12 ,

[0051] Y shunt = Y 11 + Y 12 ,

[0052] Therefore, using the Y parameters of the through - silicon - via inductor obtained by HFSS simulation, the Y parameters of the equivalent - circuit sub - circuit can be calculated, that is, Y S and Y shunt , so as to extract their equivalent circuits respectively.

[0053] 3) Using the process parameters and design parameters of the through - silicon - via inductor, calculate its theoretical inductance value. The calculation method of the theoretical inductance value of the through - silicon - via inductor is:

[0054] L = n 2 ·μ·w mag ·t mag ·n lam / l m

[0055] where n is the number of turns of the through - silicon - via inductor, μ is the magnetic permeability of CoZrTa, t mag is the thickness of the magnetic core, n lam is the number of magnetic - core laminations, l m is the effective average magnetic - path length, and the calculation method is:

[0056]

[0057] where the calculation methods of h and w are:

[0058] h = n·(d ind + d tsv ) - d ind + 2d sep

[0059] w = d tsv + 2d sep

[0060] where d ind is the distance between through - silicon - vias. For through - silicon - via inductors with different design parameters, their theoretical inductances can be calculated respectively through the above formula.

[0061] 4) Use a neural network model to extract the equivalent circuit parameters of the through - silicon via inductance. Figure 4 The equivalent circuit of the through - silicon via inductance is described by the circuit shown below, where Y S has a specific structure where resistor R2 and capacitor C1 are first connected in parallel and then in series with resistor R1 and inductor L1. Y shunt has a specific structure where resistor R3 and capacitor C3 are first connected in parallel and then in series with capacitor C2. According to the resistance values, inductance values, and capacitance values in the equivalent circuit, the admittances of the sub - circuits can be calculated respectively. Since the sub - circuits Y s and Y shunt are one - port circuits, their admittances are the Y - parameters Y s and Y shunt mentioned above.

[0062] Train two neural network models for the sub - circuits Y s and Y shunt respectively. In this example, the Y s model contains 3 linear layers and 2 activation layers, and the Y shunt model contains 4 linear layers and 3 activation layers. The number of hidden - layer nodes is 8 for both. Except for the last linear layer, the ReLU function activation layers are used for the rest, and the result output by the last linear layer takes the absolute value. The input of the Y s network is the design parameters d tsv 、d sep 、w mag 、h tsv and the theoretical inductance value L of the through - silicon via inductance. The output of the network is the resistance values, inductance values, and capacitance values corresponding to the resistance, inductance, and capacitance in the equivalent circuit of the through - silicon via inductance, i.e., R1, R2, L1, C1. The input of the Y shunt network is the design parameters d tsv 、d sep 、w mag 、h tsv of the through - silicon via inductance. The output of the network is the resistance values and capacitance values corresponding to the resistance and capacitance in the equivalent circuit of the through - silicon via inductance, i.e., R3, C2, C3. The Y - parameters predicted by the neural network can be used to calculate the equivalent circuit's Y - parameters, and the calculation method is:

[0063]

[0064]

[0065] where ω is the angular frequency.

[0066] Use the predicted Y - parameters by the neural network, the actual Y - parameter labels, and the theoretical inductance value to form a loss function, and train the network to obtain the extraction model for the equivalent circuit of the through - silicon via inductance, Y s and Y shuntThe loss functions are as follows:

[0067]

[0068]

[0069] Among them, Z s represents the Z-parameters of the sub-circuit Y converted from the HFSS simulation results, s and represents the Z-parameters converted from the predicted by the neural network. λ is the regularization coefficient, and ||·||2 represents the L2 norm. For a single-port circuit Y s , the conversion relationship between the Y-parameters and the Z-parameters is:

[0070]

[0071] In the example of the present invention, λ takes the value of 0.7. Since the Y-parameters of the through-silicon via inductor change with frequency, the results of each frequency need to be summed for the parts of the Z-parameters and Y-parameters in the loss function. According to the characteristics of the sub-circuit, the frequency range fitted in the training of the Y s model is 1 kHz - 216 MHz, and the frequency range fitted in the training of the Y shunt model is 100 MHz - 1 GHz.

[0072] 5) Extract the equivalent circuit parameters of the through-silicon via inductor. For a given through-silicon via inductor, according to its design parameters and process parameters, the component values in the equivalent circuit can be calculated by using the trained extraction model of the equivalent circuit parameters of the through-silicon via inductor, so as to obtain the equivalent circuit of the through-silicon via inductor, and then the Y-parameters of the through-silicon via inductor can be quickly calculated by using Y s and Y shunt .

[0073] Use the model trained by the present invention to extract the equivalent circuit parameters of the through-silicon via inductor, calculate its Y-parameters, convert the Y-parameters to S-parameters, and compare them with the S-parameter results of the HFSS simulation of the through-silicon via inductor. The results are as Figure 5 shown. Among them, the average relative error of S 11 is 3.17%, and the correlation coefficient is 99.99%. The average relative error of S 12 is 0.92%, and the correlation coefficient is 99.78%. The model has a very high accuracy. In addition, compared with the HFSS simulation software, the model has very high efficiency and can quickly extract the equivalent circuit of the through-silicon via inductor and obtain the Y-parameters and S-parameters of the through-silicon via inductor.

[0074] Corresponding to the embodiment of the above-described method for extracting equivalent circuit parameters of through-silicon via inductors based on a neural network, the present invention also provides an embodiment of an apparatus for extracting equivalent circuit parameters of through-silicon via inductors based on a neural network.

[0075] Referring to Figure 6 , an apparatus for extracting equivalent circuit parameters of through-silicon via inductors based on a neural network provided by an embodiment of the present invention includes a memory and one or more processors. Executable code is stored in the memory. When the processor executes the executable code, it is used to implement the method for extracting equivalent circuit parameters of through-silicon via inductors based on a neural network in the above embodiment.

[0076] The embodiment of the apparatus for extracting equivalent circuit parameters of through-silicon via inductors based on a neural network of the present invention can be applied to any device with data processing capabilities. The any device with data processing capabilities can be a device or apparatus such as a computer. The apparatus embodiment can be implemented by software, or by hardware, or by a combination of software and hardware. Taking software implementation as an example, as a logically meaningful apparatus, it is formed by the processor of any device with data processing capabilities where it is located reading the corresponding computer program instructions in the non-volatile memory into the memory for operation. From a hardware perspective, as Figure 6 shown, it is a hardware structure diagram of any device with data processing capabilities where the apparatus for extracting equivalent circuit parameters of through-silicon via inductors based on a neural network of the present invention is located. In addition to Figure 6 the processor, memory, network interface, and non-volatile memory shown, the any device with data processing capabilities where the apparatus in the embodiment is located usually also includes other hardware according to the actual functions of the any device with data processing capabilities, which will not be elaborated here.

[0077] The specific implementation processes of the functions and roles of each unit in the above apparatus are specifically described in the implementation processes of the corresponding steps in the above method, which will not be elaborated here.

[0078] For the apparatus embodiment, since it basically corresponds to the method embodiment, the relevant parts can be referred to the partial description of the method embodiment. The apparatus embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of the present invention. Those of ordinary skill in the art can understand and implement it without creative efforts.

[0079] An embodiment of the present invention further provides a computer-readable storage medium, on which a program is stored. When the program is executed by a processor, it implements the extraction of the equivalent circuit parameters of the through-silicon via inductor based on a neural network in the above embodiment.

[0080] The computer-readable storage medium may be an internal storage unit of any device with data processing capabilities described in any of the foregoing embodiments, such as a hard disk or memory. The computer-readable storage medium may also be an external storage device of any device with data processing capabilities, such as a plug-in hard disk, a Smart Media Card (SMC), an SD card, a Flash Card, etc. equipped on the device. Further, the computer-readable storage medium may also include both an internal storage unit and an external storage device of any device with data processing capabilities. The computer-readable storage medium is used to store the computer program and other programs and data required by any device with data processing capabilities, and may also be used to temporarily store the data that has been output or will be output.

[0081] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention may be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and they should all be covered by the scope of the claims of the present invention.

Claims

1. A method for extracting equivalent circuit parameters of a through - silicon via inductor based on a neural network, characterized in that, The method comprises the following steps: 1) Extract the parameters of the through-silicon via inductor: Simulate the through-silicon via inductor to obtain the Y-parameters of the through-silicon via inductor at different frequencies. By changing the design parameters of the through-silicon via inductor, including the diameter d of the through-silicon via tsv , the distance d between the through-silicon via and the core cavity sep , the distance w between two core cavities mag and the height of the through-silicon via, multiple sets of data are obtained, and the theoretical inductance value of the through-silicon via inductor is calculated; 2) According to the electrical characteristics of the through-silicon via inductor, construct a π-type equivalent circuit of the through-silicon via inductor composed of sub-circuits Y S and Y shunt A Y is connected in series at both ends respectively S and the other ends of the two Ys shunt are grounded. The specific structure of Y shunt is that the resistor R2 and the capacitor C1 are first connected in parallel and then connected in series with the resistor R1 and the inductor L1. The specific structure of Y S is that the resistor R3 and the capacitor C3 are first connected in parallel and then connected in series with the capacitor C2; shunt ​ 3) Extract the equivalent circuit parameters of the through-silicon via inductor by using a neural network model. The input of the network is the design parameters and the theoretical inductance value of the through-silicon via inductor, and the output of the network is the resistance value, inductance value and capacitance value corresponding to the resistance, inductance and capacitance in the equivalent circuit of the through-silicon via inductor. The loss function is jointly constituted by the Y-parameters predicted by the neural network calculated according to the specific element values in the equivalent circuit of the through-silicon via inductor, the actual Y-parameters, and the regularization term constructed by the difference between the theoretical inductance value and the inductance value L1 in the predicted equivalent circuit. Train the network to obtain the equivalent circuit parameter extraction model of the through-silicon via inductor; 4) Given the design parameters of the through-silicon via inductor, use the trained equivalent circuit parameter extraction model of the through-silicon via inductor to calculate the element values in the equivalent circuit, and then quickly calculate the Y-parameters. The method for calculating the equivalent circuit Y-parameters by using the element values predicted by the neural network is as follows: where ω is the angular frequency, and j 2 = -1, R1, R2, and R3 are the resistance values in the equivalent circuit predicted by the neural network, L1 is the inductance value in the equivalent circuit predicted by the neural network, and C1, C2, and C3 are the capacitance values in the equivalent circuit predicted by the neural network; and are the equivalent circuit Y parameters calculated using the component values predicted by the neural network.

2. The method for extracting equivalent circuit parameters of a through - silicon via inductor based on a neural network according to claim 1, characterized in that, The through-silicon via inductor is composed of a through-silicon via and a metal wire connected to form a ring-shaped inductor structure, and is provided with a CoZrTa magnetic core. The magnetic core is perpendicular to the through-silicon via, and there are two magnetic core cavities between the magnetic core and the through-silicon via.

3. The method for extracting equivalent circuit parameters of a through - silicon via inductor based on a neural network according to claim 1, characterized in that, In step 2), the equivalent circuit of the through-silicon via inductor uses a two-port π model, and its Y-parameters are expressed as: where Y 11 、Y 12 、Y 21 and Y 22 are complex numbers that vary with frequency. In the equivalent circuit, there is Y 11 = Y 22 , Y 12 = Y 21 ; According to the relationship between the equivalent circuit and the Y-parameters, the Y-parameters of the sub-circuit are expressed as: Y S = -Y 12 , Y shunt = Y 11 + Y 12 。 4. The method for extracting equivalent circuit parameters of a through - silicon via inductor based on a neural network according to claim 2, characterized in that, The calculation method of the theoretical inductance value in step 3) is: L = n 2 · μ · w mag · t mag · n lam / l m where n is the number of turns of the through-silicon via inductor, μ is the magnetic permeability of CoZrTa, t mag is the thickness of the magnetic core, n lam is the number of magnetic core laminations, l m is the effective average magnetic path length, and the calculation method is as follows: Wherein the calculation methods of h and w are: h = n·(d ind + d tsv ) - d ind + 2d sep w = d tsv + 2d sep where d ind is the distance between the vias through silicon.

5. The method for extracting equivalent circuit parameters of a through - silicon via inductor based on a neural network according to claim 1, characterized in that, In step 4), for sub-circuits Y s and Y shunt train two neural network models, where the Y s model and the Y shunt model both contain a number of linear layers and a number of activation layers, and the ReLU function is used for all activation layers. The loss functions of Y s and Y shunt are respectively: Among them, Z s represents the Z-parameters of the sub-circuit Y obtained by converting the simulation results s , represents the Z-parameters predicted by the neural network obtained by conversion, λ is the regularization coefficient, ‖·‖2 represents the L2 norm, for a single-port circuit Y s , the conversion relationship between the Y-parameters and the Z-parameters is as follows:

6. A device for extracting equivalent circuit parameters of a through - silicon via inductor based on a neural network, including a memory and one or more processors, wherein executable code is stored in the memory, characterized in that, When the processor executes the executable code, it is used to implement the steps of the method for extracting equivalent circuit parameters of a through-silicon via inductor based on a neural network according to any one of claims 1-5.

7. A computer - readable storage medium, on which a program is stored, characterized in that, When the program is executed by the processor, it implements the steps of the method for extracting equivalent circuit parameters of a through-silicon via inductor based on a neural network according to any one of claims 1-5.

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