Preparation method of MEMS micro-hotplate and MEMS micro-hotplate
By etching the second dielectric layer and the first dielectric layer of the MEMS micro-hot plate in sequence in the same step etching process, the problems of complex and high cost in the traditional process are solved, and process simplification and product yield improvement are achieved.
Patent Information
- Application Number
- CN202011124990.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-10-20
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2040-10-20
AI Technical Summary
The preparation method of traditional MEMS micro-hot plates requires multiple lithography and etching, with complex processes, low product yield and high cost.
The method of etching the second dielectric layer and the first dielectric layer in sequence in the same step etching process is adopted to reduce the number of etching times and simplify the process.
It reduces the number of etching times, simplifies the process flow, improves product yield, reduces costs, and achieves large-scale mass production.
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Figure CN114380269B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit technology, and in particular to a method for preparing a MEMS micro-hotplate and a MEMS micro-hotplate. Background Art
[0002] Usually, a micro-electro-mechanical system (MEMS) micro-hotplate includes a substrate, a first dielectric layer, an electrode layer, and a second dielectric layer stacked in sequence. The traditional preparation method requires at least two different mask plates, and the second dielectric layer and the first dielectric layer are etched respectively through two-step photolithography and two-step etching processes to expose the measuring electrodes and pads on the electrode layer, and to form an etching window to form an insulation cavity on the substrate. This preparation method requires many photolithography and etching times, and the process is complicated, resulting in a low product yield and high cost. Summary of the invention
[0003] Based on this, it is necessary to provide a method for preparing a MEMS micro-hotplate and a MEMS micro-hotplate to address the problem of many photolithography times and etching times in the prior art.
[0004] In order to achieve the above object, on the one hand, the present invention provides a method for preparing a MEMS micro-hotplate, comprising:
[0005] providing a substrate;
[0006] forming a first dielectric layer on the substrate;
[0007] forming an electrode layer on the first dielectric layer; the electrode layer comprises a measuring electrode, a heating electrode and a plurality of pads, wherein the pads are connected to the measuring electrode or the heating electrode;
[0008] forming a second dielectric layer on the electrode layer;
[0009] The second dielectric layer and the first dielectric layer are sequentially etched in the same etching process to expose the measuring electrode, expose the plurality of pads, and form an etching window to expose a portion of the substrate; the size of the opening opposite to the measuring electrode formed after the second dielectric layer is etched is smaller than the size of the measuring electrode, and the size of the opening opposite to the pad formed after the second dielectric layer is etched is smaller than the size of the pad; and
[0010] A heat-insulating cavity is formed on the substrate opposite to the etching window.
[0011] In the preparation method of the MEMS micro-hotplate, the second dielectric layer and the first dielectric layer can be etched in the same photolithography and etching process, with a small number of etching times, a simple process, and an improved product yield, which is conducive to reducing costs and achieving large-scale mass production.
[0012] In one of the embodiments, the mask used for etching the second dielectric layer and the first dielectric layer in sequence in the same etching process includes a measuring electrode pattern, a pad pattern and an etching window pattern; the measuring electrode pattern is opposite to the measuring electrode and has a size smaller than the measuring electrode, the pad pattern is opposite to the pad and has a size smaller than the pad, and the etching window pattern is opposite to the etching window.
[0013] In one embodiment, the etching the second dielectric layer and the first dielectric layer in sequence in the same etching process comprises:
[0014] Within a first preset time period, etching the second dielectric layer to form openings respectively corresponding to the measuring electrode, the pad and the corrosion window;
[0015] In a second preset time period, the first dielectric layer is etched using the electrode layer as a hard mask in cooperation with the mask plate to form an opening opposite to the corrosion window.
[0016] In one embodiment, the step of forming a first dielectric layer on the substrate comprises:
[0017] Silicon nitride is deposited on the substrate by low-pressure chemical vapor deposition, and the stress of the silicon nitride is less than 200 MPa.
[0018] In one embodiment, the thickness of the silicon nitride is in the range of 500 nm to 2000 nm.
[0019] In one embodiment, the step of forming an electrode layer on the first dielectric layer comprises:
[0020] Metal platinum is formed on the first dielectric layer by using a magnetron sputtering method or an electron beam evaporation method.
[0021] In one embodiment, the step of forming a second dielectric layer on the electrode layer comprises:
[0022] Silicon nitride is deposited on the electrode layer by plasma enhanced chemical vapor deposition.
[0023] In one embodiment, the thickness of the silicon nitride is in the range of 300 nm to 1000 nm.
[0024] In one embodiment, the step of forming a heat-insulating cavity on the substrate opposite to the etching window comprises:
[0025] Anisotropic wet etching is performed on the substrate to form a heat-insulating cavity opposite to the etching window.
[0026] The present invention further provides a MEMS micro-hotplate, which is prepared by any one of the above-mentioned methods for preparing a MEMS micro-hotplate; the MEMS micro-hotplate comprises:
[0027] A substrate having a heat-insulating cavity formed thereon;
[0028] A first dielectric layer, located on the substrate;
[0029] an electrode layer, located on the first dielectric layer; the electrode layer comprises a measuring electrode, a heating electrode and a plurality of pads, the pads being connected to the measuring electrode or the heating electrode; and
[0030] A second dielectric layer, located on the electrode layer;
[0031] Part of the second dielectric layer is etched to expose the measuring electrode and the multiple pads; and part of the first dielectric layer is etched to form a corrosion window to expose the thermal insulation cavity; the size of the opening opposite to the measuring electrode formed after the second dielectric layer is etched is smaller than the size of the measuring electrode, and the size of the opening opposite to the pad formed after the second dielectric layer is etched is smaller than the size of the pad.
[0032] The second dielectric layer and the first dielectric layer in the above-mentioned MEMS micro-hotplate can be etched in the same photolithography and etching process, with a small number of etching times, a simple process, and an improved product yield, which is conducive to reducing costs and achieving large-scale mass production. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0034] Figure 1 Flow chart of a method for preparing a MEMS micro-hotplate provided in one embodiment.
[0035] Figure 2 It is a three-dimensional diagram of the structure obtained in step S11 in the method for preparing a MEMS micro-hotplate provided in one embodiment.
[0036] Figure 3 It is a three-dimensional diagram of the structure obtained in step S12 in the method for preparing a MEMS micro-hotplate provided in one embodiment.
[0037] Figure 4 It is a three-dimensional diagram of the structure obtained in step S13 in the method for preparing a MEMS micro-hotplate provided in one embodiment.
[0038] Figure 5 It is a perspective view of the structure obtained in step S14 in the method for preparing a MEMS micro-hotplate provided in one embodiment.
[0039] Figure 6 It is a front view of a mask provided in one embodiment.
[0040] Figure 7 It is a perspective view of the structure obtained in step S15 in the method for preparing a MEMS micro-hotplate provided in one embodiment.
[0041] Figure 8 It is a perspective view of the structure obtained in step S16 in the method for preparing a MEMS micro-hotplate provided in one embodiment.
[0042] Description of reference numerals:
[0043] 21. Substrate; 211. Insulation cavity; 22. First dielectric layer; 23. Electrode layer; 231. Measuring electrode; 232. Heating electrode; 233. Pad; 24. Second dielectric layer; 25. Etching window; 30. Mask; 31. Measuring electrode pattern; 32. Pad pattern; 33. Etching window pattern. DETAILED DESCRIPTION
[0044] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0046] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.
[0047] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.
[0048] See also Figure 1 The present invention provides a method for preparing a MEMS micro-hotplate, comprising the following steps:
[0049] Step S11, providing a substrate.
[0050] Step S12, forming a first dielectric layer on the substrate.
[0051] Step S13, forming an electrode layer on the first dielectric layer; the electrode layer includes a measuring electrode, a heating electrode and a plurality of pads; the pads are connected to the measuring electrode or the heating electrode.
[0052] Step S14, forming a second dielectric layer on the electrode layer.
[0053] Step S15, etching the second dielectric layer and the first dielectric layer in sequence in the same etching process to expose the measuring electrode, expose multiple pads, and form a corrosion window to expose part of the substrate; the size of the opening opposite to the measuring electrode formed after the second dielectric layer is etched is smaller than the size of the measuring electrode, and the size of the opening opposite to the pad formed after the second dielectric layer is etched is smaller than the size of the pad.
[0054] Step S16, forming a heat-insulating cavity on the substrate opposite to the etching window.
[0055] Specifically, a first dielectric layer, an electrode layer, and a second dielectric layer are sequentially formed on the substrate. The electrode layer includes a measuring electrode, a heating electrode, and a plurality of pads, each of which may be distributed in an edge region on the first dielectric layer, and the measuring electrode and the heating electrode may be located in a central region on the first dielectric layer. The electrode layer may also include electrode leads, so that part of the pads are connected to the measuring electrode through the electrode leads to lead out the measuring electrode, and part of the electrode leads connect part of the pads to the heating electrode to lead out the heating electrode.
[0056] After forming the second dielectric layer, a photoresist layer is formed on the second dielectric layer, and after photolithography of the photoresist is performed using a mask, the second dielectric layer and the first dielectric layer are etched in the same etching process. Part of the upper area of the second dielectric layer can be etched in a first preset time period to expose the measuring electrode and each pad and form a first window, and then part of the upper area of the first dielectric layer can be etched in a second preset time period to form a second window, and the first window is opposite to the second window to form an etching window to expose part of the substrate.
[0057] The mask may include a measurement electrode pattern, a pad pattern, and an etching window pattern, which correspond to the measurement electrode, the pad, and the etching window, respectively. The size of the measurement electrode pattern on the mask is smaller than the size of the measurement electrode on the electrode layer, and the size of the pad pattern is smaller than the size of the pad on the electrode layer, so that after the etching process of the first preset time period, the size of the opening formed on the second dielectric layer opposite to the measurement electrode will also be smaller than the size of the measurement electrode, and the size of the opening formed on the second dielectric layer opposite to the pad is also smaller than the size of the pad. Therefore, in the second preset time period, the electrode layer can be used as a hard mask to cooperate with the mask to etch the first dielectric layer, so as to prevent the etching of the first dielectric layer under the measurement electrode and each pad, so that the second dielectric layer and the first dielectric layer can be etched in the same photolithography and etching process.
[0058] In the above example, the second dielectric layer and the first dielectric layer can be etched in the same lithography and etching process, with fewer etching times, simpler processes, and improved product yields, which is conducive to reducing costs and achieving large-scale mass production.
[0059] In a specific embodiment, in step S11, refer to Figure 1 S11 steps and Figure 2 , providing a substrate 21.
[0060] The substrate 21 may be a silicon-based substrate 21. For example, a 4-inch, <100> The silicon-based substrate 21 is a single-crystal silicon with a crystal orientation and a thickness of 350 um.
[0061] In step S12, refer to Figure 1 S12 steps and Figure 3 , a first dielectric layer 22 is formed on the substrate 21.
[0062] Silicon nitride is deposited on the substrate 21 by chemical vapor deposition to form the first dielectric layer 22. Furthermore, low-stress silicon nitride can be deposited by low-pressure chemical vapor deposition (LPCVD), for example, the stress of silicon nitride is less than 200 MPa. The thickness of silicon nitride ranges from 500 nm to 2000 nm.
[0063] In step S13, refer to Figure 1 S13 step and Figure 4 , an electrode layer 23 is formed on the first dielectric layer 22 ; the electrode layer 23 includes a measuring electrode 231 , a heating electrode 232 and a plurality of pads 233 ; the pads 233 are connected to the measuring electrode 231 or to the heating electrode 232 .
[0064] First, the shape and position of the electrode layer 23 are defined by photolithography on the first dielectric layer 22, and then metal platinum is formed on the first dielectric layer 22 by magnetron sputtering or electron beam evaporation as the electrode layer 23. The thickness of the electrode layer 23 can range from 50nm to 300nm. After that, the photoresist on the first dielectric layer 22 is removed by a stripping process. The electrode layer 23 includes a measuring electrode 231 and a heating electrode 232 located in the central area and four pads 233 located in the edge area. The four pads 233 are respectively located on two diagonals of the same rectangle, including two pads 233 located on one side of the rectangle and connected to the measuring electrode 231, and two pads 233 located on the other side of the rectangle and connected to the heating electrode 232.
[0065] In step S14, refer to Figure 1 S14 steps and Figure 5 , a second dielectric layer 24 is formed on the electrode layer 23 .
[0066] Silicon nitride is deposited on the electrode layer 23 by chemical vapor deposition to form the second dielectric layer 24. Furthermore, silicon nitride may be deposited by plasma enhanced chemical vapor deposition (PECVD) and the thickness of silicon nitride may range from 300 nm to 1000 nm.
[0067] In step S15, refer to Figure 1 S15 steps and Figure 6 and Figure 7 Combined with Figure 4 , the second dielectric layer 24 and the first dielectric layer 22 are etched in sequence to expose the measuring electrode 231 and the plurality of pads 233 and form an etching window 25 to expose a portion of the substrate 21; the size of the opening opposite to the measuring electrode 231 formed after the second dielectric layer 24 is etched is smaller than the size of the measuring electrode 231 and the size of the opening opposite to the pad 233 formed after the second dielectric layer 24 is etched is smaller than the size of the pad 233.
[0068] Specifically, a photoresist (not shown) is first spin-coated on the second dielectric layer 24, and the photoresist is photolithographically processed using a mask 30 to transfer the pattern on the mask 30 to the photoresist. The mask 30 includes a measurement electrode pattern 31, a pad pattern 32, and an etching window pattern 33. The size of the measurement electrode pattern 31 is smaller than the size of the measurement electrode 231, and the size of the pad pattern 32 is smaller than the size of the pad 233. After the photoresist is photolithographically processed, openings are formed on the photoresist that are opposite to the measurement electrode 231, the pad 233, and the etching window 25, respectively, and the size of the opening opposite to the measurement electrode 231 is smaller than the size of the measurement electrode 231, and the size of the opening opposite to the pad 233 is smaller than the size of the pad 233.
[0069] Afterwards, the second dielectric layer 24 and the first dielectric layer 22 are etched in sequence to expose the measuring electrode 231 and the plurality of pads 233 and form an etching window 25 to expose a portion of the substrate 21. Within a first preset time period, the second dielectric layer 24 is etched to form openings corresponding to the measuring electrode 231, the pad 233 and the etching window 25, respectively, and the size of the opening corresponding to the measuring electrode 231 on the second dielectric layer 24 is smaller than the size of the measuring electrode 231 and the size of the opening corresponding to the pad 233 on the second dielectric layer 24 is smaller than the size of the pad 233. In the second preset time period, the electrode layer 23 is used as a hard mask in cooperation with the mask plate 30 to etch the first dielectric layer 20. Specifically, the electrode layer 23 is used as a hard mask in cooperation with the photoresist on the second dielectric layer 24 to etch the first dielectric layer 22. Although openings are formed on the photoresist corresponding to the measuring electrode 231, the pad 233 and the corrosion window 25 respectively after the pattern on the mask plate 30 is transferred to the photoresist, due to the blocking effect of the measuring electrode 231 and the pad 233 on the electrode layer 23, an opening corresponding to the corrosion window 25 is formed on the first dielectric layer 22, thereby forming the corrosion window 25.
[0070] In step S16, see Figure 1 S16 steps and Figure 8 , a heat-insulating cavity 211 is formed on the substrate 21 opposite to the etching window 25.
[0071] The substrate 21 is anisotropically wet etched to form a heat-insulating cavity 211 opposite to the etching window 25 .
[0072] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.
[0073] Please continue reading Figure 8 The present invention further provides a MEMS micro-hotplate, which is prepared by the preparation method of the MEMD micro-hotplate in any of the above embodiments. The MEMS micro-hotplate includes a substrate 21, a first dielectric layer 22, an electrode layer 23, and a second dielectric layer 24.
[0074] A heat-insulating cavity 211 is formed on the substrate 21. A first dielectric layer 22 is located on the substrate 21. An electrode layer 23 is located on the first dielectric layer 22; the electrode layer 23 includes a measuring electrode 231, a heating electrode 232, and a plurality of pads 233, and the pads 233 are connected to the measuring electrode 231 or the heating electrode 232. A second dielectric layer 24 is located on the electrode layer 23. Part of the second dielectric layer 24 is etched to expose the measuring electrode 231 and the plurality of pads 233; and part of the first dielectric layer 22 is etched to form an etching window 25 to expose the heat-insulating cavity 211; the size of the opening opposite to the measuring electrode 231 formed after the second dielectric layer 24 is etched is smaller than the size of the measuring electrode 231, and the size of the opening opposite to the pad 233 formed after the second dielectric layer 24 is etched is smaller than the size of the pad 233.
[0075] In the above-mentioned MEMS micro-hotplate, the second dielectric layer 24 and the first dielectric layer 22 can be etched in the same photolithography and etching process, with a small number of etching times, a simple process, and an improved product yield, which is conducive to reducing costs and achieving large-scale mass production.
[0076] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
[0077] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0078] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.
Claims
1. A method for preparing a MEMS micro-hotplate, characterized in that: include: providing a substrate; forming a first dielectric layer on the substrate; forming an electrode layer on the first dielectric layer; the electrode layer comprises a measuring electrode, a heating electrode and a plurality of pads, wherein the pads are connected to the measuring electrode or the heating electrode; forming a second dielectric layer on the electrode layer; The second dielectric layer and the first dielectric layer are sequentially etched in the same etching process to expose the measuring electrode, expose the plurality of pads, and form an etching window to expose a portion of the substrate; the size of the opening opposite to the measuring electrode formed after the second dielectric layer is etched is smaller than the size of the measuring electrode, and the size of the opening opposite to the pad formed after the second dielectric layer is etched is smaller than the size of the pad; as well as forming a heat-insulating cavity on the substrate opposite to the etching window; The mask used for etching the second dielectric layer and the first dielectric layer in sequence in the same etching process includes a measuring electrode pattern, a pad pattern and an etching window pattern; the measuring electrode pattern is opposite to the measuring electrode and has a size smaller than the measuring electrode, the pad pattern is opposite to the pad and has a size smaller than the pad, and the etching window pattern is opposite to the etching window.
2. The method for preparing a MEMS micro-hotplate according to claim 1, characterized in that: The etching of the second dielectric layer and the first dielectric layer in sequence in the same etching process comprises: Within a first preset time period, etching the second dielectric layer to form openings respectively corresponding to the measuring electrode, the pad and the corrosion window; In a second preset time period, the first dielectric layer is etched using the electrode layer as a hard mask in cooperation with the mask plate to form an opening opposite to the corrosion window.
3. The method for preparing a MEMS micro-hotplate according to claim 1, characterized in that: The step of forming a first dielectric layer on the substrate comprises: Silicon nitride is deposited on the substrate by low-pressure chemical vapor deposition, and the stress of the silicon nitride is less than 200 MPa.
4. The method for preparing a MEMS micro-hotplate according to claim 3, characterized in that: The thickness of the silicon nitride ranges from 500nm to 2000nm.
5. The method for preparing a MEMS micro-hotplate according to claim 1, characterized in that: The step of forming an electrode layer on the first dielectric layer comprises: Metal platinum is formed on the first dielectric layer by using a magnetron sputtering method or an electron beam evaporation method.
6. The method for preparing a MEMS micro-hotplate according to claim 1, characterized in that: The step of forming a second dielectric layer on the electrode layer comprises: Silicon nitride is deposited on the electrode layer by plasma enhanced chemical vapor deposition.
7. The method for preparing a MEMS micro-hotplate according to claim 6, characterized in that: The thickness of the silicon nitride is in the range of 300nm to 1000nm.
8. The method for preparing a MEMS micro-hotplate according to claim 1, characterized in that: The step of forming a heat-insulating cavity on the substrate opposite to the etching window comprises: Anisotropic wet etching is performed on the substrate to form a heat-insulating cavity opposite to the etching window.
9. A MEMS micro-hotplate, characterized in that: The MEMS micro-hotplate is prepared by the method for preparing the MEMS micro-hotplate according to any one of claims 1 to 8; the MEMS micro-hotplate comprises: A substrate having a heat-insulating cavity formed thereon; A first dielectric layer, located on the substrate; an electrode layer, located on the first dielectric layer; the electrode layer comprises a measuring electrode, a heating electrode and a plurality of pads, the pads being connected to the measuring electrode or the heating electrode; and A second dielectric layer, located on the electrode layer; Part of the second dielectric layer is etched to expose the measuring electrode and the multiple pads; and part of the first dielectric layer is etched to form a corrosion window to expose the thermal insulation cavity; the size of the opening opposite to the measuring electrode formed after the second dielectric layer is etched is smaller than the size of the measuring electrode, and the size of the opening opposite to the pad formed after the second dielectric layer is etched is smaller than the size of the pad.
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