A low-voltage, low-leakage current unidirectional protection device and its preparation method

Abstract

The present invention discloses a low-voltage, low-leakage current unidirectional protection device and a preparation method thereof. The preparation method comprises: preparing an N-type substrate material; preparing an N-type epitaxial layer; growing a sacrificial oxide layer, forming a P-type diffusion region pattern by front-side photolithography, injecting boron from the front side, and driving the boron forward; forming an N+ diffusion region pattern by front-side photolithography, and injecting phosphorus from the front side; forming a P+ diffusion region pattern by front-side photolithography, injecting boron from the front side, and driving the boron forward to form an N+ diffusion region and a P+ diffusion region; depositing an isolation dielectric layer on the front side, and forming a contact hole region by front-side photolithography; sputtering or evaporating a metal or alloy from the front side; and thinning the back side and metallizing the back side. The invention introduces a P+ diffusion region above the P-type diffusion region, and the photolithography pitch of the P+ diffusion region is L. The size of L is designed so that the PNP structure composed of the P+ diffusion region, the N-type epitaxial layer, and the P+ diffusion region can achieve punch-through at a breakdown voltage of 3.3-6V, thereby meeting the requirements of low voltage and low leakage current. By optimizing the concentration of the N-type epitaxial layer and the size of the photolithography pitch L, a leakage current of less than 1uA can be obtained.

Description

Technical Field

[0001] The present invention relates to the field of electronic science and technology, and in particular to a low-voltage, low-leakage current, unidirectional protection device and a preparation method thereof. Background Art

[0002] With the advent of modern VLSI (Very Large Scale Integrated Circuits), ultra-deep submicron (Ultra-Deep Submicron) processes have become the mainstream of integrated circuit manufacturing. To reduce VLSI power consumption, the operating voltage of chips is currently primarily 3.3V (the breakdown voltage of the components within the chip is a minimum of approximately 7V). To protect the chip, the breakdown voltage of the corresponding protection device must also be reduced, requiring a protection device with a breakdown voltage of less than 6V.

[0003] According to semiconductor physics theory, the breakdown voltage of a silicon-based PN junction structure is avalanche breakdown above 6V and Zener breakdown below 6V. High-concentration N- and P-regions are commonly used to achieve breakdown voltages below 6V. However, due to the narrow depletion layer, leakage current increases exponentially with decreasing voltage, typically ranging from 10-200µA, which is unacceptable for integrated circuits. In a traditional low-voltage unidirectional diode structure, when the front metal layer is connected to a high potential and the back metal layer is connected to a low potential, current flows sequentially through the P-type diffusion region, the N-type epitaxial layer, and the N-type substrate material, exhibiting the diode's forward conduction characteristic. When the back metal layer is connected to a high potential and the front metal layer is connected to a low potential, current flows sequentially through the N-type substrate material, the N-type epitaxial layer, and the P-type diffusion region, exhibiting the diode's reverse breakdown characteristic. Due to the high concentrations of the N-type epitaxial layer and the P-type diffusion region, this structure exhibits high leakage current, typically ranging from 50-800µA, even when the breakdown voltage is below 6V. This increases the static losses of the integrated circuit, necessitating parameter optimization.

[0004] Patent application publication number CN 111370407A discloses a low-voltage, low-capacitance, unidirectional ESD protection device and its manufacturing method. The device comprises a P-type single crystal material, an isolation dielectric layer, a front metal region, and a back metal region. N-type isolation regions are provided on either side of the P-type single crystal material, a P-type adjustment region and an N-type diffusion region are provided above the P-type single crystal material, and a P-type adjustment region is provided below the P-type single crystal material. The present invention can achieve low-voltage, low-capacitance, unidirectional ESD protection on a single chip, with low packaging difficulty and high reliability. The device includes both a punch-through transistor and a capacitance reduction diode. The punch-through transistor adjusts longitudinal breakdown to lateral breakdown, and the introduction of a P-type adjustment region allows for lower leakage current at low voltages. This requirement for low voltage and low leakage current cannot be achieved by reducing static loss, resulting in a leakage current of less than 1uA. Summary of the Invention

[0005] The object of the present invention is to provide a low-voltage, low-leakage current, unidirectional protection device having a lower breakdown voltage and a smaller leakage current, and a preparation method thereof.

[0006] The technical solution adopted in the present invention is:

[0007] A low-voltage, low-leakage current unidirectional protection device has a cross-sectional structure comprising an N-type substrate material, an N-type epitaxial layer, a P-type diffusion region, a P+ diffusion region, an N+ diffusion region, a surface passivation layer, a metal layer, and a back metal layer. The N-type epitaxial layer is located on the N-type substrate material. The top of the N-type epitaxial layer is sequentially provided with an N+ diffusion region, a P+ diffusion region, a P-type diffusion region, a P+ diffusion region, and an N+ diffusion region. The N+ diffusion region and the P+ diffusion region are interconnected via a metal layer on the upper surface of the N-type epitaxial layer. A P+ diffusion region is introduced above the P-type diffusion region. A surface passivation layer is provided at the connection between the N+ diffusion region and the P+ diffusion region and the metal layer on both sides.

[0008] Furthermore, the photolithography spacing between the introduced P+ diffusion region and the P+ diffusion regions on both sides of the P-type diffusion region is L, and L is 0.5-2 μm.

[0009] Furthermore, a surface passivation layer is located on the upper surface of the N-type epitaxial layer.

[0010] Furthermore, a back metal layer is provided at the bottom of the N-type substrate material.

[0011] A method for preparing a low-voltage, low-leakage current unidirectional protection device, characterized in that it comprises the following steps:

[0012] Step 1: Prepare N-type substrate material, the crystal orientation of the N-type substrate material is <111> , resistivity is 0.002-0.004Ω.cm, sheet thickness is 600-700μm;

[0013] Step 2: Prepare an N-type epitaxial layer with a resistivity of 5-10Ω.cm and a thickness of 10-20μm;

[0014] Step 3: Grow a dielectric layer, i.e., a sacrificial oxide layer, with a thickness of 680-1000Å. Photolithography is performed on the front to form a P-type diffusion region pattern. Boron is implanted on the front with a boron implantation dose of 5E14-1E15cm -2 , energy is 120-200KeV, boron driving, the temperature of boron driving is 1100-1200℃, the time is 60-180min, and a P-type diffusion region is formed;

[0015] Step 4: Photolithography on the front side forms the N+ diffusion region pattern, and phosphorus is implanted on the front side with a phosphorus implantation dose of 3E15-6E15cm -2 , energy is 50-100KeV;

[0016] Step 5: The P+ diffusion region pattern is formed by photolithography on the front side. The photolithography spacing of the P+ diffusion region is L. Boron is implanted on the front side with a boron implantation dose of 1E15-4E15cm -2 , energy is 30-80KeV, boron driving, the temperature of boron driving is 1000-1100℃, the time is 30-90min, forming N+ diffusion area and P+ diffusion area;

[0017] Step 6: Deposit an isolation dielectric layer on the front side, photolithography to form a contact hole area on the front side, and after photolithography of the contact hole, deposit a layer of TI / TIN;

[0018] Step 7: sputter or evaporate metal or alloy on the front side. The temperature of the alloy is 360-430℃ and the time is 25-45min.

[0019] Step 8: Back side thinning, thinning to a thickness of 150-300μm, back side metal.

[0020] Furthermore, the isolation dielectric layer in step 6 is tetraethoxysilane TEOS, with a thickness of 5000-10000 Å.

[0021] Furthermore, the metal sputtered or evaporated on the front side in step 7 is aluminum, aluminum copper, or aluminum silicon copper, with a thickness of 2-4 μm.

[0022] Furthermore, in step 8, the back metal is Ti / Ni / Ag, and the metal thickness is 500-1500Å / 2000-4000Å / 10000-15000Å, respectively.

[0023] The beneficial effects of the present invention are as follows: 1. It provides a low-voltage and low-leakage current unidirectional protection device, which can obtain a lower breakdown voltage and a smaller leakage current;

[0024] 2. The present invention introduces a P+ diffusion region above the P-type diffusion region. The photolithography pitch of the P+ diffusion region is L. The N+ diffusion region and the P+ diffusion region are interconnected through the metal layer and have the same potential. Since the N+ diffusion region, the N-type substrate material, and the N-type epitaxial layer are all doped regions of the same type and have the same potential, by effectively designing the size of the photolithography pitch L, the PNP structure composed of the P+ diffusion region (below the left or right area of ​​the metal layer), the N-type epitaxial layer, and the P+ diffusion region (below the central area of ​​the metal layer) can be punched through within a breakdown voltage range of 3.3-6V, meeting the requirements of low voltage and low leakage current. By reasonably optimizing the concentration of the N-type epitaxial layer 102 and the size of the photolithography pitch L, a leakage current of less than 1uA can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] Figure 1This is a cross-sectional structural diagram of a low-voltage, low-leakage current, unidirectional protection device of the present invention;

[0027] Figure 2 Schematic diagram of IV characteristics of a low-voltage, low-leakage current unidirectional protection device of the present invention;

[0028] Figure 3 is a cross-sectional schematic diagram of step 1 of the present invention;

[0029] Figure 4 is a cross-sectional schematic diagram of step 2 of the present invention;

[0030] Figure 5 is a cross-sectional schematic diagram of step 3 of the present invention;

[0031] Figure 6 is a cross-sectional schematic diagram of step 4 of the present invention;

[0032] Figure 7 is a cross-sectional schematic diagram of step 5 of the present invention;

[0033] Figure 8 It is a cross-sectional schematic diagram of step 6 of the present invention.

[0034] Among them: 101, N-type substrate material; 102, N-type epitaxial layer; 103, P-type diffusion region; 104, P+ diffusion region; 105, N+ diffusion region; 106, surface passivation layer; 107, metal layer; 108, back metal layer; 109, dielectric layer. DETAILED DESCRIPTION

[0035] Example 1

[0036] like Figure 1-8 As shown, a cross-sectional structure of a low-voltage, low-leakage current unidirectional protection device includes an N-type substrate material 101, an N-type epitaxial layer 102, a P-type diffusion region 103, a P+ diffusion region 104, an N+ diffusion region 105, a surface passivation layer 106, a metal layer 107, and a back metal layer 108. The N-type epitaxial layer 102 is located on the N-type substrate material 101. The top of the N-type epitaxial layer 102 is sequentially provided with an N+ diffusion region 105, a P+ diffusion region 104, a P-type diffusion region 103, and a P+ diffusion region 105. 04, N+ diffusion region 105. N+ diffusion region 105 and P+ diffusion region 104 are interconnected through metal layer 107 on the upper surface of N-type epitaxial layer 102. P+ diffusion region 104 is introduced above P-type diffusion region 103. The photolithographic spacing between the introduced P+ diffusion region 104 and the P+ diffusion regions 104 on both sides of P-type diffusion region 103 is L, which is 0.5μm. Surface passivation layer 106 is provided at the connection between N+ diffusion region 105 and P+ diffusion region 104 and metal layer 107. Surface passivation layer 106 is located on the upper surface of N-type epitaxial layer 102. A back metal layer 108 is provided at the bottom of N-type substrate material 101.

[0037] A method for preparing a low-voltage, low-leakage current unidirectional protection device comprises the following steps:

[0038] Step 1: Prepare N-type substrate material 101, the crystal orientation of the N-type substrate material 101 is <111> , resistivity is 0.002Ω.cm, and sheet thickness is 600μm;

[0039] Step 2: Prepare an N-type epitaxial layer 102, the N-type epitaxial layer 102 has a resistivity of 5Ω.cm and a thickness of 10μm;

[0040] Step 3: Grow a dielectric layer 109, i.e. a sacrificial oxide layer (e.g. Figure 4 As shown), the thickness is 680Å, the front side is photolithographically formed into a P-type diffusion region 103 pattern, and the front side is boron implanted with a boron implantation dose of 5E14cm -2 , energy is 120KeV, boron driving, boron driving temperature is 1100℃, time is 60min, forming P-type diffusion region 103;

[0041] Step 4: Photolithography is performed on the front surface to form the N+ diffusion region 105 pattern, and phosphorus is implanted on the front surface with a phosphorus implantation dose of 3E15cm -2 , energy is 50KeV;

[0042] Step 5: The P+ diffusion region 104 pattern is formed by photolithography on the front side. The photolithography pitch of the P+ diffusion region 104 is L. Boron is implanted on the front side with a boron implantation dose of 1E15cm -2 , energy is 30KeV, boron driving, boron driving temperature is 1000℃, time is 30min, forming N+ diffusion region 105 and P+ diffusion region 104;

[0043] Step 6: Deposit an isolation dielectric layer on the front side. The isolation dielectric layer is tetraethoxysilane TEOS with a thickness of 5000Å. Photolithography is performed on the front side to form a contact hole area. After photolithography of the contact hole, a layer of TI / TIN is deposited. This can effectively reduce the failure rate of metal overheating while reducing the contact resistance.

[0044] Step 7: sputter or evaporate metal on the front side, the metal is aluminum or aluminum copper or aluminum silicon copper, the thickness is 2 μm, the alloy temperature is 360 ° C, and the time is 25 minutes;

[0045] Step 8: Back side thinning, thinning to a thickness of 150-300μm, back side metal, the back side metal is Ti / Ni / Ag, and the metal thickness is 500Å / 2000Å / 10000Å respectively.

[0046] The IV characteristics of the unidirectional protection device of the present invention are as follows: Figure 2As shown, when the metal layer 107 is connected to a high potential and the back metal layer 108 is connected to a low potential, the current passes through the P+ diffusion region 104 (below the central area of ​​the metal layer 107), the P-type diffusion region 103, the N-type epitaxial layer 102, and the N-type substrate material 101 in sequence, showing the forward conduction characteristic of the diode. When the back metal layer 108 is connected to a high potential and the metal layer 107 is connected to a low potential, the current passes through the N-type substrate material 101, the N-type epitaxial layer 102, the N+ diffusion region 105, the P+ diffusion region 104 (below the left or right area of ​​the metal layer 107), and the P+ diffusion region 104 (below the central area of ​​the metal layer 107) in sequence, showing the reverse breakdown characteristic of the diode.

[0047] Example 2

[0048] like Figure 1-8 As shown, a cross-sectional structure of a low-voltage, low-leakage current unidirectional protection device includes an N-type substrate material 101, an N-type epitaxial layer 102, a P-type diffusion region 103, a P+ diffusion region 104, an N+ diffusion region 105, a surface passivation layer 106, a metal layer 107, and a back metal layer 108. The N-type epitaxial layer 102 is located on the N-type substrate material 101. The top of the N-type epitaxial layer 102 is sequentially provided with an N+ diffusion region 105, a P+ diffusion region 104, a P-type diffusion region 103, a P+ diffusion region 104, N+ diffusion region 105. N+ diffusion region 105 and P+ diffusion region 104 are interconnected via a metal layer 107 on the upper surface of N-type epitaxial layer 102. P+ diffusion region 104 is introduced above P-type diffusion region 103. The photolithographic spacing between the introduced P+ diffusion region 104 and the P+ diffusion regions 104 on both sides of P-type diffusion region 103 is L, which is 2μm. Surface passivation layer 106 is provided at the junctions between N+ diffusion region 105 and P+ diffusion region 104 and metal layer 107. Surface passivation layer 106 is located on the upper surface of N-type epitaxial layer 102. A back metal layer 108 is provided at the bottom of N-type substrate material 101.

[0049] A method for preparing a low-voltage, low-leakage current unidirectional protection device comprises the following steps:

[0050] Step 1: Prepare N-type substrate material 101, the crystal orientation of the N-type substrate material 101 is <111> , resistivity is 0.004Ω.cm, sheet thickness is 700μm;

[0051] Step 2: Prepare an N-type epitaxial layer 102, the N-type epitaxial layer 102 has a resistivity of 10Ω.cm and a thickness of 20μm;

[0052] Step 3: Grow a dielectric layer 109, i.e. a sacrificial oxide layer (e.g. Figure 4 As shown), the thickness is 1000Å, the P-type diffusion region 103 pattern is formed by front lithography, and boron is implanted on the front with a boron implantation dose of 1E15cm -2, energy is 200KeV, boron driving, boron driving temperature is 1200℃, time is 180min, forming P-type diffusion region 103;

[0053] Step 4: The N+ diffusion region 105 pattern is formed by photolithography on the front side, and phosphorus is implanted on the front side with a phosphorus implantation dose of 6E15cm -2 , energy is 100KeV;

[0054] Step 5: The P+ diffusion region 104 pattern is formed by photolithography on the front side. The photolithography pitch of the P+ diffusion region 104 is L. Boron is implanted on the front side with a boron implantation dose of 4E15cm -2 , energy is 80KeV, boron driving, the boron driving temperature is 11100℃, the time is 90min, and the N+ diffusion region 105 and the P+ diffusion region 104 are formed;

[0055] Step 6: Deposit an isolation dielectric layer on the front side. The isolation dielectric layer is tetraethoxysilane TEOS with a thickness of 10,000 Å. Photolithography is performed on the front side to form a contact hole area. After photolithography of the contact hole, a layer of TI / TIN is deposited. This can effectively reduce the failure rate of metal overheating while reducing the contact resistance.

[0056] Step 7: sputter or evaporate metal on the front side, the metal is aluminum or aluminum copper or aluminum silicon copper, the thickness is 4μm, the alloy temperature is 430℃, and the time is 45min;

[0057] Step 8: Back side thinning, thinning to a thickness of 300μm, back side metal, the back side metal is Ti / Ni / Ag, and the metal thickness is 1500Å / 4000Å / 15000Å respectively.

[0058] The IV characteristics of the unidirectional protection device of the present invention are as follows: Figure 2 As shown, when the metal layer 107 is connected to a high potential and the back metal layer 108 is connected to a low potential, the current passes through the P+ diffusion region 104 (below the central area of ​​the metal layer 107), the P-type diffusion region 103, the N-type epitaxial layer 102, and the N-type substrate material 101 in sequence, showing the forward conduction characteristic of the diode. When the back metal layer 108 is connected to a high potential and the metal layer 107 is connected to a low potential, the current passes through the N-type substrate material 101, the N-type epitaxial layer 102, the N+ diffusion region 105, the P+ diffusion region 104 (below the left or right area of ​​the metal layer 107), and the P+ diffusion region 104 (below the central area of ​​the metal layer 107) in sequence, showing the reverse breakdown characteristic of the diode.

[0059] Example 3

[0060] like Figure 1-8As shown, a cross-sectional structure of a low-voltage, low-leakage current unidirectional protection device includes an N-type substrate material 101, an N-type epitaxial layer 102, a P-type diffusion region 103, a P+ diffusion region 104, an N+ diffusion region 105, a surface passivation layer 106, a metal layer 107, and a back metal layer 108. The N-type epitaxial layer 102 is located on the N-type substrate material 101. The top of the N-type epitaxial layer 102 is sequentially provided with an N+ diffusion region 105, a P+ diffusion region 104, a P-type diffusion region 103, and a P+ diffusion region 104. N+ diffusion region 105 is interconnected with P+ diffusion region 104 via metal layer 107 on the upper surface of N-type epitaxial layer 102. P+ diffusion region 104 is introduced above P-type diffusion region 103. The photolithographic spacing between the introduced P+ diffusion region 104 and the P+ diffusion regions 104 on both sides of P-type diffusion region 103 is L, which is 1.2μm. Surface passivation layer 106 is provided at the junctions between N+ diffusion region 105 and P+ diffusion region 104 and metal layer 107. Surface passivation layer 106 is located on the upper surface of N-type epitaxial layer 102. A back metal layer 108 is provided at the bottom of N-type substrate material 101.

[0061] A method for preparing a low-voltage, low-leakage current unidirectional protection device comprises the following steps:

[0062] Step 1: Prepare N-type substrate material 101, the crystal orientation of the N-type substrate material 101 is <111> , resistivity is 0.003Ω.cm, and sheet thickness is 650μm;

[0063] Step 2: Prepare an N-type epitaxial layer 102, the N-type epitaxial layer 102 has a resistivity of 7Ω.cm and a thickness of 15μm;

[0064] Step 3: Grow a dielectric layer 109, i.e. a sacrificial oxide layer (e.g. Figure 4 As shown), the thickness is 840Å, the front side is photolithographically formed into a P-type diffusion region 103 pattern, and the front side is boron implanted with a boron implantation dose of 1E15cm -2 , energy is 160KeV, boron driving, boron driving temperature is 1150℃, time is 120min, forming P-type diffusion region 103;

[0065] Step 4: The N+ diffusion region 105 pattern is formed by photolithography on the front side, and phosphorus is implanted on the front side with a phosphorus implantation dose of 6E15cm -2 , energy is 70KeV;

[0066] Step 5: The P+ diffusion region 104 pattern is formed by photolithography on the front side. The photolithography pitch of the P+ diffusion region 104 is L. Boron is implanted on the front side with a boron implantation dose of 4E15cm -2 , energy is 60KeV, boron driving, boron driving temperature is 1050℃, time is 60min, forming N+ diffusion region 105 and P+ diffusion region 104;

[0067] Step 6: Deposit an isolation dielectric layer on the front side. The isolation dielectric layer is tetraethoxysilane TEOS with a thickness of 7500Å. Photolithography is performed on the front side to form a contact hole area. After photolithography of the contact hole, a layer of TI / TIN is deposited. This can effectively reduce the failure rate of metal overheating while reducing the contact resistance.

[0068] Step 7: sputtering or evaporating metal on the front, the metal is aluminum or aluminum copper or aluminum silicon copper, the thickness is 3 μm, the alloy temperature is 400 ° C, and the time is 35 minutes;

[0069] Step 8: Back side thinning, thinning to a thickness of 150-300μm, back side metal, the back side metal is Ti / Ni / Ag, and the metal thickness is 1000Å / 3000Å / 13000Å ​​respectively.

[0070] The IV characteristics of the unidirectional protection device of the present invention are as follows: Figure 2 As shown, when the metal layer 107 is connected to a high potential and the back metal layer 108 is connected to a low potential, the current passes through the P+ diffusion region 104 (below the central area of ​​the metal layer 107), the P-type diffusion region 103, the N-type epitaxial layer 102, and the N-type substrate material 101 in sequence, showing the forward conduction characteristic of the diode. When the back metal layer 108 is connected to a high potential and the metal layer 107 is connected to a low potential, the current passes through the N-type substrate material 101, the N-type epitaxial layer 102, the N+ diffusion region 105, the P+ diffusion region 104 (below the left or right area of ​​the metal layer 107), and the P+ diffusion region 104 (below the central area of ​​the metal layer 107) in sequence, showing the reverse breakdown characteristic of the diode.

[0071] The present invention introduces a P+ diffusion region 104 above the P-type diffusion region 103. The photolithographic pitch of the P+ diffusion region 104 is L. The N+ diffusion region 105 is interconnected with the P+ diffusion region 104 via a metal layer 107 and has the same potential. Because the N+ diffusion region 105, the N-type substrate material 101, and the N-type epitaxial layer 102 are all doped with the same type of region and have the same potential, by effectively designing the size of the photolithographic pitch L, the PNP structure consisting of the P+ diffusion region 104 (below the left or right area of ​​the metal layer 107), the N-type epitaxial layer 102, and the P+ diffusion region 104 (below the center area of ​​the metal layer 107) can achieve punchthrough within a breakdown voltage range of 3.3-6V, meeting the requirements of low voltage and low leakage current. By rationally optimizing the concentration of the N-type epitaxial layer 102 and the size of the photolithographic pitch L, a leakage current of less than 1uA is achieved.

[0072] The embodiments described above are merely descriptions of preferred implementations of the present invention and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by those skilled in the art should be included in the scope of protection determined by the claims of the present invention.

Claims

1. A low-voltage, low-leakage current, unidirectional protection device, characterized by: The cross-sectional structure of the unidirectional protection device includes an N-type substrate material, an N-type epitaxial layer, a P-type diffusion region, a P+ diffusion region, an N+ diffusion region, a surface passivation layer, a front metal layer, and a back metal layer. The N-type epitaxial layer is located on the N-type substrate material. The top of the N-type epitaxial layer is sequentially provided with an N+ diffusion region, a first P+ diffusion region, a P-type diffusion region, a second P+ diffusion region, and an N+ diffusion region. The N+ diffusion region and the P+ diffusion region are interconnected through the front metal layer on the upper surface of the N-type epitaxial layer. A third P+ diffusion region is introduced above the P-type diffusion region. The photolithography spacing between the introduced third P+ diffusion region and the first P+ diffusion region and the second P+ diffusion region on both sides of the P-type diffusion region is L, and L is 0.5-2 μm. A surface passivation layer is provided at the connection between the N+ diffusion region, the first P+ diffusion region, the second P+ diffusion region, the third P+ diffusion region and the upper front metal layer.

2. The low-voltage, low-leakage current, unidirectional protection device according to claim 1, characterized in that: The surface passivation layer is located on the upper surface of the N-type epitaxial layer.

3. The low-voltage, low-leakage current, unidirectional protection device according to claim 1, characterized in that: A back metal layer is provided at the bottom of the N-type substrate material.

4. The method for preparing a low-voltage, low-leakage current unidirectional protection device according to claim 1, characterized in that: The steps include: Step 1: Prepare N-type substrate material, the crystal orientation of the N-type substrate material is <111> , resistivity is 0.002-0.004Ω.cm, sheet thickness is 600-700μm; Step 2: Prepare an N-type epitaxial layer with a resistivity of 5-10Ω.cm and a thickness of 10-20μm; Step 3: Grow a dielectric layer, i.e., a sacrificial oxide layer, with a thickness of 680-1000Å. Form a P-type diffusion region pattern by front photolithography. Perform boron implantation on the front with a boron implant dose of 5E14-1E15cm-2 and an energy of 120-200KeV. Drive the boron at a temperature of 1100-1200℃ for 60-180min to form a P-type diffusion region. Step 4: Photolithography is performed on the front side to form an N+ diffusion region pattern, and phosphorus is implanted on the front side with a phosphorus implantation dose of 3E15-6E15cm-2 and an energy of 50-100KeV to form an N+ diffusion region; Step 5: The front side is photolithographically formed into a P+ diffusion region pattern with a photolithography pitch of L. Boron is implanted on the front side with a boron implantation dose of 1E15-4E15cm-2 and an energy of 30-80KeV. The boron is driven in at a temperature of 1000-1100°C for 30-90 minutes to form the first P+ diffusion region, the second P+ diffusion region, and the third P+ diffusion region. Step 6: Deposit an isolation dielectric layer on the front side, photolithography to form a contact hole area on the front side, and after photolithography of the contact hole, deposit a layer of TI / TIN; Step 7: sputter or evaporate metal or alloy on the front side. The temperature of the alloy is 360-430℃ and the time is 25-45min. Step 8: Back side thinning, thinning to a thickness of 150-300μm, back side metal.

5. The method for preparing a low-voltage, low-leakage current unidirectional protection device according to claim 4, characterized in that: The isolation dielectric layer in step 6 is tetraethoxysilane TEOS, and has a thickness of 5000-10000 Å.

6. The method for preparing a low-voltage, low-leakage current unidirectional protection device according to claim 4, characterized in that: The metal sputtered or evaporated on the front side in step 7 is aluminum, aluminum copper, or aluminum silicon copper, with a thickness of 2-4 μm.

7. The method for preparing a low-voltage, low-leakage current unidirectional protection device according to claim 4, characterized in that: In step 8, the back metal is Ti / Ni / Ag, and the metal thickness is 500-1500Å / 2000-4000Å / 10000-15000Å respectively.

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