A scheduling method, device and computing equipment based on file cache

Abstract

The application discloses a scheduling method and device based on file cache and computing equipment. The method comprises the following steps: in the CPUs of all nodes of a multi-core system, at least based on the CPU load size, a migration-out process CPU and a migration target CPU are determined; when the migration-out process CPU and the migration target CPU do not satisfy a load balancing condition, all processes on the migration-out process CPU are traversed, and according to the size of the file cache accessed by each process, a to-be-migrated process is determined; the distance between the node corresponding to the file cache accessed by the determined to-be-migrated process and the node where the migration target CPU is located is calculated; and the to-be-migrated process with the distance less than or equal to a distance threshold is migrated to the migration target CPU. The scheduling method based on file cache can make the process quickly use the file cache, so as to satisfy the scene performance in the high file cache.

Description

[0001] This application is a divisional application of invention patent application 2021115328377, filed on December 15, 2021. Technical Field

[0002] This invention relates to the field of data scheduling technology, and in particular to a scheduling method, apparatus and computing device based on file caching. Background Technology

[0003] In multi-core systems, to better utilize the parallel capabilities of multiple CPUs, the scheduler distributes processes evenly across the CPUs. However, with technological advancements, the number of CPUs on machines is increasing, leading to the introduction of NUMA (Non-Uniform Memory Access) architecture for management. Figure 1 As shown, a NUMA system consists of multiple CPU nodes, and the entire memory system can be treated as a whole, accessible to any processor. However, processors have lower latency and greater bandwidth when accessing local memory nodes, while accessing remote memory nodes is slower.

[0004] In related technologies, during load balancing, the busiest subdomain is found in the current domain, and then the busiest CPU in the subdomain is found. By calculating the load, some processes are migrated to the currently idle CPU to achieve load balancing. However, if the CPU in the domain currently being load balanced is a distant node, there may be CPU migration across distant nodes, resulting in performance loss. Summary of the Invention

[0005] To address this, the present invention provides a scheduling method, apparatus, and computing device based on file caching, in an attempt to solve or at least alleviate at least one of the problems mentioned above.

[0006] According to one aspect of the present invention, a file cache-based scheduling method is provided, comprising the steps of: determining, among the CPUs of all nodes in a multi-core system, a process CPU to be migrated and a target CPU to be migrated, at least based on the CPU load size; when the process CPU to be migrated and the target CPU to be migrated do not meet the load balancing condition, traversing all processes on the process CPU to be migrated, and determining the process to be migrated according to the size of the file cache accessed by each process; calculating the distance between the node corresponding to the file cache accessed by the determined process to be migrated and the node where the target CPU to be migrated is located; and migrating the process to be migrated whose distance is less than or equal to a distance threshold to the target CPU to be migrated.

[0007] Optionally, in the scheduling method according to the present invention, the step of determining the migration process CPU and the migration target CPU based at least on the CPU load size includes: selecting at least a portion of the nodes as first candidate nodes, and determining the CPU with the smallest load or the CPU currently performing load detection as the migration target CPU among the CPUs corresponding to the first candidate nodes; and selecting at least a portion of the nodes as second candidate nodes, and determining the CPU with the largest load among the CPUs corresponding to the second candidate nodes as the migration process CPU.

[0008] Optionally, in the scheduling method according to the present invention, the first candidate node is the node with the smallest load among all nodes, and the second candidate node is the node with the largest load among all nodes.

[0009] Optionally, in the scheduling method according to the invention, before the step of determining the CPU of the migration process and the CPU of the migration target based at least on the CPU load size, the method includes: periodically detecting the load of each CPU in all nodes, or detecting the load of each CPU in all nodes when the state of a process changes.

[0010] Optionally, in the scheduling method according to the present invention, the step of traversing all processes on the CPU of the outgoing process and determining the process to be migrated based on the size of the file cache accessed by each process includes: comparing the size of the file cache accessed by each process with a preset migration page threshold; when the size of the file cache accessed by the process is less than or equal to the migration page threshold, the process is determined as the process to be migrated; when the size of the file cache accessed by the process is greater than the migration page threshold and if the process migrates into the target CPU, the difference between the CPU load of the outgoing process and the CPU load of the target CPU becomes smaller, the process is determined as the process to be migrated.

[0011] Optionally, in the scheduling method according to the present invention, the step of migrating the process to be migrated that is less than or equal to the distance threshold to the target CPU includes: migrating the process to be migrated that is less than or equal to the distance threshold to the target CPU one by one in a first-in-first-out order until a termination condition is met, and then stopping the migration of the current process and subsequent processes; wherein, the termination condition is: if the current process migrates into the target CPU, it will increase the difference between the CPU load of the migrated process and the load of the target CPU.

[0012] According to another aspect of the present invention, a file cache-based scheduling apparatus is also provided, comprising: a lookup module, adapted to determine, at least based on CPU load size, a process CPU to be migrated and a target CPU to be migrated among all CPUs of a multi-core system; a traversal module, adapted to traverse all processes on the process CPU to be migrated when the process CPU to be migrated and the target CPU to be migrated do not meet load balancing conditions, and determine the process to be migrated based on the size of the file cache accessed by each process; a distance measurement module, adapted to calculate the distance between the node corresponding to the file cache accessed by the determined process to be migrated and the node where the target CPU to be migrated is located; and a migration module, adapted to migrate the process to be migrated whose distance is less than or equal to a distance threshold to the target CPU to be migrated.

[0013] Optionally, the traversal module traverses all processes on the CPU of the outgoing process, and determines the process to be migrated based on the size of the file cache accessed by each process. This is adapted by: comparing the size of the file cache accessed by each process with a preset migration page threshold; when the size of the file cache accessed by the process is less than or equal to the migration page threshold, the process is determined as the process to be migrated; when the size of the file cache accessed by the process is greater than the migration page threshold and if the process migrates into the target CPU, the difference between the CPU load of the outgoing process and the load of the target CPU becomes smaller, the process is determined as the process to be migrated.

[0014] According to another aspect of the present invention, a computing device is also provided, comprising: at least one processor and a memory storing program instructions; when the program instructions are read and executed by the processor, the computing device performs the file cache-based scheduling method described above.

[0015] According to another aspect of the present invention, a readable storage medium storing program instructions is also provided, which, when read and executed by a computing device, causes the computing device to perform the above-described file-caching-based scheduling method.

[0016] The scheduling method, apparatus, and computing device based on file caching according to the present invention can achieve the following beneficial effects:

[0017] This application performs statistics on file cache when a process uses a file, and determines the distance between the node of the file cache used by the process and the node of the target CPU during load balancing. This enables the process to quickly use the file cache to meet the performance requirements in scenarios with high file cache usage. Attached Figure Description

[0018] To achieve the foregoing and related objectives, certain illustrative aspects are described herein in conjunction with the following description and accompanying drawings. These aspects indicate various ways in which the principles disclosed herein may be practiced, and all aspects and their equivalents are intended to fall within the scope of the claimed subject matter. The foregoing and other objectives, features, and advantages of this disclosure will become more apparent from the following detailed description, taken in conjunction with the accompanying drawings. Throughout this disclosure, the same reference numerals generally refer to the same parts or elements.

[0019] Figure 1 A schematic diagram of the NUMA architecture in related technologies is shown;

[0020] Figure 2 A schematic diagram of a computing device 200 according to an embodiment of the present invention is shown;

[0021] Figure 3 A flowchart of a file-caching-based scheduling method 300 according to an embodiment of the present invention is shown;

[0022] Figure 4 A flowchart illustrating the determination of processes to be migrated based on the size of the file cache accessed by each process, according to an embodiment of the present invention, is shown.

[0023] Figure 5 A schematic diagram of a file cache migration framework according to an embodiment of the present invention is shown;

[0024] Figure 6 A schematic diagram of the structure of a file-caching-based scheduling device 600 according to an embodiment of the present invention is shown;

[0025] Figure 7 This is a schematic structural block diagram of a first type of computer-readable storage medium according to an embodiment of this application;

[0026] Figure 8 This is a schematic structural block diagram of a second type of computer-readable storage medium according to an embodiment of this application. Detailed Implementation

[0027] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0028] The file-caching-based scheduling method of the present invention is executed in a computing device. The computing device can be any device with storage and computing capabilities, such as a server, workstation, desktop computer, laptop computer, or other personal computer, or a terminal device such as a mobile phone, tablet computer, smart wearable device, or Internet of Things device, but is not limited thereto.

[0029] Figure 2 A schematic diagram of a computing device 200 according to an embodiment of the present invention is shown. It should be noted that... Figure 2 The computing device 200 shown is merely an example. In practice, the computing device used to implement the file-caching-based scheduling method of the present invention can be any type of device, and its hardware configuration can be similar to... Figure 2 The computing device 200 shown is the same as, and can also be with Figure 2 The computing device 200 shown is different. In practice, the computing device used to implement the file-caching-based scheduling method of the present invention can... Figure 2 The hardware components of the computing device 200 shown can be added or removed. This invention does not limit the specific hardware configuration of the computing device.

[0030] like Figure 2 As shown, in basic configuration 202, computing device 200 typically includes system memory 206 and one or more processors 204. Memory bus 208 can be used for communication between processor 204 and system memory 206.

[0031] Depending on the desired configuration, processor 204 can be any type of processor, including but not limited to: microprocessor (UP), microcontroller (UC), digital information processor (DSP), or any combination thereof. Processor 204 may include one or more levels of cache such as L1 cache 210 and L2 cache 212, processor core 214, and registers 216. Example processor core 214 may include an arithmetic logic unit (ALU), floating-point unit (FPU), digital signal processing core (DSP core), or any combination thereof. Example memory controller 218 may be used with processor 204, or in some implementations, memory controller 218 may be an internal part of processor 204.

[0032] Depending on the desired configuration, system memory 206 can be any type of memory, including but not limited to volatile memory (such as RAM), non-volatile memory (such as ROM, flash memory, etc.), or any combination thereof. System memory 206 may include operating system 220, one or more applications 222, and program data 224. Application 222 is actually a set of program instructions that instruct processor 204 to perform corresponding operations. In some embodiments, application 222 may be arranged to cause processor 204 to operate using program data 224 on the operating system.

[0033] The computing device 200 may also include a storage interface bus 234. The storage interface bus 234 enables communication from storage devices 232 (e.g., removable storage 236 and non-removable storage 238) to the basic configuration 202 via the bus / interface controller 230. At least a portion of the operating system 220, applications 222, and program data 224 may be stored on the removable storage 236 and / or the non-removable storage 238, and loaded into system memory 206 via the storage interface bus 234 when the computing device 200 is powered on or when the application 222 is to be executed, and executed by one or more processors 204.

[0034] The computing device 200 may also include an interface bus 240 that facilitates communication from various interface devices (e.g., output devices 242, peripheral interfaces 244, and communication devices 246) to the basic configuration 202 via a bus / interface controller 230. Example output devices 242 include a graphics processing unit 248 and an audio processing unit 250. They may be configured to facilitate communication with various external devices such as a display 253 or speakers via one or more A / V ports 252. Example peripheral interfaces 244 may include a serial interface controller 254 and a parallel interface controller 256, which may be configured to facilitate communication with external devices such as input devices (e.g., keyboard, mouse, pen, voice input device, touch input device) or other peripherals (e.g., printer, scanner, etc.) via one or more I / O ports 258. Example communication devices 246 may include a network controller 260, which may be arranged to facilitate communication with one or more other computing devices 262 via a network communication link through one or more communication ports 264.

[0035] A network communication link can be an example of a communication medium. A communication medium can typically be embodied in a modulated data signal such as a carrier wave or other transmission mechanism, and can include any information delivery medium. A “modulated data signal” can be a signal in which one or more data points or modifications thereof can be encoded as information within the signal. As a non-limiting example, a communication medium can include wired media such as wired networks or leased lines, and various wireless media including sound, radio frequency (RF), microwave, infrared (IR), or other wireless media. The term “computer-readable medium” as used herein can include both storage media and communication media.

[0036] In the computing device 200 according to the present invention, application 222 includes a plurality of program instructions for executing a file cache-based scheduling method 300, which can instruct processor 204 to execute the file cache-based scheduling method 300 of the present invention, so that computing device 200 executes the file cache-based scheduling method 300 of the present invention.

[0037] Figure 3 A flowchart of a file-caching-based scheduling method 300 according to an embodiment of the present invention is shown. The file-caching-based scheduling method 300 is executed in a computing device (e.g., the aforementioned computing device 200). The file-caching-based scheduling method 300 of the present invention adds a determination of the distance between the node of the file cache used by the process and the node of the target CPU to be migrated, thereby solving the problem of slow file cache usage when migrating a process to a distant node. This is used to address performance issues in scenarios with high file cache usage, such as using Word documents or databases. Figure 3 As shown, the file-caching-based scheduling method 300 may include steps S310 to S340.

[0038] In step S310, among the CPUs of all nodes in the multi-core system, the CPU for the migration process and the CPU for the migration target are determined based at least on the CPU load size.

[0039] According to one implementation, in step S310, the CPU for the migration process and the target CPU for migration are determined based on the load size of each CPU in all nodes in the multi-core system. In this embodiment of the invention, a node consists of all CPUs that are equidistant from each other and access the same memory block.

[0040] According to one implementation, the step of determining the outgoing process CPU and the migration target CPU in step S310 based at least on the CPU load size includes: selecting at least a portion of all nodes as first candidate nodes, and determining the CPU with the smallest load or the CPU currently performing load detection among the CPUs corresponding to the first candidate nodes as the migration target CPU; and selecting at least a portion of all nodes as second candidate nodes, and determining the CPU with the largest load among the CPUs corresponding to the second candidate nodes as the outgoing process CPU.

[0041] In this embodiment of the invention, at least one node is selected as a first candidate node and at least one node is selected as a second candidate node from all nodes. The first candidate node may include all nodes, and the second candidate node may include all nodes. Alternatively, the first candidate node may be the node with the lowest load among all nodes, and the second candidate node may be the node with the highest load among all nodes.

[0042] For the first candidate node, which can include all nodes, and the second candidate node, which can include all nodes, the CPU for the migration process and the CPU for the migration target are determined as follows: the CPU with the lowest load among all nodes is selected as the migration target CPU, or the CPU currently performing load detection is selected as the migration target CPU, and the CPU with the highest load among all nodes is selected as the migration process CPU.

[0043] For the first candidate node being the node with the lowest load among all nodes, and the second candidate node being the node with the highest load among all nodes, the determined migration process CPU and migration target CPU are as follows: the node with the lowest load among all nodes is selected as the node to be migrated into (the first candidate node); and the CPU with the lowest load among the nodes to be migrated into is selected as the migration target CPU or the CPU currently performing load detection is selected as the migration target CPU; the node with the highest load among all nodes is selected as the node to be migrated out (the second candidate node); and the CPU with the highest load among the nodes to be migrated out is selected as the migration process CPU.

[0044] According to one implementation, step S310, prior to the step of determining the CPU of the migration process and the target CPU based at least on the CPU load size, includes: periodically detecting the load of each CPU in all NODEs; or detecting the load of each CPU in all nodes when the state of a process changes.

[0045] In this embodiment of the invention, detecting the load of each CPU in all nodes when a process's state changes includes: triggering the detection of the load of each CPU in all nodes when a process ends or a new process starts. The state change of a process in this embodiment of the invention can include: a process going from execution to termination, or a new process starting, at which point the detection of the load of each CPU in all nodes is triggered.

[0046] In this embodiment of the invention, the load status of each CPU in all nodes can be periodically detected. For example, the detection period can be 4ms. The detection period can be set according to the actual application environment and can be modified through configuration to 1ms, 3ms, 6ms, 10ms, etc. Experience shows that if the time is too short, the system scheduling will be too frequent; if the time is too long, the load difference between CPUs will be large, resulting in degraded system performance. Therefore, the selection should be based on the actual application environment. Alternatively, the load status of each CPU in all nodes can be detected when the state of a process on a certain CPU changes, such as when a new process starts or an existing process ends. When the detection time is reached, the busiest CPU in the busiest node and the idlest CPU in the idlest node are identified and designated as the CPU for the process to be migrated out and the target CPU for migration, respectively.

[0047] In some cases, the busiest CPU in the busiest node is not necessarily the busiest CPU in the entire NUMA system, and the idlest CPU in the idlest node is not necessarily the idlest CPU in the entire NUMA system. The busiest and idlest CPUs can be determined by iterating through the load of each CPU in all nodes. Compared to the previous approach, directly finding the busiest or idlest node and then its corresponding CPU saves time and increases search speed by first identifying the busiest or idlest CPU and then finding the busiest or idlest CPU within that node.

[0048] In the embodiment of the present invention, the load balancing condition is ideally such that the load of each CPU is equal. In actual application, the load of the CPU changes at any time, making it difficult to achieve the ideal load balancing condition. Therefore, in the process of file cache scheduling, the load balancing condition is to minimize the difference between the loads of each CPU.

[0049] In this embodiment of the invention, the CPU currently performing load testing can be used as the target CPU for migration, and then the CPU for the migration process can be determined based on the load testing results. In this embodiment, the testing cycle for each CPU can be different. A corresponding load testing cycle can be set for each CPU based on its storage space, the content it executes, etc. In this case, the CPU currently performing load testing is used as the target CPU for migration, and then the CPU with the highest load among all nodes is selected as the migration process CPU, or the node with the highest load among all nodes is selected as the node to be migrated out; and the CPU with the highest load among the nodes to be migrated out is selected as the migration process CPU. For example, CPU A's testing cycle is 6ms, and CPU B's testing cycle is 4ms, starting from time 0. When 4ms is reached, CPU B performs load testing. CPU B is the CPU currently performing load testing, and at this time, CPU B is determined as the target CPU for migration. Then, the load status of other CPUs besides CPU B is tested, and the migration process CPU is determined based on the detected load status. Further process migration is then performed based on the judgment result. At 6ms, CPU A performs load testing. As the CPU currently performing load testing, CPU A is determined to be the target CPU for migration. Then, the load of all other CPUs besides CPU A is tested. Based on the detected load, the CPU for the migration process is determined, and process migration is further performed based on the judgment result. At 8ms, CPU B performs load testing, and the load balancing process with CPU B as the target CPU for migration is repeated. At 12ms, both CPU A and CPU B perform load testing simultaneously. At this point, either CPU A or CPU B can be determined as the target CPU for migration, or both CPU A and CPU B can be selected as the target CPUs for migration. Then, the CPU with the highest load among all nodes is selected as the CPU for the migration process, or the node with the highest load among all nodes is selected as the node to be migrated, and the CPU with the highest load among the nodes to be migrated is selected as the CPU for the migration process. Alternatively, when the 12ms mark is reached, CPU A and CPU B can simultaneously perform load checks. At this point, the CPU with the lowest load among all nodes can be selected as the migration target CPU, or the node with the lowest load among all nodes can be selected as the node to be migrated into. Then, the CPU with the lowest load among the nodes to be migrated into can be selected as the migration target CPU. Finally, the CPU with the highest load among all nodes can be selected as the migration process CPU, or the node with the highest load among all nodes can be selected as the node to be migrated out, and the CPU with the highest load among the nodes to be migrated out can be selected as the migration process CPU.

[0050] In step S320, when the CPU of the migration process and the CPU of the migration target do not meet the load balancing conditions, all processes on the CPU of the migration process are traversed, and the process to be migrated is determined according to the size of the file cache accessed by each process.

[0051] Before migrating a process, it is necessary to calculate whether the file cache accessed by the migrating process meets the migration criteria, such as... Figure 4 As shown, the step of traversing all processes on the CPU of the migration process in step S320 and determining the process to be migrated based on the size of the file cache accessed by each process may include: comparing the size of the file cache accessed by each process with a preset migration page threshold; when the size of the file cache accessed by the process is less than or equal to the migration page threshold, the process is determined as the process to be migrated; when the size of the file cache accessed by the process is greater than the migration page threshold and the difference between the CPU load of the migration process and the CPU load of the migration target decreases after the process migrates into the migration target CPU, the process is determined as the process to be migrated.

[0052] In this embodiment of the invention, when traversing all processes on the CPU of the outgoing process and determining the process to be migrated based on the size of the file cache accessed by each process, the following steps can be taken: the size of the file cache accessed by each process can be compared with a preset migration page threshold; when the size of the file cache of a process is less than or equal to the migration page threshold, the process is determined as a process to be migrated; when the size of the file cache of a process is greater than the migration page threshold, the relationship between the size of the file cache accessed by the process and the CPU load of the outgoing process and the CPU load of the target CPU can be determined; if the process, after migrating to the target CPU, reduces the difference between the CPU load of the outgoing process and the CPU load of the target CPU, the process is determined as a process to be migrated, or in other words, the size of the file cache accessed by the process can reduce the difference between the CPU load of the outgoing process and the CPU load of the target CPU, the process is determined as a process to be migrated.

[0053] Specifically, the process to be migrated can be determined through the following steps S410 to S440.

[0054] In step S410, the size of the file cache accessed by each process can be compared with a preset migration page threshold. The preset migration page threshold can be, for example, 64 pages, or it can be set based on experience or determined through experimentation.

[0055] Next, processes that meet the load requirements can be identified as processes to be migrated through steps S420 to S440, which will be described below.

[0056] In step S420, when the size of the file cache accessed by a process is less than or equal to the migration page threshold, the process is identified as a process to be migrated; when the file pages accessed by the process are less than the threshold, the process is considered to have little impact on the CPU and can be considered as a process to be migrated. When the file pages accessed by the process are greater than the threshold, step S430 is executed.

[0057] In step S430, when the size of the file cache accessed by a process is greater than the migration page threshold, the relationship between the size of the file cache accessed by the process and the CPU load of the migration process and the CPU load of the migration target can be further determined. When the file pages accessed by the process are greater than the threshold, it is determined whether the process will become more unbalanced after migration. If it will not cause a greater imbalance, it can also be regarded as a process to be migrated.

[0058] Thus, in step S440, if the process reduces the difference between the CPU load of the outgoing process and the CPU load of the target CPU after it migrates to the target CPU, the process is identified as a process to be migrated. In other words, if the size of the file cache accessed by the process reduces the difference between the CPU load of the outgoing process and the CPU load of the target CPU, the process is identified as a process to be migrated.

[0059] In this embodiment of the invention, when a process accesses fewer file pages than the threshold, the process is considered to have a minimal impact on the CPU and can be considered a process to be migrated. When a process accesses more file pages than the threshold, the process is considered to have a significant impact on CPU performance, and it is necessary to determine whether migration will create a new imbalance before further determining whether it can be considered a process to be migrated. For example, CPU A has a load of 100 (the maximum load of a normal process is set to 1024 in the code), CPU B has a load of 20, and the imbalance difference between CPU A and CPU B is 80. There are three processes on CPU A: process 1 has a load of 10, process 2 has a load of 20, and process 3 has a load of 70. The load of process 1 is less than the migration page threshold, while the loads of the other two processes are greater than the migration page threshold. If process 1 is migrated, the load of CPU A will become 90 (100-10), and the load of CPU B will become 30 (20+10). Since the load of process 1 is smaller, its impact on CPU performance is smaller, and the difference in load between CPU A and CPU B can be reduced, achieving an optimization effect. Traversing to process 2, the load of process 2 is greater than the migration page threshold. If process 2 is migrated further, the load of CPU A will become 70 (90-20), and the load of CPU B will become 50 (30+20). The imbalance between CPU A and CPU B will then decrease from 70 to 20, reducing the load difference and achieving optimization. For example, if the load of CPU A is 100, the load of CPU B is 20, and the imbalance between CPU A and CPU B is 80, and there are two processes on CPU A, process 1 with a load of 80 and process 2 with a load of 20, both of which have loads greater than the migration page threshold, migrating process 1 will change the load of CPU A to 20 (100-80) and CPU B to 100 (20+80). After the change, the imbalance between CPU A and CPU B will still be 80. Migrating process 1 does not reduce the imbalance between CPU A and CPU B; it's equivalent to creating a new imbalance. Therefore, process 1 is not migrated. If in migration process 2, the load on CPU A becomes 80 and the load on CPU B becomes 40, then the imbalance between CPU A and CPU B changes from 80 to 40, the load difference decreases, and the optimization effect is achieved.

[0060] In this embodiment of the invention, if the load of the CPU being migrated from and the CPU being migrated from is expressed in terms of utilization, for example, CPU A and CPU B have utilization rates of 55% and 50% respectively, and there are multiple processes on CPU A, assuming that process 1 with the lowest load has a utilization rate of 2%, if process 1 is migrated, then the CPU A utilization rate will become 53%, and the CPU B utilization rate will become 52%. After the change, the imbalance between CPU A and CPU B is 1%, and the gap between CPU A and CPU B after migration changes from 5% to 1%, achieving the optimization effect. In the example above, assuming that process 1 with the lowest load on CPU A has a utilization rate of 7%, if process 1 is migrated, then the CPU A utilization rate will become 48%, and the CPU B utilization rate will become 57%, creating a new and larger imbalance; therefore, process 1 is not migrated.

[0061] Since the process occupancy on each CPU may change at any time, the CPU for the process to be migrated out and the CPU for the target process to be migrated out may no longer be the CPU for the process to be migrated out and the CPU for the target process to be migrated out at the current moment. In this embodiment of the invention, when the cycle is reached, or when the existing process ends or a new process starts, the load of each CPU in all the NODEs is re-detected and step S310 is re-executed to make a judgment.

[0062] In step S330, the distance between the node corresponding to the file cache accessed by the determined process to be migrated and the node where the target CPU is located is calculated.

[0063] In this embodiment of the invention, after determining the process to be migrated, the distance between the NODE corresponding to the file cache accessed by the determined process to be migrated and the NODE where the target CPU is located is calculated. In this embodiment of the invention, the process to be migrated determined by step S320 can be one or more. When multiple processes to be migrated are determined, it is necessary to calculate the distance between the NODE corresponding to the file cache accessed by each process to be migrated and the NODE where the target CPU is located.

[0064] In step S340, processes to be migrated that are less than or equal to a distance threshold are migrated to the target CPU.

[0065] In this embodiment of the invention, the step of migrating the process to be migrated that is less than or equal to the distance threshold to an idle CPU in step S340 includes: migrating the process to be migrated that is less than or equal to the distance threshold to the target CPU one by one in a first-in-first-out order until the termination condition is met, and then stopping the migration of the current process and subsequent processes; wherein, the termination condition is: if the current process is migrated into the target CPU, it will cause the difference between the CPU load of the migrated process and the load of the target CPU to increase.

[0066] In this embodiment of the invention, processes to be migrated that are less than or equal to a distance threshold are migrated to the target CPU in a first-in, first-out (FIFO) order. This continues until the current process migrates to the target CPU, which would increase the difference between the CPU load of the migrating process and the load of the target CPU. In this case, the current process is not migrated, and the migration of subsequent processes is stopped. Alternatively, the current process is not migrated, and it is determined whether the migration of the next process to the target CPU would decrease the difference between the CPU load of the migrating process and the load of the target CPU.

[0067] In this embodiment of the invention, after determining the process to be migrated, the distance between the NODE containing the file page of the process to be migrated and the NODE of the migration target is determined. If the distance is less than a certain distance, then migration is possible; if the distance is greater than a certain distance, then migration is not possible, and the next process that meets the load requirements is migrated, while the current process is not migrated.

[0068] like Figure 5 As shown, CPUs 0, 1, 2, and 3 are in the same node, and their distances from memory 0, memory 1, memory 2, and memory 3 are 10, 20, 30, and 40 respectively (a certain distance is set as the base, and the other distances are multiples of this distance). If process A on CPU 4 is migrated to CPU 0, then when process A accesses the file cache on memory 1, the distance will change from 10 to 20. At this time, a cross-node CPU migration occurs. The distance between the current node and the target node is checked. If the distance meets the performance loss requirements, the migration can be carried out. If the distance will cause too much performance loss, the migration cannot be carried out.

[0069] If process B on CPU 15 is migrated to CPU 0, the distance will change from 10 to 40. The distance between the current node and the target node is checked. If the distance meets the performance loss requirement, the migration can proceed. If the distance would cause excessive performance loss, the migration cannot proceed (for example, if the distance threshold is set to 20, the distance requirement will not be met).

[0070] like Figure 6 As shown, this embodiment of the invention also provides a scheduling device based on file caching, including: a search module 610, a traversal module 620, a ranging module 630, and a migration module 640.

[0071] The search module 610 is adapted to determine the CPU of the migration process and the target CPU of the migration process from among all CPUs of all nodes in a multi-core system, at least based on the CPU load size; the traversal module 620 is adapted to traverse all processes on the CPU of the migration process when the CPU of the migration process and the target CPU of the migration process do not meet the load balancing condition, and determine the process to be migrated based on the size of the file cache accessed by each process; the distance measurement module 630 is adapted to calculate the distance between the node corresponding to the file cache accessed by the determined process to be migrated and the node where the target CPU of the migration is located; and the migration module 640 is adapted to migrate the process to be migrated that is less than or equal to the distance threshold to the target CPU of the migration.

[0072] According to one implementation, the lookup module 610 determines the outgoing process CPU and the migration target CPU based at least on the CPU load size by: selecting at least a portion of all nodes as first candidate nodes, and determining the CPU with the smallest load or the CPU currently performing load detection among the CPUs corresponding to the first candidate nodes as the migration target CPU; and selecting at least a portion of all nodes as second candidate nodes, and determining the CPU with the largest load among the CPUs corresponding to the second candidate nodes as the outgoing process CPU.

[0073] The first candidate node includes all nodes, and the second candidate node includes all nodes; or, the first candidate node is the node with the lowest load among all nodes, and the second candidate node is the node with the highest load among all nodes.

[0074] Before determining the CPU of the migration process and the target CPU based at least on the CPU load size, the lookup module 610 is also adapted to: periodically detect the load of each CPU in all NODEs, or detect the load of each CPU in all nodes when the state of a process changes.

[0075] According to one implementation, the traversal module 620 traverses all processes on the CPU of the outgoing process and determines the process to be migrated based on the size of the file cache accessed by each process: the size of the file cache accessed by each process is compared with a preset migration page threshold; when the size of the file cache accessed by the process is less than or equal to the migration page threshold, the process is determined as the process to be migrated; when the size of the file cache accessed by the process is greater than the migration page threshold and if the process migrates into the migration target CPU, the difference between the CPU load of the outgoing process and the CPU load of the migration target CPU becomes smaller, the process is determined as the process to be migrated.

[0076] According to one implementation, the migration module 640 migrates processes to be migrated that are less than or equal to a distance threshold to the target CPU by: migrating processes to be migrated one by one to the target CPU in a first-in-first-out order until a termination condition is met, at which point the migration of the current process and subsequent processes is stopped; wherein, the termination condition is: if the current process migrates into the target CPU, it will increase the difference between the CPU load of the migrated process and the load of the target CPU.

[0077] In this embodiment of the invention, the process to be migrated is migrated to the target CPU in a first-in-first-out order until the current process migrates into the target CPU, which would increase the difference between the CPU load of the migrating process and the load of the target CPU, and then the migration stops.

[0078] In this embodiment of the invention, the cache is recorded during file loading, and the migration process calculates whether the migration conditions are met based on the recorded cache distribution. Specifically, this can be implemented using the following function:

[0079] The `Count_file_in_node(struct address_space*mapping)` function is used to count which node the process's file read / write cache is loaded onto. Since the final file will be loaded onto a physical address (a file page in the kernel), the physical address can be used to find which node the physical address belongs to, and then the information of that file page can be loaded into the current process's information: `task_struck`.

[0080] The `Cuacl_taskfile_in_node(struct task_struct*p)` function is used to find the node where all files opened by the process are cached, and to count the cached release of files in the migration process. Since all page information has been stored in `task_struck`, all page information can be found through `task_struck`.

[0081] The `Can_migratione_to_newcpu(struct task_struct*p, struct lb_env*env)` function is used to calculate whether the file cache accessed by the migration process meets the migration criteria.

[0082] This application also provides a computing device, referring to... Figure 7The computing device includes a memory 1120, a processor 1110, and a computer program stored in the memory 1120 and executable by the processor 1110. The computer program is stored in a space 1130 for program code in the memory 1120. When executed by the processor 1110, the computer program implements the method step 1131 according to the invention.

[0083] This application also provides a computer-readable storage medium. (See attached embodiments.) Figure 8 The computer-readable storage medium includes a storage unit for program code, the storage unit being provided with a program 1131' for performing the method steps according to the invention, the program being executed by a processor.

[0084] The various techniques described herein can be implemented in combination with hardware or software, or a combination thereof. Thus, the methods and apparatus of the present invention, or certain aspects or portions thereof, can take the form of program code (i.e., instructions) embedded in a tangible medium, such as a removable hard disk, USB flash drive, floppy disk, CD-ROM, or any other machine-readable storage medium, wherein when the program is loaded into and executed by a machine such as a computer, the machine becomes an apparatus for practicing the present invention.

[0085] When the program code is executed on a programmable computer, the computing device generally includes a processor, a processor-readable storage medium (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device. The memory is configured to store program code; the processor is configured to execute the file-cached scheduling method of the present invention according to instructions in the program code stored in the memory.

[0086] By way of example, and not limitation, readable media include readable storage media and communication media. Readable storage media stores information such as computer-readable instructions, data structures, program modules, or other data. Communication media generally embodies computer-readable instructions, data structures, program modules, or other data in the form of modulated data signals such as carrier waves or other transmission mechanisms, and includes any information delivery medium. Any combination of the above is also included within the scope of readable media.

[0087] In the specification provided herein, the algorithms and displays are not inherently related to any particular computer, virtual system, or other device. Various general-purpose systems can also be used with the examples of this invention. The required structure for constructing such systems is apparent from the above description. Furthermore, this invention is not directed to any particular programming language. It should be understood that the contents of the invention described herein can be implemented using various programming languages, and the above description of specific languages ​​is for the purpose of disclosing preferred embodiments of the invention.

[0088] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0089] Similarly, it should be understood that, in order to streamline this disclosure and aid in understanding one or more of the various aspects of the invention, features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof in the above description of exemplary embodiments of the invention. However, this method of disclosure should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim.

[0090] Those skilled in the art will understand that modules, units, or components of the devices disclosed in the examples herein can be arranged in the devices described in this embodiment, or alternatively, can be located in one or more devices different from the devices in this example. The modules in the foregoing examples can be combined into a single module or, in addition, can be divided into multiple sub-modules.

[0091] Those skilled in the art will understand that modules in the device of the embodiments can be adaptively changed and placed in one or more devices different from that embodiment. Modules, units, or components in the embodiments can be combined into a single module, unit, or component, and further, they can be divided into multiple sub-modules, sub-units, or sub-components. Except where at least some of such features and / or processes or units are mutually exclusive, any combination can be used to combine all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or device so disclosed. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0092] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features included in other embodiments but not others, combinations of features from different embodiments are meant to be within the scope of the invention and form different embodiments.

[0093] Furthermore, some of the embodiments described herein are methods or combinations of method elements that can be implemented by a processor of a computer system or by other means of performing the functions. Therefore, a processor having the necessary instructions for implementing the methods or method elements forms means for implementing the methods or method elements. Furthermore, the elements described herein in the apparatus embodiments are examples of means for implementing the functions performed by elements for the purposes of carrying out the invention.

[0094] As used herein, unless otherwise specified, the use of ordinal numbers such as “first,” “second,” “third,” etc., to describe ordinary objects merely indicates different instances of similar objects and is not intended to imply that the objects being described must have a given order in time, space, ordering, or any other manner.

[0095] Although the invention has been described with respect to a limited number of embodiments, those skilled in the art will understand from the foregoing description that other embodiments are conceivable within the scope of the invention described herein. Furthermore, it should be noted that the language used in this specification has been chosen primarily for readability and edibility purposes, and not for the purpose of explaining or limiting the subject matter of the invention.

Claims

1. A scheduling method based on file caching, comprising the following steps: In a multi-core system, the CPUs of the migration process and the target CPUs are determined based on at least the CPU load, including: Among all the nodes, at least a portion are selected as first candidate nodes, and among the CPUs corresponding to the first candidate nodes, the CPU with the lowest load or the CPU currently performing load detection is determined as the migration target CPU; and among all the nodes, at least a portion are selected as second candidate nodes, and among the CPUs corresponding to the second candidate nodes, the CPU with the highest load is determined as the migration process CPU. When the CPU of the migration process and the CPU of the migration target do not meet the load balancing conditions, all processes on the CPU of the migration process are traversed, and the process to be migrated is determined according to the size of the file cache accessed by each process. This includes: comparing the size of the file cache accessed by each process with a preset migration page threshold; when the size of the file cache accessed by the process is less than or equal to the migration page threshold, the process is determined as the process to be migrated; when the size of the file cache accessed by the process is greater than the migration page threshold and if the process migrates into the migration target CPU, the difference between the load of the CPU of the migration process and the load of the migration target CPU becomes smaller, the process is determined as the process to be migrated. Calculate the distance between the node corresponding to the file cache accessed by the identified process to be migrated and the node where the target CPU is located; and Migrating processes whose distance is less than or equal to a distance threshold to the target CPU includes: migrating processes whose distance is less than or equal to a distance threshold to the target CPU one by one in a first-in-first-out order until a termination condition is met, at which point the migration of the current process and subsequent processes is stopped. The termination condition is that if the migration of the current process to the target CPU will increase the difference between the CPU load of the migrating process and the load of the target CPU.

2. The scheduling method as described in claim 1, wherein, The first candidate node is the node with the lowest load among all nodes, and the second candidate node is the node with the highest load among all nodes.

3. The scheduling method as described in claim 1 or 2, wherein, Prior to the step of determining the outgoing process CPU and the migration target CPU based at least on CPU load size, the following are included: Periodically check the load of each CPU in all nodes; or check the load of each CPU in all nodes when the state of a process changes.

4. A scheduling device based on file caching, comprising: The lookup module is suitable for determining the CPU of the migration process and the target CPU of the migration process, based at least on the CPU load size, among all CPUs on all nodes of a multi-core system. The traversal module is adapted to traverse all processes on the CPU of the outgoing process when the CPU of the outgoing process and the CPU of the migration target do not meet the load balancing conditions, and determine the process to be migrated based on the size of the file cache accessed by each process. This includes: comparing the size of the file cache accessed by each process with a preset migration page threshold; when the size of the file cache accessed by the process is less than or equal to the migration page threshold, the process is determined as the process to be migrated; when the size of the file cache accessed by the process is greater than the migration page threshold and if the process migrates into the migration target CPU, the difference between the load of the outgoing process CPU and the load of the migration target CPU becomes smaller, the process is determined as the process to be migrated. The ranging module is adapted to calculate the distance between the node corresponding to the file cache accessed by the determined process to be migrated and the node where the target CPU of the migration is located; and A migration module is adapted to migrate processes whose distance is less than or equal to a distance threshold to the target CPU, comprising: migrating the processes whose distance is less than or equal to the distance threshold to the target CPU one by one in a first-in-first-out order until a termination condition is met, and then stopping the migration of the current process and subsequent processes, wherein the termination condition is that if the current process migrates into the target CPU, it will increase the difference between the CPU load of the migrated process and the load of the target CPU.

5. A computing device, comprising: At least one processor and a memory storing program instructions; When the program instructions are read and executed by the processor, the computing device performs the file cache-based scheduling method as described in any one of claims 1-3.

6. A readable storage medium storing program instructions, which, when read and executed by a computing device, cause the computing device to perform the file-caching-based scheduling method as described in any one of claims 1-3.

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