A method for implementing multi-core cache coherence verification

Abstract

The present invention discloses a method for implementing multi-core cache coherence verification, which includes the following steps: S1. When a core updates a cache line to the M state, check whether the cache line exists in the caches of other cores; S2. When a core updates a cache line to the E state, check whether the cache line exists in the caches of other cores; S3. When a core updates a cache line to the S state, check whether the cache line exists in the caches of other cores. If the state of other cores is S, check whether the cache line data of the two cores is consistent and at the same time check whether the data in the memory is consistent; S4. When a core updates a cache line to the I state, other cores may be in any state and there is no need to check. According to the present invention, by monitoring the update information of the first-level cache and the second-level cache and at the same time by viewing the data in the memory, it is possible to ensure that the cache complies with the MESI coherence protocol and at the same time ensure the correctness of the data.

Description

Technical Field

[0001] The present invention relates to the technical field of CPU multi-core verification, and particularly relates to a method for realizing multi-core cache coherence verification. Background Art

[0002] In CPU multi-core verification, cache coherence verification is crucial. However, there is currently no very effective method to ensure the correctness of cache coherence. For multi-core systems, there is currently no very effective and unified method to verify cache coherence, and there is no tool on the market that can verify cache coherence. Summary of the Invention

[0003] Aiming at the deficiencies in the prior art, the purpose of the present invention is to provide a method for realizing multi-core cache coherence verification. By monitoring the update information of the level-1 cache and the level-2 cache, and at the same time by checking the data in the memory, it can ensure that the cache complies with the MESI coherence protocol and can also ensure the correctness of the data. To achieve the above object and other advantages of the present invention, a method for realizing multi-core cache coherence verification is provided, including the following steps:

[0004] S1. When a core updates a cache line to the M state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line can only be the I state, otherwise report an error;

[0005] S2. When a core updates a cache line to the E state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line can only be the I state, otherwise report an error; at the same time, check whether the updated data of the cache line is consistent with the data in the memory. If they are different, report an error;

[0006] S3. When a core updates a cache line to the S state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line can only be the S or I state, otherwise report an error; if the state of other cores is S, check whether the cache line data of the two cores is consistent, and at the same time check whether it is consistent with the data in the memory;

[0007] S4. When a core updates a cache line to the I state, other cores may be in any state and do not need to be checked.

[0008] Preferably, it is applied to a multi-core environment. The multi-core environment includes two clusters. Each cluster includes one level-2 cache. The level-2 cache is connected to multiple cores, and each core includes a level-1 data cache. The level-1 data cache and the level-2 cache perform coherence verification simultaneously.

[0009] Preferably, the coherence verification of the level-1 data cache includes the following steps:

[0010] (1) Monitor the first-level data cache update information of each core in the multi-core system simultaneously in the first-level data cache checker, obtain the update status, update the tag, index, and bank information of the cache line, and save the cache line data at the same time.

[0011] (2) Monitor the first-level data cache of each core in the multi-core system simultaneously in the first-level data cache checker. According to the tag, index, and bank information of the currently updated core, obtain the information on whether the same cache line exists in other cores at the current moment. If it exists, obtain the cache line status by accessing the cache directory and obtain the cache line data by accessing the cache data.

[0012] (3) If the status of the updated core is M, perform monitoring and judgment according to step S1.

[0013] (4) If the status of the updated core is E, perform monitoring and judgment according to step S2.

[0014] (5) If the status of the updated core is S, perform monitoring and judgment according to step S3.

[0015] (6) If the status of the updated core is I, perform monitoring and judgment according to step S4.

[0016] Preferably, the consistency verification of the secondary cache includes the following steps:

[0017] (1) Monitor the secondary cache update information of each cluster in the multi-core system simultaneously in the secondary cache checker, obtain the update status, update the tag, index, and bank information of the cache line; since the status of the first-level cache connected to the secondary cache is recorded in the secondary cache, the status information of the first-level cache can be obtained simultaneously at the moment of updating the secondary cache.

[0018] (2) Check whether the status of the secondary cache and the first-level cache of the current cluster is reasonable. Since the relationship between the two-level caches is inclusive, the two-level status should conform to the following principles:

[0019] When the update status of the secondary cache is in the I state, the status of the first-level cache of each core must also be in the I state, otherwise an error is reported.

[0020] When the update status of the secondary cache is in the M state, if the update status of the first-level cache of one of the cores is M or E, the status of the first-level caches of other cores must be I, otherwise an error is reported.

[0021] When the update status of the secondary cache is in the S state, the status of the first-level cache of each core cannot be in the M state or E state, otherwise an error is reported.

[0022] When the update state of the secondary cache is in the E state, the primary cache of each core may be in any of the MESI states, and no detection is performed;

[0023] (3) Check the secondary caches of other clusters. According to the tag, index, and bank information of the currently updated secondary cache, obtain the states and data of other secondary caches. The detection between different clusters should follow the following principles:

[0024] If the update state of the cluster secondary cache is in the M state, the states of the secondary caches of other clusters must be in the I state; otherwise, an error is reported.

[0025] If the update state of the cluster secondary cache is in the E state, the states of the secondary caches of other clusters must be in the I state; otherwise, an error is reported.

[0026] If the update state of the cluster secondary cache is in the S state, the states of the secondary caches of other clusters must be in the I state or the S state; otherwise, an error is reported.

[0027] If the update state of the cluster secondary cache is in the I state, the states of the secondary caches of other clusters can be in any of the MESI states.

[0028] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0029] (1) It is applicable to multi-core and multi-cluster verification, and the number of cores and clusters can be configured, with scalability.

[0030] (2) It simultaneously supports MESI consistency verification for both primary caches and secondary caches.

[0031] (3) It supports MESI consistency verification for two-level caches in inclusive mode.

[0032] (4) It can not only check the MESI states of the caches but also check the correctness of the data in the caches.

[0033] (5) The clock-based checker can report errors in real time, enabling verification personnel to accurately and quickly locate the error moment and obtain error information. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a flowchart of a method for implementing multi-core cache consistency verification according to the present invention;

[0035] Figure 2 It is a block diagram of the primary data cache update process of a method for implementing multi-core cache consistency verification according to the present invention;

[0036] Figure 3It is a flowchart of the secondary cache update process for the method of implementing multi-core cache coherence verification according to the present invention. Detailed implementation manners

[0037] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0038] Status Modify Exclusive Shared Invalid Modify No No No Yes Exclusive No No No Yes Shared No No Yes Yes Invalid Yes Yes Yes Yes

[0039] MESI represents four states of the cache line. In a multi-core system, the cacheline states of each core must conform to the following rules:

[0040] When the cache line state of one core is in the M state, the state of the same cache line of other cores can only be in the I state and cannot be other states;

[0041] When the cache line state of one core is in the E state, the state of the same cache line of other cores can only be in the I state and cannot be other states;

[0042] When the cache line state of one core is in the S state, the state of the same cache line of other cores can be in the S state or the I state, but cannot be in the M and E states;

[0043] When the cache line state of one core is in the I state, the state of the same cache line of other cores can be in the M, E, S or I state

[0044] Refer to Figures 1 - 3 , a method for implementing multi-core cache coherence verification, includes the following steps: S1. When a core updates a cache line to the M state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line can only be in the I state, otherwise an error is reported;

[0045] S2. When a core updates a cache line to the E state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line can only be in the I state, otherwise an error is reported; at the same time, check whether the updated data of the cache line is consistent with the data in the memory. If it is different, an error is reported;

[0046] S3. When a core updates a cache line to the S state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line can only be in the S or I state, otherwise an error is reported; if the state of other cores is S, check whether the cache line data of the two cores is consistent and at the same time check whether it is consistent with the data in the memory;

[0047] S4. When a core updates a cache line to the I state, other cores can be in any state and no checking is required.

[0048] This verification method can report errors in real time, accurately locate the error time according to the error message. The checker will report the cache line address, updated status, data and other information in real time, helping the verification personnel quickly and effectively find the error scenario and locate the bug.

[0049] Furthermore, applied to a multi-core environment, the multi-core environment includes two clusters. Each cluster includes one level-2 cache, the level-2 cache is connected to multiple cores, and each core includes a level-1 data cache. The consistency verification of the level-1 data cache and the level-2 cache is performed simultaneously. This verification method supports the simultaneous detection of the consistency of the level-1 cache and the level-2 cache in a multi-core system. This verification method supports the consistency detection of two-level caches in the inclusive mode. This verification method supports the configurability of the number of cores and clusters, and is applicable to multiple multi-core verification systems, with scalability.

[0050] Furthermore, the consistency verification of the level-1 data cache includes the following steps:

[0051] (1) Simultaneously monitor the update information of the level-1 data cache of each core in the multi-core system in the level-1 data cache checker, obtain the updated status, the tag, index and bank information of the updated cache line, and save the cache line data at the same time.

[0052] (2) Simultaneously monitor the level-1 data cache of each core in the multi-core system in the level-1 data cache checker. According to the tag, index and bank information of the currently updated core, obtain the information on whether there is the same cache line in other cores at the current moment. If so, obtain the cache line status by accessing the cache directory and obtain the cache line data by accessing the cache data.

[0053] (3) If the status of the updated core is M, perform monitoring and judgment according to step S1.

[0054] (4) If the status of the updated core is E, perform monitoring and judgment according to step S2.

[0055] (5) If the status of the updated core is S, perform monitoring and judgment according to step S3.

[0056] (6) If the status of the updated core is I, perform monitoring and judgment according to step S4.

[0057] Furthermore, the consistency verification of the level-2 cache includes the following steps:

[0058] (1) Monitor the secondary cache update information of each cluster in the multi-core system simultaneously in the secondary cache checker, obtain the update status, and update the tag, index, and bank information of the cache line. Since the secondary cache records the status of the primary cache connected to it, the status information of the primary cache can be obtained simultaneously when the secondary cache is updated.

[0059] (2) Check whether the status of the secondary cache and the primary cache of the current cluster is reasonable. Since the relationship between the two-level caches is inclusive, the two-level status should conform to the following principles:

[0060] When the secondary cache update status is in the I state, the status of the primary cache of each core must also be in the I state, otherwise an error is reported.

[0061] When the secondary cache update status is in the M state, if the update status of the primary cache of one of the cores is M or E, the status of the primary cache of other cores must be I, otherwise an error is reported.

[0062] When the secondary cache update status is in the S state, the status of the primary cache of each core cannot be in the M state or E state, otherwise an error is reported.

[0063] When the secondary cache update status is in the E state, the primary cache of each core may be in any one of MESI, and no detection is performed.

[0064] (3) Check the secondary cache of other clusters. According to the tag, index, and bank information of the currently updated secondary cache, obtain the status and data of other secondary caches. The detection between different clusters should conform to the following principles:

[0065] If the secondary cache status of the updated cluster is in the M state, the secondary cache status of other clusters must be in the I state, otherwise an error is reported.

[0066] If the secondary cache status of the updated cluster is in the E state, the secondary cache status of other clusters must be in the I state, otherwise an error is reported.

[0067] If the secondary cache status of the updated cluster is in the S state, the secondary cache status of other clusters must be in the I state or S state, otherwise an error is reported.

[0068] If the secondary cache status of the updated cluster is in the I state, the secondary cache status of other clusters can be in any state of MESI.

[0069] Model the first-level cache or the second-level cache separately to simulate the RTL cache behavior, make corresponding logical judgments based on the information received by the RTL cache, and monitor the output of the RTL cache. Compare the RTL output with the model output. However, this solution must monitor a large number of RTL signals to achieve complete consistency with the RTL cache behavior, which requires a lot of time and effort. Moreover, this solution can only monitor the first-level cache or the second-level cache separately and cannot verify the consistency of the two-level cache in the inclusive mode.

[0070] The number of devices and the processing scale described here are used to simplify the description of the present invention. Applications, modifications, and variations of the present invention will be obvious to those skilled in the art.

[0071] Although the embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and the embodiments. It can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and the illustrated and described examples here.

Claims

1. A method for implementing multi-core cache coherence verification, characterized in that Including the following steps: S1. When a core updates a cache line to the M state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line in other cores can only be the I state; otherwise, an error is reported. S2. When a core updates a cache line to the E state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line in other cores can only be the I state; otherwise, an error is reported. At the same time, check whether the updated data of the cache line is consistent with the data in the memory. If they are different, an error is reported. S3. When a core updates a cache line to the S state, check whether the cache line exists in the caches of other cores. If it exists, the state of the cache line in other cores can only be the S or I state; otherwise, an error is reported. If the state of other cores is S, check whether the cache line data of the two cores is consistent, and at the same time check whether it is consistent with the data in the memory. S4. When a core updates a cache line to the I state, the states of other cores can be any one of M, E, S, and I, and no check is required. The method is applied to a multi-core environment, which includes two clusters. Each cluster includes a secondary cache. The secondary cache is connected to multiple cores, and each core includes a first-level data cache. The first-level data cache and the secondary cache perform consistency verification simultaneously. The consistency verification of the secondary cache includes the following steps: (1) Simultaneously monitor the secondary cache update information of each cluster in the multi-core system in the secondary cache checker to obtain the update status, the tag, index, and bank information of the updated cache line. Since the secondary cache records the states of the first-level caches connected to it, the state information of the first-level caches can be obtained simultaneously when the secondary cache is updated. (2) Check whether the states of the secondary cache and the first-level cache of the current cluster are reasonable. Since the relationship between the two-level caches is inclusive, the two-level states should conform to the following principles: When the update state of the secondary cache is the I state, the state of the first-level cache of each core must also be the I state; otherwise, an error is reported. When the update state of the secondary cache is the M state, if the update state of the first-level cache of one of the cores is M or E, the state of the first-level caches of other cores must be I; otherwise, an error is reported. When the update state of the secondary cache is the S state, the state of the first-level cache of each core cannot be the M state or the E state; otherwise, an error is reported. When the update state of the secondary cache is the E state, the state of the first-level cache of each core can be any one of M, E, S, and I, and no detection is performed.

2. The method for implementing multi-core cache coherence verification according to claim 1, wherein The consistency verification of the first-level data cache includes the following steps: (1) Simultaneously monitor the first-level data cache update information of each core in the multi-core system in the first-level data cache checker to obtain the update status, the tag, index, and bank information of the updated cache line, and simultaneously save the cache line data. (2) Monitor the L1 data cache of each core in the multi-core system simultaneously in the L1 data cache checker. According to the tag, index, and bank information of the current updated core, obtain the information on whether the same cache line exists in other cores at the current moment. If it exists, obtain the cache line status by accessing the cache directory and obtain the cache line data by accessing the cache data. (3) If the status of the updated core is M, perform monitoring and judgment according to step S1. (4) If the status of the updated core is E, perform monitoring and judgment according to step S2. (5) If the status of the updated core is S, perform monitoring and judgment according to step S3. (6) If the status of the updated core is I, perform monitoring and judgment according to step S4.

3. The method for implementing multi-core cache coherence verification according to claim 1, wherein, The consistency verification of the L2 cache further includes the following steps: (3) Check the L2 cache of another cluster. According to the tag, index, and bank information of the currently updated L2 cache, obtain the status and data of other L2 caches. The detection between different clusters should comply with the following principles: If the status of the updated cluster's L2 cache is M state, the status of other cluster's L2 caches must be I state, otherwise an error is reported. If the status of the updated cluster's L2 cache is E state, the status of other cluster's L2 caches must be I state, otherwise an error is reported. If the status of the updated cluster's L2 cache is S state, the status of other cluster's L2 caches must be I state or S state, otherwise an error is reported. If the status of the updated cluster's L2 cache is I state, the status of other cluster's L2 caches is any one of the states M, E, S, and I.

Images