High electron mobility transistor epitaxial wafer with improved manufacturing efficiency and manufacturing method thereof

Abstract

The present disclosure provides a high electron mobility transistor epitaxial wafer and preparation method for improving preparation efficiency, which belongs to the field of semiconductor device technology. A Ni sublayer and a Ni-AlN alloy sublayer are stacked on a silicon substrate. Since the density of the Ni sublayer is relatively large, the quality of the epitaxial material grown on the Ni sublayer is improved. The connection effect between the Ni-AlN alloy sublayer and the Ni sublayer on the Ni sublayer is good, and the growth of the gallium nitride material on the Ni-AlN alloy sublayer is heterogeneous nucleation and then grown on the basis of the crystal nucleus. The nucleation work of heterogeneous nucleation is low, and the AlGaN buffer layer doped with Al and the Ni-AlN alloy sublayer have homogeneous materials and can grow rapidly. At the same time, heterogeneous nucleation also exists in the AlGaN buffer layer, which can promote the rapid growth of the AlGaN buffer layer and ensure the quality of the AlGaN buffer layer, effectively improving the preparation efficiency of the high electron mobility transistor finally obtained.

Description

Technical Field

[0001] The present disclosure relates to the technical field of semiconductor devices, and in particular to a high electron mobility transistor epitaxial wafer with improved manufacturing efficiency and a manufacturing method thereof. Background Art

[0002] A HEMT (High Electron Mobility Transistor) is a heterojunction field-effect transistor widely used in various electrical devices. HEMT epitaxial wafers are the foundation for HEMT device fabrication. These wafers consist of a substrate and, stacked on top of it, an AlN layer, an AlGaN buffer layer, a GaN high-resistance layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer.

[0003] HEMT epitaxial wafers are often grown using silicon substrates as the base. However, there is a large lattice mismatch between the silicon substrate and the gallium nitride material. Even if an AlN layer and an AlGaN buffer layer are added between the silicon substrate and the gallium nitride material to alleviate the lattice mismatch, the quality of the gallium nitride material such as the GaN high-resistance layer grown on the AlGaN buffer layer will be affected. If the gallium nitride material is grown at a lower growth rate to achieve the purpose of improving the quality of the gallium nitride material such as the GaN high-resistance layer, the growth efficiency of the HEMT epitaxial wafer will be less than ideal. Summary of the Invention

[0004] The present disclosure provides a high electron mobility transistor epitaxial wafer and a method for manufacturing the same with improved manufacturing efficiency, which can improve the quality of the GaN high resistance layer while also improving the manufacturing efficiency of the high electron mobility transistor epitaxial wafer. The technical solution is as follows:

[0005] An embodiment of the present disclosure provides a high electron mobility transistor epitaxial wafer, which improves the preparation efficiency of the high electron mobility transistor epitaxial wafer and includes a silicon substrate and a composite layer that reduces nucleation work, an AlGaN buffer layer, a GaN high resistance layer, a GaN channel layer, an AlGaN barrier layer and a GaN cap layer stacked in sequence on the silicon substrate. The composite layer that reduces nucleation work includes a Ni sublayer and a Ni-AlN alloy sublayer stacked in sequence.

[0006] Optionally, the Ni—AlN alloy sublayer has a thickness of 50 nm to 260 nm.

[0007] Optionally, the Ni sublayer has a thickness of 1 to 3 nm.

[0008] Optionally, the thickness of the composite layer for reducing nucleation work is 50 to 260 nm.

[0009] The present disclosure provides a method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency. The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency includes:

[0010] providing a silicon substrate;

[0011] A composite layer for reducing nucleation work, an AlGaN buffer layer, a GaN high resistance layer, a GaN channel layer, an AlGaN barrier layer and a GaN cap layer are sequentially grown on the silicon substrate. The composite layer for reducing nucleation work includes a Ni sublayer and a Ni-AlN alloy sublayer stacked in sequence.

[0012] Optionally, growing a composite layer with reduced nucleation power on the silicon substrate comprises:

[0013] Depositing a Ni film layer of 2 to 10 nm on the silicon substrate;

[0014] Growing an AlN film layer with a thickness of 50 to 200 nm on the Ni film layer;

[0015] The Ni film layer and the AlN film layer are annealed at a temperature of 1100-1200° C. to allow Ni in the Ni film layer to penetrate into the AlN film layer to form a Ni-AlN alloy sublayer, and a Ni sublayer and a Ni-AlN alloy sublayer stacked in sequence are obtained on the silicon substrate.

[0016] Optionally, the Ni film layer and the AlN film layer are annealed at a temperature of 1100-1200° C. for 15-20 minutes.

[0017] Optionally, the sputtering power of the Ni film layer is 2000-4000W.

[0018] Optionally, the growth temperature of the AlN film layer is 1100-1200° C., and the growth pressure of the AlN film layer is 40-70 mbar.

[0019] Optionally, the growth temperature of the AlN film layer is equal to the annealing temperature of the Ni film layer and the AlN film layer.

[0020] The technical solutions provided by the embodiments of the present disclosure bring beneficial effects including:

[0021] The Ni sublayer and the Ni-AlN alloy sublayer are stacked on a silicon substrate. Due to the high density of the Ni sublayer, the quality and surface flatness of the Ni sublayer stacked on the silicon substrate are guaranteed, thereby improving the quality of the epitaxial material grown on the Ni sublayer. The Ni-AlN alloy sublayer on the Ni sublayer has a good connection with the Ni sublayer. Furthermore, the growth of the GaN material on the Ni-AlN alloy sublayer is a process of heterogeneous nucleation followed by growth based on the nucleus. The nucleation work of heterogeneous nucleation is largely determined by the equilibrium contact angle between the GaN nucleus and the surface of the Ni-AlN alloy sublayer. The smaller the equilibrium contact angle, the lower the nucleation work of the GaN material. The equilibrium contact angle between the crystal nucleus of the gallium nitride material and the surface of the Ni-AlN alloy sublayer is smaller than the equilibrium contact angle between the crystal nucleus of the gallium nitride material and the surface of most materials, which can effectively reduce the nucleation work required for the gallium nitride material to grow on the Ni-AlN alloy sublayer. The reduction in nucleation work will promote the nucleation and growth efficiency of the gallium nitride material, and improve the preparation efficiency of the gallium nitride material grown on the Ni-AlN alloy sublayer. The Al-doped AlGaN buffer layer and the Ni-AlN alloy sublayer are homogeneous materials and can grow rapidly. At the same time, heterogeneous nucleation also exists in the AlGaN buffer layer, which can promote the rapid growth of the AlGaN buffer layer and ensure the quality of the AlGaN buffer layer, effectively improving the preparation efficiency of the final high electron mobility transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0023] Figure 1 This is a schematic structural diagram of a high electron mobility transistor epitaxial wafer with improved manufacturing efficiency provided by an embodiment of the present disclosure;

[0024] Figure 2 This is a schematic structural diagram of another high electron mobility transistor epitaxial wafer with improved manufacturing efficiency provided by an embodiment of the present disclosure;

[0025] Figure 3 This is a flow chart of a method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency provided by an embodiment of the present disclosure;

[0026] Figure 4 This is a flow chart of another method for preparing a high electron mobility transistor epitaxial wafer to improve preparation efficiency provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0027] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0028] Figure 1 This is a schematic diagram of the structure of a high electron mobility transistor epitaxial wafer with improved manufacturing efficiency provided by an embodiment of the present disclosure, with reference to Figure 1 It can be seen that the embodiment of the present disclosure provides a high electron mobility transistor epitaxial wafer, which improves the preparation efficiency and includes a silicon substrate 1 and a nucleation work reducing composite layer 2, an AlGaN buffer layer 3, a GaN high resistance layer 4, a GaN channel layer 5, an AlGaN barrier layer 6 and a GaN cap layer 7 stacked in sequence on the silicon substrate 1. The nucleation work reducing composite layer 2 includes a Ni sublayer 21 and a Ni-AlN alloy sublayer 22 stacked in sequence.

[0029] A Ni sublayer 21 and a Ni-AlN alloy sublayer 22 are stacked on a silicon substrate 1. Due to the high density of the Ni sublayer 21, the stacking quality and surface smoothness of the Ni sublayer 21 on the silicon substrate 1 are guaranteed, thereby improving the quality of the epitaxial material grown on the Ni sublayer 21. The Ni-AlN alloy sublayer 22 on the Ni sublayer 21 is well connected to the Ni sublayer 21. Furthermore, the growth of the gallium nitride material on the Ni-AlN alloy sublayer 22 is a process of heterogeneous nucleation followed by growth based on the nucleus. The nucleation work of heterogeneous nucleation is largely determined by the equilibrium contact angle between the gallium nitride nucleus and the surface of the Ni-AlN alloy sublayer 22. The smaller the equilibrium contact angle, the lower the nucleation work of the gallium nitride material. The equilibrium contact angle between the crystal nucleus of the gallium nitride material and the surface of the Ni-AlN alloy sublayer 22 is smaller than the equilibrium contact angle between the crystal nucleus of the gallium nitride material and the surface of most materials, which can effectively reduce the nucleation work required for the gallium nitride material to grow on the Ni-AlN alloy sublayer 22. The reduction in nucleation work will promote the nucleation and growth efficiency of the gallium nitride material, and improve the preparation efficiency of the gallium nitride material grown on the Ni-AlN alloy sublayer 22. The Al-doped AlGaN buffer layer 3 and the Ni-AlN alloy sublayer 22 have homogeneous materials and can grow rapidly. At the same time, heterogeneous nucleation also exists in the AlGaN buffer layer 3, which can promote the rapid growth of the AlGaN buffer layer 3 and ensure the quality of the AlGaN buffer layer 3, effectively improving the preparation efficiency of the high electron mobility transistor finally obtained.

[0030] It should be noted that according to classical thermodynamics theory, the energy barrier for heterogeneous nucleation is ΔG1 = ΔG2*f(θ), where ΔG2 is the nucleation work of homogeneous nucleation, θ is the equilibrium contact angle between the nucleus and the heterogeneous surface, and f(θ) = (2-3cosθ+cos 3θ) / 4, therefore, the energy barrier ΔG1 for heterogeneous nucleation decreases as the contact angle decreases. It can be seen from the wettability (i.e., cosθ) and floatability (i.e., 1-cosθ) that the worse the floatability, the better the wettability, and the greater the density, the worse the floatability, that is, the greater the density, the better the wettability. The density of Ni is greater than that of Al and Ga, so the wettability of the Ni-AlN alloy sublayer 22 is better than that of Al, AlN AlGaN. The value range of θ is 0-180°, and it can be seen from the wettability (cosθ) that the contact angle of the Ni-AlN alloy sublayer 22 is smaller than that of Al, AlNAlGaN, and the energy barrier ΔG1 for heterogeneous nucleation decreases as the contact angle decreases, so the nucleation work required for the Ni-AlN alloy sublayer 22 is less than that of Al, AlN AlGaN. In the process of heterogeneous nucleation, the crystal nucleus is more likely to nucleate on the Ni-AlN alloy sublayer 22, and the resulting epitaxial layer crystal has better quality and higher preparation efficiency.

[0031] Optionally, the Ni—AlN alloy sub-layer 22 has a thickness of 50 nm to 260 nm.

[0032] The thickness of the Ni-AlN alloy sublayer 22 is within the above range, which can ensure that the quality of the Ni-AlN alloy sublayer 22 itself is good, and the surface of the Ni-AlN alloy sublayer 22 is relatively flat, which effectively promotes the efficiency of heterogeneous nucleation on the Ni-AlN alloy sublayer 22 and the quality of the obtained epitaxial material.

[0033] Exemplarily, the thickness of the Ni sub-layer 21 is 1-3 nm.

[0034] The thickness of the Ni sublayer 21 is within the above range, which can ensure a good transition between the silicon substrate 1 and the Ni-AlN alloy sublayer 22, and can also ensure the quality of the obtained Ni-AlN alloy sublayer 22, thereby improving the quality of the final high electron mobility transistor.

[0035] Optionally, the thickness of the nucleation-reducing composite layer 2 is 50-260 nm.

[0036] When the thickness of the nucleation-reducing composite layer 2 is within the above range, the overall quality of the nucleation-reducing composite layer 2 is good, and the quality of the epitaxial material grown on the nucleation-reducing composite layer 2 can be improved.

[0037] Figure 2 This is a schematic structural diagram of another high electron mobility transistor epitaxial wafer with a composite layer 2 that reduces nucleation work provided by the embodiment of the present disclosure, with reference to Figure 2It can be seen that the high electron mobility transistor epitaxial wafer may include a substrate and a nucleation-reducing composite layer 2, an AlGaN buffer layer 3, a GaN high-resistance layer 4, a GaN channel layer 5, an AlN insertion layer 8, an AlGaN barrier layer 6 and a GaN cap layer 7 stacked in sequence on a silicon substrate 1, and the nucleation-reducing composite layer 2 includes a Ni sublayer 21 and a Ni-AlN alloy sublayer 22 stacked in sequence.

[0038] It should be noted that Figure 2 The structure of the reduced nucleation work composite layer 2 shown in Figure 1 The structure of the composite layer 2 for reducing nucleation work is the same as that shown in , so it will not be described again here.

[0039] For example, the thickness of the AlGaN buffer layer 3 is 1 to 1.5 micrometers. The obtained AlGaN buffer layer 3 has good quality.

[0040] Optionally, the thickness of the GaN channel layer 5 may be 100-400 nm.

[0041] The thickness of the GaN channel layer 5 is appropriate, the cost is reasonable, and the quality of the high electron mobility transistor epitaxial wafer can be effectively improved.

[0042] In one implementation provided in the present disclosure, the thickness of the GaN channel layer 5 may be 400 nm, which is not limited in the present disclosure.

[0043] Figure 2 Relative Figure 1 The structure of the HEMT epitaxial wafer incorporates an AlN insertion layer 8, which minimizes the negative impact of the underlying lattice mismatch. Furthermore, a two-dimensional electron gas (2DEG) forms at the interface between the AlN insertion layer 8 and the GaN channel layer 5, and between the AlN insertion layer 8 and the AlGaN barrier layer 6. This 2DEG increases carrier accumulation at these interfaces, ensuring the effectiveness of the high electron mobility transistor epitaxial wafer.

[0044] Optionally, the thickness of the AlN insertion layer 8 is 0.5-2 nm.

[0045] When the thickness of the AlN insertion layer 8 is within the above range, the two-dimensional electron gas can be effectively generated without excessively increasing the cost.

[0046] In one implementation provided by the present disclosure, the thickness of the AlN insertion layer 8 may be 2 nm, which is not limited by the present disclosure.

[0047] Optionally, the thickness of the AlGaN barrier layer 6 may be 15-40 nm, which can ensure the quality of the high electron mobility transistor epitaxial wafer.

[0048] In one implementation provided in the present disclosure, the thickness of the AlGaN barrier layer 6 may be 100 nm, which is not limited in the present disclosure.

[0049] Exemplarily, the GaN capping layer 7 may be a P-type GaN layer, which is convenient for preparation and acquisition.

[0050] Optionally, the thickness of the GaN capping layer 7 is 3-10 nm. The obtained GaN capping layer 7 has good overall quality.

[0051] Exemplarily, the impurity in the GaN cap layer 7 is Mg, which is convenient for preparation and acquisition.

[0052] It should be noted that Figure 2 This is only one implementation of the high electron mobility transistor epitaxial wafer provided in the embodiment of the present disclosure. In other implementations provided in the present disclosure, the high electron mobility transistor epitaxial wafer may also be other forms of high electron mobility transistor epitaxial wafer including a reflective layer, and the present disclosure does not limit this.

[0053] Figure 3 This is a flow chart of a method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency provided by an embodiment of the present disclosure. Figure 3 It can be seen that the embodiment of the present disclosure provides a method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency. The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency includes:

[0054] S101: providing a silicon substrate;

[0055] S102: growing a composite layer for reducing nucleation work, an AlGaN buffer layer, a GaN high resistance layer, a GaN channel layer, an AlGaN barrier layer and a GaN cap layer in sequence on a silicon substrate, wherein the composite layer for reducing nucleation work includes a Ni sublayer and a Ni-AlN alloy sublayer stacked in sequence.

[0056] The Ni sublayer and the Ni-AlN alloy sublayer are stacked on a silicon substrate. Due to the high density of the Ni sublayer, the quality and surface flatness of the Ni sublayer stacked on the silicon substrate are guaranteed, thereby improving the quality of the epitaxial material grown on the Ni sublayer. The Ni-AlN alloy sublayer on the Ni sublayer has a good connection with the Ni sublayer. Furthermore, the growth of the GaN material on the Ni-AlN alloy sublayer is a process of heterogeneous nucleation followed by growth based on the nucleus. The nucleation work of heterogeneous nucleation is largely determined by the equilibrium contact angle between the GaN nucleus and the surface of the Ni-AlN alloy sublayer. The smaller the equilibrium contact angle, the lower the nucleation work of the GaN material. The equilibrium contact angle between the crystal nucleus of the gallium nitride material and the surface of the Ni-AlN alloy sublayer is smaller than the equilibrium contact angle between the crystal nucleus of the gallium nitride material and the surface of most materials, which can effectively reduce the nucleation work required for the gallium nitride material to grow on the Ni-AlN alloy sublayer. The reduction in nucleation work will promote the nucleation and growth efficiency of the gallium nitride material, and improve the preparation efficiency of the gallium nitride material grown on the Ni-AlN alloy sublayer. The Al-doped AlGaN buffer layer and the Ni-AlN alloy sublayer are homogeneous materials and can grow rapidly. At the same time, heterogeneous nucleation also exists in the AlGaN buffer layer, which can promote the rapid growth of the AlGaN buffer layer and ensure the quality of the AlGaN buffer layer, effectively improving the preparation efficiency of the final high electron mobility transistor.

[0057] It should be noted that the Ni film can be deposited by sputtering, and the AlN film can be deposited by chemical metal vapor deposition. The quality of the obtained Ni and AlN films can be guaranteed. However, the density of the AlN film grown by chemical metal vapor deposition is slightly lower, which is more conducive to the penetration of Ni atoms during the annealing process, thereby effectively reducing the nucleation work of heterogeneous nucleation.

[0058] Optionally, in step S102 , the sputtering power of the Ni film layer is 2000-4000 W. This can ensure the surface quality of the obtained Ni film layer.

[0059] Illustratively, the sputtering temperature of the Ni film layer is 400-600° C., and the sputtering pressure of the Ni film layer is 1-10 Torr.

[0060] During the sputtering process, the sputtering temperature and the sputtering pressure of the Ni film layer are respectively within the above ranges, which can ensure that the quality of the obtained Ni film layer is good and effectively improve the quality of the final Ni-AlN alloy sublayer.

[0061] For example, the AlN film is grown at a temperature of 1100-1200° C. and a pressure of 40-70 mbar, thereby obtaining an AlN film with a suitable density.

[0062] Optionally, the growth rate of the AlN film layer is 0.1 μm / h to 1.0 μm / h.

[0063] The growth rate of the AlN film layer is within the above range, which can ensure that the density of the obtained AlN film layer is relatively reasonable. In addition, during the annealing process, Ni atoms can fully penetrate the AlN film layer to obtain a Ni-AlN alloy sublayer, effectively reducing the nucleation work.

[0064] Optionally, in step S102, growing a composite layer with reduced nucleation power on a silicon substrate includes:

[0065] A Ni film layer of 2 to 10 nm is deposited on a silicon substrate; an AlN film layer of 50 to 200 nm is grown on the Ni film layer; the Ni film layer and the AlN film layer are annealed at a temperature of 1100 to 1200° C. so that Ni in the Ni film layer penetrates into the AlN film layer to form a Ni-AlN alloy sublayer, and a Ni sublayer and a Ni-AlN alloy sublayer stacked in sequence are obtained on the silicon substrate.

[0066] Before forming the Ni-AlN alloy sublayer, a 2-10 nm Ni film layer is first deposited on the silicon substrate. The Ni film layer provides a good growth foundation and contains sufficient Ni to form the Ni-AlN alloy sublayer. The AlN film layer has a thickness of 50-200 nm, which ensures good quality of the AlN film layer itself and the quality of the gallium nitride or aluminum gallium nitride material grown on the AlN film layer. Ni atoms can also fully penetrate into the AlN film layer, resulting in a Ni-AlN alloy sublayer with sufficient Ni penetration. This effectively reduces the nucleation work of heterogeneous nucleation on the surface of the resulting Ni-AlN alloy sublayer, improves the production efficiency of the gallium nitride or aluminum gallium nitride material grown on the surface of the Ni-AlN alloy sublayer, and ensures the quality and production efficiency of the resulting high electron mobility transistor.

[0067] For example, the Ni film layer and the AlN film layer are annealed at a temperature of 1100-1200° C. for 15-20 minutes to obtain a Ni-AlN alloy sublayer of good quality.

[0068] Optionally, the growth temperature of the AlN film layer is equal to the annealing temperature of the Ni film layer and the AlN film layer.

[0069] The growth temperature of the AlN film layer is equal to the annealing temperature of the Ni film layer and the AlN film layer. After the AlN film layer is grown, the annealing process can be carried out without adjusting the temperature of the reaction chamber, which reduces the time required for adjustment and further improves the preparation efficiency of high electron mobility transistors.

[0070] Figure 4: is a flow chart of another method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency provided by an embodiment of the present disclosure. The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency may further include:

[0071] S201: Provide a silicon substrate.

[0072] S202: growing a composite layer for reducing nucleation work on a silicon substrate, wherein the composite layer for reducing nucleation work includes a Ni sublayer and a Ni—AlN alloy sublayer stacked in sequence.

[0073] The specific deposition conditions and deposition rate of the nucleation composite layer in step S202 can be found in Figure 3 In the method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency shown in , the deposition conditions and deposition rate of the nucleation work composite layer are reduced in step S102, so they are not described here in detail.

[0074] S203: growing an AlGaN buffer layer on the nucleation-reducing composite layer.

[0075] Optionally, step S203 may include: introducing an Al source, a Ga source, and a reaction gas into a reaction chamber using argon as a carrier gas to grow an AlGaN film layer; closing the Al source, the Ga source, and the reaction gas; introducing hydrogen into the reaction chamber at a temperature of 1050 to 1250° C. to treat the AlGaN film layer; and repeating the above steps until an AlGaN layer is obtained.

[0076] During the growth of the AlGaN buffer layer, the growth uniformity and surface flatness of the AlGaN buffer layer can be improved. While the crystal quality of the AlGaN buffer layer itself is improved, structures such as gallium nitride grown based on the surface of the AlGaN buffer layer can also be improved.

[0077] Optionally, the thickness of the AlGaN film layer is 20-50 nm.

[0078] When the thickness of each AlGaN film layer is within the above range, the growth of the AlGaN film layer can be relatively uniform, and the surface flatness of the AlGaN film layer can be relatively high. Combined with the subsequent hydrogen treatment, the surface dislocation density of the AlGaN film layer can be effectively reduced, thereby improving the crystal quality of the final second AlGaN layer.

[0079] Optionally, hydrogen is introduced into the reaction chamber at a temperature of 1050-1250° C. for a time period of 5-10 seconds to treat the AlGaN film layer.

[0080] The duration of hydrogen treatment is within the above range, which can ensure that the surface of the AlGaN film layer is sufficiently treated by hydrogen, and the AlGaN film layer also undergoes sufficient annealing during this time, and the crystal quality of the AlGaN film layer can be further improved.

[0081] Optionally, the thickness of the AlGaN buffer layer is 100-200 nm.

[0082] When the thickness of the AlGaN buffer layer is within the above range, the quality of the AlGaN buffer layer is good and can also provide a good growth foundation for subsequent growth structures.

[0083] Optionally, an Al source, a Ga source, and a reaction gas are introduced into the reaction chamber using argon as a carrier gas to grow an AlGaN film layer, further comprising:

[0084] Argon is used as a carrier gas to introduce Al source, Ga source, Fe source and reaction gas into the reaction chamber to grow an AlGaN film layer.

[0085] The incorporation of Fe elements into the AlGaN film layer can achieve high resistance of the AlGaN buffer layer, facilitating the transition to subsequent high-resistance gallium nitride materials.

[0086] It should be noted that under the premise that argon is used as the carrier gas to introduce Al source, Ga source, Fe source and reaction gas to grow the AlGaN film layer, during the subsequent hydrogen treatment of the AlGaN film layer, the Al source, Ga source, Fe source and reaction gas also need to be turned off at the same time.

[0087] Optionally, the flow rate of the Fe source is 50-200 sccm.

[0088] When the flow rate of the Fe source is within the above range, a good quality AlGaN buffer layer can be obtained.

[0089] For example, the Fe doping concentration in the AlGaN buffer layer is 10 18 ~10 20 cm -3 The AlGaN buffer layer has good quality and can achieve a good transition with the subsequent high-resistance GaN material.

[0090] Optionally, the growth conditions of the AlGaN buffer layer include: a growth temperature of 1050° C. to 1250° C. and a pressure of 40 to 70 mbar, thereby obtaining an AlGaN buffer layer of good quality.

[0091] S204: growing a GaN high-resistance layer on the AlGaN buffer layer.

[0092] The growth conditions and parameters of GaN high resistance layer can be referred to Figure 3The step S102 shown in FIG is omitted for brevity.

[0093] S205: growing a GaN channel layer on the GaN high-resistance layer.

[0094] Optionally, the growth conditions of the GaN channel layer include: a growth temperature of 1050° C. to 1150° C. and a pressure of 150 to 250 mbar, thereby obtaining a GaN channel layer of good quality.

[0095] Exemplarily, the thickness of the GaN channel layer is between 1.0 and 1.5 microns, thereby improving the quality of the resulting HEMT epitaxial wafer and achieving a good quality GaN channel layer.

[0096] S206: growing an AlN insertion layer on the GaN channel layer.

[0097] Optionally, the growth temperature of the AlN insertion layer is 1050° C. to 1150° C., and the growth pressure of the AlN insertion layer is 40 to 70 mbar, thereby obtaining an AlN insertion layer of good quality.

[0098] S207: growing an AlGaN barrier layer on the AlN insertion layer.

[0099] Optionally, the growth temperature of the AlGaN barrier layer is 1050° C. to 1150° C., and the growth pressure of the AlGaN barrier layer is 40 to 70 mbar. The quality of the obtained AlGaN barrier layer is good.

[0100] In an implementation provided by the present disclosure, the growth temperature of the AlGaN barrier layer may be 1020° C. The present disclosure does not impose any limitation on this.

[0101] S208: growing a GaN cap layer on the AlGaN barrier layer.

[0102] Optionally, the growth temperature of the GaN capping layer is 1050° C. to 1150° C., and the growth pressure of the AlGaN barrier layer is 40 to 70 mbar. The quality of the obtained GaN capping layer is good.

[0103] It should be noted that in the embodiments of the present disclosure, a Veeco K 465i or C4 or RB MOCVD (Metal Organic Chemical Vapor Deposition) device is used to achieve the LED growth method. High-purity H2 (hydrogen) or high-purity N2 (nitrogen) or a mixture of high-purity H2 and high-purity N2 is used as the carrier gas, high-purity NH3 is used as the N source, trimethylgallium (TMGa) and triethylgallium (TEGa) are used as the gallium source, trimethylindium (TMIn) is used as the indium source, silane (SiH4) is used as the N-type dopant, trimethylaluminum (TMAl) is used as the aluminum source, bis(octyl)magnesium (CP2Mg) is used as the P-type dopant, and ferrocene (Cp2Fe) is used as the precursor of the iron (Fe) source.

[0104] The above does not limit the present disclosure in any form. Although the present disclosure has been disclosed as above through the embodiments, it is not intended to limit the present disclosure. Any technician familiar with the profession can make slight changes or modifications to equivalent embodiments with equivalent changes using the technical content disclosed above without departing from the scope of the technical solution of the present disclosure. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure are still within the scope of the technical solution of the present disclosure.

Claims

1. A method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency, characterized in that: The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency comprises: providing a silicon substrate; A composite layer for reducing nucleation work, an AlGaN buffer layer, a GaN high-resistance layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer are sequentially grown on the silicon substrate, wherein the composite layer for reducing nucleation work comprises a Ni sublayer and a Ni-AlN alloy sublayer stacked in sequence; Wherein, the step of growing a composite layer with reduced nucleation work on the silicon substrate comprises: Depositing a Ni film layer of 2 to 10 nm on the silicon substrate; Growing an AlN film layer with a thickness of 50 to 200 nm on the Ni film layer; The Ni film layer and the AlN film layer are annealed at a temperature of 1100-1200° C. to allow Ni in the Ni film layer to penetrate into the AlN film layer to form a Ni-AlN alloy sublayer, thereby obtaining a Ni sublayer and a Ni-AlN alloy sublayer stacked in sequence on the silicon substrate.

2. The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency according to claim 1, wherein: The Ni film layer and the AlN film layer are annealed at a temperature of 1100-1200° C. for 15-20 minutes.

3. The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency according to claim 1, wherein: The sputtering power of the Ni film layer is 2000-4000W.

4. The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency according to claim 3, wherein: The growth temperature of the AlN film layer is 1100-1200° C., and the growth pressure of the AlN film layer is 40-70 mbar.

5. The method for preparing a high electron mobility transistor epitaxial wafer with improved preparation efficiency according to claim 2, wherein: The growth temperature of the AlN film layer is equal to the annealing temperature of the Ni film layer and the AlN film layer.

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