Application of polymer electret organic field effect transistor memory in biological synapse simulation

Abstract

The application discloses application of a polymer electret organic field effect transistor memory in biological synapse simulation and relates to the fields of semiconductor industry storage technology, biological film technology and synaptic plasticity devices. The polymer electret organic field effect transistor memory comprises, from top to bottom, a source-drain electrode, an organic semiconductor layer, a polymer electret, a gate insulating layer and a gate electrode, and the polymer electret is the same polymer with different molecular weights. The polymer electret is prepared into a smooth film through a simple spin coating process, so that the preparation cost of the device is reduced and the polymer electret has great commercial value. The performance of the whole transistor is stable, the process is simple, and the channel current change has high similarity to biological synapses.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of organic optoelectronic materials, organic semiconductor industry memory technology and synaptic plasticity devices, and particularly relates to application of a polymer electret organic field effect transistor memory in biological synapse simulation. BACKGROUND

[0002] Polymer electret-based organic field effect transistor nonvolatile memory is a new type of memory that has developed rapidly in recent years. This memory mainly uses polymer materials as the core storage layer of the device, and has the advantages of light weight, low-temperature large-area processing, and easy flexibility of the substrate. At the same time, it uses light as an auxiliary programming means, and has the advantages of fast storage speed, high data security, rich control means, low dependence on electricity, and many other advantages, and has good development prospects and application value.

[0003] Polymer electret-based organic field effect transistor nonvolatile memory belongs to organic field effect transistor memory. As an organic thin film device, the organic field effect transistor memory device mainly includes: a substrate material supporting the entire device as a base, an organic semiconductor material for transporting carriers, a storage functional layer material for storing electric charges, a blocking / tunneling insulating layer material for blocking carrier loss, and an electrode material, etc.

[0004] According to different mechanisms of memory storage layer materials and charge storage, organic field effect transistor memory can be divided into: floating gate type organic field effect transistor memory (FGOFETs), ferroelectric type organic field effect transistor memory (OFe FETs), and organic electret type organic field effect transistor memory (OPEFETs).

[0005] Compared with metal particle floating gate and ferroelectric material-based organic field effect transistor memory (OFET memory), polymer electrets have the advantages of low-temperature solution processing and good compatibility with flexible substrates, and thus become the preferred storage medium for realizing flexible storage units. In addition, the nonvolatile memory with a floating gate structure needs to have an independent charge tunneling layer and a charge trapping layer during preparation, but for polymer electret-based organic field effect transistor memory, only one layer of polymer dielectric can meet the needs of charge tunneling and charge trapping.

[0006] As a basic component in circuits, OFET memory is compatible with the development of wearable electronics due to its wide material sources, mild processing methods, and easy large-area and mass production. Meanwhile, the structure of OFET determines its rich functional applications, such as light-emitting products, storage devices, sensors, switches, etc., so it has a very wide application prospect in the future information electronics field.

[0007] Nowadays, artificial intelligence (AI) has become a hot research field because of its broad application prospects, such as speech recognition, image processing, automatic driving technology, etc. At present, the traditional computer based on von Neumann architecture cannot meet the needs of the artificial intelligence era due to the physical separation of the storage unit and the processor, and the data transmission between the two units reduces the computing efficiency. Neuromorphic computer is a new type of computer that simulates the function of biological synapses. Because it can perform space-time conversion to learn and reason in parallel mode, it is expected to overcome the "von Neumann bottleneck". At present, there are two kinds of devices that can be used to study neuromorphic computing, one is complementary metal oxide semiconductor (CMOS) memory, and the other is non-volatile memory (NVM). Among them, NVM has higher computing density and lower energy consumption, and may be the ideal device for neuromorphic chips. NVM includes two-terminal devices and three-terminal devices. Two-terminal devices usually include memristors and RRAM, while three-terminal devices include various types of OFET Memory. Among them, OFET Memory is easy to integrate with modern integrated circuit (IC) technology. In addition, the performance of OFET Memory can be improved by applying various organic semiconductors and modification / mixing processes. In particular, some organic storage devices have their own transistors for active driving, so they are considered to be the simplest and most cost-effective electronic devices in the future artificial intelligence era. It is reported that the organic field effect transistor memory of ferroelectric polymer, metal nanoparticles or charge trapping layer and polymer energy well structure has the function of information storage and can be applied to artificial synapse device biomimicry. For the OFET memory based on rechargeable polymer electret, when a write voltage pulse (V GS ) is applied to the gate electrode, the charge can be transferred from the semiconductor to the polymer inside and / or the semiconductor / polymer interface in real time through the potential barrier. Therefore, the storage performance (including storage window, switching speed, stability, etc.) is closely related to the chemical structure of the polymer and the semiconductor / polymer interface. In order to obtain better non-volatile storage performance, many research groups have made a lot of efforts to optimize the characteristics control of polymer electrets, such as conformational transition and molecular aggregation, intermolecular / intramolecular charge transfer, π-conjugation length / strength, strong hydrophobicity and condensed state morphology engineering.

[0008] The disclosure document "Organic semiconductor memristor and its neuromorphic simulation with multi-mode selection characteristics, Wang source" describes the advantages of using organic field effect transistor memory itself devices, integrating the efficient and controllable "light virtual gate" operation mode into the transistor memory to build a multifunctional optoelectronic synapse to realize effective neuromorphic computing strategy, and discloses the effectiveness of the optoelectronic device in realizing the neuromorphic function within a single synapse and a complex neural structure. However, in the prior art, the control method based on the characteristics of the polymer electret has the problems of high control cost and difficulty. SUMMARY

[0009] In order to further optimize the characteristic control of the polymer electret, the application provides a polymer electret organic field effect transistor memory in the application of biological synapse simulation, by preparing two polymer electret organic field effect transistors with different molecular weights, so that the organic field effect transistor meets the basic plasticity function of biological synapse simulation.

[0010] To achieve the above object, the technical scheme adopted by the present application is as follows: the application of a polymer electret organic field effect transistor memory in biological synapse simulation, specifically comprising the following steps:

[0011] Step S1: based on different molecular weight polymer electrets, preferably, the molecular weight difference between the different molecular weight polymers is at least 2 orders of magnitude, an organic field effect transistor memory is prepared, the polymer electret organic field effect transistor memory includes source and drain electrodes, an organic semiconductor layer, a polymer electret layer, a gate insulating layer and a gate electrode; the polymer electret layer is used to realize large capacity charge storage; the material in the polymer electret thin film layer is a polymer with high solubility and strong hydrophobicity, preferably one or more of poly(9-vinylcarbazole), poly(2-vinylnaphthalene) or poly(4-vinylphenol), PVP, the thickness of the polymer electret thin film is 30-50nm;

[0012] Step S2: biological synapse simulation process, realizing effective regulation of the weight of excitation / inhibition plasticity in biological synapse function; in order to simulate the synapse function, the transistor uses an external input signal as the excitation, the gate of the transistor as the presynaptic end, the channel and the source and drain electrodes as the postsynaptic end, the source and drain current level being real-time regulated is equivalent to the synapse weight, playing the role of signal transmission. Therefore, in this transistor, if the source and drain current level is regarded as the real-time regulated synapse weight level, the above results show similar characteristics to biological synapses. That is, different polarity voltages can be used to simulate the excitation and inhibition process of biological synapses.

[0013] Preferably, the polymer electret organic field effect transistor memory, wherein the material of the gate electrode is selected from one of highly doped silicon, Al, Cu, Au, Ag or Pt.

[0014] Preferably, the polymer electret organic field effect transistor memory, wherein the gate insulating layer covers the entire surface of the gate electrode, isolates the contact between the gate electrode and the polymer electret layer, and can effectively reduce the gate leakage current; the material of the gate insulating layer is silicon dioxide, aluminum oxide or hafnium oxide, and the thickness of the thin film of the gate insulating layer is 50-300 nm.

[0015] Preferably, the polymer electret organic field effect transistor memory, wherein the material of the organic semiconductor layer is one or more of pentacene, bisnaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) or 2,7-dioctyl[1]benzothieno[3,2-b]benzothiophene (C8-BTBT), and the thickness of the organic semiconductor layer is 30-50 nm.

[0016] Preferably, the polymer electret organic field effect transistor memory, wherein the source-drain electrode is grown on both sides of the conductive channel, the material of the source-drain electrode is one of Cu, Au or Pt, the thickness of the source-drain electrode is 60-100 nm, and the preparation method of the source-drain electrode is magnetron sputtering or vacuum evaporation; preferably, the material of the source-drain electrode is copper.

[0017] Preferably, the polymer electret organic field effect transistor memory, wherein the length of the conductive channel between the source and the drain is 50-200 μm, and the width of the conductive channel between the source and the drain is 1000-2000 μm.

[0018] Preferably, the preparation method of the polymer electret organic field effect transistor memory comprises the following steps:

[0019] (1) configuring a hydrophobic polymer solution dissolved in an organic solvent, the concentration of which is 5-10 mg / mL, and adding a magnetic sub to heat and stir;

[0020] (2) selecting a silicon wafer with an oxide layer doped on the surface to form a gate electrode and a gate insulating layer, and the thickness of the thin film of the gate insulating layer is 50-300 nm;

[0021] (3) using acetone, ethanol and deionized water respectively to ultrasonically clean the surface of the silicon wafer in step (2), the cleaning time is 5-10 min, and the cleaned silicon wafer is dried after cleaning;

[0022] (4) ultraviolet ozone treating the dried clean silicon wafer for 5-10 min;

[0023] (5) spin the polymer solution prepared in step (1) on the cleaned silicon wafer in step (4) to a thickness of 20-50 nm, and then place the spin-coated sample in a vacuum drying oven (80°C) for annealing treatment;

[0024] (6) vacuum deposit an organic semiconductor layer and source-drain electrodes on the annealed sample in step (5).

[0025] Preferably, the organic solvent in step (1) is 1'2-dichloroethane, toluene or chlorobenzene.

[0026] Preferably, the vacuum-deposited organic semiconductor material in step (6) is pentacene, and the deposition rate is The vacuum degree is controlled at 5x10 -4 pa~5x10 -5 pa, and the thickness is controlled at 30-50 nm by using a crystal oscillator; the vacuum-deposited source-drain electrodes in step (6) are copper, and the deposition rate is and the thickness is controlled at 60-100 nm.

[0027] Beneficial effects: By selecting polymers with different molecular weights, the present application can realize the regulation of the tunneling electric field intensity and the crystallization quality of the semiconductor layer, thereby realizing the regulation of the storage performance (such as the storage window, storage speed and storage stability), and further realizing the effective regulation of the weight of the excitatory / inhibitory plasticity in the biological synapse function. The organic field effect transistor memory prepared by the method has the dual functions of non-volatile storage and biological synapse plasticity simulation. BRIEF DESCRIPTION OF DRAWINGS

[0028] The present application will be further described below in conjunction with the drawings.

[0029] Figure 1 The device structure of the polymer electret organic field effect transistor memory with biological synapse simulation function according to the present application;

[0030] Figure 2 The excitatory postsynaptic current (EPSC) of the low-molecular-weight polymer electret organic field effect transistor under different light intensities in the simulation synapse test;

[0031] Figure 3 The inhibitory postsynaptic current (IPSC) of the low-molecular-weight polymer electret organic field effect transistor under different write voltages in the simulation synapse test;

[0032] Figure 4Inhibitory postsynaptic current (IPSC) of low molecular weight polymer electret organic field effect transistor artificial synapse test under different write time;

[0033] Figure 5 Excitatory dual pulse facilitation of low molecular weight polymer electret organic field effect transistor artificial synapse test;

[0034] Figure 6 Inhibitory dual pulse facilitation of low molecular weight polymer electret organic field effect transistor artificial synapse test;

[0035] Figure 7 Excitatory postsynaptic current (EPSC) of two different molecular weight polymer electret organic field effect transistor artificial synapse test in Example 3;

[0036] Figure 8 Inhibitory postsynaptic current (IPSC) of two different molecular weight polymer electret organic field effect transistor artificial synapse test in Example 3;

[0037] Figure 9 Dual pulse facilitation factor of two different molecular weight polymer electret organic field effect transistor artificial synapse test in Example 3. DETAILED DESCRIPTION

[0038] The application will be further described below through specific embodiments. It should be noted that these embodiments are not a limitation to the application, and equivalents or replacements of the functions, methods, or structures made by those of ordinary skill in the art based on these embodiments are included in the protection scope of the application.

[0039] The following examples relate to the source of raw materials and reagents:

[0040] PVK (Mw = 1100000) was purchased from sigma Aldrich; PVK (Mw = 90000) and pentacene were purchased from J & K Scientific. They were used without further purification.

[0041] Example 1: Preparation process of low molecular weight polymer electret organic field effect transistor memory

[0042] Figure 1The structure of the low-molecular-weight polymer electret organic field effect transistor memory provided in the embodiment is shown in the figure, and includes, from top to bottom, source-drain electrodes (i.e., source electrode 1 and drain electrode 2), a semiconductor layer 3, a polymer electret layer 4, a gate insulating layer 5, and a gate electrode 6. The material in the polymer electret thin film layer 4 is poly(9-vinylcarbazole) with high solubility and strong hydrophobicity, and has a molecular weight of Mw = 90000. The thickness of the polymer electret thin film layer 4 is 30-50 nm.

[0043] In the technical solution of the embodiment, heavily doped silicon is used as the substrate and the gate electrode. The material of the gate insulating layer is silicon dioxide, and the thickness is 50-300 nm. A 30-50 nm thick pentacene layer is evaporated on the gate insulating layer as the organic semiconductor layer. Cu is evaporated on both sides of the conductive channel as the source and drain electrodes. In this example, Cu is selected as the source and drain electrode material instead of Au in consideration of the cost of device preparation. The organic semiconductor layer pentacene is formed by the thermal vacuum evaporation film formation method, and the evaporation rate is The vacuum degree is controlled to be 5x10 -4 pa-5x10 -5 pa, and the thickness is controlled to be 30-50 nm by using a crystal oscillator. The source and drain electrodes of copper are prepared by the thermal vacuum evaporation method, and the evaporation rate is The vacuum degree is controlled to be 5x10 -4 pa-5x10 -5 pa, and the thickness is controlled to be 60-100 nm by using a crystal oscillator.

[0044] During device preparation, the laboratory room temperature needs to be kept at about 25°C, and the indoor humidity needs to be kept below 50%.

[0045] The embodiment also provides a preparation method of the polymer electret organic field effect transistor with the biological synapse simulation function, and the method comprises the following steps:

[0046] (1) A poly(9-vinylcarbazole) solution is prepared, the solvent is 1,2-dichloroethane, the concentration is 5 mg / mL, a magnet is added for heating and stirring, and then the solution is left to stand for 24 hours to obtain a uniformly dissolved solution.

[0047] (2) The heavily doped silicon with a 50 nm silicon dioxide surface is sequentially cleaned with acetone, ethanol, and deionized water for 8 minutes by ultrasonic cleaning at a frequency of 100 KHz, and then the surface liquid is blown dry with high-purity nitrogen to ensure that the silicon wafer surface is clean. Then, the silicon wafer is placed in a 120°C air drying oven for drying.

[0048] (3) The dried silicon wafer in step (2) is placed in a UV ozone machine for 10 minutes.

[0049] (4) spin the polymer solution prepared in step (1) on the cleaned silicon wafer in step (3) at a low speed of 1500-4000 r / min for 30 s, and control the thickness of the polymer electret to be about 20-50 nm.

[0050] (5) dry and anneal the sample spin-coated in step (4) in a vacuum drying oven at 120°C for 30 min.

[0051] (6) vacuum evaporate an organic semiconductor pentacene on the film prepared in step (5) at a rate of 5x10 -4 pa-5x10 -5 pa, and control the thickness to be 40-50 nm by using a crystal oscillator; evaporate a 50-nm-thick organic semiconductor pentacene on the polymer electret film, and perform patterning on the prepared film surface by using a mask plate, and vacuum evaporate copper as the source-drain electrode at a rate of 60-100 nm; the channel width of the mask plate is 1500 μm, and the length is 150 μm, and the source-drain electrode copper is prepared by vacuum evaporation.

[0052] Example 2: Preparation process of a high-molecular-weight polymer electret organic field effect transistor memory

[0053] In the technical solution of this example, heavily doped silicon is used as the substrate and the gate electrode; a 50-nm-thick silicon dioxide layer is used as the gate insulating layer; the polymer thin film layer is composed of a polymer poly(9-vinylcarbazole) with a molecular weight of 1100000, and the thickness is 30 nm; a 50-nm-thick pentacene layer is evaporated on the gate insulating layer as the organic semiconductor layer; and metal copper is evaporated on both sides of the conductive channel as the source-drain electrode.

[0054] In actual preparation, the laboratory room temperature is kept at about 25°C, and the indoor humidity is kept below 50%.

[0055] The specific preparation steps of the memory described in this example are as follows:

[0056] (1) prepare a PVK solution with a concentration of 5 mg / ml, and use toluene as the solvent and let it stand for 24 h to ensure complete dissolution;

[0057] (2) ultrasonically clean the heavily doped silicon with a 50-nm-thick silicon dioxide layer with acetone, ethanol, and deionized water for 8 min each time at an ultrasonic frequency of 100 KHz, and then blow the surface of the substrate dry with high-purity nitrogen to ensure that the surface of the substrate is clean, and then place the substrate in an oven at 120°C for drying;

[0058] (3) place the dried substrate in step (2) in a UV-ozone machine for 10 min;

[0059] (4) In the air, the air humidity is 50%, the substrate surface treated in step (3) is spin-coated with the solution prepared in step (1), the spin-coating speed is 2000 r / min, the spin-coating time is 30 s, and the film thickness is controlled at about 30 nm; in the nitrogen glove box, the spin-coated substrate is placed on a heating table at 80℃ and dried for 30 min;

[0060] (5) The film prepared in step (4) is vacuum evaporated with organic semiconductor layer and pentacene, the evaporation rate is 5×10 -4 pa, the evaporation film thickness is controlled at 50 nm; a mask plate is added on the prepared film for patterning treatment, and copper is vacuum evaporated as source and drain electrodes, the evaporation rate is controlled at 100 nm; the channel width of the mask plate is 1500 μm, and the length is 150 μm.

[0061] Example 3: Highlight simulation using polymer electret organic field effect transistor memory with different molecular weights

[0062] The polymer electret organic field effect transistor with biological synapse simulation function prepared in the above examples is also subjected to performance test, and the test method and results are shown as follows:

[0063] The test and characterization method of the polymer electret organic field effect transistor with biological synapse simulation function is as follows: the electrical performance characterization is carried out on a probe station and an inverted microscope using a Keithley 2636B semiconductor analyzer. By changing the gate voltage pulse, the channel current of the device synapse can be accurately controlled, and when an optical pulse is applied above the conductive channel, the instantaneous channel current caused thereby can be regarded as an excitatory postsynaptic current.

[0064] Figure 2 The excitatory postsynaptic current (EPSC) of the polymer electret organic field effect transistor simulation synapse under different light intensities is tested. That is, the device can change the excitatory postsynaptic current value according to the application of different light intensities.

[0065] Figure 3 The inhibitory postsynaptic current (IPSC) of the polymer electret organic field effect transistor simulation synapse under different write voltages is tested. As can be seen from the figure, under different write voltages, the polymer electret synapse transistor will immediately change from short-term synaptic plasticity to long-term synaptic plasticity when a negative pulse is applied at the presynaptic end. ​

[0066] Figure 4 Inhibitory postsynaptic current (IPSC) of polymer electret organic field effect transistor synapse test. From the figure, it can be seen that under different write times, the polymer electret synapse transistor will immediately change from short-term synaptic plasticity to long-term synaptic plasticity when a negative pulse is applied to the presynaptic end.

[0067] Figure 5 Excitatory postsynaptic current (EPSC) of polymer electret organic field effect transistor synapse test. The source-drain current was read by Keithley 2636B digital source meter, and the read voltage was selected as -5V. The front end of the Tektronix 2912A digital source meter was used to power the light source, and the back end was used to apply a 30V pulse to the gate of the transistor for 300ms. From the figure, it can be seen that the relaxation effect of the EPSC of the polymer electret synapse transistor with low molecular weight is stronger, which corresponds to the stronger storage ability of the low molecular weight polymer transistor memory for electrons.

[0068] Figure 6 Inhibitory postsynaptic current (IPSC) of polymer electret organic field effect transistor synapse test. The source-drain current was read by Keithley 2636B digital source meter, and the read voltage was selected as -5V. The back end of the Tektronix 2912A digital source meter was used to apply a -30V pulse to the gate of the transistor for 300ms. From the figure, it can be seen that under different write times, the polymer electret synapse transistor will immediately change from short-term synaptic plasticity to long-term synaptic plasticity when a negative pulse is applied to the presynaptic end.

[0069] Figure 7 Excitatory postsynaptic current (EPSC) of polymer electret organic field effect transistor synapse test. The source-drain current was read by Keithley 2636B digital source meter, and the read voltage was selected as -5V. The front end of the Tektronix 2912A digital source meter was used to power the light source, and the back end was used to apply a 30V pulse to the gate of the transistor for 300ms. From the figure, it can be seen that the relaxation effect of the EPSC of the polymer electret synapse transistor with low molecular weight is stronger, which corresponds to the stronger storage ability of the low molecular weight polymer transistor memory for electrons.

[0070] Figure 8 Inhibitory postsynaptic current (IPSC) of polymer electret organic field effect transistor synapse test. The source-drain current was read by Keithley 2636B digital source meter, and the read voltage was selected as -5V. The back end of the Tektronix 2912A digital source meter was used to apply a -30V pulse to the gate of the transistor for 300ms. From the figure, it can be seen that under different write times, the polymer electret synapse transistor will immediately change from short-term synaptic plasticity to long-term synaptic plasticity when a negative pulse is applied to the presynaptic end.

[0071] Figure 9The double pulse facilitation factor of the polymer electret organic field effect transistor synapse test is simulated. The source-drain current is read by the JISSO 2636B digital source meter, the reading voltage is selected as -5V, the pass is DE2912A digital source meter, two identical pulses are applied to the gate of the transistor, the interval of the two pulses is changed, the double pulse facilitation is measured, and then the ratio (A2 / A1) of the peak current is selected. As can be seen from the figure, the low molecular weight polymer electret synapse transistor excitation / inhibition effect is stronger.

[0072] The preparation method of the polymer electret organic field effect transistor memory adopts a simple solution spin coating method to prepare a smooth and flat polymer electret film as a charge capture layer applied in the organic field effect transistor memory. Since the roughness of the polymer electret films with two different molecular weights is very small, it is beneficial for the growth of the organic semiconductor layer pentacene on the same, realizes a faster operation speed, a higher storage density, excellent non-volatility and stable read-write-erase resistance, and the preparation process of the device is simple, the preparation cost is reduced, and it is a very promising method. At the same time, pentacene is a photosensitive semiconductor, by adjusting the light intensity to change the photoelectric current of the synapse transistor channel, and then simulating the excitatory postsynaptic current enhancement phenomenon of the biological synapse, combined with the reverse voltage pulse, the inhibitory effect of the inhibitory postsynaptic current can be realized.

[0073] The application simulates the biological synapse behavior of the polymer electret organic field effect transistor memory, studies the relationship between the transistor memory and the synapse, and the excitatory / inhibitory effect of the polymer synapse transistor with different molecular weights corresponds to the storage effect of the electron / hole of the transistor memory. The transistor memory with strong hole / electron capture ability is not suitable for simulating biological synapse. This provides a research basis for the research of synapse transistor for others.

Claims

1. A method for regulating a polymer electret organic field-effect transistor memory in biological synapse simulation, wherein the polymer electret organic field-effect transistor memory comprises, from top to bottom, source and drain electrodes, an organic semiconductor layer, a polymer electret, a gate insulating layer, and a gate electrode; characterized in that, The polymer electret material is a high solubility and strong hydrophobicity polymer with different molecular weights, and the regulation method is to perform synaptic simulation by using at least two different transistors memories prepared by using the polymer electret material with different molecular weights. The molecular weights of the different molecular weight polymers differ by at least two orders of magnitude. The high solubility and strong hydrophobicity polymer with different molecular weights is poly(9-vinylcarbazole).

2. The method of claim 1, wherein the polymer electret organic field effect transistor memory is used in the regulation of biological synapse simulation. The film thickness of the polymer electret is 30-50 nm.

3. The method of regulating in biological synapse simulation of the polymeric electret organic field effect transistor memory according to claim 1, characterized in that, The material of the gate insulating layer is silicon dioxide, aluminum oxide or hafnium oxide, and the thickness is 50-300 nm.

4. The method of regulating in biological synapse simulation of the polymeric electret organic field effect transistor memory according to claim 1, characterized in that, The material of the source-drain electrode is selected from one of Cu, Au or Pt, and the thickness is 60-100 nm.

5. The method of regulating in biological synapse simulation of the polymeric electret organic field effect transistor memory according to claim 1, characterized in that, The length of the conductive channel between the source-drain electrodes is 50-200 μm, and the width of the conductive channel between the source-drain electrodes is 1000-2000 μm.

6. The method of claim 1, wherein the polymer electret organic field effect transistor memory is used in the regulation of biological synapse simulation. The material of the gate electrode is selected from one of highly doped silicon, Al, Cu, Au, Ag or Pt.

7. The method of claim 1, wherein the polymer electret organic field effect transistor memory is used in the regulation of biological synapse simulation. The material of the organic semiconductor layer is one or more of pentacene, bisnaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene or 2,7-dioctyl[1]benzothieno[3,2-b]benzothiophene, and the thickness is 30-50 nm.

8. The method of claim 1, wherein the polymer electret organic field effect transistor memory is used in the regulation of biological synapse simulation. The preparation method of the polymer electret organic field effect transistor memory includes the following steps: (1) Prepare a hydrophobic polymer solution dissolved in an organic solvent with a concentration of 5-10 mg / mL, and add a magnetic sub to heat and stir; (2) Select a heavily doped silicon wafer with an oxide layer on the surface as the gate electrode and the gate insulating layer, and the film thickness of the gate insulating layer is 50-300 nm; (3) Ultrasonically clean the surface of the silicon wafer in step (2) using acetone, ethanol and deionized water, respectively, for 5-10 min, and dry after cleaning; (4) Ultraviolet ozone treat the dried clean silicon wafer for 5-10 min; (5) Spin coat the polymer solution prepared in step (1) on the clean silicon wafer in step (4) to a thickness of 20-50 nm, and place the spin-coated sample in a vacuum drying oven for annealing treatment; (6) Vacuum evaporate an organic semiconductor layer and a source-drain electrode on the annealed sample in step (5).

9. The method of claim 8, wherein the polymer electret organic field effect transistor memory is used in the regulation of biological synapse simulation. The annealing temperature is 80 ℃.

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