Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a forming method thereof, the method comprising: providing a substrate, the substrate having a plurality of mutually separated first fin structures thereon, the first fin structures comprising a first fin, and the first fin being different in material from the substrate; forming a first barrier film on a sidewall surface of the first fin; after forming the first barrier film, forming a layer of isolation structure material on the substrate, the layer of isolation structure material covering the first fin structures. By the first barrier film, the oxidation resistance of the first fin is improved, and thus the performance of the semiconductor structure is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and particularly relates to a semiconductor structure and a forming method thereof. BACKGROUND

[0002] With the development of integrated circuits to ultra large scale integrated circuits, the circuit density inside the integrated circuits is getting larger and larger, the number of components contained is also getting larger and larger, and the size of the components is also getting smaller and smaller. With the reduction of the size of the semiconductor structure, the channel of the device in the semiconductor structure is shortened. Due to the shortening of the channel, the gradual channel approximation no longer holds, and various adverse physical effects (especially short channel effects) are highlighted, which causes the degradation of the device performance and reliability, and limits the further reduction of the device size.

[0003] In order to overcome the short channel effect of the device and suppress the leakage current, a fin field effect transistor (FinFET) is proposed, which is a common multi-gate device. The structure of the fin field effect transistor includes a fin portion located on the surface of a semiconductor substrate and an isolation layer covering part of the sidewall of the fin portion, and the surface of the isolation layer is lower than the top of the fin portion; a gate structure located on the surface of the isolation layer and the top and sidewall surface of the fin portion; a source region and a drain region in the fin portion on both sides of the gate structure.

[0004] However, the performance of the existing semiconductor structure still needs to be improved. SUMMARY

[0005] The technical problem solved by the present application is to provide a semiconductor structure and a forming method thereof to improve the performance of the semiconductor structure.

[0006] To solve the above technical problem, the technical scheme of the present application provides a forming method of a semiconductor structure, which comprises: providing a substrate, the substrate having a plurality of mutually discrete first fin portion structures, the first fin portion structure comprising a first fin, and the material of the first fin being different from that of the substrate; forming a first blocking film on the sidewall surface of the first fin; after forming the first blocking film, forming an isolation structure material layer on the substrate, the isolation structure material layer covering the first fin portion structure.

[0007] Optionally, the method for forming the first blocking film comprises: forming a first blocking material film on the surface of the substrate and the first fin portion structure; performing a modification treatment on the first blocking material film of the sidewall surface of the first fin, so that the material of the first fin reacts with the material of the first blocking material film to form the first blocking film on the sidewall surface of the first fin; after forming the first blocking film, removing the first blocking material film on the surface of the first fin portion structure and the surface of the substrate.

[0008] Optionally, the material of the first fin comprises silicon germanium or germanium, the material of the first blocking material film comprises silicon germanium oxide, the process of the modification treatment comprises an annealing process, and the process parameters of the annealing process comprise a temperature range of 700-1000℃.

[0009] Optionally, the process parameters of the annealing process further comprise a time range of 5-30 seconds.

[0010] Optionally, the process of forming the first blocking material film comprises an atomic layer deposition process, a furnace tube deposition process or a thermal oxidation process.

[0011] Optionally, while the first blocking film is formed on the sidewall surface of the first fin, a transition film is also formed on the surface of the first blocking film by the reaction between the material of the first fin and the material of the first blocking material film.

[0012] Optionally, the process of removing the first blocking material film on the surface of the first fin structure and the surface of the substrate comprises a dry etching process or a wet etching process, the etching gas used in the dry etching process comprises NF3 and at least one of NH3 or H2, and the etching solution used in the wet etching process comprises HCl.

[0013] Optionally, the material of the transition film comprises silicon oxide.

[0014] Optionally, the isolation structure material layer comprises an initial isolation film on the surface of the substrate and the first fin structure, and an isolation medium material layer on the initial isolation film.

[0015] Optionally, the material of the initial isolation film is the same as the material of the transition film.

[0016] Optionally, the material of the initial isolation film comprises silicon oxide, silicon carbon oxide or aluminum oxide.

[0017] Optionally, the material of the first blocking film comprises silicon.

[0018] Optionally, the thickness of the first blocking film ranges from 0.5 nm to 3 nm.

[0019] Optionally, the first fin structure further comprises a second fin between the first fin and the substrate.

[0020] Optionally, the substrate comprises a first region and a second region, a plurality of the first fin structures are located on the first region, and the second region further comprises a plurality of mutually separated second fin structures, the material of the second fin structures being different from the material of the first fin.

[0021] Optionally, the method further comprises: forming the isolation structure material layer on surfaces of the first fin structures and the substrate at the same time, and forming the isolation structure material layer on surfaces of the second fin structures.

[0022] Optionally, the material of the second fin structure comprises silicon.

[0023] Optionally, the method further comprises: planarizing the isolation structure material layer until the top surface of the first fin is exposed; after planarizing the isolation structure material layer, etching back the isolation structure material layer until the bottom surface of the first fin is flush, to form an isolation structure, the isolation structure comprising an isolation film on the substrate and part of the sidewall surface of the first fin structure, and an isolation medium layer on the isolation film.

[0024] Optionally, the method further comprises: before forming the first barrier film, forming a plurality of mutually separate fin mask structures on the top surface of the first fin structure; and during planarizing the isolation structure material layer, planarizing the fin mask structures until the fin mask structures are removed.

[0025] Correspondingly, the technical scheme of the present application further provides a semiconductor structure, comprising: a substrate, the substrate having a plurality of mutually separate first fin structures thereon, the first fin structure comprising a first fin, and the material of the first fin being different from that of the substrate; a first barrier film on the sidewall surface of the first fin; and an isolation structure on the substrate, the isolation structure covering part of the sidewall surface of the first fin structure, and the top surface of the isolation structure being flush with the bottom surface of the first fin.

[0026] Optionally, the substrate comprises a first region and a second region, and the plurality of first fin structures are located on the first region; the semiconductor structure further comprises: a plurality of mutually separate second fin structures on the second region, the material of the second fin structure being different from that of the first fin.

[0027] Optionally, the material of the second fin structure comprises silicon.

[0028] Optionally, the material of the first fin comprises silicon germanium or germanium.

[0029] Optionally, the first fin structure further comprises a second fin between the first fin and the substrate.

[0030] Optionally, the material of the first barrier film comprises silicon.

[0031] Optionally, the isolation structure comprises an isolation film on the substrate and part of the sidewall surface of the first fin structure, and an isolation medium layer on the isolation film.

[0032] Optionally, the material of the isolation film includes silicon oxide, silicon oxide carbon or aluminum oxide.

[0033] Compared with the prior art, the technical scheme of the present application has the following beneficial effects:

[0034] In the method for forming a semiconductor structure, the material of the first fin is different from that of the substrate, and the material of the first fin is more easily oxidized than the material of the substrate. Since the first blocking film is formed on the sidewall surface of the first fin before the isolation structure material layer is formed, the ability to block the oxidation of the first fin is improved during the formation of the isolation structure material layer by adding the first blocking film on the sidewall surface of the first fin, thereby reducing the influence on the electrical performance of the semiconductor device and improving the performance of the semiconductor structure.

[0035] Further, since the material of the first fin includes silicon germanium or germanium, the material of the first blocking material film includes silicon germanium oxide, the modification process includes an annealing process, and the process parameters of the annealing process include a temperature range of 700-1000℃, the modification process of the first blocking material film on the sidewall surface of the first fin is realized, the material of the first fin reacts with the material of the first blocking film to form the first blocking film on the sidewall surface of the first fin. Specifically, in an environment with a temperature range of 700-1000℃, germanium or silicon germanium (the material of the first fin) can react with silicon germanium oxide (the material of the first blocking material film) to form a silicon film, i.e. the first blocking film, on the sidewall surface of the first fin, thereby forming the first blocking film only on the first fin sidewall surface that is easily oxidized. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figures 1-2 is a structure diagram of each step in a method for forming a semiconductor structure.

[0037] Figures 3-10 is a cross-sectional structure diagram of each step in a method for forming a semiconductor structure according to an embodiment of the present application. DETAILED DESCRIPTION

[0038] As described in the background, the performance of the existing semiconductor structure is poor. Now, specific embodiments will be described, Figures 1-2 is a structure diagram of each step in a method for forming a semiconductor structure.

[0039] It should be noted that the "surface" in the present specification is used to describe the relative position relationship in space and does not limit whether it is in direct contact or not.

[0040] Please refer to Figure 1, a substrate 100 is provided, and a plurality of mutually separated fin structures 110 are formed on the substrate 100, wherein each of the fin structures 110 comprises an effective fin 111 and an ineffective fin 112 between the effective fin 111 and the substrate 100.

[0041] The material of the effective fin 111 is silicon germanium.

[0042] The material of the substrate 100 and the ineffective fin 112 is silicon.

[0043] Please continue to refer to Figure 1 A barrier film 120 is formed on the surface of the fin structure 110 and the surface of the substrate 100, and the material of the barrier film 120 is silicon oxide. On the one hand, the barrier film 120 can improve the structural strength of the fin structure 110 before the isolation medium layer is formed, and on the other hand, the barrier film 120 is also used to reduce the oxidation of the substrate 100 and the fin structure 110 in the process of forming the isolation medium layer.

[0044] Please continue to refer to Figure 1 An isolation medium material layer 130 is formed on the surface of the barrier film 120 by using a fluid chemical vapor deposition process (FCVD) and an annealing process, and the material of the isolation medium material layer 130 is silicon oxide.

[0045] Please refer to Figure 2 The isolation medium material layer 130 and the barrier film 120 are planarized until the top surface of the fin structure 110 is exposed. After the isolation medium material layer 130 and the barrier film 120 are planarized, the isolation medium material layer 130 and the barrier film 120 are etched back until the top surface of the isolation medium material layer 130 and the barrier film 120 is flush with the bottom surface of the effective fin 111, thereby forming an isolation medium layer 131.

[0046] In the above embodiment, in order to increase the current in the channel, the material of the effective fin 111 is silicon germanium which can produce more stress compared with silicon (the material of the substrate 100 and the ineffective fin 112). However, compared with the material of the substrate 100 and the ineffective fin 112, the material of the effective fin 111 is more easily oxidized. Therefore, although the barrier film 120 can effectively prevent the oxidation of the substrate 100 and the ineffective fin 112 in the process of forming the isolation medium layer, the barrier film 120 has poor effect on preventing the oxidation of the effective fin 111, thereby causing the effective fin 111 to be oxidized, which affects the electrical performance of the semiconductor device and the performance of the semiconductor structure is poor.

[0047] To solve the technical problem, the embodiment of the present application provides a semiconductor structure and a forming method thereof.

[0048] In order to make the above object, characteristics and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application are described in detail below with reference to the drawings.

[0049] Figures 3-10 is a schematic diagram of the cross-sectional structure of each step of the forming method of the semiconductor structure of an embodiment of the present application.

[0050] Please refer to Figure 3 , a substrate 200 is provided.

[0051] The material of the substrate 200 includes a semiconductor material.

[0052] In the embodiment, the material of the substrate 200 is silicon.

[0053] In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI) or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs or InGaAsP, etc.

[0054] In the embodiment, the substrate 200 has a plurality of mutually discrete first fin structures 210, the first fin structure 210 includes a first fin 211, and the material of the first fin 211 is different from that of the substrate 200.

[0055] Specifically, in the embodiment, the material of the first fin 211 includes silicon germanium.

[0056] It should be noted that, compared with the material of the first fin 211, the material of the substrate 200 has better oxidation resistance in the subsequent process of forming an isolation structure material layer. That is, compared with the material of the substrate 200, the material of the first fin 211 is more easily oxidized.

[0057] It should be noted that the percentage concentration of germanium between different materials of the same first fin 211 can be the same or different according to the design requirements of the semiconductor device, that is, the material of the same first fin 211 can have one or more percentage concentrations of germanium.

[0058] In other embodiments, the material of the first fin includes germanium.

[0059] In the embodiment, the first fin structure 210 further comprises a second fin 212 between the first fin 211 and the substrate 200.

[0060] In the embodiment, the substrate 200 comprises a first region I and a second region II, a plurality of the first fin structures 210 are located on the first region I, and the second region II further comprises a plurality of mutually separated second fin structures 220, the material of the second fin structures 220 is different from the material of the first fin 211.

[0061] In the embodiment, the material of the second fin structure 220 comprises silicon.

[0062] Specifically, the first fin 211 is used to form a P-type transistor, and the second fin structure 220 is used to form an N-type transistor. Thus, using silicon germanium as the material is beneficial to generate more stress and increase the current in the channel to improve the performance of the P-type transistor.

[0063] In other embodiments, the substrate does not comprise a second region, and the substrate does not have the second fin structure.

[0064] In the embodiment, the method for forming the substrate 200, the first fin structure 210 and the second fin structure 220 comprises the following steps: providing an initial substrate (not shown); forming a first mask layer (not shown) on the initial substrate, the first mask layer covers the second region II and exposes the first region I; etching the initial substrate to form a first opening (not shown) in the initial substrate of the first region I, using the first mask layer as a mask; removing the first mask layer after forming the first opening; forming a first fin material layer (not shown) in the first opening after removing the first mask layer; forming a plurality of mutually separated fin mask structures 230 on the surface of the first fin material layer on the first region I and on the surface of the initial substrate on the second region II; etching the first fin material layer and the initial substrate until the substrate 200, the first fin structure 210 and the second fin structure 220 are formed, using the fin mask structure 230 as a mask.

[0065] In the embodiment, the fin mask structure 230 not only serves as a mask in forming the first fin structure 210 and the second fin structure 220. On the one hand, the fin mask structure 230 can protect the top surface of the first fin 211 in forming the isolation structure material layer, increase the oxidation resistance of the top surface of the first fin 211, and reduce the oxidation of the top surface of the first fin 211 in the process of forming the isolation structure material layer, thereby improving the performance of the semiconductor structure. On the other hand, the fin mask structure 230 can also protect the top surface of the first fin 211 and the top surface of the second fin structure 220 in the process of removing the first barrier material film or in the process of planarizing the isolation structure material layer, thereby reducing the damage to the top surface of the first fin 211 and the top surface of the second fin structure 220 in the planarization process, and improving the performance of the semiconductor structure.

[0066] Meanwhile, the fin mask structure 230 also separates the first barrier material film formed subsequently from the top surface of the first fin 211. Therefore, in the modification process of forming the first barrier film, the first barrier material film 240 on the top surface of the first fin 211 can be prevented from reacting with the material of the first fin 211, so that the first barrier film is formed on the side surface of the first fin 211 while the first barrier film is not formed on the top surface of the first fin 211. Since the first barrier film is not formed on the top surface of the first fin 211, the etching or grinding step of removing the first barrier film on the top surface of the first fin 211 is reduced, thereby reducing the damage to the top surface of the first fin 211 and improving the performance of the semiconductor structure.

[0067] In the embodiment, the material of the fin mask structure 230 includes silicon nitride.

[0068] The method of forming the first fin material layer includes: forming an initial first fin material layer in the first opening and on the surface of the initial substrate by using an epitaxial growth process, the surface of the initial first fin material layer being higher than the surface of the initial substrate; and planarizing the initial first fin material layer until the surface of the initial substrate is exposed, to form the first fin material layer.

[0069] Then, the first barrier film is formed on the side surface of the first fin 211. The detailed process of forming the first barrier film can refer to Figures 4-6 .

[0070] Please refer to Figure 4 , the first barrier material film 240 is formed on the surface of the substrate 200 and the first fin structure 210.

[0071] Specifically, in the embodiment, the first barrier material film 240 is formed on the surface of the substrate 200, the side surface of the first fin structure 210, the side surface of the second fin structure 220, and the surface of the fin mask structure 230.

[0072] In this embodiment, the process of forming the first barrier material film 240 includes an atomic layer deposition process, a furnace tube deposition process, or a thermal oxidation process.

[0073] In this embodiment, the material of the first barrier material film 240 includes silicon germanium oxide.

[0074] Please refer to Figure 5 The first barrier material film 240 on the sidewall surface of the first fin 211 is modified to react with the material of the first fin 211, so as to form a first barrier film 241 on the sidewall surface of the first fin 211.

[0075] Since the first barrier film 241 is formed on the sidewall surface of the first fin 211 before the subsequent formation of the isolation structure material layer, by adding the first barrier film 241 on the sidewall surface of the first fin, the ability to block the oxidation of the first fin 211 can be improved during the formation of the isolation structure material layer, thereby reducing the impact on the electrical performance of the semiconductor device and improving the performance of the semiconductor structure.

[0076] Furthermore, since the first barrier film 241 is only formed on the sidewall surface of the first fin 211, the subsequent process of forming the initial isolation film and the isolation film on the surface of the second fin structure 220 has less relevance to the process of forming the first barrier film 241, so that the material of the initial isolation film and the isolation film on the surface of the second fin structure 220 is less restricted, and further, the material of the initial isolation film and the isolation film formed on the surface of the second fin structure 220 can be better adapted to the N-type transistor while increasing the oxidation resistance of the first fin 211 by the first barrier film 241.

[0077] In this embodiment, the material of the first barrier film 241 includes silicon. The material of the first barrier film 241 is the same as the material of the substrate 200 and the second fin structure 210, that is, compared with the material of the first fin 211, the first barrier film 241 has better oxidation resistance in the subsequent process of forming the isolation structure material layer.

[0078] In this embodiment, the thickness of the first barrier film 241 in the direction perpendicular to the sidewall surface of the first fin 211 ranges from 0.5 nanometers to 3 nanometers.

[0079] The thickness of the first barrier film 241 is too small, and the anti-oxidation capability during the subsequent formation of the isolation structure material layer is reduced, and the first fin 211 is still prone to be oxidized, which is not conducive to improving the performance of the semiconductor structure. The thickness of the first barrier film 241 is too large, and the maximum aspect ratio between adjacent first fins 211 is excessively increased, which causes the material of the subsequent isolation structure material layer to be prone to form defects such as cavities, resulting in an increase in defects in the isolation structure material layer, which is also not conducive to improving the performance of the semiconductor structure. Therefore, when the thickness of the first barrier film 241 is in the range of 0.5 nm to 3 nm, on the one hand, the anti-oxidation capability during the subsequent formation of the isolation structure material layer is ensured, and on the other hand, the formation of the material of the isolation structure material layer is facilitated, thereby improving the performance of the semiconductor structure.

[0080] In this embodiment, the modification process includes an annealing process, and the process parameters of the annealing process include a temperature range of 700-1000°C.

[0081] Since the material of the first fin 211 includes silicon germanium, the material of the first barrier material film includes silicon germanium oxide, the modification process includes an annealing process, and the process parameters of the annealing process include a temperature range of 700-1000°C, the modification process of the first barrier material film 240 on the sidewall surface of the first fin 211 can be realized, the material of the first fin 211 reacts with the material of the first barrier material film 240, and the first barrier film 241 is formed on the sidewall surface of the first fin 211.

[0082] Specifically, in an environment with a temperature range of 700-1000°C, silicon germanium (the material of the first fin 211) can react with silicon germanium oxide (the material of the first barrier material film 240) to form a silicon film, i.e., the first barrier film 241, on the sidewall surface of the first fin 211. At the same time, in an environment with a temperature range of 700-1000°C, silicon germanium oxide does not react with the material of the substrate 200, the material of the second fin 212, or the material of the second fin structure 220, so that the first barrier film 241 can be formed only on the sidewall surface of the first fin 211 which is prone to be oxidized.

[0083] Similarly, in other embodiments, when the material of the first fin includes germanium, the material of the first fin can also react with silicon germanium oxide, which will not be described here.

[0084] In this embodiment, the process parameters of the annealing process also include a time of 5-30 seconds.

[0085] By controlling the length of time of the annealing process, the thickness of the formed first barrier film 241 is controlled, so that the thickness of the first barrier film 241 can be within a predetermined range.

[0086] In this embodiment, the process parameters of the annealing process further include that the gas used includes nitrogen.

[0087] In this embodiment, while the first blocking film 241 is formed on the sidewall surface of the first fin 211, a transition film 242 is also formed on the surface of the first blocking film 241 by the reaction between the material of the first fin 211 and the material of the first blocking material film 240.

[0088] Through the transition film 242, the oxidation of the first blocking film 241 can be reduced in the subsequent process of forming the isolation structure material layer, that is, the risk of oxidation of the first fin 211 is reduced more, the first fin 211 is better protected, and the oxidation of the first fin 211 is reduced, thereby improving the performance of the semiconductor structure. Specifically, on the one hand, in the subsequent process of forming the initial isolation film, the oxidation of the first blocking film 241 can be reduced through the transition film 242; on the other hand, in the subsequent process of forming the isolation medium material layer, on the basis of reducing the oxidation of the first blocking film 241 through the initial isolation film, the protection of the first blocking film 241 is enhanced through the transition film 242, and the degree and risk of oxidation of the first blocking film 241 are further reduced.

[0089] Moreover, since the first fin 211 can be protected by the first blocking film 241 and the transition film 242 in the subsequent process of removing the first blocking material film 240, the impact of the etching process of removing the first blocking material film 240 on the first fin 211 is also reduced, thereby reducing the risk of stack fault of the first fin 211, and improving the performance and reliability of the semiconductor structure.

[0090] In this embodiment, the material of the transition film 242 includes silicon oxide.

[0091] The material of the transition film 242 includes silicon oxide, so that the first blocking film 241 and the transition film 242 constitute a structure of silicon and silicon oxide on the surface of silicon, which has high consistency with existing semiconductor structures, so that the subsequent semiconductor structure formation process can be less different from the existing process, and the compatibility between the semiconductor structure formation process and the existing process is improved.

[0092] Specifically, in this embodiment, by using an annealing process with a temperature range of 700-1000°C, the material of the first fin 211 reacts with the material of the first blocking material film 240, and the reaction formula is: SiGe + SiGeO x→ Si (first barrier film 241) + SiO2 (transition film 242) + 2GeO. Here, GeO has a volatile property, and thus is removed directly by the volatile property during the reaction.

[0093] Please refer to Figure 6 After the first barrier film 241 is formed, the first barrier material film 240 on the surface of the first fin structure 210 and the surface of the substrate 200 is removed.

[0094] The process of removing the first barrier material film 240 on the surface of the first fin structure 210 and the surface of the substrate 200 includes a dry etching process or a wet etching process.

[0095] Specifically, the etching gas used in the dry etching process includes NF3, and at least one of NH3 or H2.

[0096] The etching solution used in the wet etching process includes HCl.

[0097] In this embodiment, the first barrier material film 240 on the surface of the second fin structure 220 is also removed at the same time when the first barrier material film 240 on the surface of the first fin structure 210 and the surface of the substrate 200 is removed.

[0098] Then, after the first barrier film 241 is formed, an isolation structure material layer is formed on the substrate 200, which covers the first fin structure 210.

[0099] In this embodiment, the isolation structure material layer is formed on the surface of the first fin structure 210 and the substrate 200 at the same time, and is also formed on the surface of the second fin structure 220.

[0100] In this embodiment, the isolation structure material layer includes an initial isolation film on the surface of the substrate 200 and the first fin structure 210, and an isolation medium material layer on the initial isolation film. The process of forming the isolation structure material layer will be described in detail with reference to Figures 7-8 .

[0101] Please refer to Figure 7 After the first barrier film 241 is formed, an initial isolation film 251 is formed on the surface of the substrate 200 and the surface of the first fin structure 210 in the first region I.

[0102] In this embodiment, the initial isolation film 251 is formed on the surface of the substrate 200 and the surface of the first fin structure 210 in the first region I at the same time, and is also formed on the surface of the substrate 200 and the surface of the second fin structure 220 in the second region II.

[0103] In one aspect, by the initial isolation film 251, the protection of the substrate 200, the first fin structure 210, and the second fin structure 220 can be enhanced in the process of forming the isolation dielectric material layer, and the oxidation of the substrate 200, the first fin structure 210, and the second fin structure 220 can be reduced, thereby improving the performance of the semiconductor structure.

[0104] In the embodiment, the process of forming the initial isolation film 251 includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0105] In other embodiments, the process of forming the initial isolation film 251 further includes an oxidation process, etc.

[0106] The initial isolation film 251 provides material for the subsequent formation of the isolation film.

[0107] In the embodiment, the material of the initial isolation film 251 is the same as the material of the transition film 242, i.e., the material of the initial isolation film 251 includes silicon oxide. Correspondingly, in the embodiment, the material of the isolation film is the same as the material of the transition film 242, i.e., the material of the isolation film includes silicon oxide.

[0108] On the one hand, since the material of the initial isolation film 251 is the same as the material of the transition film 242, the transition film 242 can be etched at the same time as the initial isolation film 251 is etched, which reduces the process difficulty of removing the transition film 242 and improves the efficiency of removing the transition film 242. On the other hand, silicon oxide is beneficial to increase tensile stress. Since the material of the initial isolation film 251 includes silicon oxide, i.e., the material of the isolation film includes silicon oxide, the current in the channel of the second fin structure 220 (N-type transistor) is increased by the isolation film, thereby improving the performance of the semiconductor structure.

[0109] In other embodiments, the material of the initial isolation film includes silicon oxycarbide or aluminum oxide. Correspondingly, in other embodiments, the material of the isolation film includes silicon oxycarbide or aluminum oxide.

[0110] Please refer to Figure 8 The isolation dielectric material layer 252 is formed on the initial isolation film 251 to form the isolation structure material layer 250 on the substrate 200, and the isolation structure material layer 250 covers the first fin structure 210.

[0111] The isolation dielectric material layer 252 provides material for the subsequent formation of the isolation dielectric layer.

[0112] In the embodiment, the method for forming the isolation medium material layer 252 includes: forming an initial isolation medium material layer (not shown) on the initial isolation film 251 by using a flowable chemical vapor deposition process (FCVD); and performing an annealing process on the initial isolation medium material layer after forming the initial isolation medium material layer, so as to solidify the initial isolation medium material layer and form the isolation medium material layer 252.

[0113] Since the initial isolation medium material layer is formed by using the flowable chemical vapor deposition process, on one hand, the flowability of the initial isolation medium material layer is good, so that the surface flatness of the isolation medium material layer 252 is increased, which is beneficial to improve the surface flatness of the isolation medium layer formed subsequently, and thus, when the interconnection structure or other semiconductor structure is formed on the isolation medium layer, the process window of the forming process is increased and the difficulty of the forming process is reduced. On the other hand, the filling property of the initial isolation medium material layer is good, so that the quality of the isolation medium layer formed is good and the defects are few, thereby improving the performance and reliability of the semiconductor structure.

[0114] In the embodiment, the material of the isolation medium material layer 252 includes an oxide. Correspondingly, the material of the isolation medium layer includes an oxide.

[0115] In other embodiments, the process for forming the isolation medium material layer includes a spin coating process, a chemical vapor deposition process, a physical vapor deposition process or an atomic layer deposition process.

[0116] For details, please refer to Figure 9 After forming the isolation medium material layer 252, the isolation structure material layer 250 is planarized until the top surface of the first fin 211 is exposed.

[0117] In the embodiment, the process for planarizing the isolation structure material layer 250 includes a chemical mechanical polishing process.

[0118] In other embodiments, the process for planarizing the isolation structure material layer includes a dry etching process or a wet etching process.

[0119] In the embodiment, in the process of planarizing the isolation structure material layer 250, the fin mask structure 230 is also planarized until the fin mask structure 230 is removed.

[0120] In another embodiment, the method for forming the semiconductor structure includes: removing the fin mask structure before forming the first barrier material film; in the process of the modification treatment, the material of the first barrier film is also formed on the top surface of the first fin; and in the process of planarizing the isolation structure material layer, the material of the first barrier film on the top surface of the first fin is also planarized until the material of the first barrier film on the top surface of the first fin is removed.

[0121] Reference is made to Figure 10 After planarizing the isolation structure material layer 250, the isolation structure material layer 250 is etched back until the bottom surface of the first fin 211 is flush, to form an isolation structure 260, which includes an isolation film 261 on the substrate 200 and part of the sidewall surface of the first fin structure 210, and an isolation medium layer 262 on the isolation film 261.

[0122] Specifically, in the embodiment, the isolation structure 260 includes the isolation film 261 on the substrate 200 and the sidewall surface of the second fin 212, and the isolation medium layer 262 on the isolation film 261.

[0123] In the embodiment, the isolation structure 260 is also on part of the sidewall surface of the second fin structure 220.

[0124] In the embodiment, the process of etching back the isolation structure material layer 250 includes a dry etching process or a wet etching process.

[0125] Correspondingly, an embodiment of the present application further provides a semiconductor structure formed by the forming method, please continue to refer to Figure 10 , which includes a substrate 200, the substrate 200 having a plurality of mutually discrete first fin structures 210, the first fin structure 210 including a first fin 211, and the material of the first fin 211 being different from that of the substrate 200; a first barrier film 241 on the sidewall surface of the first fin 211; an isolation structure 260 on the substrate 200, the isolation structure 260 covering part of the sidewall surface of the first fin structure 210, and the top surface of the isolation structure 260 being flush with the bottom surface of the first fin 211.

[0126] The material of the substrate 200 includes a semiconductor material.

[0127] In the embodiment, the material of the substrate 200 is silicon.

[0128] In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.

[0129] In the embodiment, the material of the first fin 211 includes silicon germanium.

[0130] It should be noted that the percentage concentration of germanium between different materials of the same first fin 211 can be the same or different according to the requirements of semiconductor device design, that is, the first fin 211 can have one or more percentage concentrations of germanium.

[0131] In other embodiments, the material of the first fin includes germanium.

[0132] In the present embodiment, the first fin structure 210 further includes a second fin 212 located between the first fin 211 and the substrate 100.

[0133] In the present embodiment, the substrate 200 includes a first region I and a second region II, and a plurality of first fin structures 210 are located on the first region I, and the second region II further has a plurality of mutually separated second fin structures 220, the material of the second fin structure 220 is different from that of the first fin 211.

[0134] In the present embodiment, the material of the second fin structure 220 includes silicon.

[0135] Specifically, the first fin 211 is used to form a P-type transistor, and the second fin structure 220 is used to form an N-type transistor. Therefore, using silicon germanium as the material is beneficial to generate more stress and increase the current in the channel to improve the performance of the P-type transistor.

[0136] In other embodiments, the substrate does not include a second region, and the second fin structure is not located on the substrate.

[0137] In the present embodiment, the material of the first barrier film 241 includes silicon.

[0138] In the present embodiment, the thickness of the first barrier film 241 in the direction perpendicular to the sidewall surface of the first fin 211 ranges from 0.5 nanometers to 3 nanometers.

[0139] In the present embodiment, the isolation structure 260 includes an isolation film 261 located on the sidewall surface of the substrate 200 and part of the first fin structure 210, and an isolation medium layer 262 located on the isolation film 261.

[0140] Specifically, in the present embodiment, the isolation structure 260 includes an isolation film 261 located on the sidewall surface of the substrate 200 and the second fin 212, and an isolation medium layer 262 located on the isolation film 261.

[0141] In the present embodiment, the isolation structure 260 is also located on part of the sidewall surface of the second fin structure 220.

[0142] In this embodiment, the material of the isolation film 261 includes silicon oxide.

[0143] In other embodiments, the material of the isolation film includes silicon oxide or aluminum oxide.

[0144] In this embodiment, the material of the isolation medium layer 262 includes oxide.

[0145] Although the present application has been disclosed with reference to the above embodiments, the present application is not limited to the above embodiments. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various changes and modifications, and the scope of protection of the present application should be limited by the scope defined in the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided having a plurality of mutually discrete first fin structures, each first fin structure including a first fin, and the first fin being made of a different material from the substrate; A first barrier membrane is formed on the sidewall surface of the first fin; After the first barrier film is formed, an isolation structure material layer is formed on the substrate, the isolation structure material layer covering the first fin structure; The material of the first barrier film is silicon; The method for forming the first barrier film includes: forming a first barrier material film on the substrate and the surface of the first fin structure; modifying the first barrier material film on the sidewall of the first fin to react the material of the first fin with the material of the first barrier material film to form the first barrier film on the sidewall of the first fin; and removing the first barrier material film from the surface of the first fin structure and the surface of the substrate after forming the first barrier film.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, The material of the first fin includes silicon germanium or germanium, the material of the first barrier material film includes silicon germanium oxide, the modification process includes an annealing process, and the process parameters of the annealing process include a temperature range of 700°C to 1000°C.

3. The method for forming a semiconductor structure as described in claim 2, characterized in that, The annealing process parameters also include a time of 5 to 30 seconds.

4. The method for forming a semiconductor structure as described in claim 2, characterized in that, The process for forming the first barrier material film includes atomic layer deposition, furnace tube deposition, or thermal oxidation.

5. The method for forming a semiconductor structure as described in claim 2, characterized in that, While the first barrier film is formed on the sidewall of the first fin, a transition film is also formed on the surface of the first barrier film through the reaction between the material of the first fin and the material of the first barrier film.

6. The method for forming a semiconductor structure as described in claim 5, characterized in that, The process for removing the first barrier material film from the surface of the first fin structure and the surface of the substrate includes a dry etching process or a wet etching process. The etching gas used in the dry etching process includes at least one of NF3 and NH3 or H2, and the etching solution used in the wet etching process includes HCl.

7. The method for forming a semiconductor structure as described in claim 5, characterized in that, The material of the transition membrane includes silicon oxide.

8. The method for forming a semiconductor structure as described in claim 5, characterized in that, The isolation structure material layer includes an initial isolation film located on the substrate and the surface of the first fin structure, and an isolation dielectric material layer located on the initial isolation film.

9. The method for forming a semiconductor structure as described in claim 8, characterized in that, The material of the initial isolation membrane is the same as that of the transition membrane.

10. The method for forming a semiconductor structure as described in claim 8, characterized in that, The material of the initial isolation membrane includes silicon oxide, silicon carbide, or aluminum oxide.

11. The method for forming a semiconductor structure as described in claim 1, characterized in that, The thickness of the first barrier film ranges from 0.5 nanometers to 3 nanometers.

12. The method for forming a semiconductor structure as described in claim 1, characterized in that, The first fin structure further includes a second fin located between the first fin and the substrate.

13. The method for forming a semiconductor structure as described in claim 1, characterized in that, The substrate includes a first region and a second region, a plurality of first fin structures are located on the first region, and the second region also has a plurality of mutually independent second fin structures, the material of the second fin structures being different from the material of the first fins.

14. The method for forming a semiconductor structure as described in claim 13, characterized in that, Also includes: While forming an isolation structure material layer on the surface of the first fin structure and the substrate, the isolation structure material layer is also formed on the surface of several second fin structures.

15. The method for forming a semiconductor structure as described in claim 13, characterized in that, The material of the second fin structure includes silicon.

16. The method for forming a semiconductor structure as described in claim 1, characterized in that, Also includes: Planarize the isolation structure material layer until the top surface of the first fin is exposed; After planarizing the isolation structure material layer, the isolation structure material layer is etched back until it is flush with the bottom surface of the first fin to form an isolation structure. The isolation structure includes an isolation film located on the substrate and part of the sidewall of the first fin structure, and an isolation dielectric layer located on the isolation film.

17. The method for forming a semiconductor structure as described in claim 16, characterized in that, Also includes: Before forming the first barrier membrane, a plurality of mutually independent fin mask structures are formed, the fin mask structures being located on the top surface of the first fin structure; During the planarization of the isolation structure material layer, the fin mask structure is planarized until the fin mask structure is removed.

18. A semiconductor structure, characterized in that, The semiconductor structure is formed using the semiconductor structure forming method according to any one of claims 1 to 17; the semiconductor structure comprises: A substrate having a plurality of mutually discrete first fin structures, each first fin structure including a first fin, wherein the first fin is made of a different material from the substrate; A first barrier membrane located on the sidewall of the first fin; An isolation structure located on the substrate, the isolation structure covering a portion of the sidewall of the first fin structure, and the top surface of the isolation structure being flush with the bottom surface of the first fin.

19. The semiconductor structure as claimed in claim 18, characterized in that, The substrate includes a first region and a second region, and a plurality of first fin structures are located on the first region; the semiconductor structure further includes a plurality of mutually discrete second fin structures located on the second region, wherein the material of the second fin structures is different from the material of the first fins.

20. The semiconductor structure as claimed in claim 19, characterized in that, The material of the second fin structure includes silicon.

21. The semiconductor structure as claimed in claim 18, characterized in that, The material of the first fin includes silicon germanium or germanium.

22. The semiconductor structure as described in claim 18, characterized in that, The first fin structure further includes a second fin located between the first fin and the substrate.

23. The semiconductor structure as described in claim 18, characterized in that, The isolation structure includes an isolation membrane located on the substrate and part of the sidewall of the first fin structure, and an isolation dielectric layer located on the isolation membrane.

24. The semiconductor structure as claimed in claim 23, characterized in that, The material of the separator includes silicon oxide, silicon carbide, or aluminum oxide.

Images