A radio frequency chip with an on-chip integrated RC circuit

Abstract

The application discloses a radio frequency chip integrated with an RC circuit on a chip, which comprises a substrate, an epitaxial layer, an active region arranged on the epitaxial layer, a plurality of resistance-capacitance combination structures arranged between a gate of the active region and an input metal pad on the epitaxial layer, resistance and capacitance of the resistance-capacitance combination structure being connected in parallel, and the gate of the active region being connected to the input metal pad through the resistance-capacitance combination structure. The radio frequency chip integrated with the RC circuit on the chip integrates the RC circuit in the chip, and the gain and robustness of a radio frequency power device at low and high frequencies are improved.

Description

Technical Field

[0001] This invention relates to the field of radio frequency device chip technology, and more specifically to a radio frequency chip with on-chip integrated RC circuit. Background Technology

[0002] Existing RF chips with on-chip integrated RC circuits, such as LDMOS chips, have the following structure for their input section: Figure 1 As shown, the gate 3 of the chip is directly connected to the input metal pad 1 via a low-resistance metal 21 (e.g., gold). When this type of chip is used in low-frequency applications, it often causes problems such as power amplifier tube oscillation due to excessive device gain. Typically, external damping structures such as resistors and capacitors are added to stabilize the power amplifier device; these circuits are usually implemented on a PCB board. Although external damping structures can provide some stability, their effect is negligible when loop oscillations occur inside the chip because the external damping structure is far from the active region of the on-chip integrated RC circuit in the circuit matching structure.

[0003] Existing improvement methods involve connecting a resistor in series at the chip input, such as... Figure 2 As shown, input metal pad 1 is connected in series with resistor 22 and then to the chip's gate 3. This resistance is achieved through a thin-film metal. While connecting a resistor in series with the gate effectively suppresses excessive gain and works well in low-frequency applications, when the frequency exceeds 200MHz, the device gain drops too much due to the resistor connected to the chip's gate. The thin-film resistor is easily burned out due to power overload, leading to device failure. Summary of the Invention

[0004] To address the aforementioned technical problems, the present invention aims to provide an on-chip integrated RC circuit radio frequency chip. By integrating the RC circuit inside the chip, the gain and robustness of the radio frequency power device at low and high frequencies are improved.

[0005] To address these problems in the prior art, the technical solution provided by this invention is as follows:

[0006] A radio frequency chip with on-chip integrated RC circuitry includes a substrate and an epitaxial layer. An active region of the extended epitaxial layer is disposed thereon. Multiple sets of resistor-capacitor combination structures are disposed on the epitaxial layer between the gate of the active region and the input metal pad. The resistor and capacitor of the resistor-capacitor combination structure are connected in parallel. The gate of the active region is connected to the input metal pad through the resistor-capacitor combination structure.

[0007] In a preferred embodiment, the resistor in the resistor-capacitor combination structure includes at least one dual-field plate structure. The dual-field plate structure includes a first metal field plate and a second metal field plate disposed on the epitaxial layer. The second metal field plate is disposed above the first metal field plate. A dielectric layer is disposed between the first metal field plate and the second metal field plate. The two ends of the first metal field plate and the second metal field plate are respectively connected to an upper metal layer disposed above through through-holes. One end of the upper metal layer is connected to the gate, and the other end is connected to the input metal pad. The thickness of the metal layer is greater than the thickness of the metal field plate.

[0008] In the preferred technical solution, multiple dual-field plate structures are connected in series through an upper metal layer.

[0009] In a preferred embodiment, the capacitor of the resistor-capacitor combination structure includes a lower metal layer and an upper metal layer disposed on the epitaxial layer. The upper metal layer is disposed above the lower metal layer, and a dielectric layer is disposed between the lower metal layer and the upper metal layer. The lower metal layer is connected to the gate, and the upper metal layer is connected to the input metal pad.

[0010] In a preferred embodiment, the upper metal layer is divided into a first upper metal layer and a second upper metal layer by a break, and a dielectric layer is disposed within the break. The first upper metal layer is connected to the lower metal layer through a through-hole, the first upper metal layer is connected to the gate, and the second upper metal layer is connected to the input metal pad.

[0011] Compared with existing solutions, the advantages of this invention are:

[0012] The on-chip integrated RC circuit of the present invention integrates the RC circuit inside the chip, so that loop oscillation will not occur inside the chip, avoiding the problem of resistor power overload due to low gain when using high-frequency input applications, and improving the gain and robustness of RF power devices at low and high frequencies. Attached Figure Description

[0013] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0014] Figure 1 This is a schematic diagram of the input section structure of an existing radio frequency chip;

[0015] Figure 2 This is a schematic diagram of the input section of an existing RF chip with a resistor connected in series.

[0016] Figure 3 This is a schematic diagram of the input section of the radio frequency chip with on-chip integrated RC circuit of the present invention;

[0017] Figure 4 This is a schematic diagram of the input layout of the RF chip with on-chip integrated RC circuit of the present invention;

[0018] Figure 5 This is a schematic diagram of the resistor structure according to an embodiment of the present invention;

[0019] Figure 6 for Figure 5 AA' section view;

[0020] Figure 7 This is a schematic diagram of the capacitor structure according to an embodiment of the present invention;

[0021] Figure 8 for Figure 7 AA' sectional view. Detailed Implementation

[0022] The above-described solution will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. The implementation conditions used in the embodiments may be further adjusted according to the conditions of specific manufacturers, and the implementation conditions not specified are generally those in routine experiments.

[0023] Example:

[0024] like Figure 3 , 4 As shown, this invention discloses an on-chip integrated RC circuit RF chip suitable for GaAs, Si-based LDMOS, and GaN processes. Specifically, it includes a substrate 100 and an epitaxial layer 101. An active region is disposed on the epitaxial layer 101. Multiple sets of resistor-capacitor combination structures 60 are disposed on the epitaxial layer 101 between the gate 40 of the active region and the input metal pad 50. The resistors and capacitors of the resistor-capacitor combination structures 60 are connected in parallel. The gate 40 of the active region is connected to the input metal pad 50 through the resistor-capacitor combination structures.

[0025] By designing an RC structure with a certain combination of resistance and capacitance values, when the chip is used at low frequencies, the RF signal will pass through the series resistor, effectively suppressing the chip gain and preventing device oscillation. When the chip is used at high frequencies, the RF signal will pass through the series capacitor, reducing the RF power that the resistor structure can withstand, thus achieving the goal of high gain and high efficiency.

[0026] The structure of resistor 61 in resistor-capacitor combination structure 60 is as follows: Figure 5 , 6As shown, a dual-layer thin-film metal stacked in parallel is used, including at least one dual-field plate structure 63. The dual-field plate structure includes a first metal field plate 611 and a second metal field plate 612 disposed on the epitaxial layer 101. The second metal field plate 612 is disposed above the first metal field plate 611. A dielectric layer 613 is disposed between the first metal field plate 611 and the second metal field plate 612. The two ends of the first metal field plate 611 and the second metal field plate 612 are respectively connected to an upper metal layer 615 disposed on the upper side through through holes 614. One end of the upper metal layer 615 is connected to the gate 40, and the other end is connected to the input metal pad 50.

[0027] In a preferred embodiment, the first metal field plate 611 and the second metal field plate 612 are very thin, ranging from tens to hundreds of nm, and are composed of metal or a combination of metal and metal nitride, resulting in relatively high resistance. The upper metal layer 615 is made of a thicker metal and has relatively low resistance. Preferably, the thickness difference between the first metal field plate 611, the second metal field plate 612, and the upper metal layer 615 is more than 10 times.

[0028] By designing the aspect ratio of the metal field plate to achieve the required resistance value, and considering the current capacity of the metal, the use of a double-layer metal field plate stacking method can significantly improve the heat dissipation of the resistor and increase the overall power capacity of the resistor.

[0029] A dielectric layer 616 can also be provided above the second metal field plate 612.

[0030] In a preferred embodiment, multiple sets of the above-mentioned dual-field plate structures 63 can be connected in series through the upper metal layer 615, which can improve the resistor power capacity, reduce the length of the field plate metal of each resistor unit, further optimize the resistor reliability, and effectively prevent the resistor burnout problem.

[0031] The structure of capacitor 62 in resistor-capacitor combination structure 60 is as follows: Figure 7 , 8 As shown, the structure includes a lower metal layer 621 and an upper metal layer 622 disposed on the epitaxial layer 101. The upper metal layer 622 is disposed above the lower metal layer 621. The dielectric layer 624 between the lower metal layer 621 and the upper metal layer 622 serves as the epitaxial layer of a capacitor, forming a parallel plate capacitor. The lower metal layer 621 is connected to the gate 40, and the upper metal layer 622 is connected to the input metal pad 50.

[0032] In a preferred embodiment, the upper metal layer 622 can be used as a connection metal gate 40 or an input metal pad 50. Specifically, the upper metal layer 622 is divided into a first upper metal layer 6222 and a second upper metal layer 6223 by a break 6221, and a dielectric layer is disposed within the break 6221, such as... Figure 7In one example shown, a break 6221 is provided around the periphery of the upper metal layer 622, causing the segmented first upper metal layer 6222 to surround the second upper metal layer 6223. The first upper metal layer 6222 is connected to the lower metal layer 621 through a through-hole 623, and a dielectric layer 624 is disposed between the lower metal layer 621 and the upper metal layer 622. The lower metal layer 621 serves as the lower electrode of the capacitor, the second upper metal layer 6223 serves as the upper electrode of the capacitor, and the dielectric layer 624 between the lower metal layer 621 and the upper metal layer 622 serves as the dielectric layer (oxide) of the capacitor, forming a parallel-plate capacitor. All the aforementioned dielectric layers are generally oxides or nitrides, and the required capacitance value can be achieved by adjusting the thickness of the dielectric layer and the metal area of ​​the upper and lower electrodes.

[0033] Of course, to achieve special requirements, the lower metal layer 621 of the capacitor can be implemented using a metal field plate.

[0034] In a preferred embodiment, the first upper metal layer 6222 and the second upper metal layer 6223 are made of a relatively thick metal with a thickness of about 1-5 μm and a relatively low resistance.

[0035] In a preferred embodiment, for ease of operation, such as Figure 4 As shown, the upper metal layer 622 of the capacitor and the upper metal layer 615 of the resistor are the same metal layer, with their two ends connected to the gate 40 and the input metal pad 50, respectively. The above RC circuit and active region are packaged as a whole into an RF chip.

[0036] It should be understood that the specific embodiments described above are merely illustrative or explanatory of the principles of the invention and do not constitute a limitation thereof. Therefore, any modifications, equivalent substitutions, improvements, etc., made without departing from the spirit and scope of the invention should be included within the protection scope of the invention. Furthermore, the appended claims are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims, or equivalent forms of such scope and boundaries.

Claims

1. A radio frequency chip of an on-chip integrated RC circuit, comprising a substrate and an epitaxial layer, an active region provided in the epitaxial layer, characterized in that, Multiple sets of resistor-capacitor combination structures are provided on the epitaxial layer between the gate of the active region and the input metal pad. The resistor and capacitor of the resistor-capacitor combination structure are connected in parallel, and the gate of the active region is connected to the input metal pad through the resistor-capacitor combination structure. The resistor in the resistor-capacitor combination structure includes at least one dual-field plate structure. The dual-field plate structure includes a first metal field plate and a second metal field plate disposed on the epitaxial layer. The second metal field plate is disposed above the first metal field plate. A dielectric layer is disposed between the first metal field plate and the second metal field plate. The two ends of the first metal field plate and the second metal field plate are respectively connected to an upper metal layer disposed above through through holes. One end of the upper metal layer is connected to the gate, and the other end is connected to the input metal pad. The thickness of the metal layer is greater than the thickness of the metal field plate. The capacitor in the resistor-capacitor combination structure includes a lower metal layer and an upper metal layer disposed on the epitaxial layer. The upper metal layer is disposed above the lower metal layer. A dielectric layer is disposed between the lower metal layer and the upper metal layer. The lower metal layer is connected to the gate, and the upper metal layer is connected to the input metal pad.

2. The RF chip of an on-chip integrated RC circuit according to claim 1, wherein, Multiple double-field plate structures are connected in series through an upper metal layer.

3. The RF chip of integrated RC circuits on a chip according to claim 1, wherein, The upper metal layer is divided into a first upper metal layer and a second upper metal layer by a break. A dielectric layer is disposed in the break. The first upper metal layer is connected to the lower metal layer through a through-hole. The first upper metal layer is connected to the gate, and the second upper metal layer is connected to the input metal pad.

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