A method and system for suppressing common-mode voltage of a two-level inverter
By Clark transformation and sector division of three-phase modulated waves, PWM drive waveforms are generated based on duty cycles, the selection of voltage vectors in two-level inverters is optimized, the common mode voltage and common mode current suppression problems are solved, and the operating performance and reliability of the motor are improved.
Patent Information
- Application Number
- CN202210149386.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-02-18
- Publication Date
- 2025-05-23
- Estimated Expiration
- 2042-02-18
AI Technical Summary
The prior art often increases the complexity and cost of the inverter or leads to a decrease in the output performance of the motor when suppressing the common mode voltage in the motor drive system.
By performing Clark transformation on the three-phase modulated wave, the current reference voltage vector and its sector are determined, and a PWM drive waveform is generated based on the duty cycle of the zero voltage vector and the odd effective voltage vector to optimize the selection of the voltage vector and reduce the common mode voltage and common mode current.
It effectively suppresses common mode voltage and common mode current in the two-level inverter, improves the operating performance and reliability of the motor, and reduces the calculation amount and implementation difficulty.
Smart Images

Figure CN114448282B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of motor control, and in particular to a method and system for suppressing common-mode voltage of a two-level inverter. Background Art
[0002] The motor drive system is the main executive structure of new energy vehicles. Its driving characteristics determine the main performance indicators of vehicle driving. It is an important component of electric vehicles. Among them, the PWM motor drive system has been widely used in industrial systems and civil devices because of its good operating characteristics. However, the PWM inverter will generate high-frequency common-mode voltage during use, which will induce shaft voltage on the motor shaft, causing the motor bearing to be damaged in a short period of time and shortening the service life of the motor. In addition, high-speed switching power electronic devices will generate strong electromagnetic interference, interfering with the normal operation of other control systems or electronic equipment. Therefore, the common-mode voltage in the motor drive system needs to be suppressed.
[0003] In the prior art, the method of suppressing the common-mode voltage in the motor drive system is generally to add a common-mode voltage filter at the output end of the inverter or to adopt a space vector modulation method that abandons the zero voltage vector. Adding a common-mode voltage filter at the output end of the two-level inverter can effectively suppress the common-mode voltage, but this setting destroys the compact structure of the two-level inverter, increases the manufacturing cost, and reduces the reliability of the operation of the two-level inverter. The space vector modulation method that abandons the zero voltage vector uses a pair of redundant voltage vectors of equal magnitude and opposite direction to equivalently replace the zero voltage vector. Due to the introduction of redundant voltage vectors, the output performance of the two-level inverter is greatly reduced. At the same time, the space vector modulation method that abandons the zero voltage vector does not consider the size of the common-mode current generated by the common-mode voltage. The common-mode voltage generated by the two-level inverter will generate a common-mode current inside the motor, reducing the operating performance and reliability of the motor. Summary of the invention
[0004] The present specification provides a two-level inverter common-mode voltage suppression method and system to overcome at least one technical problem existing in the prior art.
[0005] According to an embodiment of this specification, a method for suppressing common-mode voltage of a two-level inverter is provided, the method comprising:
[0006] Perform Clark transformation on the three-phase modulation wave, transform the three-phase modulation wave from the three-phase stationary coordinate system to the two-phase stationary coordinate system, obtain the current reference voltage vector, and determine the sector where the current reference voltage vector is located using the current reference voltage vector and the sector division rule, wherein the voltage vector corresponding to the sector division rule includes an odd effective voltage vector and a zero voltage vector, and the angle between adjacent effective voltage vectors satisfies the vector synthesis principle;
[0007] According to the current reference voltage vector, the sector where the current reference voltage vector is located and the DC side voltage of the two-level inverter, the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected are obtained;
[0008] According to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, a corresponding PWM driving waveform is generated to drive the inverter switch tube.
[0009] Optionally, the method further comprises:
[0010] Determine the common mode voltage generated by different voltage vectors according to the switching function expression of the common mode voltage of the two-level inverter, and determine the voltage vector to be selected for synthesizing the reference voltage vector according to the magnitude of the common mode voltage generated by the different voltage vectors, wherein the switching function expression of the common mode voltage of the two-level inverter is obtained according to the topological structure of the two-level inverter;
[0011] Under the condition of satisfying the vector synthesis principle, the vector synthesis sector is re-divided according to the voltage vector to be selected for the synthesized reference voltage vector.
[0012] Further optionally, the switching function expression of the common mode voltage of the two-level inverter is obtained according to the topology structure of the two-level inverter and includes:
[0013] If the motor is equivalent to a resistive-inductive load, the common-mode voltage u of the two-level inverter is cm for:
[0014]
[0015] Among them, u aN 、u bN 、u cN They are A phase output voltage, B phase output voltage, and C phase output voltage respectively;
[0016] According to the topological characteristics of the two-level inverter and the above formula (1), the common-mode voltage u of the two-level inverter can be obtained: cm The switch function expression is:
[0017]
[0018] Among them, S i =1, indicating that the switch is turned on, S i =0, indicating that the switch is turned off, i=1, 2, 3; S 1 , S 2 , S 3 They represent the upper tube of phase A, phase B and phase C respectively; u dc is the DC side voltage of the two-level inverter.
[0019] Further optionally, determining the common mode voltage generated by different voltage vectors according to the switching function expression of the common mode voltage of the two-level inverter, and determining the voltage vector to be selected for synthesizing the reference voltage vector according to the magnitude of the common mode voltage generated by the different voltage vectors includes:
[0020] The two-level inverter has a total of V 0 ~V 7 Eight voltage vectors, among which V 0 、V 7 is the zero voltage vector, located at the origin of the αβ coordinate system, V 1 、V 2 、V 3 、V 4 、V 5 、V 6 are six effective voltage vectors;
[0021] V 0 ~V 7 Substituting the switching states of the eight voltage vectors into the above formula (2), the common mode voltages corresponding to different voltage vectors are obtained;
[0022] Among them, the odd effective voltage vector V 1 、V 3 、V 5 Substituting the switching state into the above formula (2), the common mode voltage is
[0023] The effective voltage vector V 2 、V 4 、V 6 Substituting the switching state into the above formula (2), the common mode voltage is
[0024] The zero voltage vector V 7 Substituting the switching state into the above formula (2), the common mode voltage is u dc ;
[0025] The zero voltage vector V 0 Substituting the switch state into the above formula (2), the resulting common mode voltage is 0;
[0026] The odd effective voltage vector V 1 、V 3 、V 5 and zero voltage vector V 0 As the synthetic reference voltage vector V ref The voltage vector to be selected.
[0027] Further optionally, under the condition that the vector synthesis principle is satisfied, the re-dividing of the vector synthesis sector according to the voltage vector to be selected for synthesizing the reference voltage vector comprises:
[0028] Reference voltage vector V ref The synthetic reference voltage vector V ref The two adjacent odd effective voltage vectors in the voltage vector to be selected are synthesized and recorded as the odd effective voltage vector V to be selected. α 、V β According to the triangle sine theorem, we can get two odd effective voltage vectors V to be selected. α 、V β The duty cycle d α d β for:
[0029]
[0030] Among them, d α d β For two odd effective voltage vectors V α 、V β The duty cycle, d α d β All greater than 0; |V ref | is the reference voltage vector V ref The amplitude, u dc is the DC side voltage of the two-level inverter, θ is the reference voltage vector V ref Angle with the horizontal direction;
[0031] According to the above formula (3), 0°<θ<120° is obtained;
[0032] The vector synthesis sector is re-divided into three 120° sectors.
[0033] Further optionally, performing Clark transformation on the three-phase modulation wave, transforming the three-phase modulation wave from a three-phase stationary coordinate system to a two-phase stationary coordinate system, obtaining a current reference voltage vector, and using the current reference voltage vector and a sector division rule to determine the sector where the current reference voltage vector is located includes:
[0034] According to the Clark transformation formula, the three-phase modulation wave is transformed to obtain the current reference voltage vector V Pref The real and imaginary parts of ; where the Clark transformation formula is as follows:
[0035]
[0036] Among them, u α 、u β They are the current reference voltage vector V PrefThe real and imaginary parts of a 、u b 、u c is a three-phase modulation wave, u a = sin(ωt), ω is the angular velocity;
[0037] According to the inverse sine transformation, the current reference voltage vector V is obtained Pref The angle θ with the horizontal direction is:
[0038]
[0039] According to the current reference voltage vector V Pref The angle θ with the horizontal direction determines the current reference voltage vector V Pref The sector where it is located.
[0040] Optionally, a reference voltage vector V is set ref The angle with the horizontal direction is θ, and the sector number is K:
[0041] When 0°<θ<120°, K=1;
[0042] When 120°<θ<240°, K=2;
[0043] When 240°<θ<360°, K=3.
[0044] Further optionally, the step of obtaining the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected according to the current reference voltage vector, the sector where the current reference voltage vector is located, and the DC side voltage of the two-level inverter includes:
[0045] Get the DC side voltage u of the two-level inverter dc ;
[0046] Determine the sector number K according to the sector where the current reference voltage vector is located;
[0047] The duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected are determined using the following formula:
[0048]
[0049] Among them, d Pα d Pβ They are the odd effective voltage vectors V to be selected α 、V β Duty cycle; d 0 is the zero voltage vector V 0 Duty cycle; u dc is the DC side voltage of the two-level inverter; |VPref | is the magnitude of the current reference voltage vector V Pref ; θ is the angle between the current reference voltage vector V Pref and the horizontal direction; K is the sector number of the sector where the current reference voltage vector V Pref is located.
[0050] Optionally, generating a corresponding PWM drive waveform according to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, and driving the inverter switching tubes includes:
[0051] Based on the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, and combining the switching states of the zero voltage vector and the odd effective voltage vector to be selected, obtaining the switching moments of the two-level inverter switching tubes;
[0052] Generating a corresponding PWM drive waveform according to the switching moments of the two-level inverter switching tubes to drive the inverter switching tubes.
[0053] According to an embodiment of this specification, a two-level inverter common-mode voltage suppression system is further provided, and the system includes:
[0054] A Clark transformation module, configured to perform Clark transformation on the three-phase modulation wave, transform the three-phase modulation wave from the three-phase stationary coordinate system to the two-phase stationary coordinate system, and obtain the current reference voltage vector;
[0055] A sector determination module, configured to determine the sector where the current reference voltage vector is located by using the current reference voltage vector and the sector division rule; wherein, the voltage vectors corresponding to the sector division rule include odd effective voltage vectors and zero voltage vectors, and the angle between adjacent effective voltage vectors satisfies the vector synthesis principle;
[0056] A voltage vector duty cycle calculation module, configured to calculate the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected according to the current reference voltage vector, the sector where the current reference voltage vector is located, and the DC-side voltage of the two-level inverter;
[0057] A PWM drive signal generation module, configured to generate a corresponding PWM drive waveform according to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, and drive the inverter switching tubes.
[0058] The beneficial effects of the embodiments of this specification are as follows:
[0059] The two-level inverter common-mode voltage suppression method optimizes the selection of effective voltage vector and zero voltage vector, can effectively suppress the common-mode voltage and the common-mode current generated by the common-mode voltage, and the two-level inverter common-mode voltage suppression method reduces the sector selection of the reference voltage vector, thereby reducing the amount of calculation and being easier to implement. In addition, the method is applicable to both synchronous motors and asynchronous motors using field-oriented control, and has a wider range of applications. BRIEF DESCRIPTION OF THE DRAWINGS
[0060] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0061] Figure 1 A schematic flow chart of a two-level inverter common mode voltage suppression method provided in an embodiment of this specification;
[0062] Figure 2 A topological structure diagram of a two-level inverter in a two-level inverter common-mode voltage suppression method provided in an embodiment of this specification;
[0063] Figure 3 The sector division and vector distribution diagram under the traditional space vector modulation provided in the embodiments of this specification;
[0064] Figure 4 A vector composite image provided in the embodiments of this specification;
[0065] Figure 5 A vector synthesis sector re-division and vector distribution diagram in a two-level inverter common mode voltage suppression method provided in an embodiment of this specification;
[0066] Figure 6 The vector arrangement and driving waveform diagram in the common-mode voltage suppression method of the two-level inverter provided in the embodiment of this specification, wherein (a) is the voltage vector arrangement diagram within one cycle in each sector, and (b) is the driving waveform diagram of the three-phase output of the two-level inverter;
[0067] Figure 7 The common-mode voltage waveform diagram when the voltage transfer ratio is 0.2 provided in the embodiment of this specification, wherein (a) is the common-mode voltage waveform diagram under the traditional space vector modulation, and (b) is the common-mode voltage waveform diagram using the common-mode voltage suppression method of the two-level inverter;
[0068] Figure 8A common-mode voltage waveform diagram when the voltage transfer ratio is 0.3 provided in the embodiment of this specification, wherein (a) is a common-mode voltage waveform diagram under traditional space vector modulation, and (b) is a common-mode voltage waveform diagram using a two-level inverter common-mode voltage suppression method;
[0069] Fig. 9 A common-mode voltage waveform diagram when the voltage transfer ratio is 0.4 provided in the embodiment of this specification, wherein (a) is a common-mode voltage waveform diagram under traditional space vector modulation, and (b) is a common-mode voltage waveform diagram using a two-level inverter common-mode voltage suppression method;
[0070] Fig.10 The common-mode current waveform diagram when the voltage transfer ratio is 0.2 provided in the embodiment of this specification, wherein (a) is the common-mode current waveform diagram under the traditional space vector modulation, and (b) is the common-mode current waveform diagram using the common-mode voltage suppression method of the two-level inverter;
[0071] Fig.11 The common-mode current waveform diagram when the voltage transfer ratio is 0.3 provided in the embodiment of this specification, wherein (a) is the common-mode current waveform diagram under the traditional space vector modulation, and (b) is the common-mode current waveform diagram using the common-mode voltage suppression method of the two-level inverter;
[0072] Fig.12 The common-mode current waveform diagram when the voltage transfer ratio is 0.4 provided in the embodiment of this specification, wherein (a) is the common-mode current waveform diagram under traditional space vector modulation, and (b) is the common-mode current waveform diagram applying the common-mode voltage suppression method of the two-level inverter. DETAILED DESCRIPTION
[0073] The following will be combined with the drawings in the embodiments of this specification to clearly and completely describe the technical solutions in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0074] It should be noted that the terms "including" and "having" and any variations thereof in the embodiments of this specification and the accompanying drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or devices.
[0075] The embodiments of this specification disclose a method for suppressing the common mode voltage of a two-level inverter, so as to suppress the common mode voltage of the two-level inverter, reduce the sector selection and calculation amount of the reference voltage vector, and make it easier to implement. Detailed descriptions are given below.
[0076] Figure 1 A two-level inverter common mode voltage suppression method provided according to an embodiment of this specification is shown. Figure 1 As shown, the method comprises the following steps:
[0077] Step 100, Clark transform is performed on the three-phase modulation wave, and the three-phase modulation wave is transformed from a three-phase stationary coordinate system to a two-phase stationary coordinate system to obtain a current reference voltage vector, and the sector where the current reference voltage vector is located is determined using the current reference voltage vector and sector division rules.
[0078] The voltage vectors corresponding to the sector division rule include odd effective voltage vectors and zero voltage vectors, and the angles between adjacent effective voltage vectors satisfy the vector synthesis principle. It should be noted and understood that the voltage vectors corresponding to the above sector division rule refer to the voltage vectors used to synthesize the reference voltage vector.
[0079] In a specific embodiment, before performing step 100, the sectors under the conventional space vector modulation need to be re-divided, and the specific steps are as follows:
[0080] A. The common-mode voltage generated by different voltage vectors is determined according to the switching function expression of the common-mode voltage of the two-level inverter, and the voltage vector to be selected for the synthetic reference voltage vector is determined according to the magnitude of the common-mode voltage generated by the different voltage vectors.
[0081] Among them, the switching function expression of the common-mode voltage of the two-level inverter is obtained according to the topological structure of the two-level inverter. Specifically, according to the topological structure of the two-level inverter, the switching function expression of the common-mode voltage of the two-level inverter is obtained, the switching states corresponding to different voltage vectors are substituted into the switching function expression of the common-mode voltage of the two-level inverter, the common-mode voltages generated by different voltage vectors are obtained, the common-mode voltages generated by different voltage vectors are compared, and the voltage vector to be selected for the synthetic reference voltage vector is determined according to the magnitude of the common-mode voltages generated by different voltage vectors.
[0082] In the specific implementation process, the topology of the two-level inverter is as follows: Figure 2 As shown, when the two-level inverter drives the motor load, the motor is equivalent to a resistive-inductive load (R–L). For the convenience of analysis and explanation, as shown in Figure 2 As shown, the motor is equivalent to a resistive inductive load, u cm is the common mode voltage of the two-level inverter, i cmis the common mode current generated by the common mode voltage of the two-level inverter, u dc is the DC side voltage of the two-level inverter, then the common mode voltage u cm The expression is as follows:
[0083]
[0084] In the above formula (1), u aN 、u bN 、u cN They are A phase output voltage, B phase output voltage, and C phase output voltage respectively.
[0085] According to the topological characteristics of the two-level inverter and the above formula (1), the common-mode voltage u of the two-level inverter can be obtained: cm The switch function expression is:
[0086]
[0087] In the above formula (2), S i =1, indicating that the switch is turned on, S i =0, indicating that the switch is turned off, i=1, 2, 3, S 1 , S 2 , S 3 They represent the upper tube of phase A, phase B and phase C respectively; u dc is the DC side voltage of the two-level inverter.
[0088] Sector division and vector state of two-level inverter under traditional space vector modulation Figure 3 As shown, the two-level inverter has a total of V 0 ~V 7 Eight space voltage vectors, among which V 0 、V 7 is the zero voltage vector, located at the origin of the αβ coordinate system, V 1 、V 2 、V 3 、V 4 、V 5 、V 6 There are six effective voltage vectors, which divide the αβ plane into six sectors of 60°. ref represents the reference voltage vector, θ represents the angle between the reference voltage vector and the horizontal direction, that is, the angle between the reference voltage vector and the effective voltage vector V 1 The reference voltage vector V ref The two adjacent effective voltage vectors and two zero voltage vectors V 0 and V 7 synthesis.
[0089] The above V 0~V 7 Substituting the switching states of the eight space voltage vectors into the switching function expression of the common-mode voltage of the two-level inverter shown in the above equation (2), the common-mode voltages corresponding to different voltage vectors can be obtained, as shown in the following Table 1.
[0090] Table 1 Common mode voltage corresponding to different voltage vectors
[0091] Voltage Vector Common mode voltage <![CDATA[V 1 , V 3 , V 5 (Odd effective voltage vector)]]> <![CDATA[u dc / 3]]> <![CDATA[V 2 , V 4 , V 6 (Even effective voltage vector)]]> <![CDATA[2u dc / 3]]> <![CDATA[V 7 (Zero Voltage Vector)]]> <![CDATA[u dc ]]> <![CDATA[V 0 (Zero Voltage Vector)]]> 0
[0092] From Table 1 above, it can be seen that among the effective voltage vectors, the common mode voltage generated by the odd effective voltage vector is small, and among the zero voltage vectors, the zero voltage vector V 0 The common mode voltage generated is 0. Therefore, in the embodiment of this specification, in order to effectively suppress the common mode voltage and ensure the synthesis of the reference voltage vector, the method converts the odd effective voltage vector V 1 、V 3 、V 5 and zero voltage vector V 0 As the synthetic reference voltage vector V ref The voltage vector to be selected.
[0093] B. Under the condition of satisfying the vector synthesis principle, the vector synthesis sector is re-divided according to the voltage vector to be selected for the synthesized reference voltage vector.
[0094] In the specific implementation process, the reference voltage vector V ref The synthetic reference voltage vector V ref The two adjacent odd effective voltage vectors in the voltage vector to be selected are synthesized to synthesize the reference voltage vector V ref The two adjacent odd effective voltage vectors are recorded as the odd effective voltage vector V α 、V β , due to the zero voltage vector V 0 The reference voltage vector V ref The amplitude and phase of have no effect, so when redividing the sectors, start with two odd effective voltage vectors, such as Figure 4 As shown, the sector division rules are analyzed.
[0095] According to the triangle sine theorem, we can get two odd effective voltage vectors V to be selected: α 、V β The duty cycle d α d β for:
[0096]
[0097] In the above formula (3), d α d β For two odd effective voltage vectors Vα 、V β The duty cycle, d α d β All greater than 0; |V ref | is the reference voltage vector V ref The amplitude, u dc is the DC side voltage of the two-level inverter, θ is the reference voltage vector V ref The angle with the horizontal direction, such as Figure 4 shown.
[0098] Since the two odd effective voltage vectors V α 、V β The duty cycle must be greater than 0, then d α d β Substituting greater than 0 into the above formula (3), we can get
[0099]
[0100] In the above formula (8), d α d β For two odd effective voltage vectors V α 、V β The duty cycle, |V ref | is the reference voltage vector V ref The amplitude, u dc is the DC side voltage of the two-level inverter, θ is the reference voltage vector V ref The angle with the horizontal.
[0101] According to the above formula (8), it is solved that 0°<θ<120°.
[0102] Since 0°<θ<120°, the vector synthesis sector can be re-divided into three 120° sectors, that is, the six sectors under the traditional space vector modulation are re-divided into three sectors. The re-divided vector synthesis sectors are as follows: Figure 5 shown.
[0103] Based on the re-divided vector synthesis sector, the three-phase modulation wave is Clark transformed according to the Clark transformation formula to obtain the current reference voltage vector V Pref The real and imaginary parts of .
[0104] Specifically, the Clark transformation formula is as follows:
[0105]
[0106] In the above formula (4), u α 、u β They are the current reference voltage vector V PrefThe real and imaginary parts of a 、u b 、u c is a three-phase modulation wave, u a = sin(ωt), ω is the angular velocity.
[0107] After the above Clark transformation, the current reference voltage vector V is obtained. Pref The real part u α and the imaginary part u β , and then through the arc sine transformation, we get the current reference voltage vector V Pref The angle θ with the horizontal direction is shown in the following formula (5).
[0108]
[0109] In the above step B, the vector synthesis sectors have been re-divided, and the angle ranges of different sectors have been calculated. According to the current reference voltage vector V calculated above, Pref The angle θ with the horizontal direction determines the current reference voltage vector V Pref The specific judgment rules for the sector where the vector synthesis sector is located after re-dividing the sector are described in detail below.
[0110] Set the reference voltage vector V ref The angle with the horizontal direction is θ, the sector number is K, then the reference voltage vector V ref The judgment rule of the sector is: when 0°<θ<120°, K=1; when 120°<θ<240°, K=2; when 240°<θ<360°, K=3. In other words, when the angle range of θ is (0°, 120°), the reference voltage vector V ref In the sector numbered 1, when the angle range of θ is (120°, 240°), the reference voltage vector V ref In the sector numbered 2, when the angle range of θ is (240°, 360°), the reference voltage vector V ref Located in sector number 3.
[0111] Step 200, according to the current reference voltage vector, the sector where the current reference voltage vector is located and the DC side voltage of the two-level inverter, the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected are obtained.
[0112] In a specific embodiment, Figure 5 The new sector division shown and the current reference voltage vector V in the above step 100 Pref The judgment of the sector in which it is located shows that if the current reference voltage vector VPref When the sector is located in sector number 1, the current reference voltage vector V Pref By the odd effective voltage vector V 1 、V 3 and zero voltage vector V 0 Synthesis; if the current reference voltage vector V Pref When located in sector number 2, the current reference voltage vector V Pref By the odd effective voltage vector V 3 、V 5 and zero voltage vector V 0 Synthesis; if the current reference voltage vector V Pref When located in sector number 3, the current reference voltage vector V Pref By the odd effective voltage vector V 5 、V 1 and zero voltage vector V 0 synthesis.
[0113] In order to facilitate analysis, the current reference voltage vector V Pref The odd effective voltage vector is abstracted as V α 、V β , then in different sectors, V α 、V β With the synthetic current reference voltage vector V Pref The corresponding relationship of the odd effective voltage vector is shown in Table 2 below.
[0114] Table 2 V α 、V β With the synthetic current reference voltage vector V Pref The corresponding relationship of the odd effective voltage vector
[0115] Sector <![CDATA[V α ]]> <![CDATA[V β ]]> 1 <![CDATA[V 1 ]]> <![CDATA[V 3 ]]> 2 <![CDATA[V 3 ]]> <![CDATA[V 5 ]]> 3 <![CDATA[V 5 ]]> <![CDATA[V 1 ]]>
[0116] In different sectors, a switching cycle T S In the current reference voltage vector V Pref With odd effective voltage vector V α 、V β and zero voltage vector V 0 The relationship between them is:
[0117] V Pref =d Pα V α +d Pβ V β +d 0 V 0 (6)
[0118] In the above formula (6), V α 、V βTwo adjacent odd effective voltage vectors, V 0 represents the zero voltage vector, d Pα ,d Pβ Respectively represent the duty cycle of two adjacent odd effective voltage vectors, d 0 represents the duty cycle of the zero voltage vector, where
[0119]
[0120] In the above formula (9), u dc is the DC side voltage of the two-level inverter.
[0121] like Figure 4 As shown, according to the triangle sine theorem, we can get:
[0122]
[0123] In the above equation (10), K represents the reference voltage vector V ref Sector, u dc is the DC side voltage of the two-level inverter, d α ,d β Respectively represent the duty cycle of two adjacent odd effective voltage vectors, d 0 represents the duty cycle of the zero voltage vector, and θ represents the angle between the reference voltage vector and the horizontal direction.
[0124] Solving the above equation (10), the duty cycle of the voltage vector can be obtained as:
[0125]
[0126] In the above formula (11), d α ,d β are the duty ratios of two adjacent odd effective voltage vectors, d 0 is the duty cycle of the zero voltage vector, u dc is the DC side voltage of the two-level inverter, and θ is the angle between the reference voltage vector and the horizontal direction.
[0127] Corresponding to the current reference voltage vector, the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected are determined using the following formula (7):
[0128]
[0129] Among them, d Pα ,d Pβ They are the odd effective voltage vectors V to be selected α 、V β Duty cycle; d 0 is the zero voltage vector V 0 Duty cycle; udc is the DC side voltage of the two-level inverter; |V Pref | is the current reference voltage vector V Pref The amplitude of θ is the current reference voltage vector V Pref The angle with the horizontal direction; K is the current reference voltage vector V Pref The sector number of the sector.
[0130] Step 300, generating a corresponding PWM drive waveform according to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, and driving the inverter switch tube.
[0131] In a specific embodiment, the voltage vector arrangement rule in each sector within one cycle is as follows: Figure 6 (a), wherein the duty cycle of the voltage vector can be obtained according to the formula (11) in step 400. Then, according to the voltage vector and the corresponding duty cycle of the voltage vector, combined with the switching state represented by the vector, the switching moment of the switch tube of the two-level inverter can be obtained. Taking the reference voltage vector located in the sector numbered 1 as an example, the two-level inverter outputs a three-phase drive waveform (taking the upper tube of the three-phase as an example, the lower tube drive waveform is complementary to the upper tube) as shown in FIG. Figure 6 As shown in (b). According to the switching time of the two-level inverter switch tube, the comparison register of the EPWM (enhanced pulsewidth modulation) module in the DSP (Digital Signal Processing) controller is configured, and the action register in the EPWM module is set at the same time, so that the PWM driving waveform of the driving switch tube can be generated to drive the inverter switch tube.
[0132] In the embodiments of this specification, in order to verify the effectiveness of the two-level inverter common mode voltage suppression system, the method and the traditional space vector modulation method are simulated, and the simulation parameters are shown in Table 3.
[0133] Table 3 Simulation parameters
[0134] <![CDATA[DC-side voltage u dc > 180V R–L Load 20Ω / 10mH <![CDATA[Output frequency f out / Switching frequency f k > 50Hz / 5kHz
[0135] The output common-mode voltage of the two-level inverter under different voltage transfer ratios and the common-mode current generated by the common-mode voltage are shown in Figure 2. Figure 7–12. According to the simulation results, the two-level inverter common-mode voltage suppression method in the embodiment of this specification optimizes the selection of the effective voltage vector and the zero voltage vector compared to the traditional space vector modulation method. From the perspective of the suppression effect of the common-mode voltage and the common-mode current generated by the common-mode voltage, the common-mode voltage generated by the two-level inverter common-mode voltage suppression method of the present invention is only 33.3% of the common-mode voltage generated by the traditional space vector modulation strategy. At the same time, the common-mode current generated by the common-mode voltage is also significantly suppressed. The maximum value of the common-mode current in the two-level inverter common-mode voltage suppression method of the present invention is only about 40% of the maximum value of the common-mode current in the traditional space vector modulation strategy. In addition, from the perspective of the difficulty of algorithm implementation, the two-level inverter common-mode voltage suppression method of the present invention reduces the sector selection of the reference voltage vector, thereby reducing the amount of calculation, and is easier to implement. Moreover, the method is applicable to both synchronous motors and asynchronous motors using magnetic field oriented control, and has a wider range of applications.
[0136] Corresponding to the above method embodiment, the embodiment of the present invention further provides a two-level inverter common mode voltage suppression system, which is used to execute the steps of the two-level inverter common mode voltage suppression method in the above embodiment. The two-level inverter common mode voltage suppression system includes a Clark conversion module, a sector judgment module, a voltage vector duty cycle determination module, and a PWM drive signal generation module.
[0137] Specifically, the Clark transformation module is used to perform Clark transformation on the three-phase modulation wave, transforming the three-phase modulation wave from a three-phase stationary coordinate system to a two-phase stationary coordinate system, and obtaining a current reference voltage vector.
[0138] The sector determination module is used to determine the sector where the current reference voltage vector is located by using the current reference voltage vector and the sector division rule. The voltage vectors corresponding to the sector division rule include odd effective voltage vectors and zero voltage vectors, and the angle between adjacent effective voltage vectors satisfies the vector synthesis principle.
[0139] The voltage vector duty cycle obtaining module is used to obtain the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected according to the current reference voltage vector, the sector where the current reference voltage vector is located and the DC side voltage of the two-level inverter.
[0140] The PWM drive signal generation module is used to generate a corresponding PWM drive waveform according to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, so as to drive the inverter switch tube.
[0141] It should be noted that the two-level inverter common-mode voltage suppression system provided in the embodiment of the present invention is based on the same concept as the two-level inverter common-mode voltage suppression method embodiment of the present invention, and the technical effect it brings is the same as the two-level inverter common-mode voltage suppression method embodiment of the present invention. For specific contents, please refer to the description in the embodiment of the two-level inverter common-mode voltage suppression method of the present invention, which will not be repeated here.
[0142] Those skilled in the art can understand that the accompanying drawings are only schematic diagrams of an embodiment, and the modules or processes in the accompanying drawings are not necessarily required to implement the present invention.
[0143] Those skilled in the art can understand that the modules in the device in the embodiment can be distributed in the device in the embodiment according to the description of the embodiment, or can be changed accordingly and located in one or more devices different from the embodiment. The modules in the above embodiment can be combined into one module, or can be further divided into multiple sub-modules.
[0144] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for suppressing common-mode voltage of a two-level inverter, It is characterized in that The method comprises: Based on the re-divided sectors under the traditional space vector modulation, Clark transformation is performed on the three-phase modulation wave, and the three-phase modulation wave is transformed from a three-phase stationary coordinate system to a two-phase stationary coordinate system to obtain a current reference voltage vector, and the current reference voltage vector and the sector division rule are used to determine the sector where the current reference voltage vector is located, wherein the voltage vector corresponding to the sector division rule includes an odd effective voltage vector and a zero voltage vector, and the angle between adjacent effective voltage vectors satisfies the vector synthesis principle; According to the current reference voltage vector, the sector where the current reference voltage vector is located and the DC side voltage of the two-level inverter, the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected are obtained; According to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, a corresponding PWM driving waveform is generated to drive the inverter switch tube; The sectors under the traditional space vector modulation are re-divided, specifically including: Determine the common mode voltage generated by different voltage vectors according to the switching function expression of the common mode voltage of the two-level inverter, and determine the voltage vector to be selected for the synthetic reference voltage vector according to the magnitude of the common mode voltage generated by the different voltage vectors; Under the condition of satisfying the vector synthesis principle, the vector synthesis sector is re-divided according to the voltage vector to be selected for the synthesized reference voltage vector.
2. The two-level inverter common mode voltage suppression method according to claim 1, It is characterized in that The method further comprises: Determine the common mode voltage generated by different voltage vectors according to the switching function expression of the common mode voltage of the two-level inverter, and determine the voltage vector to be selected for synthesizing the reference voltage vector according to the magnitude of the common mode voltage generated by the different voltage vectors, wherein the switching function expression of the common mode voltage of the two-level inverter is obtained according to the topological structure of the two-level inverter; Under the condition of satisfying the vector synthesis principle, the vector synthesis sector is re-divided according to the voltage vector to be selected for the synthesized reference voltage vector.
3. The two-level inverter common mode voltage suppression method according to claim 2, It is characterized in that The switching function expression of the common mode voltage of the two-level inverter is obtained according to the topological structure of the two-level inverter and includes: If the motor is equivalent to a resistive-inductive load, the common-mode voltage u of the two-level inverter is cm for: Among them, u aN 、u bN 、u cN They are A phase output voltage, B phase output voltage, and C phase output voltage respectively; According to the topological structure characteristics of the two-level inverter and the above formula (1), the common mode voltage u of the two-level inverter can be obtained: cm The switch function expression is: Among them, S i =1, indicating that the switch is turned on, S i =0, indicating that the switch is turned off, i=1, 2, 3; S 1 , S 2 , S 3 They represent the upper tube of phase A, phase B and phase C respectively; u dc is the DC side voltage of the two-level inverter.
4. The two-level inverter common mode voltage suppression method according to claim 3, It is characterized in that Determining the common mode voltage generated by different voltage vectors according to the switching function expression of the common mode voltage of the two-level inverter, and determining the voltage vector to be selected for synthesizing the reference voltage vector according to the magnitude of the common mode voltage generated by the different voltage vectors includes: The two-level inverter has a total of V 0 ~V 7 Eight voltage vectors, among which V 0 、V 7 is the zero voltage vector, located at the origin of the αβ coordinate system, V 1 、V 2 、V 3 、V 4 、V 5 、V 6 are six effective voltage vectors; V 0 ~V 7 Substituting the switching states of the eight voltage vectors into the above formula (2), the common mode voltages corresponding to different voltage vectors are obtained; Among them, the odd effective voltage vector V 1 、V 3 、V 5 Substituting the switching state into the above formula (2), the common mode voltage is Substitute the switching states of the even effective voltage vectors V 2 , V 4 , V 6 into the above formula (2), and the resulting common-mode voltage is The zero voltage vector V 7 Substituting the switching state into the above formula (2), the common mode voltage is u dc ; The zero voltage vector V 0 Substituting the switch state into the above formula (2), the resulting common mode voltage is 0; The odd effective voltage vector V 1 、V 3 、V 5 and zero voltage vector V 0 As the synthetic reference voltage vector V ref The voltage vector to be selected.
5. The two-level inverter common mode voltage suppression method according to claim 4, It is characterized in that The re-dividing of the vector synthesis sector according to the voltage vector to be selected for synthesizing the reference voltage vector under the condition of satisfying the vector synthesis principle comprises: Reference voltage vector V ref The synthetic reference voltage vector V ref The two adjacent odd effective voltage vectors in the voltage vector to be selected are synthesized and recorded as the odd effective voltage vector V to be selected. α 、V β According to the triangle sine theorem, we can get two odd effective voltage vectors V to be selected. α 、V β The duty cycle d α d β for: Among them, d α d β For two odd effective voltage vectors V α 、V β The duty cycle, d α ,d β All greater than 0; |V ref | is the reference voltage vector V ref The amplitude, u dc is the DC side voltage of the two-level inverter, θ is the reference voltage vector V ref Angle with the horizontal direction; According to the above formula (3), 0°<θ<120° is obtained; The vector synthesis sector is re-divided into three 120° sectors.
6. The two-level inverter common mode voltage suppression method according to claim 5, It is characterized in that The Clark transformation is performed on the three-phase modulation wave to transform the three-phase modulation wave from the three-phase stationary coordinate system to the two-phase stationary coordinate system to obtain the current reference voltage vector, and the sector where the current reference voltage vector is located is determined by using the current reference voltage vector and the sector division rule. According to the Clark transformation formula, the three-phase modulation wave is transformed to obtain the current reference voltage vector V Pref The real and imaginary parts of ; where the Clark transformation formula is as follows: Among them, u α 、u β They are the current reference voltage vector V Pref The real and imaginary parts of a 、u b 、u c is a three-phase modulation wave, u a = sin(ωt), ω is the angular velocity; According to the inverse sine transformation, the current reference voltage vector V is obtained Pref The angle θ with the horizontal direction is: According to the current reference voltage vector V Pref The angle θ with the horizontal direction determines the current reference voltage vector V Pref The sector where it is located.
7. The two-level inverter common mode voltage suppression method according to claim 6, It is characterized in that Set the reference voltage vector V ref The angle with the horizontal direction is θ, and the sector number is K: When 0°<θ<120°, K=1; When 120°<θ<240°, K=2; When 240°<θ<360°, K=3.
8. The method for suppressing common-mode voltage of a two-level inverter according to claim 7, It is characterized in that The step of obtaining the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected according to the current reference voltage vector, the sector where the current reference voltage vector is located, and the DC side voltage of the two-level inverter includes: Get the DC side voltage u of the two-level inverter dc ; Determine the sector number K according to the sector where the current reference voltage vector is located; The duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected are determined using the following formula: Among them, d Pα 、V Pβ They are the odd effective voltage vectors V to be selected α 、V β Duty cycle; d 0 is the zero voltage vector V 0 Duty cycle; u dc is the DC side voltage of the two-level inverter; |V Pref | is the current reference voltage vector V Pref The amplitude of θ is the current reference voltage vector V Pref The angle with the horizontal direction; K is the current reference voltage vector V Pref The sector number of the sector.
9. The two-level inverter common mode voltage suppression method according to claim 1, It is characterized in that The step of generating a corresponding PWM drive waveform according to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, and driving the inverter switch tube comprises: According to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, and in combination with the switching states of the zero voltage vector and the odd effective voltage vector to be selected, the switching time of the switch tube of the two-level inverter is obtained; According to the switching timing of the two-level inverter switch tube, a corresponding PWM drive waveform is generated to drive the inverter switch tube.
10. A two-level inverter common mode voltage suppression system, It is characterized in that The system comprises: The Clark transformation module is used to perform Clark transformation on the three-phase modulation wave based on the re-divided sectors under the traditional space vector modulation, transform the three-phase modulation wave from the three-phase stationary coordinate system to the two-phase stationary coordinate system, and obtain the current reference voltage vector; wherein, the sectors under the traditional space vector modulation are re-divided, specifically including: determining the common mode voltage generated by different voltage vectors according to the switching function expression of the common mode voltage of the two-level inverter, and determining the voltage vector to be selected for the synthetic reference voltage vector according to the magnitude of the common mode voltage generated by the different voltage vectors; and re-dividing the vector synthesis sector according to the voltage vector to be selected for the synthetic reference voltage vector under the condition of satisfying the vector synthesis principle; A sector determination module, used to determine the sector where the current reference voltage vector is located by using the current reference voltage vector and the sector division rule; wherein the voltage vector corresponding to the sector division rule includes an odd effective voltage vector and a zero voltage vector, and the angle between adjacent effective voltage vectors satisfies the vector synthesis principle; A voltage vector duty cycle obtaining module is used to obtain the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected according to the current reference voltage vector, the sector where the current reference voltage vector is located and the DC side voltage of the two-level inverter; The PWM drive signal generation module is used to generate a corresponding PWM drive waveform according to the duty cycle of the zero voltage vector and the duty cycle of the odd effective voltage vector to be selected, so as to drive the inverter switch tube.
Citation Information
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