A method and system for multi-lane traffic radar speed calibration

Abstract

The application relates to a multi-lane traffic radar speed calibration method and system, wherein the method comprises the following steps: a radar sends a radar signal to a first analog switch; a processor controls the first analog switch to switch pins, so that the radar signal enters an FMCW module for normal working mode filtering processing or enters a CW module for speed calibration mode filtering processing; then, the processor controls the pins of a second analog switch to switch, acquires signals filtered by different modules, and performs further signal processing, so that the problem of low sensitivity existing when the multi-lane radar speed precision is calibrated is solved, the difficulty of radar speed calibration is reduced, the steps of radar use are simplified, the working efficiency of radar installation is improved, and the speed measurement accuracy is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of road speed measurement, in particular to a multi-lane traffic radar speed calibration method and system. BACKGROUND

[0002] With technological innovation, traditional single-lane speed measurement radars will be gradually replaced by 24G multi-lane speed measurement radars. The multi-lane speed measurement radar greatly reduces the number of sensors used and saves costs while meeting the same functions as the single-lane speed measurement radar. According to relevant national traffic facility regulations, after the construction of a 24G millimeter wave speed measurement radar used for speed measurement law enforcement is completed, the speed accuracy of the radar needs to be calibrated.

[0003] In related technologies, when calibrating the speed measurement accuracy of a radar, if the speed variation of a vehicle is small, the calibration is very difficult and the sensitivity of the calibration is not high.

[0004] Currently, there is no effective solution to the problem of low sensitivity when calibrating the speed measurement accuracy of a multi-lane radar in related technologies. SUMMARY

[0005] Embodiments of the present application provide a multi-lane traffic radar speed calibration method and system to at least solve the problem of low sensitivity when calibrating the speed measurement accuracy of a multi-lane radar in related technologies.

[0006] In a first aspect, embodiments of the present application provide a multi-lane traffic radar speed calibration method, applied to a multi-lane traffic radar speed calibration system, the system comprising: a first analog switch, a second analog switch, an FMCW module, a CW module, and a processor, the method comprising:

[0007] The radar sends a radar signal to the first analog switch, and the processor controls the first analog switch to switch pins so that the radar signal enters the FMCW module for filtering processing in normal working mode or enters the CW module for filtering processing in speed calibration mode.

[0008] The processor controls the pins of the second analog switch to switch to obtain signals filtered by different modules for further signal processing.

[0009] In some embodiments, the radar signal enters the FMCW module for filtering processing in normal working mode or enters the CW module for filtering processing in speed calibration mode, comprising:

[0010] In the case where the radar signal enters the FMCW module, the FMCW module performs continuous frequency filtering processing on the radar signal.

[0011] In the case that the radar signal enters the CW module, the CW module performs constant frequency modulation filtering processing on the radar signal.

[0012] In some embodiments, the processor controls the first analog switch to switch the pin to include:

[0013] The processor controls the pin of the first analog switch to be in a low state, so that the radar signal enters the FMCW module;

[0014] The processor controls the pin of the first analog switch to be in a high state, so that the radar signal enters the CW module.

[0015] In some embodiments, the processor obtains signals filtered by different modules by controlling the pin switching of the second analog switch to include:

[0016] The processor controls the pin of the second analog switch to be in a low state, so that the signal filtered by the FMCW module is obtained;

[0017] The processor controls the pin of the second analog switch to be in a high state, so that the signal filtered by the CW module is obtained.

[0018] In a second aspect, the embodiments of the present application provide a system for multi-lane traffic radar speed calibration, the system comprising: a first analog switch, a second analog switch, an FMCW module, a CW module and a processor,

[0019] The radar sends a radar signal to the first analog switch, and the processor controls the first analog switch to switch the pin, so that the radar signal enters the FMCW module for filtering processing in a normal working mode, or enters the CW module for filtering processing in a speed calibration mode;

[0020] The processor obtains signals filtered by different modules by controlling the pin switching of the second analog switch, and performs further signal processing.

[0021] In some embodiments, in the case that the radar signal enters the FMCW module, the FMCW module performs continuous frequency modulation filtering processing on the radar signal;

[0022] In the case that the radar signal enters the CW module, the CW module performs constant frequency modulation filtering processing on the radar signal.

[0023] In some embodiments, the processor controls the pin of the first analog switch to be in a low level state, so that the radar signal enters the FMCW module;

[0024] The processor controls the pin of the first analog switch to be in a high level state, so that the radar signal enters the CW module.

[0025] In some embodiments, the processor controls the pin of the second analog switch to be in a low level state, so as to obtain the signal filtered by the FMCW module;

[0026] The processor controls the pin of the second analog switch to be in a high level state, so as to obtain the signal filtered by the CW module.

[0027] In some embodiments, the system further comprises a voltage module,

[0028] The voltage module is configured to supply power to the system.

[0029] In some embodiments, the system further comprises a bias voltage module,

[0030] The bias voltage module is configured to convert the voltage in the voltage module into a bias voltage through a voltage follower, and supply power to the filter circuit in the FMCW module and the CW module.

[0031] Compared with the related art, the multi-lane traffic radar speed calibration method provided by the embodiments of the present application is applied to a multi-lane traffic radar speed calibration system, which comprises a first analog switch, a second analog switch, an FMCW module, a CW module and a processor. Specifically, the radar sends a radar signal to the first analog switch, and the processor controls the first analog switch to switch the pin, so that the radar signal enters the FMCW module for filter processing in a normal working mode, or enters the CW module for filter processing in a speed calibration mode. Then, the processor controls the pin of the second analog switch to switch, so as to obtain the signal filtered by different modules for further signal processing. The method solves the problem of low sensitivity when calibrating the speed accuracy of the multi-lane radar, reduces the difficulty of radar speed calibration, simplifies the steps of using the radar, improves the working efficiency of radar installation, and improves the speed accuracy. BRIEF DESCRIPTION OF DRAWINGS

[0032] The drawings described herein are used to provide further understanding of the present application, and form a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0033] Figure 1is a structural block diagram of a multi-lane traffic radar speed calibration system according to an embodiment of the present application;

[0034] Figure 2 is a CW module circuit schematic diagram according to an embodiment of the present application;

[0035] Figure 3 is a FMCW module circuit schematic diagram according to an embodiment of the present application;

[0036] Figure 4 is a bias voltage module circuit schematic diagram according to an embodiment of the present application;

[0037] Figure 5 is a flow chart of a multi-lane traffic radar speed calibration method according to an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application is described and explained below in connection with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application. Based on the embodiments provided in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application. In addition, it can be understood that although the efforts made in this development process can be complex and lengthy, some designs, manufacturing or production changes made on the basis of the technical content disclosed in the present application by those of ordinary skill in the art related to the content disclosed in the present application are only routine technical means and should not be understood as insufficient disclosure of the present application.

[0039] In the present application, the phrase "embodiment" means that the specific features, structures or characteristics described in connection with the embodiment can be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily mean the same embodiment, nor is it an independent or alternative embodiment to other embodiments. It is explicitly and implicitly understood by those of ordinary skill in the art that the embodiments described in the present application can be combined with other embodiments without conflict.

[0040] Unless otherwise defined, technical terms and scientific terms used in the present application shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. Unless otherwise defined, the terms "one" and "a" or "an" used in this application do not denote a singular noun, but can include a plural noun or can be used in the same manner as the definite article "the". The terms "comprise", "comprising", "include", "including", "have", "having" and any variations thereof used in this application are intended to cover a non-exclusive inclusion. For example, a process, method, system, product or device that includes a list of steps or modules (units) is not limited to the listed steps or units, but can further include other steps or units not listed or can further include other steps or units inherent to such process, method, product or device. The terms "connect", "connected", "couple", "coupled" and similar terms used in this application are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The term "multiple" in this application means greater than or equal to two. The term "and / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, "A and / or B" can mean that A exists alone, A and B exist together, and B exists alone. The terms "first", "second", "third" and the like in this application are only to distinguish similar objects, and do not represent a specific order of the objects.

[0041] The embodiment provides a circuit system for multi-lane traffic radar speed calibration, Figure 1 The structure block diagram of the system for multi-lane traffic radar speed calibration according to the embodiment of the application is shown in Figure 1 The system comprises a first analog switch 10, an FMCW module 11, a CW module 12, a second analog switch 13 and a processor 14, wherein, a radar is further included to send a radar signal to the whole system.

[0042] Specifically, the radar sends a radar signal to the first analog switch 10, the processor 14 controls the pin switching of the first analog switch 10, so that the radar signal enters the FMCW module 11 for filtering processing in a normal working mode, or enters the CW module 12 for filtering processing in a speed calibration mode; then the processor 14 controls the pin switching of the second analog switch 13 to obtain the signals filtered by different modules for further signal processing.

[0043] Through the above system, the embodiment enables the radar to quickly switch between the normal working mode and the calibration mode through the analog switch switching circuit, and the mutual step interference enables the radar to effectively improve the sensitivity and the speed accuracy during the speed calibration in the CW calibration mode, solves the problem of low sensitivity during the calibration of the multi-lane radar speed accuracy, reduces the difficulty of the radar speed calibration, simplifies the steps of using the radar, and improves the working efficiency of the radar installation.

[0044] Figure 2 This is a schematic diagram of the CW module circuit according to an embodiment of this application. Figure 3 This is a circuit diagram of an FMCW module according to an embodiment of this application. Preferably, as shown below... Figure 2 As shown, the radar front end sends intermediate frequency radar signals IF and IFX to the first analog switch 10;

[0045] Example 1:

[0046] Processor 14 will switch the first analog switch 10 (i.e. Figure 2 The analog switch 1) in the radar is controlled to have its pins IN1 and IN2 at a low level. At this time, the intermediate frequency signals IF and IFX from the radar front end are output as signals IF_CH and IFX_CH via the first analog switch 10 and its pins NC1 and NC2. Then, the output radar signals IF_CH and IFX_CH enter... Figure 3 In the FMCW module 11, signal filtering processing is performed in the normal operating mode. Specifically, through... Figure 3 The operational amplifiers U1A, U1B, U1C, and U1D in the FMCW module 11, along with their respective resistors and capacitors, perform continuous frequency modulation filtering on the signals IF_CH and IFX_CH. After the amplification and processing described above, the output signals IF_CH_P and IF_CH_N are obtained. Finally, the processor 14 switches the second analog switch 13 (i.e.... Figure 2 The analog switch 2) is controlled to have its pins IN1 and IN2 at a low level, so that the signals IF_CH_P and IF_CH_N output by the FMCW module 11 enter the second analog switch 13 through the NC1 and NC2 pins, and are output as CH_P and CH_N signals through the second analog switch 13, which then enter the processor 14 for further signal processing.

[0047] During the above process, the radar operates in normal mode. Furthermore, preferably, the operational amplifier used in the FMCW module is a four-channel integrated operational amplifier GS8094, with relevant resistor and capacitor values ​​as follows: Figure 3 As shown.

[0048] Example 2:

[0049] Processor 14 will switch the first analog switch 10 (i.e. Figure 2 The analog switch 1) in the radar is controlled to have its pins IN1 and IN2 set to a high level. At this time, the intermediate frequency signals IF and IFX from the radar front end pass through the first analog switch 10 and its NO1 and NO2 pins to output signals IF_CH and IFX_CH. Then, the output radar signals IF_CH and IFX_CH enter... Figure 2The signal filtering process in the speed calibration mode is performed in the CW module 12. Specifically, the signals IF_CH and IFX_CH are subjected to constant frequency modulation filtering by the operational amplifiers U2A and U2B in the CW module 12. Figure 2 The operational amplifiers U2A and U2B in the CW module 12 perform constant frequency modulation filtering on the signals IF_CH and IFX_CH. Then, the signals IF_CH_P and IF_CH_N are output after the above amplification and filtering. Finally, the processor 14 controls the pins IN1 and IN2 of the analog switch 2 in the CW module 12 to be in the high state, so that the signals IF_CH_P and IF_CH_N output by the CW module 12 enter the second analog switch 13 through the pins NO1 and NO2, and are output as the signals CH_P and CH_N by the second analog switch 13, and then enter the processor 14 for further signal processing. Figure 2

[0050] In the above process, the radar is in the speed calibration mode. In addition, preferably, the model of the operational amplifier used in the CW module is GS8092, and the related resistance and capacitance are as shown in the following table. Figure 2

[0051] After the speed calibration is completed, the processor 14 sets the control pins of the analog switch to the low state, so that the radar enters the normal working mode. The fast switching between the speed calibration mode and the normal working mode of the radar is achieved, and the sensitivity of the calibration and the accuracy of the speed measurement are improved.

[0052] In some embodiments, the system further includes a voltage module for supplying power to the system. Specifically, the analog switch and the operational amplifier in the system are powered. It should be noted that the voltage in the present embodiment is 3.3V.

[0053] In some embodiments, the system further includes a bias voltage module, Figure 4 which is a bias voltage module circuit according to the present embodiment, as shown in the following table. Figure 4 The bias voltage module is used to convert the voltage VCC in the voltage module into the bias voltage VCC / 2 by the voltage follower of the operational amplifier U3, and supply the bias voltage to the filter circuits in the CW module and the FMCW module in the CW module and the FMCW module. Figure 2 Figure 3

[0054] Preferably, the model of the operational amplifier used in the bias voltage module is GS8721, and the related resistance and capacitance are as shown in the following table. Figure 4

[0055] ​​​​​The embodiment also provides a method for calibrating a multi-lane traffic radar speed, which is applied to a multi-lane traffic radar speed calibration system, and the system comprises a first analog switch 10, an FMCW module 11, a CW module 12, a second analog switch 13 and a processor 14.

[0056] Figure 5 A flowchart of the method for calibrating a multi-lane traffic radar speed according to the embodiment of the application is shown in FIG. 5, which comprises the following steps: Figure 5

[0057] In step S501, the radar sends a radar signal to the first analog switch 10, and the processor 14 controls the first analog switch 10 to switch the pin, so that the radar signal enters the FMCW module 11 for filtering processing in a normal working mode or enters the CW module 12 for filtering processing in a speed calibration mode.

[0058] Preferably, in the embodiment, the radar sends a radar signal to the first analog switch 10, and the processor 14 controls the first analog switch 10 to switch the pin.

[0059] Specifically, the processor 14 controls the pin of the first analog switch 10 to be in a low voltage state, so that the radar signal enters the FMCW module 11; and the processor 14 controls the pin of the first analog switch 10 to be in a high voltage state, so that the radar signal enters the CW module 12.

[0060] In the case that the radar signal enters the FMCW module 11, the FMCW module 11 performs continuous frequency filtering processing on the radar signal; and in the case that the radar signal enters the CW module 12, the CW module 12 performs constant frequency filtering processing on the radar signal.

[0061] In step S502, the processor 14 controls the pin of the second analog switch 13 to switch, so as to obtain signals filtered by different modules for further signal processing.

[0062] After obtaining the signals filtered by different modules through step S501, the processor 14 controls the pin of the second analog switch 13 to switch.

[0063] Specifically, the processor 14 controls the pin of the second analog switch 13 to be in a low voltage state, so as to obtain the signal filtered by the FMCW module 11; and the processor 14 controls the pin of the second analog switch 13 to be in a high voltage state, so as to obtain the signal filtered by the CW module 12.

[0064] Further, the signals filtered by different modules are sent to the processor 14 for further signal processing.

[0065] ​Through the steps S501 to S502, the embodiment makes the radar quickly switch between the normal working mode and the verification mode through the analog switch switching circuit, mutual step interference, so that the radar can effectively improve the sensitivity and the speed measurement accuracy when the radar is calibrated in the CW verification mode, solves the problem of low sensitivity when calibrating the speed measurement accuracy of the multi-lane radar, reduces the difficulty of radar speed calibration, simplifies the steps of using the radar, and improves the working efficiency of radar installation.

[0066] It should be noted that the specific examples in the embodiment can refer to the examples described in the above embodiments and optional implementation manners, and the embodiment will not be described here.

[0067] It should be noted that the steps shown in the above flow or the flowchart of the accompanying drawings can be executed in the above multi-lane traffic radar speed calibration system, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from here.

Claims

1. A method for multi-lane traffic radar speed calibration, applied to a multi-lane traffic radar speed calibration system, characterized in that, The system comprises a first analog switch, a second analog switch, an FMCW module, a CW module and a processor, and the method comprises: A radar sends a radar signal to the first analog switch, and the processor controls the first analog switch to switch pins so that the radar signal enters the FMCW module for filtering processing in a normal working mode or enters the CW module for filtering processing in a speed calibration mode. The processor acquires signals filtered by different modules by controlling pin switching of the second analog switch and performs further signal processing. The FMCW module comprises operational amplifiers U1A, U1B, U1C, U1D, a first resistor and a second resistor, wherein the positive input terminals of U1A and U1B are electrically connected to the first analog switch, the inverting input terminal of U1A is electrically connected to the inverting input terminal of U1B through the first resistor, the output terminal of U1A is electrically connected to the positive input terminal of U1D, the output terminal of U1B is electrically connected to the positive input terminal of U1C, the inverting input terminal of U1C is electrically connected to the inverting input terminal of U1D through the second resistor, and the output terminals of U1C and U1D are electrically connected to the second analog switch. The CW module comprises operational amplifiers U2A, U2B and a third resistor, wherein the positive input terminals of U2A and U2B are electrically connected to the first analog switch, the inverting input terminal of U1A is electrically connected to the inverting input terminal of U1B through the third resistor, and the output terminals of U2A and U2B are electrically connected to the second analog switch.

2. The method of claim 1, wherein, The radar signal enters the FMCW module for filtering processing in a normal working mode or enters the CW module for filtering processing in a speed calibration mode, which comprises: In the case that the radar signal enters the FMCW module, the FMCW module performs continuous frequency filtering processing on the radar signal. In the case that the radar signal enters the CW module, the CW module performs constant frequency filtering processing on the radar signal.

3. The method of claim 1, wherein, The processor controls the first analog switch to switch pins, which comprises: The processor controls the pin of the first analog switch to be in a low state, so that the radar signal enters the FMCW module. The processor controls the pin of the first analog switch to be in a high state, so that the radar signal enters the CW module.

4. The method of claim 1, wherein, The processor acquires signals filtered by different modules by controlling pin switching of the second analog switch, which comprises: The processor controls the pin of the second analog switch to be in a low state, so as to acquire signals filtered by the FMCW module. The processor controls the pin of the second analog switch to be in a high state, so as to acquire signals filtered by the CW module.

5. A system for calibrating multi-lane traffic radar speed measurement, characterized in that, The system comprises a first analog switch, a second analog switch, an FMCW module, a CW module and a processor, a radar sends a radar signal to the first analog switch, the processor controls the first analog switch to switch pins, so that the radar signal enters the FMCW module for filtering processing in normal working mode or enters the CW module for filtering processing in speed calibration mode; The processor obtains signals filtered by different modules by controlling the pin switching of the second analog switch and performs further signal processing; The FMCW module comprises operational amplifiers U1A, U1B, U1C and U1D, wherein the non-inverting input terminals of U1A and U1B are electrically connected to the first analog switch, the inverting input terminal of U1A is electrically connected to the inverting input terminal of U1B through a resistor, the output terminal of U1A is electrically connected to the non-inverting input terminal of U1D, the output terminal of U1B is electrically connected to the non-inverting input terminal of U1C, the inverting input terminal of U1C is electrically connected to the inverting input terminal of U1D through a resistor, and the output terminals of U1C and U1D are electrically connected to the second analog switch; The CW module comprises operational amplifiers U2A and U2B, wherein the non-inverting input terminals of U2A and U2B are electrically connected to the first analog switch, the inverting input terminal of U1A is electrically connected to the inverting input terminal of U1B through a resistor, and the output terminals of U2A and U2B are electrically connected to the second analog switch.

6. The system of claim 5, wherein In the case that the radar signal enters the FMCW module, the FMCW module performs continuous frequency filtering processing on the radar signal; In the case that the radar signal enters the CW module, the CW module performs constant frequency filtering processing on the radar signal.

7. The system of claim 5, wherein The processor controls the pin of the first analog switch to be in a low state, so that the radar signal enters the FMCW module; The processor controls the pin of the first analog switch to be in a high state, so that the radar signal enters the CW module.

8. The system of claim 5, wherein The processor controls the pin of the second analog switch to be in a low state, so that the signal filtered by the FMCW module is obtained; The processor controls the pin of the second analog switch to be in a high state, so that the signal filtered by the CW module is obtained.

9. The system of claim 5, wherein, The system further comprises a voltage module for supplying power to the system.

10. The system of claim 9, wherein, The system further comprises a bias voltage module, The bias voltage module is configured to convert the voltage in the voltage module into a bias voltage through voltage following by an operational amplifier, so as to supply power to the filtering circuit in the FMCW module and the CW module.

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