Adjustable voltage source and chip

Abstract

The application discloses an adjustable voltage source and a chip, and relates to the technical field of voltage sources, which comprises a voltage biasing module, a switch regulating module and an NMOS tube common-gate structure; the switch regulating module is connected between the voltage biasing module and the NMOS tube common-gate structure, and the switch regulating module comprises N pass devices and corresponding switch devices connected therewith, wherein the on-off state of each switch device is controlled by an external corresponding control signal to select the corresponding pass device, so that the voltage biasing module and the NMOS tube common-gate structure are connected in the corresponding electric quantity state; the NMOS tube common-gate structure comprises two common-gate structures, which are connected with the switch regulating module, and are used for outputting a reference voltage adapted to one or more pass devices after the voltage biasing module and the NMOS tube common-gate structure are connected.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of reference voltage source design, and relates to an adjustable voltage source and a chip. BACKGROUND

[0002] With the rapid development of the Internet of Things and portable devices, miniaturization, portability and low power consumption of devices have become the current development direction. As an important basic module of analog integrated circuits, the reference source circuit can provide a reference voltage that is not sensitive to power supply voltage, temperature and process variation, and is widely used in analog-to-digital converters, phase-locked loops and dynamic memories and other circuits. These circuits are the basis of various chips and electronic devices. When the types of working environments of various chips and electronic devices increase, the output of MOS tube is more sensitive to the process variation of MOS tube. When these circuits are designed using a differential circuit architecture, only a fixed output voltage is generated as the only reference voltage, which does not meet the improvement needs of various chips and electronic devices for voltage sources (including reference voltage sources). SUMMARY

[0003] In order to meet the improvement needs of various chips and electronic devices for voltage sources, the present application discloses an adjustable voltage source different from the differential circuit structure, and the specific technical solutions are as follows:

[0004] An adjustable voltage source, the voltage source comprising a voltage biasing module, a switch adjustment module and an NMOS tube common gate structure; the switch adjustment module is connected between the voltage biasing module and the NMOS tube common gate structure, and the switch adjustment module comprises N pass devices and corresponding switch devices connected therewith, wherein the on-off state of each switch device is controlled by an external corresponding control signal to select the corresponding pass device, so that the voltage biasing module and the NMOS tube common gate structure are connected in the corresponding electric quantity state; the NMOS tube common gate structure comprises two common gate structures, both of which are connected with the switch adjustment module, and are used to output a reference voltage suitable for one or more pass devices after the voltage biasing module and the NMOS tube common gate structure are connected; wherein N is an integer greater than or equal to 3.

[0005] Further, in the switch adjustment module, each pass device is connected between a preset output end of the voltage biasing module and a corresponding switch device, and each switch device is connected between a corresponding pass device and a preset input end of the NMOS tube common gate structure; the switch device is used to connect part or all of the pass devices between the voltage biasing module and the NMOS tube common gate structure under the control of the corresponding control signal, so as to realize the output of the reference voltage range by the NMOS tube common gate structure; wherein the reference voltage suitable for one or more pass devices falls within the reference voltage range.

[0006] Further, the pass device is a resistor; each resistor is connected in series with a corresponding switch device and forms a switch branch, and each switch branch is connected in parallel, so that when one or more switch devices are closed, the NMOS common-gate structure outputs the reference voltage range in the corresponding current range.

[0007] Further, the pass device is an NMOS transistor; the gate of each NMOS transistor is connected to its drain or to an external power supply, the substrate of each NMOS transistor is connected to an external power supply, the drain of each NMOS transistor is connected to a preset output terminal of the voltage bias module, the source of each NMOS transistor is connected to a corresponding switch device and forms a switch branch, and each switch branch is connected in parallel, so that when one or more switch devices are closed, the pass device connected between the voltage bias module and the NMOS common-gate structure by the switch device is used to adjust the reference voltage range output by the NMOS common-gate structure.

[0008] Further, the smaller the threshold voltage of the NMOS transistor connected between the voltage bias module and the NMOS common-gate structure, the smaller the reference voltage range allowed to be output by the NMOS common-gate structure; the larger the threshold voltage of the NMOS transistor connected between the voltage bias module and the NMOS common-gate structure, the larger the reference voltage range allowed to be output by the NMOS common-gate structure.

[0009] Further, each pass device corresponds to a transistor with the same width-length ratio; the NMOS transistor connected between the voltage bias module and the NMOS common-gate structure by the switch device is in a saturation state; when the NMOS transistor in a switch branch is not connected between the voltage bias module and the NMOS common-gate structure, the NMOS transistor is in an off state.

[0010] Further, the switch device is implemented using a transistor in an active device, which is configured to accept control of an external single-bit logic signal to switch the switch device between open and closed states.

[0011] Further, the NMOS tube common gate structure comprises a first common gate structure and a second common gate structure; the first common gate structure comprises a first NMOS tube and a second NMOS tube, and the second common gate structure comprises a third NMOS tube and a fourth NMOS tube; a connection point of a drain of the first NMOS tube and a drain of the third NMOS tube serves as a preset input end of the NMOS tube common gate structure, and is used for being connected with the switching device, so as to realize that a current output by the switching adjustment module to the drain of the first NMOS tube is equal to a current output by the switching adjustment module to the drain of the third NMOS tube; a connection point of a source of the third NMOS tube and a drain of the fourth NMOS tube serves as an output end of the NMOS tube common gate structure, and is used for outputting the reference voltage.

[0012] Further, in the first common gate structure, a gate of the first NMOS tube and a gate of the second NMOS tube are connected, a source of the first NMOS tube and a drain of the second NMOS tube are connected, a substrate of the second NMOS tube is connected with a ground wire, and a drain of the first NMOS tube is connected with the gate of the first NMOS tube; wherein a positive and negative attribute of a temperature coefficient of the first NMOS tube and a temperature coefficient of the second NMOS tube is different; in the second common gate structure, a gate of the third NMOS tube and a gate of the fourth NMOS tube are connected, a source of the third NMOS tube and a drain of the fourth NMOS tube are connected, a substrate of the fourth NMOS tube is connected with a ground wire, and a drain of the third NMOS tube is connected with the gate of the third NMOS tube; wherein a positive and negative attribute of a temperature coefficient of the third NMOS tube and a temperature coefficient of the fourth NMOS tube is different.

[0013] Further, a connection point of the drain of the first NMOS tube in the first common gate structure and the source of the second NMOS tube in the first common gate structure is connected with the source of the fourth NMOS tube in the second common gate structure.

[0014] Further, the substrate of the third NMOS tube and the substrate of the first NMOS tube are both connected with the output end of the NMOS tube common gate structure.

[0015] Further, the voltage biasing module comprises two PMOS tubes, and a connection point of a drain of each PMOS tube serves as a preset output end of the voltage biasing module.

[0016] Further, in the voltage biasing module, a source of each PMOS tube is connected with a gate of the PMOS tube, and the source of each PMOS tube is connected with an external power supply; wherein a substrate of each PMOS tube is connected with the external power supply.

[0017] A chip, which is internally provided with the voltage source.

[0018] Compared with the prior art, the adjustable voltage source disclosed by the application uses multiple switch branches in parallel as a switch adjustment module between a voltage bias module and a NMOS common-gate structure, and under the action of an external control signal, the corresponding switch branch is selected to change the change range of the voltage output by the NMOS common-gate structure, so that more precise voltage adjustment is realized, and when the related components of the switch adjustment module use active devices, the adjustable voltage source forms an adjustable reference voltage source, thereby solving the problem that the size of the reference voltage output by the same type of MOS tube in the existing partial differential circuit is limited.

[0019] The voltage bias module does not need to be additionally designed with a starting circuit, only needs a lower power supply voltage and a smaller bias current, and the entire circuit structure is simpler, and it is easier to provide a bias current for the switch adjustment module and the NMOS common-gate structure, and a mirror current suitable for a differential circuit does not need to be generated.

[0020] In addition, the NMOS common-gate structure is equivalent to being stacked by two common-gate structures, which reduces the generated power consumption; the NMOS common-gate structure uses the connection mode of the substrate, the source and the gate in the two common-gate structures to overcome the influence of body effect elimination, and the overall adjustable voltage source is designed as an unsymmetrical NMOS push-pull type topology, the NMOS common-gate structure uses the connection mode between the two common-gate structures to form a feedback connection structure, which is convenient for the switch adjustment module to adjust the reference voltage after eliminating the body effect, and the process and the threshold voltage are less affected by temperature changes. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 A structure diagram of an adjustable voltage source is disclosed for an embodiment of the application.

[0022] Figure 2 A structure diagram of a voltage bias module is disclosed for an embodiment of the application. DETAILED DESCRIPTION

[0023] The specific embodiments of the application will be further described below in combination with the drawings:

[0024] In order to meet the improvement needs of various chips and electronic equipment for voltage sources, including voltage range adjustment of output voltage (corresponding to meeting the precision requirements in the environment), and reducing the influence of external environmental temperature changes on the process and threshold voltage, the application discloses an adjustable voltage source, such as Figure 1As shown, the voltage source includes a voltage bias module, a switching regulation module, and an NMOS transistor common gate structure. The switching regulation module is connected between the voltage bias module and the NMOS transistor common gate structure. The switching regulation module includes N path devices (corresponding to Q1, Q2, ..., QN) and corresponding connected switching devices, used to transmit the bias current provided by the voltage bias module to the NMOS transistor common gate structure through the selected path devices; where N is an integer greater than or equal to 3 to accommodate MOS transistors with various threshold voltages; the on / off state of each switching device receives a corresponding external control signal (corresponding to...). Figure 1 The expected control signal [0:N-1] is used to select one or more corresponding path devices, so that the voltage bias module and the NMOS transistor common gate structure are connected in the corresponding electrical state. That is, the total current flowing between the voltage bias module and the NMOS transistor common gate structure changes due to the change in the number of path devices selected by the switching device. The NMOS transistor common gate structure includes two common gate structures, which are regarded as two common gate structures cascaded. Both common gate structures are connected to the switching adjustment module, which is used to output a reference voltage adapted to one or more path devices after the voltage bias module and the NMOS transistor common gate structure are connected, so as to form a reference voltage range, and form an adjustable reference voltage range by the adjustment action of the switching adjustment module. In this embodiment, the current information output by the switching adjustment module is input at a connection point where the two common gate structures coexist. This can reflect the situation where one or more path devices are selected by the corresponding switching device and bias current is introduced (equivalent to the connection situation of the voltage bias module and the NMOS transistor common gate structure). The difference in the magnitude of the current will affect the magnitude range of the reference voltage finally output by the NMOS transistor common gate structure.

[0025] As one example, such as Figure 1As shown, in the switch adjustment module, each pass device is connected between a preset output terminal S1 of the voltage bias module and a corresponding switch device (one of the switch devices S1-SN), one end (signal input end) of the pass device is connected with a preset output terminal S1 of the voltage bias module, and the other end (signal output end) of the pass device is connected with one end (signal input end) of the switch device; each switch device is connected between a corresponding pass device and a preset input terminal S2 of the NMOS common gate structure, the signal output end of the pass device is connected with one end (signal input end) of the switch device, and the other end (signal output end) of the switch device is connected with a preset input terminal S2 of the NMOS common gate structure, when the switch device is closed, the pass device is connected between the voltage bias module and the NMOS common gate structure to allow the corresponding bias current or part of the bias current generated by the voltage bias module to flow, and the electrical connection relationship between the voltage bias module and the NMOS common gate structure is established under the corresponding electrical state. The switch device is used to connect part or all of the pass devices between the voltage bias module and the NMOS common gate structure under the control of the corresponding control signal (expected control signal [0:N-1] corresponding to Figure 1 a bit of the expected control signal [0:N-1]) from the controller, so as to realize the change range of a series of bit positions of the expected control signal [0:N-1] under the control of the corresponding pass device, and then output different reference voltage ranges by the NMOS common gate structure, wherein the switch device can be used as a logic switch to control a bit of the expected control signal [i], and the bit of the expected control signal [i] can be used to control one end of the corresponding switch device (when the switch device is a MOS tube, the gate of the MOS tube is controlled); it should be noted that the reference voltage corresponding to one or more pass devices falls within the different reference voltage ranges, and in some embodiments, a full-scale voltage range with good linearity required in an analog-to-digital converter or a voltage source is formed.

[0026] Thus, the switching mechanism provided by the switching regulation module can be used to vary the current of various types of metal oxide semiconductor field effect (MOS) devices / transistors within the flow-through voltage bias module and the NMOS common-gate structure to obtain different reference voltages within a corresponding current or voltage fine-tuning range, where the variable properties of the devices themselves allow them to produce the desired reference voltage and / or the desired reference voltage fine-tuning range. For example, if the switching devices and / or the pass devices in the branches are implemented as NMOS transistors, one or more devices of appropriate size or type (NMOS, PMOS, threshold voltage, etc.) can be turned on to extend the regulation range of a certain range of reference voltages. Broadly speaking, the switching regulation module allows various devices with different properties to be switched in (i.e., used as pass devices Q1 through QN) to accommodate the current size of the flow at the desired specific reference voltage (falling within a new reference voltage range). The switching regulation module can be used to switch in or out various types of metal oxide semiconductor field effect (MOS) devices / transistors to fine-tune the reference voltage output by the NMOS common-gate structure within a wide regulation range of reference voltages without requiring a one-to-one correspondence between the MOS devices within the voltage bias module and the NMOS common-gate structure and the corresponding MOS devices (a subset of all the MOS devices) within the switching regulation module.

[0027] As an example, the pass devices are resistors; each resistor is connected in series with a corresponding switching device and forms a switching branch, i.e., a pass device and a switching device connected thereto form a switching branch, and each switching branch is connected in parallel, such that when one or more switching devices are closed, the NMOS common-gate structure outputs the range of reference voltages in the corresponding range of current states. In this example, even if the number of resistor devices and the corresponding switching devices increases, the small size of the sub-micron process devices is small enough that the effect of the increase in chip footprint does not significantly affect the overall quality of the voltage source and the chip using the voltage source, including the process and threshold voltage. Then the resistors are connected in parallel in the switching regulation module to form an impedance network, which provides finer granularity of reference voltage regulation for the NMOS common-gate structure within the threshold voltage range.

[0028] As another embodiment, the pass device is an NMOS transistor; in the switch regulating module, the gate of each NMOS transistor is connected to an external power supply VDD, or the gate of each NMOS transistor is connected to its drain, to provide bias current for the branch where the corresponding pass device and switch device are located, which can effectively reduce the chip area occupied by the voltage source relative to using a resistor as the pass device. The drain of each NMOS transistor is connected to a preset output terminal S1 of the voltage bias module, and the source of each NMOS transistor is connected to a corresponding switch device to form a level of switch branch, and each level of switch branch is connected in parallel, so that when one or more switch devices are closed, the pass device connected between the voltage bias module and the NMOS transistor common gate structure by the switch device is used to regulate the reference voltage range output by the NMOS transistor common gate structure, wherein the number of pass devices connected between the voltage bias module and the NMOS transistor common gate structure by the switch device affects the size of the output reference voltage range, the greater the number of pass devices connected, the wider the output reference voltage range is extended. Depending on the access and disconnection of the pass device composed of switching transistors (with different characteristics), various MOS transistor devices with different characteristics can be accessed (i.e., used as pass devices Q1 to QN) to obtain the desired specific reference voltage, further extending the reference voltage range. In some embodiments, controlling the back gate voltage of the NMOS transistor as the pass device can fine-tune the reference voltage range. Considering the influence of the body effect of the NMOS transistor, the substrate of the NMOS transistor is connected to the power supply VDD in this embodiment, avoiding the increase of the threshold voltage caused by the source potential of the NMOS transistor being higher than the body (P substrate or ground) potential of the NMOS transistor, solving the problem that the fine-tuning range is a proportional function of the body effect strength in the fine geometry process (deep submicron).

[0029] It should be noted that for a MOS transistor device, the wider the depletion region width at the channel caused by the lower substrate voltage than the source voltage, the higher the threshold voltage, i.e., the MOS transistor device has a body effect.

[0030] In some embodiments, in the switch regulating module, the smaller the threshold voltage of the NMOS transistor connected between the voltage bias module and the NMOS transistor common gate structure, the smaller the reference voltage range allowed by the NMOS transistor common gate structure to output; the greater the threshold voltage of the NMOS transistor connected between the voltage bias module and the NMOS transistor common gate structure, the greater the reference voltage range allowed by the NMOS transistor common gate structure to output. This is based on the gate-source voltage of each NMOS transistor, which is calculated using the square law model of MOSFET (metal-oxide semiconductor field effect transistor), which mainly depends on the threshold voltage of the NMOS transistor.

[0031] It is to be noted that the threshold voltage is usually the input voltage corresponding to the middle point of the sharp change of the output current with respect to the input voltage in the transfer characteristic curve of the MOS device (the function curve describing the output current as the vertical coordinate and the input voltage as the horizontal coordinate), at which the MOS device is in the critical conduction state, and the gate voltage of the MOS device is defined as the threshold voltage. In some specific applications, three types of MOS devices are provided, i.e. NMOS with low threshold voltage (LVT), NMOS with medium threshold voltage (MVT), and NMOS with high threshold voltage (HVT). In these types of MOS devices, the MOS with threshold voltage greater than 2V is the MOS with high threshold voltage (HVT), the MOS with threshold voltage less than 0.8V is the MOS with low threshold voltage (LVT), and the MOS with threshold voltage less than 2V and greater than 0.8V is the MOS with medium threshold voltage (MVT). In addition, the threshold voltage of the MOS device can be affected by one or more of the following: body effect, channel length, pressure, etc. In some embodiments, in the switch regulating module, when the NMOS with medium threshold voltage (MVT) is turned on between the voltage bias module and the NMOS common gate structure, but at the same time the NMOS with low threshold voltage (LVT) is turned off (corresponding to the connected switch device being opened), the reference voltage range output by the NMOS common gate structure becomes relatively small, thereby easily generating different reference voltage ranges.

[0032] Preferably, the transistors corresponding to each pass device have the same width-length ratio; the NMOS turned on between the voltage bias module and the NMOS common gate structure is in a saturation state; when the NMOS in the first stage switch branch is not connected between the voltage bias module and the NMOS common gate structure, the NMOS is in an off state. On this basis, the NMOS in different stages of the switch branch can be connected in parallel, which is equivalent to adjusting the overall width of the parallel NMOS, so that the reference voltage range is adjusted.

[0033] In the foregoing embodiments, the switching device is implemented using a transistor in an active device, which is configured to accept a single-bit logic signal from an external controller to switch the switching device between open and closed states. The transistor in the active device includes a triode, a diode, or a MOS tube, which can be a photo switch designed using a triode. The switching process between the open and closed states includes: a suitable current between the related pins to make the related pins conductive, similar to the closed switching device; and no current between the related pins, which makes the related pins appear high-impedance to the outside, similar to the open switching device. The logic signal can be converted into an analog signal through digital-to-analog conversion, and then applied to the transistor to control the transistor.

[0034] In summary, compared with the prior art, the adjustable voltage source disclosed in the present application uses a plurality of switching branches in parallel as a switching adjustment module between a voltage bias module and a NMOS tube common gate structure, and under the action of an external control signal, the corresponding switching branch is selected to change the voltage range of the voltage output by the NMOS tube common gate structure, so as to realize finer voltage adjustment. When the related components of the switching adjustment module use active devices, the adjustable voltage source forms an adjustable reference voltage source, solving the problem that the size of the reference voltage output by the same type of MOS tube in the existing partial differential circuit is limited.

[0035] In the embodiment applied to an analog-to-digital converter, the analog-to-digital converter generates a digital output signal by comparing an analog input signal with a reference voltage, wherein the reference voltage is output by the adjustable voltage source disclosed in the present application. The accuracy of the analog-to-digital converter directly depends on the parameters of the reference voltage, including speed, accuracy, and impedance. The purpose of configuring the speed is to generate the reference voltage fast enough to support the operation of the analog-to-digital converter at a corresponding speed. The purpose of configuring the accuracy is to allow the reference voltage to be adjusted to make the voltage provided by the analog-to-digital converter meet the actual voltage demand and be stable. The purpose of configuring the impedance is to configure the voltage source device generating the reference voltage as a low-impedance device, which in turn enhances the speed and accuracy of the reference voltage.

[0036] As an embodiment, the NMOS tube common gate structure includes a first-stage common gate structure and a second-stage common gate structure, corresponding to two cascaded common gate structures; in combination with Figure 1It can be seen that the first-stage common-gate structure includes a first NMOS transistor N11 and a second NMOS transistor N12, and the second-stage common-gate structure includes a third NMOS transistor N21 and a fourth NMOS transistor N22; a connection point of a drain of the first NMOS transistor N11 and a drain of the third NMOS transistor N21 serves as a preset input end S2 of the NMOS common-gate structure, and is used to be connected with the switching device, so that a current output from the switching regulation module to the drain of the first NMOS transistor N11 is equal to a current output from the switching regulation module to the drain of the third NMOS transistor N21, that is, when the switching regulation module is connected with the preset input end of the NMOS common-gate structure and the switching device is in a closed state, a bias current transmitted by the switching regulation module to the drain of the first NMOS transistor N11 is configured to be equal to a bias current transmitted by the switching regulation module to the drain of the third NMOS transistor N21. A connection point of a source of the third NMOS transistor N21 and a drain of the fourth NMOS transistor N22 serves as an output end of the NMOS common-gate structure, and is used to output the reference voltage Vout as the output of the reference voltage of the voltage source. Thus, the input and output ports of the NMOS common-gate structure are determined. In the first-stage common-gate structure, as shown in Figure 1 the gate of the first NMOS transistor N11 is connected with the gate of the second NMOS transistor N12. It should be noted that the common-gate structure can reduce the influence of node capacitance on bandwidth, correspondingly improve the bandwidth, has better isolation, high stability and good linearity. The source of the first NMOS transistor N11 is connected with the drain of the second NMOS transistor N12 to form a push-pull output, the substrate of the second NMOS transistor N12 is connected with the ground wire GND to avoid body effect, the drain of the first NMOS transistor N11 is connected with the gate of the first NMOS transistor N11, and the connection node of the drain of the first NMOS transistor N11 and the gate of the first NMOS transistor N11 is connected with the preset input end S2. The temperature coefficients of the first NMOS transistor and the second NMOS transistor are different in positive and negative properties; for example, when the temperature coefficient of the first NMOS transistor N11 is a positive temperature coefficient, the temperature coefficient of the second NMOS transistor N12 is a negative temperature coefficient. In the second-stage common-gate structure, as shown in Figure 1As shown, the gate of the second NMOS transistor N21 is connected to the gate of the second NMOS transistor N22, and the source of the second NMOS transistor N21 is connected to the drain of the second NMOS transistor N22 to form a push-pull output, wherein the temperature coefficients of the second NMOS transistor and the second NMOS transistor are different in positive and negative properties, for example, the temperature coefficient of the second NMOS transistor N21 is a positive temperature coefficient, and the temperature coefficient of the second NMOS transistor is a negative temperature coefficient. The substrate of the second NMOS transistor N22 is connected to the ground GND to avoid body effect, the drain of the second NMOS transistor N21 is connected to the gate of the second NMOS transistor N21, and the connection node of the drain of the second NMOS transistor N21 and the gate of the second NMOS transistor N21 is connected to the preset input S2. Preferably, the width-length ratio of the second NMOS transistor N21 is equal to the width-length ratio of the first NMOS transistor N11; the width-length ratio of the second NMOS transistor N22 is equal to the width-length ratio of the first NMOS transistor N12. The connection point of the drain of the first NMOS transistor N11 in the first common-gate structure and the source of the first NMOS transistor N12 in the first common-gate structure is connected to the source of the second NMOS transistor N22 in the second common-gate structure, realizing the communication between the first common-gate structure and the second common-gate structure. As shown in the figure, Figure 1 As shown, the substrate of the second NMOS transistor N21 and the substrate of the first NMOS transistor N11 are both connected to the output of the NMOS transistor common-gate structure, so as to realize the feedback of the output reference voltage Vout to the body potential of the second NMOS transistor N21 and the body potential of the first NMOS transistor N11, so as to feedback and adjust the reference voltage Vout after the body effect is eliminated.

[0037] In the above embodiment, four NMOS transistors of the same type are used to form a two-stage common-gate structure, and if the temperature coefficients of the two NMOS transistors in each common-gate structure are positive and negative respectively, the reference voltage Vout output by the NMOS transistor common-gate structure is less affected by temperature changes, and the threshold difference is formed by the short channel length effect of the two NMOS transistors to overcome the process deviation between the NMOS transistors, and through the two-stage common-gate structure stacking and feedback, the problem that the size of the reference voltage output by the same type of MOS transistor in the existing partial differential circuit is limited is solved. Since the NMOS transistor common-gate structure is equivalent to two common-gate structures stacked, the power consumption is reduced; the NMOS transistor common-gate structure uses the connection mode of the substrate, source and gate in the two common-gate structures to overcome the influence of body effect elimination, and the overall adjustable voltage source design is an unsymmetrical NMOS transistor push-pull topology, and the NMOS transistor common-gate structure uses the connection mode between the two common-gate structures to form a feedback connection structure, which is convenient for the switch adjustment module to adjust the reference voltage after the body effect is eliminated, and the process and threshold voltage are less affected by temperature changes.

[0038] As an embodiment, the voltage bias module includes two PMOS tubes, and the connection point of the drain of each PMOS tube is used as a preset output terminal S1 of the voltage bias module for connecting with any pass device in the switch regulating module. Specifically, in the voltage bias module, the source of each PMOS tube is connected with the gate of each PMOS tube, the source of each PMOS tube is connected with an external power supply, the gate of each PMOS tube is connected with an external power supply, and the substrate of each PMOS tube is connected with an external power supply, which corresponds to Figure 2 In the voltage bias module, the source of the first PMOS tube P1 is connected with the gate of the first PMOS tube P1, the gate of the first PMOS tube P1 is connected with a power supply VDD, the source of the first PMOS tube P1 and the substrate of the first PMOS tube P1 are connected with the power supply VDD to avoid body effect; the source of the second PMOS tube P2 is connected with the gate of the second PMOS tube P2, the gate of the second PMOS tube P2 is connected with the power supply VDD, the source of the second PMOS tube P2 and the substrate of the second PMOS tube P2 are connected with the power supply VDD to avoid body effect, so that the PMOS tube can eliminate body effect; the drain of the first PMOS tube P1 is connected with the drain of the second PMOS tube P2, and the connection node of the drain of the first PMOS tube P1 and the drain of the second PMOS tube P2 is a preset output terminal S1 of the voltage bias module, which is different from the branch structure of the mirror current generated in the differential circuit, so that the voltage bias module does not need to generate the mirror current suitable for the differential circuit, but the first-stage common-gate structure and the second-stage common-gate structure are configured to flow through the same bias current. When the power supply is powered on, there is no redundant zero current branch in the voltage bias module, so that the voltage source does not need to be additionally designed with a starting circuit, and the bias current is provided more directly and simply.

[0039] On the basis of the foregoing embodiment, the application further discloses a chip, which is internally provided with the voltage source, and is provided with the voltage biasing module, the switch regulating module and the NMOS tube common-gate structure on one or more silicon cores. The adjustable voltage source disclosed by the application uses a plurality of switch branches in parallel as the switch regulating module between the voltage biasing module and the NMOS tube common-gate structure, and under the action of an external control signal, the corresponding switch branch is selected to change the change range of the voltage output by the NMOS tube common-gate structure, so that more precise voltage regulation is realized, and when active devices are used for the related components of the switch regulating module, the adjustable voltage source forms an adjustable reference voltage source, thereby solving the problem that the size of the reference voltage output by the same type of MOS tube is limited in the existing partial differential circuit. The voltage biasing module does not need to be additionally designed with a starting circuit, only needs a lower power voltage and a smaller bias current, the whole circuit structure is simpler, and it is easier to provide bias current for the switch regulating module and the NMOS tube common-gate structure, and mirror current suitable for the differential circuit does not need to be generated. In addition, the NMOS tube common-gate structure is equivalent to being stacked by two common-gate structures, which reduces the generated power consumption; the NMOS tube common-gate structure uses the connection mode of the substrate, the source and the gate in the two common-gate structures to overcome the influence of the body effect, the whole adjustable voltage source is designed as an unsymmetrical NMOS tube push-pull type topology, the NMOS tube common-gate structure uses the connection mode between the two common-gate structures to form a feedback connection structure, which is convenient for the switch regulating module to regulate the reference voltage after eliminating the body effect, and the process and the threshold voltage are less affected by temperature.

[0040] Figure 1 The circuitry of the present application can be implemented as a separate module (e.g., a device with relevant elements and circuitry configured to perform a particular application or function) or as a plug-in module that plugs into a specialized hardware of an electronic device. It should be noted that certain embodiments of this application can be readily included in a system on chip (SOC), either in part, or in whole. An SOC represents an integrated circuit that integrates components of a computer or other electronic systems into a single chip. It can contain digital, analog, mixed-signal, and often radio-frequency functions on a single chip substrate. Other embodiments can include a multi-chip module (MCM), with a plurality of chips located within a single electronic package and configured to interact closely with each other through the electronic package. In various other embodiments, the functionality of amplification can be implemented in one or more silicon cores of application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), and other semiconductor chips.

[0041] Note that the activities discussed above with reference to the figures apply to any integrated circuit involving an adjustable voltage source. These integrated circuits can be used in applications involving data converters, reference voltage source designs, and signal processing, particularly those that can execute special software programs or algorithms in which the expected control signal [0:N-1] can be associated with applications that deal with digitized real-time data. Certain embodiments can involve multi-DSP signal processing, floating point processing, signal / control processing, fixed function processing, microcontroller applications, etc.

[0042] In certain contexts, the features discussed herein can be applicable to medical systems, scientific instruments, wireless and wired communications, radar, industrial process control, audio and video equipment, current detection, instrumentation (which can be highly accurate), and other digitally processed systems.

[0043] In the discussion of the above embodiments, the capacitors, clocks, D flip-flops, dividers, inductors, resistors, amplifiers, switches, digital cores, transistors, and / or other components can be easily replaced, substituted, or otherwise modified to accommodate particular circuit needs. In addition, it should be noted that the use of complementary electronics, hardware, software, etc. provide equally viable options for implementing the teachings of the present application.

[0044] In one example embodiment, any number of the circuits of the figures can be implemented on a circuit board of an associated electronic device. The circuit board can be a general circuit board that is capable of holding the various components of an internal electronic system of the electronic device and can also provide connectors for other peripheral devices. More specifically, the board can provide the electrical connections by which the other parts of the system can communicate electrically. Any suitable processors (including digital signal processors, microprocessors, chip set systems, support circuits, etc.) can be desirably coupled to the circuit board as appropriate for the particular configuration, processing demands, computer designs, etc. The non-transitory computer readable memory elements of the system can be desirably coupled to the circuit board as well. Other components such as external storage, additional sensors, control buttons, and peripheral devices can be attached to the circuit board as plug-in cards, as shown, via cables, or integrated thereinto as appropriate. In various embodiments, the functions described herein can be implemented in software or firmware in an emulated form as software or firmware on one or more configurable (e.g., programmable) elements arranged in a structure that supports the functions described herein. The software or firmware providing the emulation can be provided on non-transitory computer readable storage medium including instructions that permit a processor to perform the functions described.

[0045] Further, certain embodiments discussed above can be configured in digital signal processing technology for medical imaging, patient monitoring, medical instrumentation, and home healthcare. This can include lung displays, accelerometers, heart rate monitors, cardiac pacemakers, etc. Other applications can involve safety systems for automotive technology (e.g., stability control systems, driver assistance systems, braking systems, infotainment, and any type of interior applications). Further, power systems (e.g., in hybrid and electric vehicles) can use high-precision data conversion products for battery monitoring, control systems, reporting controls, maintenance activities, etc.

[0046] In further example scenarios, the teachings of the present application can be applicable to the industrial market, including process control systems, to help drive efficiency, energy efficiency, and reliability. In consumer applications, the teachings of the signal processing circuitry discussed above can be used for image processing, auto focus, and image stabilization (e.g., for digital still cameras, video cameras, etc.). Other consumer applications can include audio and video processors for home theater systems, DVD recorders, and high-definition televisions. However, other consumer applications can involve advanced touch screen controllers (e.g., for any type of portable media device). Thus, such technology can easily be part of smartphones, tablets, security systems, personal computers, gaming technology, virtual reality, simulation training, etc.

[0047] It is noted that for many of the examples provided herein, interaction can be described in terms of two, three, four, or more electronic components. This is done for purposes of clarity and example only. It should be appreciated that the system can be consolidated in any suitable manner. Along similar design alternatives, any of the illustrated components, modules, and elements of the figures can be combined in various possible configurations, all of which are clearly within the broad scope of this specification. In certain cases, it can be easier to describe one or more functions and features of a given flow by referencing an enumerated electronic component. However, it should be appreciated that such references are used only for purposes of clarity and that such one or more functions and features can be implemented more generally in any desired manner. Along similar design alternatives, functions of a set of flows can be implemented in varying order or concurrently, and with other functions not exactly as described in one portion of this disclosure. It is therefore earnestly requested that all these alternatives be fully considered and that not be limited to the use of the words "first" and "second" to refer to a single prior claim element, or to physically position one indicated element before or after another indicated elements are physically placed. Further, the features and attributes of the specific example embodiments recited herein can be configured in various ways and can include multiple alternative functionalities. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the scope of the examples. Accordingly, the phraseology or terminology employed herein, and not the terminology used solely for the purpose of description, should be understood strictly in a contextual sense and is not intended to limit the intended example in any manner.

Claims

1. An adjustable voltage source, characterized by, The voltage source comprises a voltage biasing module, a switch regulating module and a NMOS tube common-gate structure; The switch regulating module is connected between the voltage biasing module and the NMOS tube common-gate structure, and comprises N pass devices and corresponding switch devices connected therewith, wherein the on-off state of each switch device is controlled by a corresponding control signal from outside to select the corresponding pass device, so that the voltage biasing module and the NMOS tube common-gate structure are connected in a corresponding state; The NMOS tube common-gate structure comprises two common-gate structures, which are connected with the switch regulating module and used to output a reference voltage adapted to one or more pass devices after the voltage biasing module and the NMOS tube common-gate structure are connected; N is an integer greater than or equal to 3; the pass device is a resistor or a NMOS tube; The NMOS tube common-gate structure comprises a first common-gate structure and a second common-gate structure; The first common-gate structure comprises a first NMOS tube and a second NMOS tube, and the second common-gate structure comprises a third NMOS tube and a fourth NMOS tube; A connection point of the drain of the first NMOS tube and the drain of the third NMOS tube serves as a preset input end of the NMOS tube common-gate structure, and is used to be connected with the switch device to make the current output from the switch regulating module to the drain of the first NMOS tube equal to the current output from the switch regulating module to the drain of the third NMOS tube; A connection point of the source of the third NMOS tube and the drain of the fourth NMOS tube serves as an output end of the NMOS tube common-gate structure, and is used to output the reference voltage; In the first common-gate structure, the gate of the first NMOS tube is connected with the gate of the second NMOS tube, the source of the first NMOS tube is connected with the drain of the second NMOS tube, the substrate of the second NMOS tube is connected with a ground wire, and the drain of the first NMOS tube is connected with the gate of the first NMOS tube; wherein the temperature coefficients of the first NMOS tube and the second NMOS tube are different in positive and negative attributes; In the second common-gate structure, the gate of the third NMOS tube is connected with the gate of the fourth NMOS tube, the source of the third NMOS tube is connected with the drain of the fourth NMOS tube, the substrate of the fourth NMOS tube is connected with a ground wire, and the drain of the third NMOS tube is connected with the gate of the third NMOS tube; wherein the temperature coefficients of the third NMOS tube and the fourth NMOS tube are different in positive and negative attributes; The connection point of the drain of the first NMOS tube in the first common-gate structure and the source of the second NMOS tube in the first common-gate structure is connected with the source of the fourth NMOS tube in the second common-gate structure; The substrate of the third NMOS tube and the substrate of the first NMOS tube are both connected with the output end of the NMOS tube common-gate structure.

2. The voltage source of claim 1, wherein, Each of the pass devices is connected between a preset output terminal of the voltage bias module and a corresponding switch device, and each of the switch devices is connected between a corresponding pass device and a preset input terminal of the NMOS tube common-gate structure; the switch device is used to connect some or all of the pass devices between the voltage bias module and the NMOS tube common-gate structure under the control of the corresponding control signal, so as to realize the output of the reference voltage range by the NMOS tube common-gate structure; wherein the reference voltage corresponding to one or more pass devices falls within the reference voltage range.

3. The voltage source of claim 2, wherein, Each of the resistors is connected in series with a corresponding switch device and forms a first switch branch, and each of the first switch branches is connected in parallel, so that when one or more switch devices are closed, the NMOS tube common-gate structure outputs the reference voltage range under the corresponding range of current states.

4. The voltage source of claim 2, wherein, In the switch adjustment module, the gate of each NMOS tube is connected with the drain of the NMOS tube or connected with an external power supply, the substrate of each NMOS tube is connected with an external power supply, the drain of each NMOS tube is connected with a preset output terminal of the voltage bias module, the source of each NMOS tube is connected with a corresponding switch device and forms a first switch branch, and each of the first switch branches is connected in parallel, so that when one or more switch devices are closed, the pass device connected between the voltage bias module and the NMOS tube common-gate structure by the switch device is used to adjust the reference voltage range output by the NMOS tube common-gate structure.

5. The voltage source of claim 4, wherein, The smaller the threshold voltage of the NMOS tube connected between the voltage bias module and the NMOS tube common-gate structure, the smaller the reference voltage range allowed to be output by the NMOS tube common-gate structure; The larger the threshold voltage of the NMOS tube connected between the voltage bias module and the NMOS tube common-gate structure, the larger the reference voltage range allowed to be output by the NMOS tube common-gate structure.

6. The voltage source of claim 4, wherein, The transistors corresponding to each of the pass devices have the same width-length ratio; the NMOS tube connected between the voltage bias module and the NMOS tube common-gate structure by the switch device is in a saturation state; When the NMOS tube in the first switch branch is not connected between the voltage bias module and the NMOS tube common-gate structure, the NMOS tube is in an off state.

7. The voltage source of claim 3 or 4, wherein, The switch device is implemented by using a transistor in an active device, and is configured to accept the control of an external single-bit logic signal, so as to realize the switching of the switch device between the on and off states.

8. The voltage source of claim 1, wherein, The voltage bias module includes two PMOS tubes, and the connection point of the drain of each PMOS tube serves as a preset output terminal of the voltage bias module.

9. The voltage source of claim 8, wherein, In the voltage bias module, the source of each PMOS tube is connected with the gate of the PMOS tube, and the source of each PMOS tube is connected with an external power supply. The substrate of each PMOS tube is connected with an external power supply.

10. A chip, characterized by The chip is internally provided with the voltage source of any one of claims 1 to 9.

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