Boron-doped selective emitter, fabrication method and N-type solar cell

Abstract

The present invention provides a boron-doped selective emitter, a preparation method and an N-type solar cell, the preparation method comprising: pre-treating an N-type silicon wafer; preparing a boron-doped polysilicon layer on the front of the pre-treated N-type silicon wafer by low-pressure vapor deposition to obtain a semi-finished product; sequentially laser doping and annealing the semi-finished product to obtain a boron-doped selective emitter; the boron-doped polysilicon layer comprises a silicon deposition layer and a boron deposition layer, and the silicon deposition layer and the boron deposition layer are stacked. The present invention is based on a low-pressure chemical vapor deposition process, and can prepare a high-doping concentration boron-doped selective emitter at a low temperature and a short process time, which not only reduces the recombination of the metal contact area and the non-metal area of ​​the emitter, ensuring the doping efficiency, but also increases the ohmic contact characteristics of the metal grid line and the semiconductor part, and increases the fill factor, thereby improving the photoelectric conversion efficiency of the N-type solar cell.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a boron-doped selective emitter, a preparation method and an N-type solar cell. Background Art

[0002] The semiconductor formed by doping trace amounts of other appropriate elements in intrinsic semiconductors such as silicon or germanium is called an impurity semiconductor. Depending on the doped elements, impurity semiconductors can be divided into N-type semiconductors and P-type semiconductors.

[0003] P-type semiconductors are also called hole-type semiconductors, that is, impurity semiconductors with hole concentrations far greater than free electron concentrations. P-type semiconductors can be formed by doping trivalent elements (such as boron) into pure silicon crystals to replace the position of silicon atoms in the lattice. In P-type semiconductors, holes are majority carriers and free electrons are minority carriers. P-type semiconductors mainly rely on holes for conductivity. Holes are mainly provided by impurity atoms, and free electrons are formed by thermal excitation. Therefore, the more impurities doped into P-type semiconductors, the higher the concentration of majority carriers (holes) and the stronger the conductivity. In contrast to P-type semiconductors, the free electron concentration in N-type semiconductors is far greater than the hole electron concentration. The doped impurities are pentavalent elements, free electrons are mainly provided by impurity atoms, and holes are formed by thermal excitation. By using different doping processes, P-type semiconductors and N-type semiconductors can be made on the same silicon wafer, so that the interface forms a spatial PN junction. The PN junction has unidirectional conductivity, thus serving as the core structure of crystalline silicon solar cells.

[0004] At present, the technology of PERC cells (Passivated Emitter and Rear Cell) among crystalline silicon solar cells is the mainstream. With the arrival of the bottleneck of PERC efficiency limit and the continuous improvement of the conversion efficiency of solar cells, TOPCon solar cell technology has received more and more attention, and more research has been invested in TOPCon cell technology. Among them, in N-type TOPCon solar cell technology, selective boron emitter technology has become the focus of industry research.

[0005] In the related technology, a high-temperature diffusion process using BBr3 or BCl3 as a doping source is mainly used to perform boron diffusion deposition on the front of an N-type silicon wafer, and then a selective boron emitter is prepared by laser doping. During the preparation process, not only is the boron diffusion doping efficiency on the front of the N-type silicon wafer low, it is difficult to form a high surface concentration, which will reduce the ohmic contact, increase the contact resistance, and ultimately reduce the fill factor and efficiency, but also a long high-temperature process is required (the diffusion time is as long as 3 hours, and the temperature is as high as 1000°C), which causes serious damage to the surface of the silicon wafer, resulting in increased recombination of the metal contact area and the non-metal area, reducing the open circuit voltage, and seriously affecting the conversion efficiency of the solar cell. Summary of the invention

[0006] The present invention provides a boron-doped selective emitter, a preparation method and an N-type solar cell, which are used to solve or improve the problems of low doping efficiency, long diffusion time and high temperature in the current selective emitter prepared based on the boron diffusion process.

[0007] The present invention provides a method for preparing a boron-doped selective emitter, comprising:

[0008] Pre-treating N-type silicon wafers;

[0009] On the front side of the pre-treated N-type silicon wafer, a boron-doped polysilicon layer is prepared by low-pressure vapor deposition to obtain a semi-finished product;

[0010] The semi-finished product is sequentially laser doped and annealed to obtain a boron-doped selective emitter;

[0011] The boron-doped polysilicon layer includes a silicon deposition layer and a boron deposition layer, and the silicon deposition layer and the boron deposition layer are distributed in a stacked manner.

[0012] According to a method for preparing a boron-doped selective emitter provided by the present invention, before preparing the boron-doped polysilicon layer, the method further comprises:

[0013] A tunneling oxide layer is prepared on the front side of an N-type silicon wafer by using a dry oxidation process.

[0014] According to a method for preparing a boron-doped selective emitter provided by the present invention, the step of preparing a tunneling oxide layer on the front side of an N-type silicon wafer by using a dry oxidation process comprises:

[0015] Oxygen with a first mass flow rate is introduced into the vacuum environment where the N-type silicon wafer is located, and the N-type silicon wafer is oxidized for a first time under first temperature and first pressure conditions to prepare a tunneling oxide layer with a first thickness on the front side of the N-type silicon wafer.

[0016] According to a method for preparing a boron-doped selective emitter provided by the present invention, the first temperature is 500-600°C, the first mass flow rate is 5-40slm, the first pressure is a standard atmospheric pressure, the first time is 5-20min, and the first thickness is 1-2nm.

[0017] According to a method for preparing a boron-doped selective emitter provided by the present invention, the step of preparing a boron-doped polysilicon layer on the front side of an N-type silicon wafer by vapor deposition comprises:

[0018] In a first deposition step, a silicon source with a second mass flow rate is introduced into the vacuum environment where the N-type silicon wafer is located, and a first silicon deposition layer is vapor-deposited on the N-type silicon wafer under the conditions of a second temperature and a second pressure, and the deposition time is controlled to be a second duration;

[0019] In a second deposition step, a boron source with a third mass flow rate is introduced into the vacuum environment where the N-type silicon wafer is located, and a boron deposition layer is vapor-deposited on the first silicon deposition layer under the conditions of a second temperature and a third pressure, and the deposition time is controlled to be a third duration;

[0020] In the third deposition step, a silicon source with a fourth mass flow rate is introduced into the vacuum environment where the N-type silicon wafer is located, and vapor deposition of a second silicon deposition layer is performed on the boron deposition layer under the conditions of a second temperature and a fourth pressure, and the deposition time is controlled to be a fourth time length.

[0021] According to a method for preparing a boron-doped selective emitter provided by the present invention, at least one process cycle is performed according to the process operation sequence from the first deposition step to the third deposition step.

[0022] According to a method for preparing a boron-doped selective emitter provided by the present invention, the second mass flow rate is 300-1200sccm, the second pressure is 70-300mtorr, and the second time length is 2-20min; and / or, the third mass flow rate is 200-1000sccm, the third pressure is 50-150mtorr, and the third time length is 1-10min; and / or, the fourth mass flow rate is 300-1200sccm, the fourth pressure is 70-300mtorr, and the fourth time length is 2-20min.

[0023] According to a method for preparing a boron-doped selective emitter provided by the present invention, a boron-doped polysilicon layer is prepared on the front side of an N-type silicon wafer by low-pressure chemical vapor deposition in a low-pressure chemical vapor deposition furnace;

[0024] Before low-pressure vapor deposition of N-type silicon wafers, it also includes:

[0025] Vacuuming and purging the low-pressure chemical vapor deposition furnace to remove oxygen from the low-pressure chemical vapor deposition furnace;

[0026] Performing airtightness testing on the low-pressure chemical vapor deposition furnace;

[0027] The low pressure chemical vapor deposition furnace is preheated to a second temperature, and the heating time is controlled to be a fifth duration.

[0028] The present invention also provides a boron-doped selective emitter, which is prepared by using the method for preparing a boron-doped selective emitter as described in any one of the above items.

[0029] The present invention also provides an N-type solar cell, wherein the N-type solar cell comprises the boron-doped selective emitter as described above.

[0030] The present invention further provides an electrical device, wherein the electrical device comprises the N-type solar cell as described above.

[0031] The present invention provides a boron-doped selective emitter, a preparation method and an N-type solar cell. When preparing the boron-doped selective emitter, a low-pressure chemical vapor deposition process is adopted to form a boron-doped polysilicon layer on the front side of an N-type silicon wafer in a relatively low temperature environment through a multi-step deposition method within a relatively short process time. Then, the semi-finished product obtained by vapor deposition is subjected to laser heavy doping and annealing in sequence to prepare a boron-doped PN junction and obtain a finished boron-doped selective emitter.

[0032] Compared with the problems of low emitter doping concentration, high process temperature and long process time, resulting in high recombination in the metal contact area and low fill factor in the preparation of selective emitters by boron diffusion process, the present invention adopts a low-pressure chemical vapor deposition method to effectively control the doping concentration and junction depth of the emitter area, reduce the recombination of the metal contact area and the non-metal area, increase the concentration of the heavily doped area of ​​the selective emitter (SE), increase the ohmic contact characteristics of the metal grid line and the semiconductor part, reduce the contact resistance, increase the fill factor, and thus improve the photoelectric conversion efficiency of the N-type solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 This is one of the schematic flow diagrams of the method for preparing a boron-doped selective emitter provided by the present invention;

[0035] Figure 2 is a schematic diagram of the structure of a boron-doped selective emitter prepared by using Example 1 of the present invention;

[0036] Figure 3 is a schematic diagram of the structure of a boron-doped selective emitter prepared by Example 2 of the present invention;

[0037] Figure 4 is a schematic diagram of the structure of a boron-doped selective emitter prepared by using Example 3 of the present invention;

[0038] Reference numerals:

[0039] 1: N-type silicon wafer; 2: tunneling oxide layer; 3: pre-deposition layer;

[0040] 4: first silicon deposition layer; 5: boron deposition layer; 6: second silicon deposition layer;

[0041] 7: Silicon cover layer. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] In the present invention, unless otherwise specified, the numerical range "ab" represents an abbreviation of any real number combination between a and b, including a and b, and both a and b are real numbers. For example, the numerical range "800-900" means that all real numbers between "800-900" have been listed in this document, and "800-900" is just an abbreviation of these numerical combinations.

[0044] The “range” disclosed in the present invention is in the form of a lower limit and an upper limit, which can be one or more lower limits, and one or more upper limits, respectively.

[0045] Combine the following Figure 1-Figure 4 The invention describes a boron-doped selective emitter, a preparation method and an N-type solar cell.

[0046] like Figure 1 As shown, this embodiment provides a method for preparing a boron-doped selective emitter, comprising the following steps:

[0047] Step 110, pre-treating the N-type silicon wafer;

[0048] Step 120, preparing a boron-doped polysilicon layer on the front side of the pretreated N-type silicon wafer by low-pressure vapor deposition to obtain a semi-finished product;

[0049] Step 130, laser doping and annealing are performed on the semi-finished product in sequence to obtain a boron-doped selective emitter; wherein the boron-doped polysilicon layer includes a silicon deposition layer and a boron deposition layer, and the silicon deposition layer and the boron deposition layer are distributed in a stacked manner.

[0050] Specifically, when preparing a boron-doped selective emitter, this embodiment adopts a low-pressure chemical vapor deposition process, and can form a boron-doped polysilicon layer on the front side of an N-type silicon wafer in a relatively low temperature environment through a multi-step deposition method within a shorter process time. Then, the semi-finished product obtained by vapor deposition is subjected to laser heavy doping and annealing in sequence to prepare a boron-doped PN junction and obtain a finished boron-doped selective emitter.

[0051] Compared with the problems of low emitter doping concentration, high process temperature and long process time, high recombination in the metal contact area, low fill factor, etc., which exist in the preparation of selective emitters by boron diffusion process, the present invention adopts a low-pressure chemical vapor deposition method to effectively control the boron doping concentration and junction depth in the emitter area, reduce damage to the silicon wafer surface, reduce the recombination between the metal contact area and the non-metal area, increase the concentration of the heavily doped area of ​​the selective emitter (SE), increase the ohmic contact characteristics of the metal grid line and the semiconductor part, reduce the contact resistance, increase the fill factor, and thus improve the photoelectric conversion efficiency of the N-type solar cell.

[0052] It should be pointed out here that, in the above process steps, the step of pre-treating the N-type silicon wafer includes: performing a texturing process and a cleaning process on the N-type silicon wafer.

[0053] Here, the texturing process utilizes the anisotropic corrosion property of alkali on single crystal silicon, that is, the corrosion rate of the alkali is inconsistent in different crystal directions of single crystal silicon, and the single crystal silicon wafer is corroded into a silicon wafer with a pyramid-shaped surface to increase the light-receiving area of ​​the solar cell surface, reduce the reflectivity, and thus improve the photoelectric conversion efficiency of the solar cell.

[0054] At the same time, this embodiment prepares a boron-doped polysilicon layer on the front side of the N-type silicon wafer by vapor deposition in order to prepare a P-type semiconductor on the front side of the N-type silicon wafer and ensure the boron doping concentration in the boron-doped polysilicon layer, so as to provide sufficient boron source for subsequent laser doping to ensure the effect of laser doping. Since the process temperature in the process of preparing the boron-doped polysilicon layer is relatively low, this embodiment is also based on an annealing treatment method to help the formation of a boron-doped PN junction, thereby finally obtaining a boron-doped selective emitter product.

[0055] Among them, the boron-doped polysilicon layer shown in this embodiment may include multiple silicon deposition layers and multiple boron deposition layers, and the multiple silicon deposition layers and the multiple boron deposition layers are arranged in a stacked manner. The specific arrangement may be an alternating arrangement. For example, the boron-doped polysilicon layer may be formed by alternating silicon deposition layers and boron deposition layers to form a stacked structure, and one or two silicon deposition layers are provided between two adjacent boron deposition layers. Of course, the boron-doped polysilicon layer may also select other stacked arrangement structures, which are not specifically limited here, so as to meet the design structure of the boron doping concentration as much as possible.

[0056] In some embodiments, before preparing the boron-doped polysilicon layer, the preparation method shown in this embodiment further includes: preparing a tunneling oxide layer on the front side of the N-type silicon wafer by using a dry oxidation process in a low-pressure chemical vapor deposition furnace.

[0057] Here, the tunneling oxide layer shown in this embodiment is a silicon dioxide layer obtained by oxidizing the front side of the N-type silicon wafer. This embodiment forms a tunneling oxide layer on the front side of the N-type silicon wafer, which is beneficial to the collection of majority holes, blocks the surface recombination of minority electrons, and improves the passivation performance of the selective emitter on the front side of the N-type silicon wafer.

[0058] Specifically, the dry oxidation process shown in this embodiment is used to prepare a tunneling oxide layer on the front side of the N-type silicon wafer, including but not limited to the following steps:

[0059] Controlling the temperature in the low-pressure chemical vapor deposition furnace to reach a first temperature, and evacuating the low-pressure chemical vapor deposition furnace;

[0060] introducing a first mass flow rate of oxygen into the low pressure chemical vapor deposition furnace;

[0061] When the first pressure is reached in the low-pressure chemical vapor deposition furnace, the oxygen supply is stopped, and the N-type silicon wafer is controlled to be oxidized in the low-pressure chemical vapor deposition furnace for a first time to prepare a tunneling oxide layer of a first thickness on the front side of the N-type silicon wafer.

[0062] In the above process, this embodiment controls the first temperature in the low-pressure chemical vapor deposition furnace to be 500-600°C. For example, the first temperature can be specifically set to 500°C, 525°C, 550°C, 580°C and 600°C, etc., which is not specifically limited here.

[0063] In this embodiment, the first mass flow rate of oxygen is set to 5-40 slm. For example, the first mass flow rate can be 5 slm, 10 slm, 25 slm, 30 slm, 35 slm and 40 slm, etc., which are not specifically limited here. While controlling the oxygen mass flow rate, the oxygen supply time can also be set to 5-15 minutes in this embodiment.

[0064] In order to reduce the difficulty of process control, the first pressure is set to a standard atmospheric pressure in this embodiment. That is, this embodiment selects to perform a dry oxidation process on the N-type silicon wafer at normal pressure to prepare a tunneling oxide layer on the front side of the N-type silicon wafer.

[0065] In order to ensure the thickness of the formed tunneling oxide layer, this embodiment controls the oxidation time of the N-type silicon wafer in the low-pressure chemical vapor deposition furnace to maintain the first duration based on the above process parameters. Here, this embodiment controls the first duration to be 5 to 20 minutes to form a 1 to 2 nm tunneling oxide layer on the front of the N-type silicon wafer. Among them, the first duration can be 5 minutes, 10 minutes, 12 minutes, 15 minutes, 18 minutes, 20 minutes, etc., which are not specifically limited here.

[0066] Since the preparation of the boron-doped polysilicon layer needs to be carried out in a certain process temperature and process pressure, and in a specific silicon source or boron source environment, after preparing a tunneling oxide layer on the front side of the N-type silicon wafer, the following operations need to be performed based on a low-pressure chemical vapor deposition furnace:

[0067] The low-pressure chemical vapor deposition furnace is evacuated and purged to remove oxygen in the low-pressure chemical vapor deposition furnace.

[0068] Conduct airtightness test on low pressure chemical vapor deposition furnace.

[0069] When the airtightness in the low-pressure chemical vapor deposition furnace reaches the preset conditions, the low-pressure chemical vapor deposition furnace is preheated to the second temperature, and the heating time is controlled to be the fifth period of time. Then, a certain amount of nitrogen is introduced into the low-pressure chemical vapor deposition furnace to keep the temperature in the low-pressure chemical vapor deposition furnace stable at the second temperature, so as to prepare for the subsequent low-pressure chemical vapor deposition process and improve the preparation efficiency of the boron-doped polysilicon layer to a certain extent.

[0070] Among them, the second temperature in this embodiment is 550-610°C. For example, the second temperature can be 550°C, 560°C, 580°C, 600°C, or 610°C, which is not specifically limited here; the fifth time length is 5-30min. For example, the fifth time length can be 5min, 6min, 8min, 10min, or 13min, which is not specifically limited here.

[0071] Based on the preparation method of the above embodiment, in order to better achieve boron doping and ensure the concentration of boron doping, the boron-doped polysilicon layer is prepared on the front side of the N-type silicon wafer by vapor deposition as shown in this embodiment, including but not limited to the following steps:

[0072] In the first deposition step, a second mass flow rate of silicon source is introduced into the low-pressure chemical vapor deposition furnace, the low-pressure chemical vapor deposition furnace is controlled to be stable to a second temperature and a second pressure, a first silicon deposition layer is deposited on the N-type silicon wafer, and the deposition time is controlled to be a second duration.

[0073] In the first deposition step, the silicon source introduced into the low-pressure chemical vapor deposition furnace can be selected as silane gas, and the second mass flow rate is 300-1200sccm. For example, the second mass flow rate can be 300sccm, 500sccm, 650sccm, 800sccm, 1000sccm or 1200sccm, which is not specifically limited here; the second pressure is 70-300mtorr. For example, the second pressure can be 70mtorr, 100mtorr, 150mtorr, 200mtorr, 250mtorr or 300mtorr, which is not specifically limited here; the second time length is 2-20min. For example, the second time length can be 2min, 6min, 10min, 12min or 20min, which is not specifically limited here.

[0074] It should be pointed out here that when performing the first deposition step on the tunneling oxide layer, in order to ensure the vapor deposition effect, the present embodiment can form a pre-deposition layer on the surface of the tunneling oxide layer under the process conditions shown in the first deposition step, set the deposition time to 2 to 20 minutes, and then, deposit the first silicon deposition layer on the pre-deposition layer.

[0075] In the second deposition step, stop introducing the silicon source into the low-pressure chemical vapor deposition furnace, evacuate the low-pressure chemical vapor deposition furnace, introduce a third mass flow rate of a boron source into the low-pressure chemical vapor deposition furnace, control the low-pressure chemical vapor deposition furnace to be stable to the second temperature and the third pressure, deposit a boron deposition layer on the first silicon deposition layer, and control the deposition time to be the third duration.

[0076] In the second deposition step, the boron source introduced into the low-pressure chemical vapor deposition furnace can be selected as borane gas, and the third mass flow rate is 200-1000sccm. For example, the third mass flow rate can be 200sccm, 300sccm, 600sccm, 800sccm or 1000sccm, which is not specifically limited here; the third pressure is 50-150mtorr. For example, the third pressure can be 50mtorr, 80mtorr, 100mtorr, 120mtorr or 150mtorr, which is not specifically limited here; the third time length is 1-10min. For example, the third time length can be 1min, 3min, 5min, 6min, 8min or 10min, which is not specifically limited here.

[0077] The third deposition step is to stop introducing the boron source into the low-pressure chemical vapor deposition furnace, evacuate the low-pressure chemical vapor deposition furnace, introduce a fourth mass flow rate of silicon source into the low-pressure chemical vapor deposition furnace, control the low-pressure chemical vapor deposition furnace to be stable to the second temperature and the fourth pressure, deposit a second silicon deposition layer on the boron deposition layer, and control the deposition time to be a fourth time length.

[0078] In the third deposition step, the silicon source introduced into the low-pressure chemical vapor deposition furnace can be selected as silane gas, and the fourth mass flow rate is 300-1200sccm. For example, the fourth mass flow rate can be 300sccm, 500sccm, 650sccm, 800sccm, 1000sccm or 1200sccm, which is not specifically limited here; the fourth pressure is 70-300mtorr. For example, the fourth pressure can be 70mtorr, 100mtorr, 150mtorr, 200mtorr, 250mtorr or 300mtorr, which is not specifically limited here; the fourth time length is 2-20min. For example, the second time length can be 2min, 6min, 10min, 12min or 20min, which is not specifically limited here.

[0079] Here, in this embodiment, the number of cyclic deposition times N from the first deposition step to the third deposition step can be set according to the actual doping process requirements, and at least one process cycle can be performed in the low-pressure chemical vapor deposition furnace according to the process operation sequence from the first deposition step to the third deposition step. Wherein, N can be a natural number from 1 to 10.

[0080] After completing the cyclic deposition, the present embodiment may further perform silicon deposition on the surface of the second silicon deposition layer obtained by the last cyclic deposition to obtain a silicon cover layer with a protective function. During the deposition of the silicon cover layer, the present embodiment may also introduce silane gas with a mass flow rate of 300 to 1200 sccm into the low-pressure chemical vapor deposition furnace under the second temperature condition, control the pressure in the low-pressure chemical vapor deposition furnace to be stable at 70 to 300 mtorr, and after the pressure is stabilized, control the deposition time to be 5 to 30 minutes to form the silicon cover layer.

[0081] Finally, the N-type silicon wafer after the above process is taken out from the low-pressure chemical vapor deposition furnace, and then sequentially subjected to SE laser doping, RCA cleaning and annealing treatment to obtain a boron-doped selective emitter product.

[0082] In order to further illustrate the present invention, the method for preparing the boron-doped selective emitter shown in the present invention is described in detail below in conjunction with the examples.

[0083] The gaseous silicon source, boron source and silicon material used in the following examples are all commercially available.

[0084] Example 1

[0085] like Figure 2 As shown, this embodiment takes a boron-doped selective emitter prepared by one cycle of deposition as an example for specific description, and its preparation steps are as follows:

[0086] Step 1, cleaning and texturing the N-type silicon wafer 1.

[0087] Step 2: inserting the N-type silicon wafer 1 after the texturing treatment into the quartz boat.

[0088] Step 3: Place the quartz boat containing the N-type silicon wafer 1 into the low-pressure chemical vapor deposition furnace, close the low-pressure chemical vapor deposition furnace, increase the temperature in the low-pressure chemical vapor deposition furnace to 500° C., and evacuate the low-pressure chemical vapor deposition furnace.

[0089] Step 4, introduce oxygen with a mass flow rate of 5 slm into the low-pressure chemical vapor deposition furnace, and stop introducing oxygen after the pressure in the furnace rises to normal pressure. Then, maintain the oxidation process time for 20 minutes to form a 1-2 nm thick tunneling oxide layer 2 on the front side of the N-type silicon wafer 1.

[0090] Step 5, after the oxidation time is reached, the low-pressure chemical vapor deposition furnace is evacuated and filled with nitrogen to purge until the oxygen in the furnace is purged, and then the low-pressure chemical vapor deposition furnace is leak tested. When it is determined that the airtightness of the low-pressure chemical vapor deposition furnace is good, the furnace temperature of the low-pressure chemical vapor deposition furnace is set to 550°C, and a certain amount of nitrogen is introduced to keep the temperature in the furnace stable.

[0091] Step 6, introduce silane gas with a mass flow rate of 300 sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 550°C, and the process pressure to 70 mtorr. After the pressure stabilizes, perform pre-deposition and control the deposition time to 20 minutes to form a pre-deposition layer 3 on the silicon oxide layer.

[0092] Step 7, continue to maintain the above process conditions, control the deposition time to 20 minutes, and deposit the first silicon deposition layer 4 on the pre-deposition layer 3.

[0093] Step 8. After the above process is completed, close the introduction of silane gas and evacuate the low-pressure chemical vapor deposition furnace. After the vacuumization is completed, introduce borane gas with a mass flow rate of 200 sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 550°C, and the process pressure to 50 mtorr. After the pressure stabilizes, control the deposition time to 10 minutes to form a boron deposition layer 5 on the first silicon deposition layer 4.

[0094] Step 9, after the above process is completed, close the introduction of borane gas and evacuate the low-pressure chemical vapor deposition furnace. After the vacuuming is completed, introduce silane gas with a mass flow rate of 300 sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 550°C, and the process pressure to 70 mtorr. After the pressure stabilizes, control the deposition time to 20 minutes to form a second silicon deposition layer 6 on the boron deposition layer 5.

[0095] Step 10, after completing the above process, keep introducing silane gas with a mass flow rate of 300 sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 550°C, the process pressure to 70 mtorr, and the deposition time to 30 minutes to form a silicon covering layer 7 on the second silicon deposition layer 6.

[0096] Step 11, evacuate the low-pressure chemical vapor deposition furnace, purge with nitrogen and evacuate the furnace. After removing the silane gas in the furnace, fill it with nitrogen again, cool down and pressurize the low-pressure chemical vapor deposition furnace, and unload the silicon wafers obtained after the above process.

[0097] Step 12, performing SE laser doping on the silicon wafer after the above process is completed.

[0098] Step 13, performing RCA cleaning on the silicon wafer after the above process is completed.

[0099] Step 14, annealing the silicon wafer after the RCA cleaning process to obtain a boron-doped selective emitter product.

[0100] Example 2

[0101] like Figure 3 As shown, this embodiment takes a boron-doped selective emitter prepared by two cycles of deposition as an example for specific description, and its preparation steps are as follows:

[0102] Step 1, cleaning and texturing the N-type silicon wafer 1.

[0103] Step 2: inserting the N-type silicon wafer 1 after the texturing treatment into the quartz boat.

[0104] Step 3: Place the quartz boat with the N-type silicon wafer 1 into the low-pressure chemical vapor deposition furnace, close the low-pressure chemical vapor deposition furnace, raise the temperature in the low-pressure chemical vapor deposition furnace to 580° C., and evacuate the low-pressure chemical vapor deposition furnace.

[0105] Step 4, introduce oxygen with a mass flow rate of 25 slm into the low-pressure chemical vapor deposition furnace, and stop introducing oxygen after the pressure in the furnace rises to normal pressure. Then, maintain the oxidation process time for 15 minutes to form a 1-2 nm thick tunneling oxide layer 2 on the front side of the N-type silicon wafer 1.

[0106] Step 5: After the oxidation time is reached, the low-pressure chemical vapor deposition furnace is evacuated and purged with nitrogen until the oxygen in the furnace is purged, and then the low-pressure chemical vapor deposition furnace is leak-checked. When it is determined that the airtightness of the low-pressure chemical vapor deposition furnace is good, the furnace temperature of the low-pressure chemical vapor deposition furnace is set to 580°C, and a certain amount of nitrogen is introduced to keep the temperature in the furnace stable.

[0107] Step 6, introduce silane gas with a mass flow rate of 650sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 580°C, and the process pressure to 150mtorr. After the pressure stabilizes, perform pre-deposition and control the deposition time to 10min to form a pre-deposition layer 3 on the silicon oxide layer.

[0108] Step 7, continue to maintain the above process conditions, control the deposition time to 10 minutes, and deposit the first silicon deposition layer 4 on the pre-deposition layer 3.

[0109] Step 8. After the above process is completed, close the introduction of silane gas and evacuate the low-pressure chemical vapor deposition furnace. After the vacuuming is completed, introduce borane gas with a mass flow rate of 600 sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 580°C, and the process pressure to 100 mtorr. After the pressure stabilizes, control the deposition time to 5 minutes to form a boron deposition layer 5 on the first silicon deposition layer 4.

[0110] Step 9, after the above process is completed, close the introduction of borane gas and evacuate the low-pressure chemical vapor deposition furnace. After the vacuuming is completed, introduce silane gas with a mass flow rate of 650 sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 580°C, and the process pressure to 150 mtorr. After the pressure stabilizes, control the deposition time to 10 minutes to form a second silicon deposition layer 6 on the boron deposition layer 5.

[0111] Step 10, after the above process is completed, according to the order of step 7 to step 9, control the first silicon deposition layer 4, the boron deposition layer 5 and the second silicon deposition layer 6 to be cyclically deposited once.

[0112] Step 11, after completing the above process, keep introducing silane gas with a mass flow rate of 650sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 580°C, the process pressure to 150mtorr, and the deposition time to 20min to form a silicon covering layer 7 on the second silicon deposition layer 6.

[0113] Step 12, evacuate the low-pressure chemical vapor deposition furnace, purge with nitrogen and evacuate the furnace. After removing the silane gas in the furnace, fill it with nitrogen again, cool down and pressurize the low-pressure chemical vapor deposition furnace, and unload the silicon wafers obtained after the above process.

[0114] Step 13, performing SE laser doping on the silicon wafer after the above process is completed.

[0115] Step 14, performing RCA cleaning on the silicon wafer after the above process is completed.

[0116] Step 15, annealing the silicon wafer after the RCA cleaning process to obtain a boron-doped selective emitter product.

[0117] Example 3

[0118] like Figure 4 As shown, this embodiment takes a boron-doped selective emitter prepared by three cycles of deposition as an example for specific description, and its preparation steps are as follows:

[0119] Step 1, cleaning and texturing the N-type silicon wafer 1.

[0120] Step 2: inserting the N-type silicon wafer 1 after the texturing treatment into the quartz boat.

[0121] Step 3: Place the quartz boat with the N-type silicon wafer 1 into the low-pressure chemical vapor deposition furnace, close the low-pressure chemical vapor deposition furnace, raise the temperature in the low-pressure chemical vapor deposition furnace to 610° C., and evacuate the low-pressure chemical vapor deposition furnace.

[0122] Step 4, introduce oxygen with a mass flow rate of 40 slm into the low-pressure chemical vapor deposition furnace, and stop introducing oxygen after the pressure in the furnace rises to normal pressure. Then, maintain the oxidation process time for 5 minutes to form a 1-2 nm thick tunneling oxide layer 2 on the front side of the N-type silicon wafer 1.

[0123] Step 5: After the oxidation time is reached, the low-pressure chemical vapor deposition furnace is evacuated and purged with nitrogen until the oxygen in the furnace is purged, and then the low-pressure chemical vapor deposition furnace is leak-checked. When it is determined that the airtightness of the low-pressure chemical vapor deposition furnace is good, the furnace temperature of the low-pressure chemical vapor deposition furnace is set to 610°C, and a certain amount of nitrogen is introduced to keep the temperature in the furnace stable.

[0124] Step 6, introduce silane gas with a mass flow rate of 1200sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 610°C, and the process pressure to 300mtorr. After the pressure stabilizes, perform pre-deposition and control the deposition time to 2min to form a pre-deposition layer 3 on the silicon oxide layer.

[0125] Step 7, continue to maintain the above process conditions, control the deposition time to 1 minute, and deposit the first silicon deposition layer 4 on the pre-deposition layer 3.

[0126] Step 8. After the above process is completed, close the introduction of silane gas and evacuate the low-pressure chemical vapor deposition furnace. After the vacuumization is completed, introduce borane gas with a mass flow rate of 1000sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 610°C, and the process pressure to 150mtorr. After the pressure stabilizes, control the deposition time to 1min to form a boron deposition layer 5 on the first silicon deposition layer 4.

[0127] Step 9, after the above process is completed, close the introduction of borane gas and evacuate the low-pressure chemical vapor deposition furnace. After the vacuuming is completed, introduce silane gas with a mass flow rate of 1200sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 610°C, and the process pressure to 300mtorr. After the pressure stabilizes, control the deposition time to 2min to form a second silicon deposition layer 6 on the boron deposition layer 5.

[0128] Step 10, after the above process is completed, according to the order of step 7 to step 9, control the first silicon deposition layer 4, the boron deposition layer 5 and the second silicon deposition layer 6 to be cyclically deposited twice.

[0129] Step 11, after completing the above process, keep introducing silane gas with a mass flow rate of 1200 sccm into the low-pressure chemical vapor deposition furnace, control the furnace temperature to 610°C, the process pressure to 300 mtorr, and the deposition time to 5 minutes to form a silicon covering layer 7 on the second silicon deposition layer 6.

[0130] Step 12, evacuate the low-pressure chemical vapor deposition furnace, purge with nitrogen and evacuate the furnace. After removing the silane gas in the furnace, fill it with nitrogen again, cool down and pressurize the low-pressure chemical vapor deposition furnace, and unload the silicon wafers obtained after the above process.

[0131] Step 13, performing SE laser doping on the silicon wafer after the above process is completed.

[0132] Step 14, performing RCA cleaning on the silicon wafer after the above process is completed.

[0133] Step 15, annealing the silicon wafer after the RCA cleaning process to obtain a boron-doped selective emitter product.

[0134] Among them, in the measurement units involved in the above embodiments, min means minute; ℃ means degrees Celsius; nm means nanometer; mtorr means millitorr, which is the pressure of micrometers of mercury, which is one thousandth of the pressure of millimeters of mercury; slm and sccm are the mass flow rates under standard conditions (0℃, 1atm), slm means standard liters / minute, and sccm means standard milliliters / minute.

[0135] Preferably, this embodiment further provides a boron-doped selective emitter, wherein the boron-doped selective emitter is prepared by the method for preparing a boron-doped selective emitter as described in any one of the above items.

[0136] Specifically, since the boron-doped selective emitter shown in this embodiment is prepared by the preparation method of the boron-doped selective emitter shown above, the boron-doped selective emitter shown in this embodiment includes all the technical solutions of the above-mentioned embodiments, and therefore, it has at least all the beneficial effects brought about by all the technical solutions of the above-mentioned embodiments, which will not be repeated here one by one.

[0137] Preferably, this embodiment further provides an N-type solar cell, wherein the N-type solar cell comprises the boron-doped selective emitter as described above.

[0138] Specifically, since the N-type solar cell includes the boron-doped selective emitter as described above, and the specific structure of the boron-doped selective emitter refers to the above embodiment, the N-type solar cell shown in this embodiment includes all the technical solutions of the above embodiment, and therefore has at least all the beneficial effects achieved by all the above technical solutions, which will not be described one by one here.

[0139] Preferably, this embodiment further provides an electrical device, wherein the electrical device uses the N-type solar cell as described above, so that the N-type solar cell supplies power to a load in the electrical device.

[0140] Specifically, since the electrical equipment includes the N-type solar cell as described above, the specific structure of the N-type solar cell refers to the above embodiment, and the electrical equipment shown in this embodiment includes all the technical solutions of the above embodiment, and therefore has at least all the beneficial effects achieved by all the above technical solutions, which will not be repeated here one by one.

[0141] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a boron-doped selective emitter, characterized in that: include: Pre-treating N-type silicon wafers; On the front side of the pre-treated N-type silicon wafer, a boron-doped polysilicon layer is prepared by low-pressure vapor deposition to obtain a semi-finished product; The semi-finished product is sequentially laser doped and annealed to obtain a boron-doped selective emitter; Wherein, the boron-doped polysilicon layer includes a silicon deposition layer and a boron deposition layer, and the silicon deposition layer and the boron deposition layer are distributed in a stacked manner; The step of preparing a boron-doped polysilicon layer on the front side of the N-type silicon wafer by low-pressure vapor deposition comprises: In a first deposition step, a silicon source with a second mass flow rate is introduced into the vacuum environment where the N-type silicon wafer is located, and a first silicon deposition layer is vapor-deposited on the N-type silicon wafer under the conditions of a second temperature and a second pressure, and the deposition time is controlled to be a second duration; In a second deposition step, a boron source with a third mass flow rate is introduced into the vacuum environment where the N-type silicon wafer is located, and a boron deposition layer is vapor-deposited on the first silicon deposition layer under the conditions of a second temperature and a third pressure, and the deposition time is controlled to be a third duration; A third deposition step, introducing a silicon source with a fourth mass flow rate into the vacuum environment where the N-type silicon wafer is located, performing vapor deposition of a second silicon deposition layer on the boron deposition layer under the conditions of a second temperature and a fourth pressure, and controlling the deposition time to be a fourth duration; According to the process operation sequence from the first deposition step to the third deposition step, performing at least two process cycles; The second temperature is 600-610° C.; The second mass flow rate is 300 to 1200 sccm, the second pressure is 70 to 300 mtorr, and the second time is 2 to 20 min; The third mass flow rate is 200-1000 sccm, the third pressure is 50-150 mtorr, and the third time length is 1-10 min; The fourth mass flow rate is 300 to 1200 sccm, the fourth pressure is 70 to 300 mtorr, and the fourth time length is 2 to 20 min.

2. The method for preparing a boron-doped selective emitter according to claim 1, characterized in that: Before preparing the boron-doped polysilicon layer, the method further comprises: A tunneling oxide layer is prepared on the front side of an N-type silicon wafer by using a dry oxidation process.

3. The method for preparing a boron-doped selective emitter according to claim 2, characterized in that: The step of preparing a tunneling oxide layer on the front side of an N-type silicon wafer by using a dry oxidation process comprises: Oxygen with a first mass flow rate is introduced into the vacuum environment where the N-type silicon wafer is located, and the N-type silicon wafer is oxidized for a first time under first temperature and first pressure conditions to prepare a tunneling oxide layer with a first thickness on the front side of the N-type silicon wafer.

4. The method for preparing a boron-doped selective emitter according to claim 3, characterized in that: The first temperature is 500-600° C., the first mass flow rate is 5-40 slm, the first pressure is a standard atmospheric pressure, the first time length is 5-20 min, and the first thickness is 1-2 nm.

5. The method for preparing a boron-doped selective emitter according to any one of claims 2 to 4, characterized in that: A boron-doped polysilicon layer is prepared on the front side of an N-type silicon wafer by low-pressure chemical vapor deposition using a low-pressure chemical vapor deposition furnace; Before low-pressure vapor deposition of N-type silicon wafers, it also includes: Vacuuming and purging the low-pressure chemical vapor deposition furnace to remove oxygen from the low-pressure chemical vapor deposition furnace; Performing airtightness testing on the low-pressure chemical vapor deposition furnace; The low pressure chemical vapor deposition furnace is preheated to a second temperature, and the heating time is controlled to be a fifth duration.

6. A boron-doped selective emitter, characterized in that: The boron-doped selective emitter is prepared by the method for preparing a boron-doped selective emitter according to any one of claims 1 to 5.

7. An N-type solar cell, characterized in that: Comprising the boron-doped selective emitter as claimed in claim 6.

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