Alternator and rectifier arrangement thereof

Abstract

The present application provides an alternator and a rectifying device thereof. The rectifying device includes a transistor and a gate voltage control circuit. The transistor is controlled by a gate voltage. The gate voltage control circuit generates the gate voltage according to a voltage difference between an input voltage and a rectified voltage. The gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage within a first time interval after the voltage difference drops to a first default threshold voltage to decide whether to provide the gate voltage to turn on the transistor. When the transistor is turned on, the voltage difference is substantially equal to a first reference voltage. The gate voltage control circuit adjusts the gate voltage to make the voltage difference substantially equal to a second reference voltage in a second time interval.

Description

Technical Field

[0001] This invention relates to an AC generator and a rectifier, and more particularly to an AC generator and a rectifier that can prevent reverse current from occurring. Background Technology

[0002] In alternating current generators, rectifier devices are commonly used to rectify the AC input voltage and generate a rectified voltage that can be considered a DC voltage. In current technology, diodes or transistors are often used for input voltage rectification. Ideally, the rectified voltage should remain equal to a reference voltage (e.g., 0 volts) during the negative half-wave. However, in practical situations, such as… Figure 1 As shown in the waveform diagram of the existing rectified voltage, the peak value of the rectified voltage VP will be lower than its reference voltage V0 in the negative half-wave TN. That is to say, power loss will occur in the negative half-wave TN of the input voltage, reducing the system efficiency.

[0003] Furthermore, existing technologies involve rectifying the input voltage by controlling the timing of transistor turn-on. However, in practical applications, the waveform of the rectified voltage and the timing of transistor turn-on must be synchronized. If the transistor is turned on too late or too early, reverse current may occur. Summary of the Invention

[0004] This invention relates to an AC generator and its rectifier, used to eliminate the reverse current phenomenon generated during the rectification process.

[0005] According to an embodiment of the present invention, the rectifier includes a transistor and a gate voltage control circuit. The transistor has a first terminal receiving an input voltage, a second terminal generating a rectified voltage, and a control terminal receiving a gate voltage. The gate voltage control circuit is coupled to the transistor and generates a gate voltage based on the voltage difference between the input voltage and the rectified voltage. Specifically, during a first time interval after the voltage difference drops to equal a first default threshold voltage, the gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage to decide whether to provide a gate voltage to turn on the transistor, wherein when the transistor is turned on, the voltage difference is substantially equal to a first reference voltage; during a second time interval after the first time interval, the gate voltage control circuit adjusts the gate voltage to make the voltage difference substantially equal to the second reference voltage.

[0006] According to another embodiment of the present invention, a rectifier transistor is coupled to a gate voltage control circuit. The transistor has a first terminal receiving an input voltage, a second terminal generating a rectified voltage, and a control terminal receiving a gate voltage. A gate voltage control circuit is coupled to the transistor and generates a gate voltage based on the voltage difference between the input voltage and the rectified voltage. During a first time interval after the voltage difference drops to equal a first default threshold voltage, the gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage to decide whether to provide a gate voltage to turn on the transistor. When the transistor is turned on, during the first time interval and during a second time interval after the first time interval, when the voltage difference rises to a third default threshold voltage, the gate voltage is adjusted to turn off the transistor. During the first time interval, the third default threshold voltage is greater than or equal to zero; during the second time interval, the third default threshold voltage is less than or equal to zero.

[0007] The alternator of this invention includes a rotor, a stator, and multiple rectifiers as described above. Each rectifier receives a corresponding AC input voltage as a rectified voltage, and the multiple rectifiers together generate the rectified voltage.

[0008] Based on the above, the gate voltage control circuit of this embodiment determines whether the voltage difference has dropped to a relatively low second default threshold voltage within a first time interval after the voltage difference between the input voltage and the rectified voltage drops to a relatively high first default threshold voltage, and decides whether to fully turn on the transistor accordingly. In this way, the reverse current phenomenon caused by the transistor being turned on too slowly can be prevented, thereby improving the overall efficiency of the rectifier. Attached Figure Description

[0009] The accompanying drawings are included to further illustrate the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0010] Figure 1 The waveform diagram of the rectified voltage in the prior art is shown;

[0011] Figure 2 A schematic diagram of a rectifier device according to an embodiment of the present invention is shown;

[0012] Figure 3A A waveform diagram illustrating an embodiment of the rectifier device of the present invention;

[0013] Figure 3B This invention is shown Figure 3A A magnified view of region Z1 in the waveform diagram;

[0014] Figure 4 A waveform diagram showing a third default threshold voltage implementation of the rectifier device according to an embodiment of the present invention is shown;

[0015] Figure 5A , 5B Waveform diagrams of two different embodiments of the rectifier device according to an embodiment of the present invention are shown;

[0016] Figure 6 A schematic diagram of a gate voltage control circuit according to an embodiment of the present invention is shown;

[0017] Figure 7 A schematic diagram illustrating an embodiment of a signal generator in a gate voltage control circuit according to an embodiment of the present invention is shown;

[0018] Figure 8 A schematic diagram of a voltage generator in a gate voltage control circuit according to an embodiment of the present invention is shown;

[0019] Figure 9 A schematic diagram of an AC generator according to an embodiment of the present invention is shown.

[0020] Explanation of icon numbers

[0021] 200, 911~932: Rectifier;

[0022] 210, 600: Gate voltage control circuit;

[0023] 700: Control signal generator;

[0024] 710: Multitasking device;

[0025] 720, 730: Comparators;

[0026] 740, 750: Counters;

[0027] 760: Calculator;

[0028] 770: Logic circuit;

[0029] 900: Alternator;

[0030] C1: Capacitor;

[0031] CMP1~CMP2: Comparison results;

[0032] E1: First end;

[0033] E2: Second end;

[0034] EN_OPA, EN_SW1, EN_SW2: Control signals;

[0035] OP1: Operational amplifier;

[0036] OT: Output terminal;

[0037] PA1~PA3: Time interval;

[0038] PTON: Time interval;

[0039] R1: Resistor;

[0040] RG: Count range value;

[0041] RT: Rotor;

[0042] S1, S2: States;

[0043] ST: Stator;

[0044] SW1, SW2: Switches;

[0045] TDI: Transistor;

[0046] TN: Negative half-wave;

[0047] TP1, TP2, TP3: Time points;

[0048] V0: Reference voltage;

[0049] VA: Power supply;

[0050] VD: Rectified voltage;

[0051] VDS: Voltage Difference;

[0052] VG: Gate voltage;

[0053] VH: Operating voltage;

[0054] VHH: Operating power supply;

[0055] VP, Vy, Vz: Voltage;

[0056] Vx: First voltage / First default critical voltage;

[0057] VR1, VR2: Reference voltage;

[0058] VS: Input voltage;

[0059] VSS: Grounding voltage;

[0060] VU, VV, VW: Phase voltages;

[0061] VDS_ON, VDS_OFF: Default threshold voltages;

[0062] α: Parameter. Detailed Implementation

[0063] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0064] Please refer to Figure 2 , Figure 2 A schematic diagram of a rectifier device according to an embodiment of the present invention is shown. The rectifier device 200 includes a transistor TDI and a gate voltage control circuit 210. The transistor TDI has a first terminal E1 that receives an input voltage VS, a second terminal E2 that generates a rectified voltage VD, and a control terminal that receives a gate voltage VG. In this embodiment, the operation of the transistor TDI is equivalent to that of a diode via the gate voltage VG; the first terminal of the transistor TDI can be equivalent to the cathode of the diode, and the second terminal of the transistor TDI can be equivalent to the anode of the diode.

[0065] Gate voltage control circuit 210 is coupled to transistor TDI and is used to provide gate voltage VG. Gate voltage control circuit 210 receives the voltage difference VDS between the rectified voltage VD and the input voltage VS, and generates gate voltage VG based on the voltage difference VDS. For details on the generation of gate voltage VG, please refer to [link to relevant documentation]. Figure 2 as well as Figure 3A ,in Figure 3A A waveform diagram illustrating an embodiment of the rectifier device of the present invention is shown.

[0066] In this embodiment, the gate voltage control circuit 210 can detect the voltage difference VDS of transistor TDI and detect the time point TP1 when the voltage difference VDS drops to be equal to the first default threshold voltage Vx. After time point TP1, the gate voltage control circuit 210 starts a counting operation for a first time interval PA1. Then, in the first time interval PA1, the gate voltage control circuit 210 can determine whether the voltage difference VDS of transistor TDI has dropped to be equal to the second default threshold voltage VDS_ON, where the second default threshold voltage VDS_ON is less than the first default threshold voltage Vx. In this embodiment, in the first time interval PA1, the gate voltage control circuit 210 determines the time point TP2 when the voltage difference VDS of transistor TDI drops to be equal to the second default threshold voltage VDS_ON, and generates a gate voltage VG at time point TP2 to turn on transistor TDI. In this embodiment, transistor TDI can be fully turned on at this time.

[0067] In this embodiment, when the counting operation is initiated in the first time interval PA1, the gate voltage control circuit 210 does not immediately turn on the transistor TDI. Instead, the gate voltage control circuit 210 continuously detects the voltage difference VDS during the first time interval PA1, and only turns on the transistor TDI when the voltage difference VDS is determined to drop to be equal to the second default threshold voltage VDS_ON.

[0068] Please note that in this embodiment of the invention, the first time interval PA1 can be a pre-set finite time interval. The first time interval PA1 can be set according to the duration of the negative half-wave of the voltage difference VDS. Therefore, the later the time point TP2 when the voltage difference VDS drops to equal the second default threshold voltage VDS_ON occurs, the shorter the duration for which transistor TDI is fully turned on will be. Furthermore, if the gate voltage control circuit 210 detects that the event of the voltage difference VDS dropping to equal the second default threshold voltage VDS_ON has not occurred in the first time interval PA1, then transistor TDI will not be fully turned on in this cycle.

[0069] Incidentally, taking an N-type transistor as an example, the gate voltage control circuit 210 can provide a gate voltage VG of a sufficiently high value to fully turn on the transistor TDI. When the transistor TDI is turned on, the voltage difference VDS can be rectified by the transistor TDI and equal to the first reference voltage VR1, which is the product of the on-resistance of the transistor TDI and the current flowing through the transistor TDI. Taking the fully turned-on state of the transistor TDI as an example, the on-resistance of the transistor TDI is extremely small, so the first reference voltage VR1 can be maintained at or near 0 volts.

[0070] Next, in the second time interval PA2 following the first time interval PA1, the gate voltage control circuit 210 adjusts the gate voltage VG to adjust the equivalent resistance value provided by the transistor TDI, and makes the voltage difference VDS equal to the second reference voltage VR2. In this embodiment, the first reference voltage VR1 may be greater than the second reference voltage VR2. However, in other embodiments of the present invention, the first reference voltage VR1 may also be equal to or less than the second reference voltage VR2, without fixed limitations.

[0071] Next, please refer to Figure 3B , Figure 3B This invention is shown Figure 3AA magnified view of region Z1 in the waveform diagram. Specifically, in the third time interval PA3 following the second time interval PA2, when the gate voltage control circuit 210 detects that the voltage difference VDS has risen from the second reference voltage VR2 to the third default threshold voltage VDS_OFF (time point TP4), the gate voltage control circuit 210 adjusts the gate voltage VG to turn off the transistor TDI. In this embodiment, the gate voltage control circuit 210 can adjust the gate voltage VG to a sufficiently low value to turn off the transistor TDI.

[0072] Incidentally, please refer to Figure 4 , Figure 4 A waveform diagram illustrating an embodiment of the rectifier device according to another embodiment of the present invention is shown. Figure 4 In the first time interval PA1 and the second time interval PA2, when the gate voltage control circuit 210 detects that the voltage difference VDS rises to the third default threshold voltage VDS_OFF, the gate voltage control circuit 210 adjusts the gate voltage VG to turn off the transistor TDI. The third default threshold voltage VDS_OFF is adjustable. In this embodiment, the third default threshold voltage VDS_OFF in the first time interval PA1 is greater than or equal to zero, while the third default threshold voltage VDS_OFF in the second time interval PA2 can be less than or equal to zero.

[0073] Please refer to the following: Figure 2 as well as Figure 5A , Figure 5B ,in Figure 5A , Figure 5B Waveform diagrams of two different embodiments of the rectifier device according to an example of the present invention are shown. Figure 5A In this embodiment, the rectifier 200 applied to the alternator switches from a state S1 where the rectified current is greater than 0 amperes to a state S2 where the rectified current is equal to 0 amperes. After the gate voltage control circuit 210 detects at time point TP1 that the voltage difference VDS has dropped to equal the first default threshold voltage Vx, the gate voltage control circuit 210 counts for the first time interval PA1. At time point TP2, some time after time point TP1, the gate voltage control circuit 210 detects that the voltage difference VDS has dropped to equal the second default threshold voltage VDS_ON. Correspondingly, at time point TP2, the gate voltage control circuit 210 provides a gate voltage VG to fully turn on the transistor TDI. After time point TP3, the end of the first time interval PA1, the gate voltage control circuit 210 performs a counting operation for the second time interval. In this embodiment, the time length of the time interval PTON during which the transistor TDI is fully turned on is less than the time length of the first time interval PA1.

[0074] exist Figure 5BIn this embodiment, the gate voltage control circuit 210 detects that the time point TP2 when the voltage difference VDS drops to equal the second default threshold voltage VDS_ON coincides with the time point TP3 when the first time interval PA1 ends (or the time point TP2 is later than the time point TP3). Therefore, in this embodiment, the transistor TDI will not be fully turned on.

[0075] By the present invention Figure 5B As can be seen from the implementation, when the voltage difference VDS drops to the second default threshold voltage VDS_ON at time point TP2, which is a relatively late part of the negative half-wave time interval of the voltage difference VDS, the gate voltage control circuit 210 can prevent the transistor TDI from being fully turned on. In this way, the possibility of reverse current being generated when the voltage difference VDS starts to rise when the transistor TDI is fully turned on can be effectively avoided.

[0076] Please refer to Figure 6 , Figure 6 This diagram illustrates a gate voltage control circuit according to an embodiment of the present invention. The gate voltage control circuit 600 includes an operational amplifier OP1, a switch SW1, and a switch SW2. Operational amplifier OP1 receives a voltage difference VDS and an adjustment voltage as a second reference voltage VR2, and generates a gate voltage VG at the output terminal OT to drive the corresponding transistor according to a control signal EN_OPA. Furthermore, operational amplifier OP1 can receive a power supply VA as its operating power supply and a voltage VSS as a reference ground voltage. Switch SW2 is connected in series between the operating voltage VH and the output terminal OT. Switch SW2 is turned on or off according to the control signal EN_SW2. Switch SW1 is connected in series between the ground voltage VSS and the output terminal OT. Switch SW1 is turned on or off according to the control signal EN_SW1.

[0077] In terms of operational details, during the first time interval, when the voltage difference VDS is less than the second default threshold voltage, the gate voltage control circuit 600 disables operational amplifier OP1 via control signal EN_OPA and turns on switch SW2 via control signal EN_SW2 to pull the gate voltage VG up to the operating voltage VH. Simultaneously, switch SW1 is turned off according to control signal EN_SW1. Next, in the second time interval following the first time interval, the gate voltage control circuit 600 turns off switches SW2 and SW1 respectively via control signals EN_SW2 and EN_SW1, and turns on operational amplifier OP1 via control signal EN_OPA. During the second time interval, operational amplifier OP1 provides gate voltage VG at output terminal OT by controlling the voltage difference VDS to equal the second reference voltage VR2. Then, in the third time interval, the gate voltage control circuit 600 turns off switch SW2 and disables operational amplifier OP1 via control signals EN_SW2 and EN_OPA. Furthermore, during the third time interval, the gate voltage control circuit 600 turns on the switch SW1 via the control signal EN_SW1. With the switch SW1 turned on, the gate voltage VG is pulled down to equal the ground voltage VSS, and the corresponding driven transistor is turned off.

[0078] Regarding the generation method of control signals EN_OPA, EN_SW1, and EN_SW2 in the above embodiments, they can be generated by setting a control signal generator in the gate voltage control circuit 600. For the implementation method of the control signal generator, please refer to [reference needed]. Figure 7 The diagram illustrates an embodiment of a signal generator in the gate voltage control circuit of this invention. Figure 7 In this process, the control signal generator 700 compares the voltage difference VDS with a first voltage Vx (i.e., equivalent to a first default threshold voltage) to generate a first comparison result CMP1, and compares the voltage difference VDS with a second voltage Vy or a third voltage Vz to generate a second comparison result CMP2. The control signal generator 700 then generates control signals EN_SW1, EN_SW2, and EN_OPA based on the first comparison result CMP1 and the second comparison result CMP2. Wherein, the first voltage Vx ≥ the third voltage Vz ≥ the second voltage Vy ≥ the second default threshold voltage (i.e., equivalent to a first default threshold voltage). Figure 3A The second default threshold voltage (VDS_ON) of the embodiment, and the third voltage Vz ≥ the third default threshold voltage (e.g. Figure 3A The third default threshold voltage (VDS_OFF) of the embodiment.

[0079] In terms of implementation details, the control signal generator 700 includes a multiplexer 710, comparators 720 and 730, a counter 740 and 750, a calculator 760, and logic circuitry 770. The multiplexer 710 receives a second voltage Vy and a third voltage Vz, and selects to supply either the second voltage Vy or the third voltage Vz to the counter 740 based on a second comparison result CMP2. The comparator 730 receives a voltage difference VDS and a first voltage Vx, and uses the comparison result CMP1 to initiate the counting operation of the counter 750 when the voltage difference VDS drops to equal the first voltage Vx. The counter 750 receives a counting range value RG from the calculator 760 and counts a first time interval based on the frequency signal CLK according to the counting range value RG. The comparator 720 is coupled to the multiplexer 710 and compares the voltage difference VDS with the voltage at the output of the multiplexer 710. In the initial state, the multiplexer 710 selects to output the second voltage Vy to the comparator 720. The comparator 720 compares the second voltage Vy with the voltage difference VDS, and when the voltage difference VDS equals the second voltage Vy, it starts the counter 740's counting operation. After the counter 740's counting operation is started, the multiplexer 710 changes to select to output the third voltage Vz to the comparator 720. The comparator 720 then stops the counter 740's counting operation when the voltage difference VDS equals the third voltage Vz, completing the counting. In this embodiment, the counter 740 uses the time length of the negative half-wave of the voltage difference VDS to count, which is approximately equal to the sum of the times of the first time interval and the second time interval.

[0080] On the other hand, the calculator 760 receives the duration of the negative half-wave of the voltage difference VDS calculated by the counter 740, and multiplies the received duration by the parameter α to generate a counting range value RG. In this embodiment, the parameter α is a preset value less than 1.

[0081] In addition, in this embodiment of the invention, the logic circuit 770 is coupled to counters 740 and 750. When the second voltage Vy equals the second default threshold voltage and the third voltage Vz equals the third default threshold voltage, the logic circuit 770 can perform logical operations based on the counting results of counters 740 and 750 and the start or stop state of the counting action, and generate control signals EN_OPA, EN_SW1, and EN_SW2. Specifically, the logic circuit 770 can determine whether it is in the first time interval based on whether the counting action of counter 750 is complete. If the counting action of counter 750 has started but not completed, and counter 740 is started, the logic circuit 770 can enable control signal EN_SW2. If the counting action of counter 750 has completed, and the counting action of counter 740 has started but not completed, the logic circuit 770 can enable control signal EN_OPA. Furthermore, if the counting action of counter 740 stops, the logic circuit 770 can enable control signal EN_SW1. At most one of the above control signals EN_SW1, EN_SW2, and EN_OPA can be enabled.

[0082] On the other hand, regarding the above Figure 6 , Figure 7 In this implementation, the second reference voltage VR2, the first default threshold voltage Vx, the second default threshold voltage VDS_ON, and the third default threshold voltage VDS_OFF can be generated by setting a voltage generator in the gate voltage control circuit 600. Please refer to the following... Figure 8 , Figure 8 A schematic diagram of a voltage generator in a gate voltage control circuit according to an embodiment of the present invention is shown. Figure 8 In this circuit, voltage generator 810 receives operating power supply VHH and performs voltage adjustment based on VHH to generate a second reference voltage VR2, a first default threshold voltage Vx, a second default threshold voltage VDS_ON, and a third default threshold voltage VDS_OFF. Operating power supply VHH has a relatively high voltage value, while voltage VSS is ground voltage. Voltage generator 810 can be a low drop-out (LDO) voltage regulator, or any other form of voltage adjustment circuit known to those skilled in the art, without any limitations. The first default threshold voltage Vx, the second default threshold voltage VDS_ON, and the third default threshold voltage VDS_OFF generated by voltage generator 810 can be used to implement... Figure 7 The first voltage Vx, the second voltage Vy, and the third voltage Vz are specified in the implementation method.

[0083] Please refer to Figure 9 , Figure 9A schematic diagram of an alternator according to an embodiment of the present invention is shown. The alternator 900 includes a rotor RT, a stator ST, and multiple rectifiers 911 to 932. In this embodiment, the stator ST generates multiple phase voltages VU, VV, and VW. The phase voltages VU, VV, and VW are respectively provided to multiple rectifier circuits 910, 920, and 930 at different phases. Rectifier circuit 910 includes rectifiers 911 and 912 connected in series, rectifier circuit 920 includes rectifiers 921 and 922 connected in series, and rectifier circuit 930 includes rectifiers 931 and 932 connected in series. In this embodiment, the alternator 900 also includes a resistor R1 (which is the equivalent resistance of an equivalent load or a rechargeable battery) and a capacitor C1 (which is the equivalent charging capacitor) connected in parallel to generate a rectified output voltage close to DC.

[0084] The rectifiers 911-932 in this embodiment can be implemented using the rectifier 200 from the aforementioned embodiments. The relevant implementation details have been described in detail in the foregoing embodiments and implementation methods, and will not be repeated here.

[0085] Based on the above, the rectifier of the present invention starts counting in a first time interval according to a first default threshold voltage, and within the first time interval, determines whether the voltage difference between the input voltage and the rectified voltage has dropped to equal a second default threshold voltage to decide whether to fully turn on the transistor. This avoids the transistor being fully turned on too late and prevents reverse current from being generated when the voltage difference begins to rise after the transistor is fully turned on, ensuring normal system operation.

[0086] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A rectifier, comprising: A transistor has a first terminal that receives an input voltage, a second terminal that generates a rectified voltage, and a control terminal that receives a gate voltage. as well as A gate voltage control circuit, coupled to the transistor, generates the gate voltage based on the voltage difference between the input voltage and the rectified voltage. Specifically, the gate voltage control circuit, within a first time interval after the voltage difference drops to equal a first default threshold voltage, determines whether the voltage difference is less than a second default threshold voltage to decide whether to provide the gate voltage to turn on the transistor. When the transistor is turned on, the voltage difference is substantially equal to a first reference voltage. In a second time interval following the first time interval, the gate voltage control circuit adjusts the gate voltage to make the voltage difference substantially equal to the second reference voltage. The gate voltage control circuit counts the duration of the negative half-wave of the voltage difference and multiplies the duration by a parameter to set the first time interval, wherein the parameter is a default value less than 1.

2. The rectifier according to claim 1, wherein the first default threshold voltage is greater than the second default threshold voltage, and the first reference voltage is greater than, less than or equal to the second reference voltage.

3. The rectifier according to claim 1, wherein when the gate voltage control circuit determines that the voltage difference has been less than the second default threshold voltage during the first time interval, it provides the gate voltage to turn on the transistor.

4. The rectifier according to claim 1, wherein when the gate voltage control circuit determines that the voltage difference has not been less than the second default threshold voltage within the first time interval, it provides the gate voltage to turn off the transistor.

5. The rectifier according to claim 1, wherein the gate voltage control circuit adjusts the gate voltage to turn off the transistor in a third time interval after the second time interval, when the voltage difference rises from the second reference voltage to a third default threshold voltage.

6. The rectifier according to claim 5, wherein the gate voltage control circuit comprises: An operational amplifier receives the voltage difference and an adjustment voltage, and generates the gate voltage at its output terminal according to a first control signal; The first switch is connected in series between the ground voltage and the output terminal, and is turned on or off according to the second control signal; as well as The second switch, connected in series between the operating voltage and the output terminal, is turned on or off according to the third control signal. The adjusted voltage is equal to the second reference voltage.

7. The rectifier according to claim 6, wherein the gate voltage control circuit further comprises: A control signal generator compares the voltage difference with a first voltage to generate a first comparison result, and compares the voltage difference with a second voltage or a third voltage to generate a second comparison result. Based on the first comparison result and the second comparison result, it generates a first control signal, a second control signal, and a third control signal. Wherein the first voltage ≥ the third voltage ≥ the second voltage ≥ the second default critical voltage, the third voltage ≥ the third default critical voltage, and the first voltage is equal to the first default critical voltage.

8. The rectifier according to claim 7, wherein the control signal generator comprises: A first comparator generates the first comparison result by comparing the voltage difference with the first voltage. The first counter, based on a frequency signal, counts the first time interval according to the first comparison result and the counting range value; The multiplexer selects either the second voltage or the third voltage for output based on the second comparison result; A second comparator compares the output of the multiplexer with the voltage difference to generate the second comparison result; as well as The second counter, based on the frequency signal, performs a counting operation according to the second comparison result to generate a counting result, the counting result representing the sum of the durations of the first time interval and the second time interval; A calculator, coupled between the first counter and the second counter, multiplies the counting result by a parameter to generate the counting range value; as well as A logic circuit, coupled to the first counter and the second counter, generates the first control signal, the second control signal and the third control signal based on the first time interval and the counting result.

9. The rectifier according to claim 8, wherein the second counter starts the counting operation when the voltage difference drops to equal to the second voltage, and stops the counting operation when the voltage difference rises to equal to the third voltage.

10. The rectifier according to claim 7, wherein the gate voltage control circuit further comprises: A voltage generator generates, based on an operating power supply, a first default threshold voltage, a second default threshold voltage, a third default threshold voltage, a second voltage, a third voltage, and a second reference voltage.

11. A rectifier, comprising: A transistor has a first terminal that receives an input voltage, a second terminal that generates a rectified voltage, and a control terminal that receives a gate voltage. as well as A gate voltage control circuit, coupled to the transistor, generates the gate voltage based on the voltage difference between the input voltage and the rectified voltage. The gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage within a first time interval after the voltage difference drops to a first default threshold voltage to decide whether to provide the gate voltage to turn on the transistor. When the transistor is turned on, within the first time interval and within a second time interval after the first time interval, when the voltage difference rises to a third default threshold voltage, the gate voltage is adjusted to turn off the transistor. During the first time interval, the third default threshold voltage is greater than or equal to zero; and During the second time interval, the third default threshold voltage is less than or equal to zero. The gate voltage control circuit counts the duration of the negative half-wave of the voltage difference and multiplies the duration by a parameter to set the first time interval, wherein the parameter is a default value less than 1.

12. The rectifier according to claim 11, wherein the gate voltage control circuit comprises: An operational amplifier receives the voltage difference and an adjustment voltage, and generates the gate voltage at its output terminal according to a first control signal; The first switch is connected in series between the ground voltage and the output terminal, and is turned on or off according to the second control signal; The second switch is connected in series between the operating voltage and the output terminal, and is turned on or off according to the third control signal. as well as A control signal generator compares the voltage difference with a first voltage to generate a first comparison result, and compares the voltage difference with a second voltage or a third voltage to generate a second comparison result. Based on the first comparison result and the second comparison result, it generates a first control signal, a second control signal, and a third control signal. Wherein the first voltage ≥ the third voltage ≥ the second voltage ≥ the second default critical voltage, the third voltage ≥ the third default critical voltage, and the first voltage is equal to the first default critical voltage.

13. An alternator, comprising: Rotor; The stator couples with the rotor and generates multiple AC voltages; as well as A plurality of rectifiers as described in any one of claims 1-12, each of the rectifiers receiving a corresponding AC voltage as the input voltage, the plurality of rectifiers collectively generating the rectified voltage.

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