Method of operating a sensing circuit

Abstract

The present invention discloses a method for operating a sensing circuit. The sensing circuit includes a first capacitor, a second capacitor, a first sensing line, and a second sensing line. The first capacitor is electrically connected to a first sensing electrode via the first sensing line, the second capacitor is electrically connected to a second sensing electrode via the second sensing line, and the first sensing line and the second sensing line are coupled. The method includes: providing a first reference signal to the first sensing line; providing a first sensing signal to the first capacitor; and providing a second reference signal to the second sensing line while the first sensing signal is provided to the first capacitor.

Description

Technical Field

[0001] The present disclosure relates to a method for operating a sensing circuit, and more particularly to a method for operating a sensing circuit to reduce the influence of parasitic capacitance between a plurality of sensing lines on sensing accuracy. Background Art

[0002] Currently, many electronic devices on the market feature fingerprint recognition, which is often used for mobile phone user authentication, financial transactions, and security needs. Improving the accuracy of fingerprint recognition has always been a major concern for manufacturers. Summary of the Invention

[0003] One embodiment of the present disclosure provides a method for operating a sensing circuit. The sensing circuit includes a first capacitor, a second capacitor, a first sensing line, and a second sensing line. The first capacitor is electrically connected to a first sensing electrode via the first sensing line, the second capacitor is electrically connected to a second sensing electrode via the second sensing line, and the first sensing line and the second sensing line are coupled. The method includes: providing a first reference signal to the first sensing line; providing a first sensing signal to the first capacitor; and providing a second reference signal to the second sensing line while the first sensing signal is provided to the first capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 FIG. 4 is a schematic diagram of an electronic device including a sensing circuit according to an embodiment of the present disclosure.

[0005] Figure 2 yes Figure 1 A cross-sectional view of the electronic device along the dotted line 2-2'.

[0006] Figure 3 yes Figure 1 Schematic diagram of the second sensing area and the sensing unit set in .

[0007] Figure 4 for the reason Figure 3 A circuit diagram of a sensing module composed of a sensing electrode and a sensing unit.

[0008] Figure 5 for Figure 4 Signal timing diagram of the scan signal lines, reference signal lines and control signal lines.

[0009] Figure 6 FIG. 1 is a schematic diagram of a sensing circuit according to an embodiment of the present disclosure.

[0010] Figure 7 for Figure 6 Circuit diagram of the sensing circuit.

[0011] Figure 8 for Figure 7Signal timing diagram of two scan signal lines, two reference signal lines and two control signal lines.

[0012] Figure 9 FIG. 4 illustrates the potential changes of two adjacent signal output lines under different conditions according to an embodiment of the present disclosure.

[0013] Figure 10 The flowchart of a method for operating a sensing circuit according to one embodiment of the present disclosure is shown.

[0014] Figure 11 for Figure 7 Signal timing diagram of two scan signal lines, two reference signal lines and two control signal lines in another embodiment.

[0015] Figure 12 FIG. 1 is a circuit diagram of a sensing module according to another embodiment of the present disclosure.

[0016] Figure 13 FIG. 1 is a circuit diagram of a sensing module according to another embodiment of the present disclosure.

[0017] Figure 14 Several aspects of several driving and sensing circuits disclosed in the present invention are illustrated.

[0018] Figure 15 Two other aspects of driving the sensing circuit disclosed in the present invention are shown.

[0019] Figure 16 The diagram shows the states of a plurality of sensing electrodes in different frames according to an embodiment of the present disclosure.

[0020] Figure 17 FIG. 4 illustrates the states of a plurality of sensing electrodes in different frames according to another embodiment of the present disclosure.

[0021] Figure 18 FIG. 4 illustrates the states of a plurality of sensing electrodes in different frames according to another embodiment of the present disclosure.

[0022] Explanation of reference numerals: 10 ~ electronic device; 20 ~ display panel; 22 ~ first sensing area; 24 ~ sensing electrode; 26 ~ thin film transistor circuit; 30 ~ sensing unit assembly; 40 ~ sensor integrated circuit; 50 ~ second sensing area; 52, 52A, 52B, 1-1 to 5-5 ~ sensing electrodes; 54, 54A, 54B ~ sensing lines; 60, 60A, 60B ~ sensing units; 70, 70A, 70B, 70C, 70D ~ sensing module; 80 ~ sensing circuit; 90 ~ method; 100 ~ sensing layer; 110 ~ display layer; 120 ~ circuit layer; 130 ~ substrate; S92, S94, S96 ~ step; Cf ~ sensing capacitor; CLn, CL1, CL2 ~ control signal line; Cp ~ parasitic capacitor; Cref ~ reference capacitor; F1, F2 ~ frame; N1 ~ node ; OLm, OLm+1, OL1, OL2~signal output lines; P1, P2, P3, P4~time period; SLn, SL1, SL2~scanning signal lines; T1, T2, T3~transistors; Vi, Vi1, Vi2~reference signal lines; VC1, VC2~sensing signals; VCOM, VCOM1, VCOM2~common voltage terminals; VR1, VR2, VR3, VR4, VR5, VR6, VR7~reference signals; VS1, VS2, VS3, VS4, VS5, VS6, VS7~scanning signals; V01, V02, V03, V04, V05, V06~expected potential; V11, V12, V13, V14, V15, V16~actual potential; R~red sub-pixel; G~green sub-pixel; B~blue sub-pixel; X, Y~directions. DETAILED DESCRIPTION

[0023] The present disclosure will be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and simplicity, many of the drawings in this disclosure depict only portions of an electronic device, and certain components in the drawings are not drawn to scale. Furthermore, the number and dimensions of components in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0024] Throughout this disclosure and the following claims, certain terms are used to refer to specific components. Those skilled in the art will appreciate that electronic device manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following description and claims, the words "including" and "comprising" are open-ended and should be interpreted as meaning "including, but not limited to..."

[0025] It should be understood that when an element or film layer is referred to as being "on," "disposed on," or "connected to" another element or film layer, it can be directly on or directly connected to the other element or layer, or there may be intervening elements or layers between the two (indirect case). Conversely, when an element is referred to as being "directly on," "disposed directly on," or "directly connected to" another element or film layer, there are no intervening elements or layers between the two.

[0026] Electrical connections can be direct or indirect. Two components can be electrically connected by direct contact to transmit electrical signals, with no other components between them. Two components can also be electrically connected by a conductive bridge between them to transmit electrical signals. Two components can be coupled without a conductive intermediary between them, but with capacitance formed between them through the intermediary.

[0027] While the terms "first," "second," "third," etc. may be used to describe various components, these terms are not intended to be limiting. These terms are used solely to distinguish a single component from other components within the specification. Claims may not use the same terms, but may be replaced with "first," "second," "third," etc., according to the order in which the components are declared in the claims. Thus, in the following description, the first component may be referred to as the second component in a claim.

[0028] The terms "about," "equal," "equal" or "same," "substantially" or "approximately" are generally interpreted as within 20% of a given value or range, or within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value or range.

[0029] It should be noted that the following embodiments may replace, reorganize, or mix the technical features of several different embodiments to implement other embodiments without departing from the spirit of the present disclosure.

[0030] The electronic device disclosed herein may, for example, include a display device, a light-emitting device, an antenna device, a sensing device, a touch display, a curved display, or a free shape display, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. The electronic device may, for example, include a light-emitting diode, fluorescence, phosphor, other suitable display media, or a combination thereof, but is not limited thereto. The light-emitting diode may, for example, include an organic light-emitting diode (OLED), a sub-millimeter light-emitting diode (mini LED), a micro LED, or a quantum dot light-emitting diode (QD, which may be, for example, QLED, QDLED) or other suitable materials or any combination thereof, but is not limited thereto. The display device may, for example, include a spliced display device, but is not limited thereto. The antenna device may, for example, be a liquid crystal antenna, but is not limited thereto. It should be noted that the electronic device may be any combination thereof, but is not limited thereto. Furthermore, the electronic device may have a rectangular, circular, polygonal shape, a curved edge, or other suitable shape. The electronic device may include peripheral systems such as a drive system, a control system, a light source system, and a shelving system to support the display device or splicing device. It should be noted that the electronic device may be any combination of the aforementioned, but is not limited to these. While the following description will use a display device as an example of an electronic device, the disclosure is not limited to this.

[0031] Please refer to Figure 1 and Figure 2 , Figure 1 is a schematic diagram of an electronic device 10 including a sensing circuit according to an embodiment of the present disclosure, and Figure 2 yes Figure 1 A cross-sectional view of electronic device 10 along dashed line 2-2' is shown. The sensing circuit disclosed herein can be used to provide electronic device 10 with fingerprint sensing functionality. However, this disclosure is not limited to fingerprint sensing. For example, the sensing circuit disclosed herein can also be used in electronic devices such as mobile phones, access control systems, and security locks. In addition to fingerprint sensing, it can also serve as an interface for operating the electronic device via touch.

[0032] In this embodiment, the electronic device 10 includes a display panel 20, a sensor unit set 30, and a sensor integrated circuit (Sensor IC) 40. The display panel 20 is used to display images and includes a plurality of pixels, and each pixel may include a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B disposed in the display layer 110. Figure 2The electronic device 10 may include a substrate 130, a circuit layer 120, a display layer 110, and a sensing layer 100. The substrate 130 may include a rigid substrate or a flexible substrate. The substrate 130 may include a flexible substrate or a non-flexible substrate, and its material may include, for example, glass, quartz, a wafer, a sapphire substrate, polycarbonate (PC), polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), other suitable materials, or a combination of the above materials. The circuit layer 120 may be disposed on the substrate 130. In addition, the electronic device 10 further includes a thin-film transistor circuit 26, which may be disposed in the circuit layer 120 to drive the red sub-pixel R, the green sub-pixel G, and the blue sub-pixel B. The sensing unit assembly 30 and the sensor integrated circuit 40 may also be disposed in the circuit layer 120. The display layer 110 may be disposed on the circuit layer 120 . Pixels (including red sub-pixels R, green sub-pixels G, and blue sub-pixels B) may be disposed in the display layer 110 . The sensing layer 100 may be disposed on the display layer 110 . The sensing layer 100 may include a first sensing region 22 and a second sensing region 50 . The first sensing region 22 may include sensing electrodes 24 , and the second sensing region may include sensing electrodes 52 . Furthermore, sensing signals may be transmitted from the sensing layer 100 to the circuit layer 120 via sensing lines 54 . For example, the sensing lines 54 may electrically connect the sensing electrodes 52 and the sensing aggregate unit 30 , thereby transmitting the sensing signals to the sensing aggregate unit 30 . The sensing layer 100 can sense the user's touch and control the operation of the electronic device 10 based on the user's touch. The first sensing area 22 can have a touch function, which can be performed through self-sensing, mutual-sensing or other suitable touch sensing operations; the second sensing area 50 can have touch and / or fingerprint recognition functions. For example, the second sensing area 50 can perform fingerprint recognition through self-sensing touch sensing operations and / or by sensing capacitance changes, but is not limited to this. In addition, the sensing electrode 52 of the sensing circuit disclosed in the present invention is arranged in the second sensing area 50. When the user's finger presses on the second sensing area 50, the sensing circuit disclosed in the present invention can sense the user's fingerprint. In addition, the first sensing area 22 is provided with a plurality of sensing electrodes 24 for generating corresponding signals in response to the user's touch on the display panel 20, thereby controlling the operation of the electronic device 10 based on the user's touch.

[0033] Please refer to Figure 3 , Figure 3 yes Figure 1Schematic diagram of the second sensing region 50 and the sensing unit set 30 in FIG. The second sensing region 50 includes a plurality of sensing electrodes 52, which can be made of a conductive material such as indium tin oxide (ITO) or metal. The sensing unit set 30 includes a plurality of sensing units 60. Each sensing electrode 52 is electrically connected to a corresponding sensing unit 60 via a corresponding sensing line 54. Figure 3 As shown, a plurality of sensing electrodes 52 and a plurality of sensing units 60 are arranged in an array along the X and Y directions. The extending direction of the sensing lines 54 may be substantially parallel to the Y direction. The X direction may be a different direction from the Y direction. For example, the X direction may be substantially perpendicular to the Y direction. When a user's finger presses on the second sensing area 50, the capacitance between each sensing electrode 52 and the user's finger will vary depending on whether the sensing electrode 52 corresponds to a ridge or valley of the fingerprint. The sensing unit 60 can output a corresponding signal to the sensor integrated circuit 40 based on the different capacitance values between each sensing electrode 52 and the finger, allowing the sensor integrated circuit 40 to determine the user's fingerprint based on the signals output by each sensing unit 60.

[0034] Please refer to Figure 4 , Figure 4 for the reason Figure 3FIG2 is a circuit diagram of a sensing module 70 consisting of a sensing electrode 52 and a sensing unit 60. As described above, the sensing electrode 52 is disposed in the second sensing area 50, the sensing unit 60 is disposed in the sensing unit assembly 30, and the sensing electrode 52 is electrically connected to the sensing unit 60 via a sensing line 54. When a user's finger touches the second sensing area 50, the capacitance of the sensing capacitor Cf formed between the sensing electrode 52 and the user's finger changes accordingly. The sensing unit 60 includes transistors T1 and T2 and a reference capacitor Cref. Transistor T1 serves as a reset transistor for controlling the potential of node N1. Its gate is electrically connected to the scan signal line SLn, one of its source and drain electrodes is electrically connected to the reference signal line Vi, and the other of its source and drain electrodes is electrically connected to the node N1. One end of the reference capacitor Cref is electrically connected to the node N1, and the other end of the sensing capacitor Cf is electrically connected to the control signal line CLn. In one embodiment of the present disclosure, the control signal line CLn can be the next scan signal line SLn+1. Where n is a positive integer, SLn represents the nth scan signal line, and SLn+1 represents the (n+1)th scan signal line. The electronic device 10 sequentially controls multiple sensing units 60 via a plurality of scan signal lines, including SLn and SLn+1. Transistor T2 functions as a signal reading transistor. Its gate is electrically connected to node N1, one of its source and drain is electrically connected to the control signal line CLn, and the other of its source and drain is electrically connected to the signal output line OLm. The signal output line OLm is electrically connected to the sensor integrated circuit 40 and is used to output the signal generated by the sensing unit 60 upon sensing the sensing capacitor Cf to the sensor integrated circuit 40.

[0035] Please refer to Figure 4 and Figure 5 . Figure 5 for Figure 4Signal timing diagram for scan signal line SLn, reference signal line Vi, and control signal line CLn. During period P1, scan signal line SLn and reference signal line Vi are provided with scan signal VS1 and reference signal VR1, respectively. Transistor T1 is turned on by receiving scan signal VS1 at its gate, thereby transmitting reference signal VR1 to node N1. When a finger approaches sensing electrode 52, sensing capacitor Cf has a different capacitance depending on whether sensing electrode 52 corresponds to a peak or valley in the fingerprint. During period P2, scan signal VS1 is no longer transmitted to the gate of transistor T1 in sensing unit 60A, turning off transistor T1 in sensing unit 60A. Instead, sensing signal VC1 is transmitted via control signal line CLn to one end of reference capacitor Cref and transistor T2. At this point, the potential at node N1 changes based on the capacitance of sensing capacitor Cf, the capacitance of reference capacitor Cref, and the amplitude of sensing signal VC1. This change in the potential at node N1 is reflected in the current flowing in signal output line OLm. Since the capacitance of the reference capacitor Cref is fixed, the capacitance of the sensing capacitor Cf can be determined based on the current of the signal output line OLm, and the capacitance of the sensing capacitor Cf can be used to determine whether the sensing electrode 52 corresponds to a peak or valley in the fingerprint.

[0036] Please refer to Figure 6 and Figure 7 , Figure 6 FIG. 8 is a schematic diagram of a sensing circuit 80 according to an embodiment of the present disclosure. Figure 7 for Figure 6 The sensing circuit 80 includes at least two sensing electrodes 52A and 52B, at least two sensing lines 54A and 54B, and at least two sensing units 60A and 60B. The sensing electrodes 52A and 52B are Figure 3 Two sensing electrodes in the plurality of sensing electrodes 52, sensing lines 54A and 54B are Figure 3 Two sensing lines in the plurality of sensing lines 54, and sensing units 60A and 60B are Figure 3 Two sensing units among the plurality of sensing units 60. The circuit structures of the sensing units 60A and 60B are similar to Figure 4 The reference capacitor Cref of the sensing unit 60A is electrically connected to the sensing electrode 52A through the sensing line 54A, and the reference capacitor Cref of the sensing unit 60B is electrically connected to the sensing electrode 52B through the sensing line 54B. Since the sensing line 54A and the sensing line 54B are very close, a parasitic capacitance Cp is formed between the sensing line 54A and the sensing line 54B, and the sensing line 54A and the sensing line 54B can be regarded as being coupled to each other through the parasitic capacitance Cp. Figure 1When viewed from above facing the display panel 20, if the two sensing lines 54A and 54B are observed to at least partially overlap, or if they do not overlap but the minimum distance between them is less than 2 micrometers (i.e., 2 μm), the two sensing lines 54A and 54B are considered to be coupled to each other via a parasitic capacitance Cp. Furthermore, the sensing unit 60A and the sensing electrode 52A constitute a sensing module 70A, and the sensing unit 60B and the sensing electrode 52B constitute a sensing module 70B. The sensing electrodes 52A and 52B each form a sensing capacitance Cf with the user's finger. In the present disclosure, the minimum distance between the two sensing lines or whether the two sensing lines at least partially overlap can be measured or observed using an optical microscope, but the present disclosure is not limited thereto.

[0037] Please refer to Figure 7 and Figure 8 , Figure 8 for Figure 7 Signal timing diagram of two scanning signal lines SL1 and SL2, two reference signal lines Vi1 and Vi2, and two control signal lines CL1 and CL2. Figure 8 The timing diagram of each signal within two frames F1 and F2 of the electronic device 10 is depicted. During frame F1, the sensing capacitor Cf in the sensing module 70A is sensed, but the sensing capacitor Cf in the sensing module 70B is not sensed; and during frame F2, the sensing capacitor Cf in the sensing module 70B is sensed, but the sensing capacitor Cf in the sensing module 70A is not sensed. During period P1 of frame F1, the scan signal VS1, the reference signal VR1, the scan signal VS2, and the reference signal VR2 are provided to the scan signal line SL1, the reference signal line Vi1, the scan signal line SL2, and the reference signal line Vi2, respectively. The transistor T1 in the sensing units 60A and 60B is turned on due to its gate receiving the scan signals VS1 and VS2, respectively, thereby transmitting the reference signals VR1 and VR2 to the node N1 in the sensing units 60A and 60B, respectively. Since the reference signals VR1 and VR2 have the same amplitude (ie, the same potential) in this embodiment, there is no voltage difference across the parasitic capacitor Cp, thereby reducing the influence of the parasitic capacitor Cp on the accuracy of sensing the sensing capacitor Cf in the sensing module 70A.

[0038] It should be noted that two signals (e.g., reference signals VR1 and VR2) have the same amplitude (potential). This means that reference signals VR1 and VR2 have voltage amplitudes that are equal, ignoring the spikes caused by noise. An oscilloscope can be used to measure the voltage.

[0039] During period P2 of frame F1, scan signal VS1 is no longer transmitted to the gate of transistor T1 of sensing unit 60A, rendering transistor T1 of sensing unit 60A non-conductive. Furthermore, sensing signal VC1 is transmitted via control signal line CL1 to one end of reference capacitor Cref and transistor T2 of sensing unit 60A, while scan signal VS3 and reference signal VR3 are transmitted to scan signal line SL2 and reference signal line Vi2, respectively. At this point, the potential of node N1 of sensing unit 60B is equal to the potential of reference signal VR3. Since the potential of reference signal VR3 is equal to the potential of reference signal VR2, the potential of node N1 of sensing unit 60B is the same during periods P1 and P2. The potential of node N1 of sensing unit 60A varies based on the capacitance of sensing capacitor Cf, the capacitance of reference capacitor Cref, and the amplitude of sensing signal VC1, thereby affecting the current output to signal output line OL1. Although the potential of node N1 of sensing unit 60A is affected by parasitic capacitance Cp, the potential of node N1 of sensing unit 60B is known during period P2, and the reference capacitance Cref within both sensing units 60A and 60B is also known. Therefore, the degree of influence of parasitic capacitance Cp on the potential of node N1 of sensing unit 60A can be calculated. Based on the calculated degree of influence, the expected potential of node N1 of sensing unit 60A in the absence of parasitic capacitance Cp can be inferred. Notably, during frame F1, since sensing capacitance Cf within sensing module 70B is not sensed, no other signals are applied to control signal line CL2. Furthermore, in this embodiment, reference signals VR1 and VR3 may have the same amplitude (i.e., equal potential).

[0040] Similarly, during period P3 of frame F2, scan signal VS5, reference signal VR5, scan signal VS7, and reference signal VR7 are provided to scan signal line SL1, reference signal line Vi1, scan signal line SL2, and reference signal line Vi2, respectively. Transistors T1 within sensing units 60A and 60B are turned on by receiving scan signals VS5 and VS7 at their gates, thereby transmitting reference signals VR5 and VR7 to nodes N1 within sensing units 60A and 60B, respectively. In this embodiment, reference signals VR5 and VR7 have the same amplitude (i.e., the same potential). During period P4 of frame F2, scan signal VS7 is no longer transmitted to the gate of transistor T1 within sensing unit 60B, thereby turning off transistor T1 within sensing unit 60B. Furthermore, sensing signal VC2 is transmitted via control signal line CL2 to one end of reference capacitor Cref and transistor T2, while scan signal VS6 and reference signal VR6 are transmitted to scan signal line SL1 and reference signal line Vi1, respectively. At this time, the potential of node N1 of sensing unit 60A is equal to the potential of reference signal VR6. Since the potential of reference signal VR6 is equal to the potential of reference signal VR5, the potential of node N1 of sensing unit 60A is the same during periods P3 and P4. The potential of node N1 of sensing unit 60B varies based on the capacitance of sensing capacitor Cf, the capacitance of reference capacitor Cref, and the amplitude of sensing signal VC2, thereby affecting the current output to signal output line OL2. Although the potential of node N1 of sensing unit 60B is affected by parasitic capacitance Cp, the potential of node N1 of sensing unit 60A is a known fixed value during period P4, and the reference capacitance Cref of both sensing units 60A and 60B is also known. Therefore, the degree of influence of parasitic capacitance Cp on the potential of node N1 of sensing unit 60B can be calculated. Based on the calculated degree of influence, the expected potential of node N1 of sensing unit 60B in the absence of parasitic capacitance Cp can be inferred. It is worth noting that during the frame F2 , since the sensing capacitor Cf in the sensing module 70A is not sensed, no other signal is applied to the control signal line CL1 .

[0041] Figure 9 FIG. 5 shows the potential changes of two adjacent sensing lines 54A and 54B under different states according to an embodiment of the present disclosure. Figure 9 In the first embodiment, when the sensing electrodes 52 electrically connected to the sensing lines 54A and 54B are at the positions corresponding to the user's fingers, the potentials of the sensing lines 54A and 54B drop from the expected potentials V01 and V02 to the actual potentials V11 and V12, respectively, due to the presence of the parasitic capacitance Cp. Figure 9In the second embodiment, when the sensing electrodes 52 coupled to the sensing lines 54A and 54B are located at the valleys of the fingerprint corresponding to the user's fingers, the potentials of the signal output lines OLm and OLm+1 rise from the expected potentials V03 and V04 to the actual potentials V13 and V14, respectively, due to the presence of the parasitic capacitance Cp. Figure 9 In the third embodiment, when the sensing electrodes 52 coupled to sensing lines 54A and 54B are located at the peaks and valleys of the fingerprint, respectively, the potentials of sensing lines 54A and 54B change from expected potentials V05 and V06 to actual potentials V15 and V16, respectively, due to the presence of parasitic capacitance Cp. Expected potentials V01, V02, V03, V04, V05, and V06 represent the expected ideal potentials of sensing lines 54A and 54B without the influence of parasitic capacitance Cp, while actual potentials V11, V12, V13, V14, V15, and V16 represent the actual potentials of sensing lines 54A and 54B with the influence of parasitic capacitance Cp. Although the actual potentials V11, V12, V13, V14, V15, and V16 differ from the expected potentials V01, V02, V03, V04, V05, and V06, respectively, the method of the present invention can accurately estimate the effect of the parasitic capacitance Cp on the potentials of the sensing lines 54A and 54B, thereby obtaining the expected potentials V01, V02, V03, V04, V05, and V06, and thereby determine whether the position of the user's finger corresponding to the sensing electrode 52 coupled to each sensing line (such as 54A and 54B) is a fingerprint peak or a fingerprint valley.

[0042] Please refer to Figure 10 , Figure 10 Flowchart of a method 90 for operating a sensing circuit according to an embodiment of the present disclosure. The method 90 comprises the following steps:

[0043] Step S92: Provide a first reference signal (eg, Figure 8 The reference signal VR1 in the first sensing line (e.g., Figure 7 Sense line 54A in );

[0044] Step S94: Provide a first sensing signal (eg, Figure 8 The sensing signal VC1 in the first capacitor (eg, Figure 7 The reference capacitance Cref of the sensing unit 60A); and

[0045] Step S96: After the first sensing signal (eg Figure 8 The sensing signal VC1 in the first capacitor is provided to the first capacitor (eg, Figure 7 The reference capacitance Cref of the sensing unit 60A in the Figure 8In the period P2), the second reference signal (eg, Figure 8 The reference signal VR3 in the second sensing line (e.g., Figure 7 Sense line 54B in ).

[0046] Please refer to Figure 11 , Figure 11 for Figure 7 Signal timing diagram of two scan signal lines SL1 and SL2, two reference signal lines Vi1 and Vi2, and two control signal lines CL1 and CL2 in another embodiment. Figure 11 The timing diagram and Figure 8 The timing diagrams of the two are very similar, the difference between the two is that the potentials of the scanning signal line SL2 and the reference signal line Vi2 are different during the two periods P2 and P3. Figure 8 In the timing diagram, the potentials of the scanning signal line SL2 and the reference signal line Vi2 are kept at a high potential during the two periods P2 and P3; and Figure 11 In the timing diagram, the potentials of the scanning signal line SL2 and the reference signal line Vi2 are kept at a low potential during the two periods P2 and P3. Figure 11 During the periods P1, P2, P3 and P4, the signals provided to the scanning signal line SL1, the reference signal line Vi1, the scanning signal line SL2 and the reference signal line Vi2 are Figure 8 The signals shown are consistent, so according to Figure 11 The operation of the sensing modules 70A and 70B according to the timing diagram will be different from that according to Figure 8 The operation of the sensing modules 70A and 70B is the same as that of the timing diagram, so it will not be described again here.

[0047] In one embodiment of the present disclosure, the reference signal line Vi can be electrically connected to the common voltage terminal VCOM. Figure 12 , Figure 12 FIG. 7 is a circuit diagram of a sensing module 70C according to another embodiment of the present disclosure. Figure 4 The difference between the sensing module 70 in FIG. 7 is that: Figure 4 The transistor T1 of the sensing module 70 is electrically connected to the reference signal line Vi, and Figure 12 The transistor T1 of the sensing module 70C is electrically connected to the common voltage terminal VCOM, wherein the common voltage terminal VCOM can provide a common voltage to the plurality of sensing modules 70C at the same time.

[0048] Please refer to Figure 13 , Figure 13 FIG. 7 is a circuit diagram of a sensing module 70D according to another embodiment of the present disclosure. Figure 12 The sensing module 70C is similar to the sensing module 70C in FIG. 1 , but the difference between the two is that: Figure 13 Sensing module 70D further includes a transistor T3, whose gate is electrically connected to control signal line CLn, one of its source and drain is electrically connected to the common voltage terminal VCOM, and the other of its source and drain is electrically connected to transistor T2. Transistor T3 changes its conduction state based on the signal transmitted by control signal line CLn, thereby controlling the electrical connection between common voltage terminal VCOM and transistor T2. Therefore, the timing of the signals used to control sensing module 70D can be consistent with the timing of the signals used to control sensing module 70C described above, and will not be further described here.

[0049] Please refer to Figure 14 , Figure 14 Several driving modes disclosed herein are illustrated. According to different time periods, different groups of sensing electrodes 52 perform sensing. In this embodiment, the sensing circuit 80 can be divided into two groups according to whether sensing is performed in a certain time period. The sensing electrodes 52 marked with a grid are the first group of electrodes, and the sensing electrodes 52 not marked with a grid are the second group of electrodes. In one time period, the sensing unit 60 electrically connected to the first group of sensing electrodes 52 senses the coupled sensing capacitor Cf, while the sensing unit 60 electrically connected to the second group of sensing electrodes 52 does not sense the coupled sensing capacitor Cf; in the next time period, the sensing unit 60 electrically connected to the second group of sensing electrodes 52 senses the coupled sensing capacitor Cf, while the sensing unit 60 electrically connected to the first group of sensing electrodes 52 does not sense the coupled sensing capacitor Cf. In Figure 14 In the three illustrated embodiments, sensing electrodes 52 arranged in the same row along the X-direction can simultaneously be the first group of electrodes or the second group of electrodes, while sensing electrodes 52 in two adjacent rows can be the first group of electrodes and the second group of electrodes, respectively. For example, when the sensing electrodes 52 in the first and third rows are the first group of electrodes, the sensing electrodes 52 in the second and fourth rows are the second group of electrodes. Similarly, when the sensing electrodes 52 in the first and third rows are the second group of electrodes, the sensing electrodes 52 in the second and fourth rows are the first group of electrodes. Through the above-described driving method, the effect of parasitic capacitance Cp on the potential of each sensing line (such as 54A and 54B) can be accurately estimated, thereby obtaining the expected potential of each sensing line (such as V01, V02, V03, V04, V05, and V06 described above). Based on this, it can be determined whether the position of the user's finger corresponding to the sensing electrode 52 coupled to each signal output line is a fingerprint peak or a fingerprint valley.

[0050] Please refer to Figure 15 , Figure 15 FIG. 4 shows two other modes of driving the sensing circuit 80 disclosed in the present invention. Figure 14 Similarly, Figure 15The sensing electrodes 52 marked with a grid are the first group of electrodes, and the sensing electrodes 52 not marked with a grid are the second group of electrodes. The sensing units 60 electrically connected to the first group of electrodes are the sensing units 60 that sense the coupled sensing capacitors, while the sensing units 60 electrically connected to the second group of electrodes do not sense the coupled sensing capacitors. Figure 15 As shown, the four sensing electrodes 52 located above, below, to the left, and right of the first electrode group constitute the second electrode group, while the four sensing electrodes 52 located above, below, to the left, and to the right of the second electrode group constitute the first electrode group. This driving method prevents adjacent sensing electrodes 52 from being used for sensing simultaneously, allowing for accurate estimation of the impact of parasitic capacitance Cp on the potential of each sensing line. This allows for the expected potential of each sensing line to be determined, allowing for the determination of whether the position of the user's finger corresponding to the sensing electrode 52 to which each sensing line is electrically connected is a fingerprint peak or valley.

[0051] Please refer to Figure 16 , Figure 16 FIG. 4 illustrates the states of the plurality of sensing electrodes 52 in different frames according to an embodiment of the present disclosure. Figure 14 Similarly, Figure 16 The sensing electrodes 52 marked with a grid are the first group of electrodes, and the sensing electrodes 52 not marked with a grid are the second group of electrodes. In this embodiment, in the same frame (the same time period), the first group of sensing electrodes are the electrodes that are performing sensing, and the second group of electrodes are the electrodes that are not performing sensing. The sensing state of each sensing electrode 52 will be changed every other frame. Figure 16 In this embodiment, the multiple sensing electrodes 52 can be roughly divided into two frames for sensing cycles. When a sensing electrode 52 (the first group of electrodes) is sensing, the sensing electrodes 52 above, below, and to the left and right of it (the second group of electrodes) are not sensing. In the 2Nth frame, the first group of sensing electrodes 52 is sensing, while the second group of sensing electrodes 52 above, below, and to the left and right of the first group of sensing electrodes 52 are not sensing. In the (2N+1)th frame, the first group of sensing electrodes 52 is sensing, while the second group of sensing electrodes 52 above, below, and to the left and right of the first group of sensing electrodes 52 are not sensing. Where N is 0 or a positive integer. The sensing electrodes 52 in the same group are not adjacent to each other. Through time-sharing driving, the effect of parasitic capacitance Cp on the potential of each sensing line is accurately estimated, thereby obtaining the expected potential of each sensing line. Based on this, it is determined that the position of the user's finger corresponding to the sensing electrode 52 electrically connected to each sensing line is a fingerprint peak or valley.

[0052] exist Figure 17 In the embodiment, the plurality of sensing electrodes 52 are divided into 4 frames for a cycle of sensing. When a sensing electrode 52 (the first group of electrodes) is sensing, the surrounding sensing electrodes (the second group of electrodes) are not sensing. For example (with Figure 17 For example), when sensing electrode 1-1 performs sensing, sensing electrode 1-2, sensing electrode 2-1, and sensing electrode 2-2 do not perform sensing; when sensing electrode 3-1 performs sensing, sensing electrode 2-1, sensing electrode 2-2, sensing electrode 3-2, sensing electrode 4-1, and sensing electrode 4-2 do not perform sensing; when sensing electrode 3-3 performs sensing, sensing electrode 2-2, sensing electrode 2-3, sensing electrode 2-4, sensing electrode 3-2, sensing electrode 3-4, sensing electrode 4-2, sensing electrode 4-3, and sensing electrode 4-4 do not perform sensing. In the 4Nth frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 1-1, sensing electrode 1-3, sensing electrode 1-5, sensing electrode 3-1, sensing electrode 3-3, sensing electrode 3-5, sensing electrode 5-1, sensing electrode 5-3, and sensing electrode 5-5 perform sensing, while the sensing electrodes 52 of the second group arranged around the sensing electrodes 52 of the first group do not perform sensing; when in the (4N+1)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 2-1, sensing electrode 2-3, sensing electrode 2-5, sensing electrode 4-1, sensing electrode 4-3, and sensing electrode 4-5 perform sensing, while the sensing electrodes 52 arranged around the first group do not perform sensing. The second group of sensing electrodes 52 surrounding the first group of sensing electrodes 52 do not perform sensing; in the (4N+2)th frame, the first group of sensing electrodes 52 perform sensing, for example, sensing electrodes 1-2, sensing electrodes 1-4, sensing electrodes 3-2, sensing electrodes 3-4, sensing electrodes 5-2, and sensing electrodes 5-4 perform sensing, while the second group of sensing electrodes 52 arranged around the first group of sensing electrodes 52 do not perform sensing; and in the (4N+3)th frame, the first group of sensing electrodes 52 perform sensing, for example, sensing electrodes 2-2, sensing electrodes 2-4, sensing electrodes 4-2, and sensing electrodes 4-4 perform sensing, while the second group of sensing electrodes 52 arranged around the first group of sensing electrodes 52 do not perform sensing. Wherein N is 0 or a positive integer.

[0053] exist Figure 18 In the embodiment, the plurality of sensing electrodes 52 are divided into 9 frames for a cycle of sensing. When a sensing electrode 52 (the first group of electrodes) is sensing, the two consecutive sensing electrodes (the second group of electrodes) around it are not sensing. For example (with Figure 18For example, when sensing electrode 1-1 performs sensing, sensing electrode 1-2, sensing electrode 1-3, sensing electrode 2-1, sensing electrode 3-1, sensing electrode 2-2, and sensing electrode 3-3 do not perform sensing; when sensing electrode 1-2 performs sensing, sensing electrode 1-1, sensing electrode 1-3, sensing electrode 1-4, sensing electrode 2-2, and sensing electrode 3-2 do not perform sensing; when sensing electrode 3-3 performs sensing, sensing electrode 1-3, sensing electrode 2-3, sensing electrode 4-3, sensing electrode 5-3, sensing electrode 3-1, sensing electrode 3-2, sensing electrode 3-4, and sensing electrode 3-5 do not perform sensing.In the 9Nth frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 1-1, sensing electrode 1-4, sensing electrode 4-1, and sensing electrode 4-4 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrode 52 of the first group do not perform sensing; in the (9N+1)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 1-2, sensing electrode 1-5, sensing electrode 4-2, and sensing electrode 4-5 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrode 52 of the first group do not perform sensing; in the (9N+2)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 1-2, sensing electrode 1-5, sensing electrode 4-2, and sensing electrode 4-5 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrode 52 of the first group do not perform sensing; ) frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrodes 1-3 and sensing electrodes 4-3 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrodes 52 of the first group do not perform sensing; when in the (9N+3)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrodes 2-1, sensing electrodes 2-4, sensing electrodes 5-1, and sensing electrodes 5-4 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrodes 52 of the first group do not perform sensing; when in the (9N+4)th frame, the sensing electrodes 52 of the first group perform sensing , for example, sensing electrode 2-2, sensing electrode 2-5, sensing electrode 5-2, and sensing electrode 5-5 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrode 52 of the first group do not perform sensing; when in the (9N+5)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 2-3 and sensing electrode 5-3 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrode 52 of the first group do not perform sensing; when in the (9N+6)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 3-1 and sensing electrode 3- 4 performs sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrodes 52 of the first group do not perform sensing; when in the (9N+7)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 3-2 and sensing electrode 3-5 perform sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrodes 52 of the first group do not perform sensing; and when in the (9N+8)th frame, the sensing electrodes 52 of the first group perform sensing, for example, sensing electrode 3-3 performs sensing, while two consecutive sensing electrodes 52 of the second group arranged around the sensing electrodes 52 of the first group do not perform sensing. Wherein N is 0 or a positive integer.

[0054] By using the above-mentioned method for operating the sensing circuit in each embodiment of the present disclosure, the influence of the parasitic capacitance between the sensing lines on the sensing accuracy of the sensing circuit can be reduced when the resolution of the sensing circuit becomes higher and higher.

[0055] The foregoing description is merely an example of the present disclosure and is not intended to limit the present disclosure. Persons skilled in the art will readily appreciate that the present disclosure is susceptible to various modifications and variations. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present disclosure are intended to be within the scope of protection of the present disclosure.

Claims

1. A method for operating a sensing circuit, the sensing circuit comprising a first capacitor, a second capacitor, a first sensing line, and a second sensing line, the first capacitor being electrically connected to a first sensing electrode via the first sensing line, the second capacitor being electrically connected to a second sensing electrode via the second sensing line, the first sensing line being coupled to the second sensing line, wherein: The method comprises the following steps: providing a first reference signal to the first sensing line; providing a first sensing signal to the first capacitor; During a period in which the first sensing signal is provided to the first capacitor, a second reference signal is provided to the second sensing line; providing a second sensing signal to the second capacitor; as well as During the period when the second sensing signal is provided to the second capacitor, a third reference signal is provided to the first sensing line.

2. The method according to claim 1, wherein The second reference signal and the third reference signal have the same amplitude.

3. The method according to claim 1, wherein The method further comprises the following steps: A fourth reference signal is provided to the second sensing line.

4. The method according to claim 1, wherein The sensing circuit is configured to sense a fingerprint.

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