Electrostatic discharge protection circuit, radio frequency chip and electronic equipment

Abstract

The present invention discloses an electrostatic discharge protection circuit, a radio frequency chip, and an electronic device, which are applied to a radio frequency chip. The radio frequency chip also includes a power amplifier, a transformer, a radio frequency switch, and a radio frequency antenna connected in sequence. The protection circuit includes: a first MOS device and a second MOS device, each of which includes a source, a drain, a gate, an active area substrate, a peripheral substrate, and an isolation region provided between the active area substrate and the peripheral substrate; the source and drain of the first MOS device are short-circuited and connected to the active area substrate of the second MOS device, the source and drain of the second MOS device are short-circuited and connected to the active area substrate of the first MOS device, the active area substrate of the first MOS device is connected to the radio frequency antenna, and the active area substrate of the second MOS device is connected to the input end of the radio frequency switch. When the radio frequency antenna receives a very large electrostatic signal, the protection circuit can divert the discharge current to the ground and clamp the voltage at the same time, thereby playing a protective role.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to an electrostatic discharge protection circuit, a radio frequency chip, and an electronic device. Background Art

[0002] Electrostatic discharge (ESD) occurs when charge accumulates in the chip's external environment and internal structure during the manufacturing, transportation, or use of integrated circuits. This charge then flows into the chip through the chip's pins. Due to this static buildup, the instantaneous current flowing through the chip can reach several amperes (A) and a voltage of several thousand volts (V), which is enough to completely destroy the chip. Statistics show that over 30% of chip failures are caused by ESD, necessitating specialized research into integrated circuit reliability.

[0003] Electrostatic discharge (ESD) protection circuits are designed to prevent normal circuitry from becoming an ESD discharge path and being damaged. Therefore, a low-impedance bypass is required to direct the ESD current into the power supply. During normal circuit operation, the ESD protection circuit must not affect normal circuit operation and must not be damaged itself.

[0004] Existing ESD protection options include on-chip and off-chip. Off-chip protection involves the selection and design of external protection components and will not be discussed in detail. Common on-chip ESD protection circuits use bidirectional diodes to protect the circuit. However, when the RF power amplifier transmits high power, significant voltage fluctuations occur at the antenna end, which can cause the bidirectional diode in the ESD protection circuit to conduct to ground, significantly affecting linearity. Other ESD protection circuits also have complex structures, increasing both area and production cost. Summary of the Invention

[0005] The present invention provides an electrostatic discharge protection circuit, a radio frequency chip, and an electronic device. The protection circuit has a simple structure and can divert the discharge current to ground and simultaneously clamp the voltage when an RF antenna receives a very high electrostatic signal, thereby protecting the main working circuits of the RF chip.

[0006] In a first aspect, the present invention provides the following technical solutions through an embodiment of the present invention:

[0007] An electrostatic discharge protection circuit, characterized in that it is applied to a radio frequency chip, wherein the radio frequency chip also includes a power amplifier, a transformer, a radio frequency switch, and a radio frequency antenna connected in sequence; the protection circuit includes: a first MOS device and a second MOS device, each of the first MOS device and the second MOS device including a source, a drain, a gate, an active area substrate, a peripheral substrate, and an isolation region arranged between the active area substrate and the peripheral substrate; the source and drain of the first MOS device are short-circuited and connected to the active area substrate of the second MOS device, the source and drain of the second MOS device are short-circuited and connected to the active area substrate of the first MOS device, the active area substrate of the first MOS device is connected to the radio frequency antenna, and the active area substrate of the second MOS device is connected to the input end of the radio frequency switch; the peripheral substrates of the first MOS device and the second MOS device are both grounded, the gate and the isolation region of the first MOS device are both connected to a power supply end, and the gate and the isolation region of the second MOS device are both connected to a power supply end.

[0008] Preferably, the first MOS device and the second MOS device are both deep N-well NMOS devices.

[0009] Preferably, the first MOS device and the second MOS device are both deep P-well PMOS devices.

[0010] Preferably, the protection circuit further includes: a first filter resistor, a second filter resistor and a third filter resistor; the peripheral substrates of the first MOS device and the second MOS device are both grounded through the first filter resistor, the gate and the isolation region of the first MOS device are both connected to the power supply end through the second filter resistor, and the gate and the isolation region of the second MOS device are both connected to the power supply end through the third filter resistor.

[0011] Preferably, the resistance values ​​of the first filter resistor, the second filter resistor and the third filter resistor are all 20K-30K ohms.

[0012] Preferably, the voltage of the power supply terminal is 3.3V.

[0013] In a second aspect, the present invention provides the following technical solution through an embodiment of the present invention:

[0014] A radio frequency chip, comprising a power amplifier, a transformer, a radio frequency switch, a radio frequency antenna, and an electrostatic discharge protection circuit as described in any one of the first aspects above; the output end of the power amplifier is connected to the input end of the transformer, the first output end of the transformer is connected to the input end of the radio frequency switch, and the second output end is grounded, the output end of the radio frequency switch is connected to the radio frequency antenna, one end of the electrostatic discharge protection circuit is connected to the input end of the radio frequency chip, and the other end of the electrostatic discharge protection circuit is connected to the radio frequency antenna.

[0015] Preferably, the voltage level of the transformer in the radio frequency chip is between 2KV and 10KV.

[0016] Preferably, the radio frequency chip further includes: a low noise amplifier, and the low noise amplifier is connected to the radio frequency antenna.

[0017] In a third aspect, the present invention provides the following technical solution through an embodiment of the present invention:

[0018] An electronic device includes: the radio frequency chip as described in the second aspect above.

[0019] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0020] An embodiment of the present invention provides an electrostatic discharge protection circuit, a radio frequency chip, and an electronic device. The protection circuit includes: a first MOS device and a second MOS device, each of the first MOS device and the second MOS device including a source, a drain, a gate, an active area substrate, a peripheral substrate, and an isolation region provided between the active area substrate and the peripheral substrate; the source and drain of the first MOS device are short-circuited and connected to the active area substrate of the second MOS device, the source and drain of the second MOS device are short-circuited and connected to the active area substrate of the first MOS device, the active area substrate of the first MOS device is connected to an RF antenna terminal, and the active area substrate of the second MOS device is connected to an input terminal of a RF switch. The protection circuit uses a device including an active area substrate and a peripheral substrate. The protection circuit is obtained through a specific connection relationship between the two devices. The obtained protection circuit is connected in parallel at both ends of the RF switch, so that when the RF chip circuit is in normal transmission mode, the RF switch is in a low-resistance state, so that the signal is transmitted through the RF switch and the RF antenna; when the RF chip circuit is in normal reception mode, the RF switch is turned on, the switch and the protection circuit are in a high-resistance state, and the RF chip circuit receives the signal normally; when a very large electrostatic signal is input to the RF antenna end, the transistor in the protection circuit is reversely broken down, so that the protection circuit is in a low-resistance state, which can conduct the discharge current to the ground and clamp the voltage at the same time, thereby protecting the main working circuit in the RF chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 A structural diagram of an electrostatic discharge protection circuit provided by an embodiment of the present invention;

[0023] Figure 2 A cross-sectional view of the layout of a six-terminal deep N-well NMOS active device provided in an embodiment of the present invention;

[0024] Figure 3 A diagram showing the working state of an electrostatic discharge protection circuit provided by an embodiment of the present invention;

[0025] Figure 4 A structural block diagram of a radio frequency chip provided in an embodiment of the present invention;

[0026] Figure 5 This is a structural block diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The present invention provides an electrostatic discharge protection circuit, a radio frequency chip, and an electronic device. The protection circuit has a simple structure and can divert the discharge current to ground and simultaneously clamp the voltage when an RF antenna receives a very high electrostatic signal, thereby protecting the main working circuits of the RF chip.

[0028] The technical solution of the embodiment of the present application is to solve the above technical problems, and the overall idea is as follows:

[0029] An electrostatic discharge protection circuit is applied to a radio frequency chip, wherein the radio frequency chip further includes a power amplifier, a transformer, a radio frequency switch, and a radio frequency antenna connected in sequence. The protection circuit includes: a first MOS device and a second MOS device, each of which includes a source, a drain, a gate, an active area substrate, a peripheral substrate, and an isolation region provided between the active area substrate and the peripheral substrate; the source and drain of the first MOS device are short-circuited and connected to the active area substrate of the second MOS device, the source and drain of the second MOS device are short-circuited and connected to the active area substrate of the first MOS device, the active area substrate of the first MOS device is connected to the radio frequency antenna, and the active area substrate of the second MOS device is connected to the input end of the radio frequency switch; the peripheral substrates of the first MOS device and the second MOS device are both grounded, the gate and the isolation region of the first MOS device are both connected to a power supply end, and the gate and the isolation region of the second MOS device are both connected to a power supply end.

[0030] In order to better understand the above technical solution, the above technical solution will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0031] It should be noted that the electrostatic discharge protection circuit provided in this application is applicable to the RF front end, and mainly provides on-chip electrostatic discharge protection for the RF front end. The active area substrate mentioned in this application can refer to the device substrate itself, and the peripheral substrate refers to the external substrate of the device.

[0032] In a first aspect, an embodiment of the present invention provides an electrostatic discharge protection circuit, which is applied to a radio frequency chip. The radio frequency chip includes a power amplifier 101, a transformer 102, a radio frequency switch 103, and a radio frequency antenna 104 connected in sequence. The output of the power amplifier 101 is connected to the input of the transformer 102. The first output of the transformer 102 is connected to the input of the radio frequency switch 103, and the second output of the transformer 102 is grounded. The output of the radio frequency switch 103 is connected to the radio frequency antenna 104.

[0033] Specifically, if Figure 1 As shown, the protection circuit 100 includes: a first MOS device M1 and a second MOS device M2 , and both the first MOS device M1 and the second MOS device M2 include an active region substrate and a peripheral substrate.

[0034] The source and drain of the first MOS device M1 are short-circuited and connected to the active region substrate of the second MOS device M2. The source and drain of the second MOS device M2 are short-circuited and connected to the active region substrate of the first MOS device M1. The active region substrate of the first MOS device M1 is connected to the RF antenna 104 (or the output of the RF switch 103), and the active region substrate of the second MOS device M2 is connected to the input of the RF switch 103. The peripheral substrates of the first MOS device M1 and the second MOS device M2 are both grounded. The gate and isolation region of the first MOS device M1 are both connected to the power supply voltage, and the gate and isolation region of the second MOS device M2 are both connected to the power supply voltage.

[0035] In a specific embodiment, the first MOS device M1 and the second MOS device M2 may both be deep N-well NMOS devices, specifically, as shown in FIG. Figure 2 As shown, the deep N-well NMOS device is a six-terminal deep N-well active device, with the six terminals being the gate, drain, source, active region bulk, isolation region (i.e., N-well), and peripheral substrate (P-sub). The active region substrate (the substrate itself) of the deep N-well NMOS device is completely isolated from the peripheral substrate.

[0036] Protection circuit 100 comprises two deep N-well NMOS transistors (NMOSs). The gates and N-wells of the two NMOSs are connected to a fixed power supply voltage (VDD), and the substrates of the two NMOSs are grounded (VSS). The drain and source of a first MOS device M1 (first deep N-well NMOS device M1) are shorted together and connected to the substrate of a second MOS device M2 (second deep N-well NMOS device M2), serving as one end of protection circuit 100. The drain and source of the second MOS device M2 (second deep N-well NMOS device M2) are shorted together and connected to the substrate of the first MOS device M1 (first deep N-well NMOS device M1), serving as the other end of protection circuit 100.

[0037] Specifically, if Figure 2 As shown, the active region substrate of a deep N-well MOS device is not connected to the surrounding substrate. When the N-well is biased at VDD, the reverse isolation effect of the PN junction prevents the substrate signal from being conducted to the surrounding substrate. This makes it suitable for use in RF circuits without affecting other circuits. It should be noted that the IV curve of a deep N-well NMOS device is consistent with that of a conventional MOS transistor.

[0038] When the gate of a deep N-well NMOS device is biased at VDD, an inversion layer forms in the channel, connecting the drain and source together. The entire source and drain form an N-type semiconductor, while the active area substrate is a P-type semiconductor. The source, drain, and active area substrate form a PN junction. Therefore, using two deep N-well NMOS devices achieves the same effect as a bidirectional diode. Specifically, the source and drain of the deep N-well NMOS device, when short-circuited, are equivalent to the N-terminal of the PN junction, and the substrate is equivalent to the P-terminal of the PN junction. The signal flows from the substrate to the common node of the source and drain, and then flows out.

[0039] Unlike conventional diodes, when the transmit path operates normally, the signal amplitude is extremely large. Conventional bidirectional diode protection circuits, due to this large swing, create a low-resistance path to ground at the PN junction, significantly impacting linearity. The protection circuit employed in this application completely isolates the active area substrate from the peripheral substrate, eliminating this low-resistance path and minimizing linearity. Furthermore, the deep N-well NMOS device is relatively small, resulting in low parasitic capacitance and minimizing the impact on the matching circuit.

[0040] For example, the voltage VDD may be 3.3V. Of course, the voltage VDD may also be other voltage values, such as 2.5V, 5V, etc., which is not limited in this application.

[0041] Furthermore, in order to prevent the influence of overcurrent on the protection circuit, such as Figure 1 As shown, the circuit may further include: a first filter resistor R1, a second filter resistor R2, and a third filter resistor R3. The peripheral substrates of the first MOS device M1 and the second MOS device M2 are both grounded through the first filter resistor R1, the gate and isolation region of the first MOS device M1 are both connected to the power supply terminal through the second filter resistor R2, and the gate and isolation region of the second MOS device M2 are both connected to the power supply terminal through the third filter resistor R3.

[0042] Specifically, the peripheral substrates of the first deep N-well NMOS device M1 and the second deep N-well NMOS device M2 are both grounded through the first filter resistor R1, the gate and N-well of the first deep N-well NMOS device M1 are both connected to the power supply end through the second filter resistor R2, and the gate and N-well of the second deep N-well NMOS device M2 are both connected through the third filter resistor R3. The filter resistor R1, the second filter resistor R2 and the third filter resistor R3 are respectively used for filtering the gate bias, filtering the N-well bias and filtering the peripheral substrate bias in the first deep N-well NMOS device M1 and the second deep N-well NMOS device M2.

[0043] For example, the resistance values ​​of the first filter resistor R1, the second filter resistor R2, and the third filter resistor R3 can be between 20K and 30K ohms, for example, all 30K ohms. Of course, the first filter resistor R1, the second filter resistor R2, and the third filter resistor R3 can also have different resistance values, which is not limited in this application.

[0044] It should be noted that, in order to ensure the impedance consistency of the protection circuit, the two deep N-well NMOS devices in the above embodiment need to be completely matched, that is, the two devices have the same size and layout.

[0045] Specifically, the RF chip may further include a low noise amplifier 105 connected to the RF antenna 104 for reducing the noise of the amplifier itself when amplifying weak signals to prevent interference with the signal and thereby improve the output signal-to-noise ratio.

[0046] The following describes in detail the working process of the protection circuit provided by this application in the RF chip circuit:

[0047] like Figure 3 As shown, the normal working mode of the RF chip circuit is the transmission mode (such as Figure 3 TX arrow in the flow direction) and receive mode (such as Figure 3 ), when the RF chip circuit is in transmit mode, the RF switch 103 is closed, the power amplifier 101 (PA) starts to output power, the second deep N-well NMOS device M2 in the protection circuit 100 is forward-conducted, and the first deep N-well NMOS device M1 is reverse-cut off. However, at this time, the on-resistance of the protection circuit is very large compared to that of the RF switch 103. Therefore, a large amount of signal will flow through the RF switch 103 instead of the protection circuit, which will not have a significant impact on the linearity of the transmission.

[0048] When the circuit is in receiving mode, the RF switch 103 is in the open state, and the received signal flows from the RF antenna to the low-noise amplifier and the protection circuit respectively. At this time, the first deep N-well NMOS device M1 of the protection circuit 100 is forward-conducting, and the second deep N-well NMOS device M2 is reverse-cut off. The low-noise amplifier (LNA) is in a normal receiving state. Since the impedance of the protection circuit is large, the signal mainly flows into the LNA, which does not have a significant impact on the circuit's reception.

[0049] When an electrostatic discharge voltage (voltage value such as 2KV, 4KV or higher) is input to the RF antenna 104, the second deep N-well NMOS device M2 in the protection circuit 100 is forward-conducted, and the first deep N-well NMOS device M1 is in the reverse breakdown region. At this time, the protection circuit 100 has a very low impedance due to the simultaneous conduction of the first deep N-well NMOS device M1 and the second deep N-well NMOS device M2. Therefore, the electrostatic discharge current mainly flows through the protection circuit 100 to the transformer 102, and is output through the ground terminal of the transformer 102 and flows into the ground. In addition, due to the reverse breakdown characteristics of the MOS device, the voltage at the RF antenna 104 is clamped at a lower value, so that when the electrostatic discharge voltage is input to the RF antenna 104, it will not cause a destructive effect on the receiving or transmitting path. At the same time, the reverse breakdown can also be restored. The electrostatic discharge protection circuit provided by the present application achieves the expected protection effect.

[0050] Therefore, the low-resistance bypass formed by the first deep N-well NMOS device M1 and the second deep N-well NMOS device M2 must not only absorb ESD current but also clamp the voltage of the operating circuit to effectively prevent transistor gate oxide breakdown due to excessive voltage. During normal circuit operation, the ESD protection circuit will not affect the normal circuit operation state, and the ESD protection circuit itself will not be damaged.

[0051] This application provides voltage test levels for overvoltage tests on electrostatic discharge protection circuits. Table 1 shows the preferred range of test levels, including contact discharge and air discharge.

[0052] Table 1

[0053]

[0054] Of course, as another optional embodiment, the first MOS device M1 and the second MOS device M2 may also be deep P-well PMOS devices, whose connection method and working principle are the same as those of deep N-well NMOS devices, which will not be described in detail here.

[0055] The difference is that, when the protection circuit includes a first deep P-well PMOS device and a second deep P-well PMOS device, when the RF chip circuit is in the transmitting mode, the RF switch 103 is closed, the power amplifier (PA) starts to output power, the first deep P-well PMOS device in the protection circuit 100 is forward-conducted, and the second deep P-well PMOS device is reverse-cut off. At this time, the on-resistance is very large compared to the RF switch 103, and a large amount of signals will flow through the RF switch 103 instead of the protection circuit, which will not have a significant impact on the linearity of the transmission.

[0056] When the circuit is in receive mode, the second deep P-well PMOS device of the protection circuit 100 is forward-conducting, the first deep P-well PMOS device is reverse-cutoff, the LNA is in a normal receive state, and the RF switch 103 is in an open state. Since the impedance of the protection circuit is relatively large, the signal mainly flows into the LNA, which does not have a significant impact on the circuit's reception.

[0057] When an electrostatic discharge voltage (e.g., 2kV, 4kV, or higher) is input to the RF antenna 104, the protection circuit 100 is in the reverse breakdown region, with very low impedance. Therefore, the electrostatic discharge current flows through the protection circuit 100 and then through the transformer 102, flowing to ground. Furthermore, due to the reverse breakdown characteristics of the device, the voltage at the RF antenna 104 is clamped to a very low value, thus preventing a destructive impact on the receiving or transmitting paths. Furthermore, the reverse breakdown is recoverable, and the electrostatic discharge protection circuit provided by this application achieves the desired protection effect.

[0058] In summary, the embodiment of the present application connects two devices having an active area substrate and a peripheral substrate in a specific manner to obtain a protection circuit, and connects the protection circuit to the working device in the RF chip, thereby achieving the effect of electrostatic discharge protection, and the protection circuit will not affect the normal operation of the RF front-end circuit. Therefore, the embodiment of the present invention not only realizes electrostatic discharge protection of the RF antenna end, but also does not have a significant impact on the operation of the circuit. In addition, the protection circuit has a simple structure and a small area, effectively solving the problem of electrostatic discharge in the RF front-end circuit, and further improving the performance of the RF chip.

[0059] In the second aspect, based on the same inventive concept, this embodiment provides a radio frequency chip 200, such as Figure 4 As shown, it includes: a power amplifier, a transformer, a radio frequency switch, a radio frequency antenna, and the electrostatic discharge protection circuit 100 as described in any one of the first aspects above.

[0060] Among them, the output end of the power amplifier is connected to the input end of the transformer, the first output end of the transformer is connected to the input end of the RF switch, the second output end is grounded, the output end of the RF switch is connected to the RF antenna, one end of the electrostatic discharge protection circuit is connected to the input end of the RF chip, and the other end of the electrostatic discharge protection circuit is connected to the RF antenna.

[0061] It should be noted that the voltage level of the transformer in the RF chip can be between 2kV and 10kV. For example, the transformer level is 3kV. Specifically, the RF chip may also include a low-noise amplifier (LNA), which is connected to the RF antenna and is used to reduce the amplifier's own noise when amplifying weak signals, thereby improving the output signal-to-noise ratio.

[0062] On the third aspect, based on the same inventive concept, Figure 5As shown, this embodiment provides an electronic device 300, comprising the radio frequency chip 200 as described in the second aspect. For example, the electronic device 300 can be an electronic communication device such as a mobile phone or a computer.

[0063] It will be understood by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0064] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0065] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. An electrostatic discharge protection circuit, characterized in that: Applicable to a radio frequency chip, the radio frequency chip also includes a power amplifier, a transformer, a radio frequency switch and a radio frequency antenna connected in sequence; The protection circuit includes: a first MOS device and a second MOS device, wherein the first MOS device and the second MOS device each include a source, a drain, a gate, an active region substrate, a peripheral substrate, and an isolation region provided between the active region substrate and the peripheral substrate; The source and drain of the first MOS device are short-circuited and connected to the active region substrate of the second MOS device, the source and drain of the second MOS device are short-circuited and connected to the active region substrate of the first MOS device, the active region substrate of the first MOS device is connected to the RF antenna, and the active region substrate of the second MOS device is connected to the input terminal of the RF switch; The peripheral substrates of the first MOS device and the second MOS device are both grounded, the gate and the isolation region of the first MOS device are both connected to the power supply terminal, and the gate and the isolation region of the second MOS device are both connected to the power supply terminal.

2. The protection circuit according to claim 1, wherein: include: The first MOS device and the second MOS device are both deep N-well NMOS devices.

3. The protection circuit according to claim 1, wherein: include: The first MOS device and the second MOS device are both deep P-well PMOS devices.

4. The protection circuit according to claim 1, wherein: The protection circuit further includes: a first filter resistor, a second filter resistor and a third filter resistor; The peripheral substrates of the first MOS device and the second MOS device are both grounded through the first filter resistor, the gate and the isolation region of the first MOS device are both connected to the power supply end through the second filter resistor, and the gate and the isolation region of the second MOS device are both connected to the power supply end through the third filter resistor.

5. The protection circuit according to claim 4, wherein: The resistance values ​​of the first filter resistor, the second filter resistor and the third filter resistor are between 20K ohms and 30K ohms.

6. The protection circuit according to claim 1, wherein: The voltage of the power supply end is 3.3V.

7. A radio frequency chip, characterized in that: comprising a power amplifier, a transformer, a radio frequency switch, a radio frequency antenna, and an electrostatic discharge protection circuit as claimed in any one of claims 1 to 6; The output end of the power amplifier is connected to the input end of the transformer, the first output end of the transformer is connected to the input end of the RF switch, the second output end is grounded, the output end of the RF switch is connected to the RF antenna, one end of the electrostatic discharge protection circuit is connected to the input end of the RF chip, and the other end of the electrostatic discharge protection circuit is connected to the RF antenna.

8. The radio frequency chip according to claim 7, wherein: The voltage level of the transformer in the radio frequency chip is between 2KV and 10KV.

9. The radio frequency chip according to claim 7, wherein: The radio frequency chip further includes a low noise amplifier, which is connected to the radio frequency antenna.

10. An electronic device, characterized in that: include: The radio frequency chip according to any one of claims 7 to 9.

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