Method for manufacturing phase change memory
By activating the surface of the insulating layer and spin-coating the insulating medium, the problem of void defects in the thermal insulation structure of phase change memory was solved, thereby improving the thermal insulation performance and device stability.
Patent Information
- Application Number
- CN202210108002.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-28
- Publication Date
- 2026-02-03
- Estimated Expiration
- 2042-01-28
AI Technical Summary
In the prior art, during the process of reducing the size of the memory cell and increasing the storage density, the gaps and defects in the thermal insulation structure of phase change memory lead to a decrease in thermal insulation performance, which affects the reliability and stability of the device.
By activating the exposed surface of the insulation layer, the adhesion between the insulation layer and the thermal insulation structure is increased. The first thermal insulation structure is formed by using gas plasma and spin coating of insulating medium, thereby reducing void defects.
It improves the thermal insulation performance and mechanical strength of the thermal insulation structure, and enhances the stability and reliability of the phase change memory.
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Figure CN114512603B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Embodiments of the present disclosure relate to the technical field of semiconductor technology, and particularly relate to a manufacturing method of a phase change memory. BACKGROUND
[0002] The phase change memory is to use an electric pulse signal to act on a storage unit of a device, so that a phase change material is reversibly changed between an amorphous state and a crystalline state. By changing the crystalline state of the phase change material, information can be written and erased. By identifying the resistance in the amorphous state and the resistance in the crystalline state (for example, high resistance in the amorphous state and low resistance in the crystalline state), information can be read.
[0003] The storage unit of the phase change memory (PCM) is arranged at an intersection of mutually perpendicular word lines and bit lines. Generally, a smaller size of the storage unit, the word lines and the bit lines can be used to obtain a phase change memory with higher storage density. At the same time, the reduction of the spacing distance between adjacent storage units can cause the performance of the phase change memory to decrease and the reliability to decrease. SUMMARY
[0004] Therefore, the present disclosure provides a manufacturing method of a phase change memory, comprising:
[0005] forming a stack structure on a first conductive layer; wherein the stack structure comprises at least an electrode layer and a phase change material layer arranged in layers;
[0006] forming a first gap penetrating the stack structure and the first conductive layer in a first direction perpendicular to the first conductive layer;
[0007] forming a first insulating layer covering the sidewall of the first gap;
[0008] performing an activation treatment on the exposed surface of the first insulating layer;
[0009] filling the first gap including the first insulating layer with a first insulating medium to form a first thermal isolation structure; wherein the first thermal isolation structure is in contact with the surface of the first insulating layer subjected to the activation treatment.
[0010] In some embodiments, the activation treatment on the exposed surface of the first insulating layer comprises:
[0011] performing an activation treatment on the exposed surface of the first insulating layer using a gas plasma to form active groups on the exposed surface of the first insulating layer; wherein the active groups are used to increase the adhesion of the first insulating layer to the first thermal isolation structure.
[0012] In some embodiments, the gas includes an activation gas and a protection gas; the activating the exposed surface of the first insulating layer includes:
[0013] plasmaizing the activation gas and the protection gas to activate the exposed surface of the first insulating layer; wherein the plasmaized activation gas provides the active group, and the plasmaized protection gas reduces oxidation of the active group.
[0014] In some embodiments, the activation gas includes at least one of: hydrogen; ammonia; water vapor; silane;
[0015] the protection gas includes at least one of: nitrogen; helium; neon; argon; krypton; xenon.
[0016] In some embodiments, the method of forming a first thermal isolation structure includes:
[0017] spinning a coating liquid containing the first insulating medium on the surface of the first gap including the first insulating layer;
[0018] solidifying the coating liquid to form the first thermal isolation structure.
[0019] In some embodiments, the solidifying the coating liquid includes:
[0020] solidifying the coating liquid by heating in an atmosphere including water vapor.
[0021] In some embodiments, the forming a stack structure on the first conductive layer includes:
[0022] forming a first electrode layer, a gating layer, a second electrode layer, a phase change storage layer, a third electrode layer in sequence on the surface of the first conductive layer.
[0023] In some embodiments, the first gap extends along a second direction perpendicular to the first direction; the method further includes:
[0024] forming a second conductive layer covering the first thermal isolation structure and the stack structure;
[0025] forming a second gap penetrating through the second conductive layer and the stack structure; wherein the second gap extends along a third direction perpendicular to the first direction, and the third direction is perpendicular to the second direction;
[0026] forming a second insulating layer covering the sidewall of the second gap;
[0027] activating the exposed surface of the second insulating layer;
[0028] filling a second gap comprising the second insulating layer with the second insulating medium to form a second thermal isolation structure; wherein the second thermal isolation structure is in contact with the surface of the second insulating layer subjected to the activation treatment.
[0029] In some embodiments, the method further comprises:
[0030] forming a second stack structure on the surface of the second conductive layer;
[0031] forming a second second gap penetrating through the second stack structure along the first direction;
[0032] forming a second second insulating layer covering the second second gap;
[0033] subjecting the exposed surface of the second second insulating layer to the activation treatment;
[0034] filling the second second gap comprising the second second insulating layer with the second insulating medium to form a second second thermal isolation structure; wherein the second second thermal isolation structure is in contact with the surface of the second second insulating layer subjected to the activation treatment.
[0035] In some embodiments, the method further comprises:
[0036] forming a second first conductive layer covering the second second thermal isolation structure and the second stack structure;
[0037] forming a second first gap penetrating through the second first conductive layer and the second stack structure;
[0038] forming a second first insulating layer covering the sidewall of the second first gap;
[0039] subjecting the exposed surface of the second first insulating layer to the activation treatment;
[0040] filling the second first gap comprising the second first insulating layer with the first insulating medium to form a second first thermal isolation structure; wherein the second first thermal isolation structure is in contact with the surface of the second first insulating layer subjected to the activation treatment.
[0041] In the related art, a gap penetrating through a stack structure and a first conductive layer is generally formed, an insulating layer covering the sidewall of the gap is formed, and an insulating medium is filled in the gap comprising the insulating layer to form a thermal isolation structure. Due to the large surface tension between the insulating layer and the insulating medium, the insulating medium is difficult to completely fill the gap, resulting in defects such as voids in the formed thermal isolation structure, which reduces the thermal isolation performance and is not conducive to the subsequent stacking of storage units, reducing the reliability of the device.
[0042] In this embodiment, a first insulating layer is formed covering the sidewall of a first gap. The exposed surface of the first insulating layer is activated. The first gap, including the first insulating layer, is filled with a first insulating medium to form a first thermal insulation structure in contact with the activated surface of the first insulating layer. This first thermal insulation structure isolates thermal crosstalk between adjacent memory cells. Compared to related technologies, this embodiment increases the adhesion between the first insulating layer and the first thermal insulation structure by activating the first insulating layer, thereby reducing the probability of voids and other defects in the first thermal insulation structure and improving its thermal insulation performance. Attached Figure Description
[0043] Figures la to lc This is a schematic diagram illustrating a method for manufacturing a phase-change memory according to an exemplary embodiment;
[0044] Figure 2 This is a transmission electron microscope image of a phase change memory according to an exemplary embodiment;
[0045] Figure 3 This is a schematic flowchart illustrating a method for manufacturing a phase-change memory according to an embodiment of the present disclosure;
[0046] Figures 4a to 4e This is a schematic diagram illustrating a method for manufacturing a phase-change memory according to an embodiment of the present disclosure;
[0047] Figures 5a to 5c This is a schematic diagram illustrating a method for manufacturing a phase-change memory according to an embodiment of the present disclosure;
[0048] Figures 6a to 6e This is a schematic diagram illustrating a method for manufacturing a phase-change memory according to an embodiment of the present disclosure;
[0049] Figure 7a and Figure 7b This is a schematic diagram illustrating a method for manufacturing a phase-change memory according to an embodiment of the present disclosure;
[0050] Figure 8 This is a three-dimensional structural schematic diagram of a phase-change memory according to an embodiment of the present disclosure. Detailed Implementation
[0051] The technical solution of this disclosure will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0052] In this embodiment of the disclosure, the terms "first," "second," etc., are used to distinguish similar objects, and not to describe a specific order or sequence.
[0053] In this embodiment of the disclosure, the term "A in contact with B" includes the case where A and B are in direct contact, or the case where there are other components between A and B and A is indirectly in contact with B.
[0054] In embodiments of this disclosure, the term "layer" refers to a portion of material comprising a region having thickness. A layer may extend over the entirety of a lower or upper structure, or may have a range smaller than that of the lower or upper structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be located between any horizontal faces at the top and bottom surfaces of a continuous structure. Layers may extend horizontally, vertically, and / or along inclined surfaces. Furthermore, a layer may comprise multiple sublayers.
[0055] It is understood that the meanings of “on”, “above” and “above” in this disclosure should be interpreted in the broadest sense, such that “on” means not only that it is “on” something without any intervening feature or layer (i.e., directly on something), but also that it is “on” something with an intervening feature or layer.
[0056] It should be noted that although this specification describes the embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
[0057] Figures la to lc This is a schematic diagram illustrating a method for manufacturing a phase-change memory according to an exemplary embodiment. Figure 2 This is a transmission electron microscope (TEM) image of a phase-change memory according to an exemplary embodiment. (Combined with...) Figures la to lc As shown, the method includes the following steps:
[0058] Step 1: Refer to Figure la As shown, a first conductive layer 1100 and a stacked structure are formed sequentially on a substrate; a gap 1011 is formed through the stacked structure and the first conductive layer 1100 along a first direction perpendicular to the substrate.
[0059] Step Two: Refer to Figure lb As shown, an insulating layer 1310 forms the sidewall of the covering gap 1011;
[0060] Step 3: Refer to Figure lc As shown, the gap 1011, including the insulating layer 1310, is filled with an insulating medium to form a thermal insulation structure 1410.
[0061] Specifically, refer to Figure la As shown, the stacked structure includes an electrode layer 1210, a gate layer 1220, an electrode layer 1230, a phase change storage layer 1240, and an electrode layer 1250, which are stacked sequentially from bottom to top along the z-direction to form a storage cell of the phase change memory.
[0062] As the integration density of phase-change memories (PCMs) increases, the size of the internal storage cells (stacked structure) and the spacing between adjacent cells are also decreasing to improve the storage density of PCMs. Figure 2 As shown, in the formation of Figure lc When the heat insulation structure 1410 is shown, there is a certain surface tension between the insulating layer 1310 and the constituent materials of the heat insulation structure 1410 (i.e., the above-mentioned insulating medium), which reduces the adhesion strength between the insulating medium and the insulating layer 1310, resulting in void defects in the heat insulation structure 1410.
[0063] Reference Figure la As shown, the depth of gap 1011 is positively correlated with the thickness of the stacked structure. For example, the thicker the stacked structure, the deeper the gap 1011. When the thickness of the stacked structure remains constant, reducing the width D1 of gap 1011 to increase the storage density of the phase change memory increases the aspect ratio of gap 1011, which increases the surface tension between the insulating layer 1310 and the insulating medium, increasing the probability of void defects in the thermal insulation structure 1410.
[0064] Specifically, when the gap width D1 decreases, the surface tension between the insulating layer 1310 and the insulating medium increases, and the adhesion force of the insulating layer 1310 to the insulating medium decreases. This means the resistance of the insulating layer 1310 to the insulating medium entering the gap 1011 increases. This causes excessive accumulation of the insulating medium in the upper part of the gap 1011, resulting in premature sealing of the upper part of the gap. The insulating medium then struggles to smoothly enter the middle and lower parts of the gap 1011, making it prone to voids and defects in the middle and lower parts of the thermal insulation structure 1410. This leads to a decrease in thermal insulation performance, thereby reducing device yield and reliability.
[0065] Reference Figure ld As shown, multiple stacked structures can be layered in the z-direction to increase the storage density of the phase-change memory. Besides isolating thermal crosstalk between adjacent stacked structures and forming electrical insulation, the thermal insulation structure 1410 also supports the stacked structures located above it. Voids and defects in the thermal insulation structure 1410 reduce its mechanical strength, resulting in ineffective support for the stacked structures above it and decreased device stability.
[0066] In view of this, the present disclosure provides a method for manufacturing a phase-change memory.
[0067] Figure 3 This is a schematic flowchart illustrating a method for manufacturing a phase-change memory according to an embodiment of the present disclosure; Figures 4a to 4e This is a schematic diagram illustrating a method for manufacturing a phase-change memory according to an embodiment of this disclosure. (In conjunction with...) Figure 3 , Figures 4a to 4e As shown, the method includes the following steps:
[0068] Step S301: Refer to Figure 4a As shown, a stacked structure is formed on the first conductive layer 2100; wherein the stacked structure includes at least an electrode layer and a phase change material layer stacked together.
[0069] Step S302: Refer to Figure 4b As shown, a first gap 2011 is formed along a first direction perpendicular to the first conductive layer 2100, penetrating the stacked structure and the first conductive layer 2100;
[0070] Step S303: Refer to Figure 4c As shown, a first insulating layer 2310 is formed to cover the sidewall of the first gap 2011;
[0071] Step S304: Refer to Figure 4d As shown, the exposed surface of the first insulating layer 2310 is activated;
[0072] Step S305: Refer to Figure 4e As shown, a first gap 2011, including a first insulating layer 2310, is filled with a first insulating medium to form a first heat insulation structure 2410; wherein the first heat insulation structure 2410 is in contact with the activated surface of the first insulating layer 2310.
[0073] Specifically, refer to Figure 4a As shown, the stacked structure may include multiple electrode layers and phase change material layers, wherein the electrode layers can be used to conduct electrical signals, and the phase change material layers can serve as phase change storage layers for data storage. Specifically, the stacked structure includes functional layers such as a first electrode layer 2210, a gate layer 2220, a second electrode layer 2230, a phase change storage layer 2240, and a third electrode layer 2250, which are sequentially stacked along the z-direction on the first conductive layer 2100.
[0074] The storage cells of a phase change memory may include: a first electrode layer 2210, a gate layer 2220, a second electrode layer 2230, a phase change storage layer 2240, and a third electrode layer 2250. The constituent materials of each electrode layer may be the same, and may include amorphous carbon, such as α-phase carbon.
[0075] The constituent materials of the phase change storage layer 2240 include, but are not limited to, alloys based on chalcogenides, or other phase change materials. For example, GST (Ge-Sb-Te) alloy.
[0076] The components of the gating layer 2220 include: ovonic threshold switching (OTS) materials, such as Zn. a Te b 、Ge a Te b 、Nb a O b Or Si a As b Te c wait.
[0077] The phase-change memory may further include a substrate 2000, on which a first conductive layer 2100 may be formed. Exemplarily, the constituent materials of the substrate 2000 may include: elemental semiconductor materials (e.g., silicon, germanium), III-V compound semiconductor materials, II-VI compound semiconductor materials, organic semiconductor materials, or other semiconductor materials known in the art.
[0078] Reference Figure 4b As shown, a patterned photoresist (not shown) can be used as an etching mask layer to etch the stacked structure, forming a first gap 2011 in a first direction that penetrates the stacked structure and the first conductive layer 2100, with the bottom of the first gap 2011 exposing the substrate 2000. This etching includes, but is not limited to, dry etching, wet etching, or any combination thereof.
[0079] More first gaps 2011 can be formed according to the design requirements of the phase-change memory, and this disclosure does not impose specific limitations. The first gaps 2011 can extend along a second direction perpendicular to the first direction, and multiple first gaps 2011 can be arranged side by side along a third direction perpendicular to the first direction, with the second direction perpendicular to the third direction. The first direction can be the z-direction in the figure, the second direction can be the y-direction in the figure, and the third direction can be the x-direction in the figure, which will not be described in detail below.
[0080] For example, the constituent materials of the first insulating layer 2310 and the first thermal insulation structure 2410 include, but are not limited to, insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon nitride, aluminum oxide, polysiloxane, or polysilazane.
[0081] Combination Figure 4b and 4cAs shown, the first insulating layer 2310 does not cover the upper surface of the third electrode layer 2250. When insulating material is deposited on the sidewall of the first gap 2011 to form the first insulating layer 2310, the insulating material will cover the surface of the third electrode layer 2250. Therefore, the above method may further include removing the insulating material from the surface of the third electrode layer through a planarization process to form a surface as shown. Figure 4c The first insulating layer 2310 is shown. Planarization processes include, but are not limited to: chemical mechanical polishing, dry etching, wet etching, or any combination thereof.
[0082] In some embodiments, an insulating material is deposited on the sidewall of the first gap 2011 to form an insulating material layer covering the sidewall of the first gap 2011 and the upper surface of the third electrode layer 2250. The exposed surface of the insulating material layer is then activated, and subsequently, the insulating material layer covering the upper surface of the third electrode layer 2250 is removed by a planarization process to form a layer as shown in the figure. Figure 4c The first insulating layer 2310 is shown. It can be understood that the insulating material layer covering the upper surface of the third electrode layer 2250 can reduce the damage to the third electrode layer 2250 caused by the activation process, which is beneficial to maintaining good device stability.
[0083] Combination Figure 4b and Figure 4c As shown, before the formation of the first insulating layer 2310, the sides of each functional layer in the stacked structure are exposed through the sidewall of the first gap 2011. The subsequently formed first insulating layer 2310 completely covers the exposed sides of each functional layer in the stacked structure, reducing the risk of the functional layers being damaged by the activation process in step S304.
[0084] Combination Figure 4d and Figure 4e As shown, the surface of the first insulating layer 2310 exposed from the first gap 2011 is activated to increase the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410, reduce the generation of void defects in the first thermal insulation structure 2410, and improve the thermal insulation performance.
[0085] In some embodiments, the activation treatment can roughen the exposed surface of the first insulating layer 2310, increasing the friction between the first insulating medium and the exposed surface of the first insulating layer 2310 in step S305, thereby increasing the adhesion between the first insulating layer 2310 and the formed first thermal insulation structure 2410. In other embodiments, the activation treatment can form active groups on the exposed surface of the first insulating layer 2310, increasing the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410.
[0086] It needs to be emphasized that, in combination Figure 4c and Figure 4dAs shown, after activating the exposed surface of the first insulating layer 2310, a first activated sublayer 2311 can be formed on the surface of the first insulating layer 2310. The first activated sublayer 2311 has a small, even negligible, change to the thickness and overall structure of the first insulating layer 2310. Specifically, Figure 4d In the process, the first insulating layer 2310 after activation treatment includes a first activated sub-layer 2311 and an unactivated first insulating layer 2312; the thickness of the first activated sub-layer 2311 is compared to that of the first activated sub-layer 2312. Figure 4c The thickness of the unactivated first insulating layer 2310 is negligible, and therefore does not change the overall structure of the first insulating layer 2310.
[0087] For example, when performing an activation process, the surface roughness of the first insulating layer 2310 can be increased by corroding the surface of the first insulating layer 2310 with chemical gases or liquids. Understandably, the thickness of the activated first insulating layer 2310 will be reduced to some extent. However, by controlling the amount of gas or liquid used and by controlling the activation time, this thickness loss can be made negligible.
[0088] When an activation process is performed to form active groups on the exposed surface of the first insulating layer 2310, the active groups are formed in a branched manner on the exposed surface of the first insulating layer 2310. It is understood that the thickness of the active groups themselves is comparable to that of the functional groups or chemical bonds, and the increase in thickness of the first insulating layer 2310 caused by the active groups is negligible.
[0089] Specifically, in some embodiments, when performing step S305, the active groups on the surface of the first insulating layer 2310 have groups that are the same as or compatible with the first insulating medium, thereby reducing the surface tension between the first insulating layer 2310 and the first insulating medium, increasing the adhesion between the first insulating layer 2310 and the first insulating medium, which is beneficial for the first insulating medium to fill the first gap 2011, thereby reducing the void defects of the first thermal insulation structure 2410.
[0090] In other embodiments, during step S305, the first insulating medium, serving as a precursor to the first thermal insulation structure 2410, is filled into the first gap 2011 via chemical vapor deposition or spin coating, and the first thermal insulation structure 2410 is formed through chemical and / or physical reactions. During the formation of the first thermal insulation structure 2410, the active groups on the surface of the first insulating layer 2310 participate in the aforementioned chemical and / or physical reactions, thereby increasing the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410 and reducing void defects in the first thermal insulation structure 2410.
[0091] For example, the first thermal insulation structure 2410 is not only used to isolate thermal crosstalk between adjacent memory cells, but also to form electrical isolation between adjacent memory cells, reducing device failure caused by tip discharge between memory cells and improving device stability.
[0092] For example, the process of forming the stacked structure, the first insulating layer 2310 and the first thermal insulation structure 2410 can be any process known in the art, such as low-temperature chemical vapor deposition, low-pressure chemical vapor deposition, thermal chemical vapor deposition, atomic layer deposition, or ion-enhanced chemical vapor deposition, or spin-coating of insulating media, etc.
[0093] In some embodiments, refer to Figure 4d As shown, the surface exposed by the first insulating layer 2310 undergoes an activation treatment, including:
[0094] The surface of the first insulating layer 2310 exposed by gas plasma is activated to form active groups on the surface of the first insulating layer 2310 exposed by gas plasma; wherein the active groups are used to increase the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410.
[0095] For example, the gases used in gas plasma include, but are not limited to: hydrogen; ammonia; water vapor; silane or nitrogen.
[0096] In some embodiments, a wafer having multiple phase-change memories is placed in a sealed reaction chamber, and gas generates plasma under the influence of an electric field in a plasma generator (or plasma generating component). The pressure in the reaction chamber can be reduced by a vacuum pump, allowing the plasma to reach the wafer surface, thereby enabling the plasma to contact the exposed surface of the first insulating layer and form active groups on the surface of the first insulating layer.
[0097] Plasma contains particles such as electrons (negative ions), positive ions, and neutral particles. Macroscopically, it is generally electrically neutral, and the number of positive and negative charges is equal at all points within the plasma. Plasma can be classified into high-temperature plasma and low-temperature plasma. If the discharge occurs under high-pressure conditions close to atmospheric pressure, electrons, ions, and neutral particles will exchange kinetic energy through intense collisions, thus achieving thermal equilibrium. Plasma in thermal equilibrium where the temperatures of these three types of particles are approximately equal is called thermal plasma. High-temperature plasmas have temperatures ranging from millions to tens of millions of Kelvin (K), such as the plasma at the center of the sun and controlled thermonuclear fusion reactors.
[0098] Low-pressure plasmas below several hundred Pa are often in a non-thermal equilibrium state. At this time, electrons lose almost no energy during collisions with ions or neutral particles, and the electron temperature is much higher than that of positive ions and neutral particles. Such plasmas are called cryogenic plasmas, and the temperature of cryogenic plasmas can be as low as 10 Kelvin (K).
[0099] In some embodiments, low-temperature plasma technology is preferably used for the above activation treatment. Compared with high-temperature plasma, low-temperature plasma does not radiate high-energy particles and electromagnetic waves of various frequencies, which helps to reduce radiation damage to the phase-change memory and reduce radiation pollution to the environment.
[0100] For example, the operating pressure of the low-temperature plasma activation treatment is 0 mbar to 0.3 mbar, and the discharge power of the plasma generator (or plasma generating component) is 20 watts to 80 watts.
[0101] In some embodiments, plasma bombards the wafer at a certain speed and direction, allowing more plasma to enter the first gap 2011 and contact the exposed surface of the first insulating layer 2310 to form active groups. Simultaneously, the plasma bombardment of the first insulating layer 2310 at a certain speed causes some chemical bonds in the first insulating layer 2310 to break, forming unsaturated dangling bonds, such as -Si-O- dangling bonds and -Si-N- dangling bonds, on the exposed surface of the first insulating layer 2310. As active groups, these dangling bonds have higher activity and adsorption capacity than unactivated saturated chemical bonds, which is beneficial for increasing the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410.
[0102] In this embodiment, a deflection power supply can be provided in the reaction chamber to provide a deflection electric field for accelerating the plasma and adjusting the angle at which the plasma bombards the wafer.
[0103] Silicon oxide possesses good ductility and step coverage, as well as good insulation and thermal insulation properties, making it widely used in semiconductor manufacturing, where the manufacturing process is relatively mature. To more clearly and thoroughly describe the embodiments of this disclosure, combined with... Figure 5a As shown, the explanation will be based on the example of the first insulating layer 2310 being silicon oxide.
[0104] Reference Figure 5a As shown, plasma is generated by ionizing a gas containing hydrogen and ammonia, for example, a gas containing H... + NH 2- NH2 -The plasma forms active groups such as hydrogen bonds, -Si-O- dangling bonds, and nitrogen-hydrogen bonds on the silicon oxide surface, increasing the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410. In addition, different active groups can be formed on the silicon oxide surface depending on the gas element. For example, activating silicon oxide by plasma-entraining a gas containing water vapor can form hydroxyl groups on the silicon oxide surface.
[0105] In some embodiments, the exposed surface of the first insulating layer may be activated by heat treatment. Specifically, the wafer is placed in a furnace tube and heat-treated in an atmosphere of active gas to form active groups on the exposed surface of the first insulating layer 2310.
[0106] It is understood that during the fabrication of the phase-change memory, various physical and chemical reactions occur when gas plasma activation and / or active gas heat treatment are used to activate the exposed surface of the first insulating layer 2310. The composition of the active groups formed on the exposed surface of the first insulating layer 2310 will vary depending on the first insulating layer 2310, the active gas, and the first insulating medium. The specific active group compositions mentioned in this disclosure are merely illustrative examples and are not intended to limit the scope of the invention.
[0107] In some embodiments, refer to Figure 4d and Figure 5a As shown, the activation treatment gas includes an activation gas and a protective gas; the activation treatment of the exposed surface of the first insulating layer 2310 using gas plasma includes:
[0108] The activating gas and the protective gas are plasma-entrained to activate the surface of the first insulating layer 2310; wherein the plasma-entrained activating gas provides active groups and the plasma-entrained protective gas reduces the oxidation of the active groups.
[0109] The active groups formed on the exposed surface of the first insulating layer 2310 include: active groups composed of activating gas elements, such as hydrogen bonds, nitrogen-hydrogen bonds, hydroxyl groups, etc.; and / or dangling bonds formed by the breaking of chemical bonds in the first insulating layer 2310 itself, such as -Si-O- dangling bonds, -Si-N- dangling bonds, etc. These active groups have high reactivity and are easily oxidized. Introducing a protective gas into the activating gas, in the atmosphere of the plasma-enhanced protective gas, reduces the oxidation of active groups, ensuring sufficient active groups to increase the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410, and reducing void defects in the first thermal insulation structure 2410.
[0110] In some embodiments, refer to Figure 4d and Figure 5aAs shown, the activating gas includes at least one of the following: hydrogen; ammonia; water vapor; silane;
[0111] The protective gas includes at least one of the following: nitrogen; helium; neon; argon; krypton; xenon.
[0112] The plasma-activated gas is used to activate the exposed surface of the first insulating layer 2310, forming active groups on the exposed surface of the first insulating layer 2310. The components of the activated gas include the active groups, or include components that constitute the active groups. For example, hydrogen gas can form hydrogen bonds on the exposed surface of the first insulating layer 2310; ammonia gas can form hydrogen bonds and nitrogen-hydrogen bonds; water vapor can form hydrogen bonds and hydroxyl groups; silanes can form silicon-hydrogen bonds, etc.
[0113] The protective gas is used to reduce the oxidation of active groups and improve the activation effect. Since the protective gas does not participate in or participates very little in the chemical reaction during the activation process, it can also be used to bombard the exposed surface of the first insulating layer 2310, so that unsaturated dangling bonds are formed on the exposed surface of the first insulating layer 2310. These dangling bonds, as active groups, can increase the adhesion between the first insulating layer 2310 and the first thermal insulation structure 2410.
[0114] Different gases can cause different active groups to form on the exposed surface of the first insulating layer 2310, and those skilled in the art can select and optimize them according to the actual manufacturing process.
[0115] In some embodiments, refer to Figure 4e As shown, the method for forming the first thermal insulation structure 2410 includes:
[0116] A coating liquid containing a first insulating medium is spin-coated onto the surface of the first gap 2011, which includes the first insulating layer 2310;
[0117] The coating liquid is cured to form the first thermal insulation structure 2410.
[0118] The first thermal insulation structure 2410 can be formed by depositing a first insulating medium or by spin-coating an insulating medium.
[0119] Spin-coating insulating media is widely used for filling complex three-dimensional structures with high aspect ratios and large areas. The process utilizes the fluidity of liquid materials to fill the structure to be filled, and then cures to form a rigid film structure.
[0120] Compared to the layer-by-layer deposition process of deposition technology, the spin coating process using liquid flow is more advantageous for filling complex three-dimensional structures, and can reduce the probability of void defects caused by the restriction of deposition direction or the obstruction of other structures.
[0121] Furthermore, referring toFigure 4b As shown, in the manufacturing process of phase change memory, the first gap 2011 is used to divide and isolate memory cells. Therefore, there are a large number of first gaps 2011 to be filled in the phase change memory. The spin coating insulating medium process directly coats the liquid material onto the wafer surface to complete the filling, saving process time.
[0122] Specifically, forming the first thermal insulation structure 2410 using a spin-coating insulating medium process may include: first spin-coating a coating liquid containing a first insulating medium onto a wafer, and then performing a curing process to form the first thermal insulation structure 2410.
[0123] Here, the first thermal insulation structure 2410 may include a rigid polymer insulating structure, such as polysiloxane, polysilazane, or other silanized polymers. The first insulating medium is a precursor for forming the first thermal insulation structure 2410 and may be a monomer or oligomer of the first thermal insulation structure 2410, such as siloxane or silazane. The first thermal insulation structure 2410 of this disclosure embodiment includes a polymer film structure. Compared to low-molecular-weight thermal insulation structures, polymers include network and dendritic molecular structures, giving the first thermal insulation structure 2410 a denser structure, better thermal insulation and insulating properties, and more stable mechanical properties, providing more stable support for the device.
[0124] The first insulating medium includes groups consisting of silicon-hydrogen bonds, silicon-oxygen bonds, and silicon-nitrogen bonds. (See reference...) Figure 5b As shown, after the activation treatment in step S304, the active groups formed on the exposed surface of the first insulating layer 2310 are compatible with some groups of the first insulating medium, which can reduce the surface tension between the first insulating layer 2310 and the first insulating medium, and increase the adhesion between the first insulating layer 2310 and the first heat insulation structure 2410, thereby reducing the void defects of the first heat insulation structure 2410.
[0125] In some embodiments, the mutual affinity between groups can be the mutual affinity between the same groups, for example, the affinity between hydrogen bonds on the exposed surface of the first insulating layer 2310 and hydrogen bonds in the first insulating medium. In other embodiments, the mutual affinity between groups can be the mutual affinity between different groups, for example, the affinity between nitrogen-hydrogen bonds on the exposed surface of the first insulating layer 2310 and hydrogen bonds in the first insulating medium.
[0126] The curing process includes a heat treatment process, which involves heating the wafer coated with the coating liquid to crosslink and polymerize the first insulating medium, forming a rigid first thermal insulation structure.
[0127] In some embodiments, the curing process may be performed in multiple stages of heat treatment. First, a low-temperature heat treatment is performed at a temperature of 100°C to 300°C to evaporate the solvent in the coating liquid and activate the first insulating medium. Then, a high-temperature heat treatment is performed at a temperature of 300°C to 500°C to allow the first insulating medium to react and form the first thermal insulation structure 2410.
[0128] In some embodiments, refer to Figure 5c As shown, the exposed surface of the first insulating layer 2310 includes hydroxyl active groups, which can dehydrate and condense with silicon-hydrogen bonds in the first insulating medium during the curing process, and participate in the reaction process of forming the first heat insulation structure 2410, thereby increasing the adhesion between the first insulating layer 2310 and the first heat insulation structure 2410 and reducing the void defects of the first heat insulation structure 2410.
[0129] It is understandable that dehydration condensation reactions can occur between hydrogen bonds and hydroxyl groups, or between hydroxyl groups themselves. Hydrogen bonds and hydroxyl groups can be introduced by activating the exposed surface of the first insulating layer 2310, or by hydrolyzing the silicon-hydrogen bonds in the first insulating medium to form hydroxyl groups.
[0130] In some embodiments, refer to Figure 5c As shown, the curing process for the coating liquid includes:
[0131] The coating liquid is heated and cured in an atmosphere containing water vapor.
[0132] When the first insulating medium includes silicon-hydrogen bonds, water vapor can be provided during the heating and curing process to hydrolyze the silicon-hydrogen bonds in the first insulating medium to form hydroxyl groups. The hydroxyl groups on the first insulating medium can then undergo dehydration condensation with the hydrogen bonds or hydroxyl groups on the surface of the first insulating layer 2310 to form the first thermal insulation structure 2410, thereby increasing the adhesion between the first insulation 2310 and the first thermal insulation structure 2410.
[0133] In some embodiments, when the first insulating medium does not include silicon-hydrogen bonds, water vapor may also be provided during the heating and curing process. The water vapor further activates the exposed surface of the first insulating layer 2310, forming active groups such as hydroxyl groups and hydrogen bonds on the surface of the first insulating layer 2310. It may also reactivate active groups that have been oxidized and deactivated before heating and curing, thereby improving the activation efficiency of the exposed surface of the first insulating layer 2310.
[0134] In some embodiments, refer to Figure 4a As shown, forming a stacked structure on the first conductive layer 2100 includes:
[0135] A first electrode layer 2210, a gate layer 2220, a second electrode layer 2230, a phase change storage layer 2240, and a third electrode layer 2250 are formed sequentially on the surface of the first conductive layer 2100.
[0136] The first conductive layer 2100 is composed of conductive materials. Conductive materials include, but are not limited to, tungsten, cobalt, copper, aluminum, gold, silver, nickel, or polycrystalline silicon. The first electrode layer 2210, the second electrode layer 2230, and the third electrode layer 2250 may be composed of amorphous carbon, such as α-phase carbon. The first electrode layer 2210, the second electrode layer 2230, and the third electrode layer 2250 may be made of the same material. The first electrode layer 2210, the second electrode layer 2230, and the third electrode layer 2250 are used to conduct electrical signals.
[0137] It is understood that after executing step S302, the formed first gap 2011 divides the first conductive layer 2100 into first conductive lines 2100. This disclosure uses the same reference numerals to represent the first conductive layer and the first conductive lines for ease of explanation. The first conductive lines 2100 can serve as word lines or bit lines of a phase-change memory.
[0138] The components of the gating layer 2220 include: ovonic threshold switching (OTS) materials, such as Zn. a Te b 、Ge a Te b 、Nb a O b Or Si a As b Te c The gating layer 2220 can be used to control the conduction and disconnection of the memory cell. When the voltage applied to the gating layer 2220 exceeds the threshold voltage of the gating layer 2220, the gating layer 2220 is turned on, the memory cell is in the conducting state, and current flows through it; when the voltage applied to the gating layer 2220 is lower than the threshold voltage of the gating layer 2220, the gating layer 2220 is turned off, the memory cell is in the disconnected state, and no current flows through it.
[0139] The constituent materials of the phase change memory layer 2240 may include: chalcogenide-based alloys, such as GST (Ge-Sb-Te) alloys. The constituent materials of the phase change memory layer 2240 may also include any other phase change materials known in the art. An electrical signal is applied to the phase change memory layer 2240, causing a reversible change between an amorphous and crystalline state. By changing the crystalline state of the phase change memory layer 2240, information can be written to and erased. By identifying the resistance in the amorphous and crystalline states (e.g., high resistance in the amorphous state and low resistance in the crystalline state), information can be read from the crystal.
[0140] In some embodiments, refer to Figure 4b As shown, the first gap 2011 extends along a second direction perpendicular to the first direction; the method further includes:
[0141] Reference Figure 6a As shown, a second conductive layer 2500 is formed covering the first thermal insulation structure and the stacked structure;
[0142] Reference Figure 6b As shown, a second gap 2012 is formed that penetrates the second conductive layer 2500 and the stacked structure; wherein the second gap 2012 extends along a third direction perpendicular to the first direction, and the third direction is perpendicular to the second direction;
[0143] Reference Figure 6c As shown, a second insulating layer 2320 is formed covering the sidewall of the second gap 2012;
[0144] Reference Figure 6d As shown, the exposed surface of the second insulating layer 2320 is activated;
[0145] Reference Figure 6e As shown, a second gap 2012, including a second insulating layer 2320, is filled with a second insulating medium to form a second heat insulation structure 2420; wherein the second heat insulation structure 2420 is in contact with the surface of the second insulating layer 2320 after activation treatment.
[0146] The second conductive layer 2500 and the first conductive layer 2100 can be made of the same material. It is understood that, referring to... Figure 6b As shown, the formed second gap 2012 divides the second conductive layer 2500 into second conductive lines 2500. The same reference numerals are used in this disclosure to denote the second conductive layer and the second conductive lines for ease of explanation. The first conductive line 2100 and the second conductive line 2500 can respectively serve as word lines or bit lines of the phase-change memory; for example, the first conductive line 2100 serves as a word line, and the second conductive line 2500 serves as a bit line.
[0147] Combination Figure 4b and Figure 6b As shown, the first conductive line 2100 extends in the same direction as the first gap 2011, along the y-direction; the second conductive line 2500 extends in the same direction as the second gap 2012, along the x-direction. Figure 8 This is a three-dimensional structural schematic diagram of a phase-change memory according to an embodiment of the present disclosure, with reference to... Figure 8 As shown, the projection of the first conductive line 2100 in the z direction is perpendicular to the projection of the second conductive line 2500 in the z direction.
[0148] It should be emphasized that the first gap 2011 penetrates the first conductive layer 2100 and exposes the substrate 2000 from the bottom of the first gap 2011; the second gap 2012 penetrates the second conductive layer 2500 and the stacked structure, but does not penetrate the first conductive layer 2100 (the first conductive line). The first gap 2011 and the second gap 2012 intersect perpendicularly.
[0149] It is understood that the process of forming the second gap 2012 can be the same as step S302, the process of forming the second insulating layer 2320 can be the same as step S303, the process of forming the second heat insulation structure 2420 can be the same as step S305, and the second insulating medium can be the same as the first insulating medium.
[0150] In some embodiments, refer to Figure 7a As shown, the method further includes:
[0151] A second stacked structure is formed on the surface of the second conductive layer 2500;
[0152] Along the first direction, a second gap is formed that penetrates the second stacked structure;
[0153] A second second insulating layer 2320b is formed to cover the second second gap;
[0154] The exposed surface of the second insulating layer 2320b is activated.
[0155] A second second gap, including a second second insulating layer 2320b, is filled with a second insulating medium to form a second second thermal insulation structure 2420b; wherein the second second thermal insulation structure 2420b is in contact with the activated surface of the second second insulating layer 2320b.
[0156] In some embodiments, refer to Figure 7a and Figure 7b As shown, the method further includes:
[0157] A second first conductive layer 2100b is formed covering the second second thermal insulation structure 2420b and the second stacked structure;
[0158] A second first gap is formed that penetrates the second first conductive layer 2100b and the second stacked structure;
[0159] A second first insulating layer 2310b is formed to cover the sidewall of the second first gap;
[0160] The surface exposed by the second first insulating layer 2310b is activated.
[0161] A second first gap, including the second first insulating layer 2310b, is filled with a second insulating medium to form a second first thermal insulation structure 2410b; wherein the second first thermal insulation structure 2410b is in contact with the surface of the second first insulating layer 2310b after the activation treatment.
[0162] Combination Figure 7a and Figure 7b As shown, the first memory array includes memory cells 2200a, and the second memory array includes memory cells 2200b. The first memory array and the second memory array are stacked along the z-direction, with the first memory array relatively close to the substrate and the second memory array relatively far from the substrate 2000.
[0163] It is understandable that during the formation of memory cell 2200b, the second conductive line 2500 is in direct contact with the memory cell 2200b of the upper memory array. Furthermore, the first conductive line 2100b of the upper memory array is located above the memory cell 2200b, while the first conductive line 2100a of the lower memory array is located below the memory cell 2200a.
[0164] In some embodiments, refer to Figure 7b and Figure 8 As shown, in the z-direction, a first conductive line 2100 or a second conductive line 2500 is provided between two adjacent stacked memory cells for electrically connecting the two adjacent memory cells, thereby reducing the number of conductive lines. For example, memory cells 2200a and 2200b can share the same second conductive line 2500. The second conductive line 2500 can serve as a bit line, and the first conductive line 2100a and the second first conductive line 2100b can serve as word lines; or the second conductive line 2500 can serve as a word line, and the first conductive line 2100a and the second first conductive line 2100b can serve as bit lines. The projection of the first conductive line 2100a (or the first conductive line 2100b) in the z-direction is perpendicular to the projection of the second conductive line 2500 in the z-direction.
[0165] This disclosure is not limited to the stacking of the two memory arrays shown in the figures; there can be stacks of more memory arrays, each containing multiple memory cells. For example, when the phase-change memory includes m stacked memory arrays, where m is an integer greater than 2, the second conductive line 2500 is located between the (2n-1)th and 2nth memory arrays; the first conductive line 2100 is located between the 2nth and 2n+1th memory arrays, where n is a positive integer and 2n+1 is less than or equal to m. The projection of the first conductive line 2100 in the z-direction is perpendicular to the projection of the second conductive line 2500 in the z-direction.
[0166] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
Claims
1. A method for manufacturing a phase-change memory, characterized in that, include: A stacked structure is formed on a first conductive layer; wherein the stacked structure includes at least an electrode layer and a phase change material layer stacked together; A first gap is formed along a first direction perpendicular to the first conductive layer, penetrating the stacked structure and the first conductive layer; A first insulating layer is formed to cover the sidewalls of the first gap; The surface of the first insulating layer exposed by gas plasma is activated to form active groups on the surface of the first insulating layer exposed by gas plasma. A first thermal insulation structure is formed by filling a first gap including the first insulating layer with a first insulating medium; wherein the first thermal insulation structure is in contact with the surface of the first insulating layer after the activation treatment; the active group has the same or compatible group as the first insulating medium, so as to increase the adhesion between the first insulating layer and the first thermal insulation structure.
2. The method according to claim 1, characterized in that, The gas includes an activation gas and a protective gas; the activation treatment of the exposed surface of the first insulating layer using gas plasma includes: The activating gas and the protective gas are plasma-enhanced to activate the surface of the first insulating layer; wherein the plasma-enhanced activating gas provides the active groups, and the plasma-enhanced protective gas reduces the oxidation of the active groups.
3. The method according to claim 2, characterized in that, The activating gas includes at least one of the following: hydrogen; ammonia; water vapor; silane; The protective gas includes at least one of the following: nitrogen; helium; neon; argon; krypton; xenon.
4. The method according to claim 1, characterized in that, The method for forming the first thermal insulation structure includes: A coating liquid containing the first insulating medium is spin-coated onto the surface including the first gap of the first insulating layer; The coating liquid is cured to form the first heat insulation structure.
5. The method according to claim 4, characterized in that, The curing process of the coating liquid includes: The coating liquid is heated and cured in an atmosphere containing water vapor.
6. The method according to claim 1, characterized in that, The formation of the stacked structure on the first conductive layer includes: A first electrode layer, a gate layer, a second electrode layer, a phase change storage layer, and a third electrode layer are formed sequentially on the surface of the first conductive layer.
7. The method according to claim 1, characterized in that, The first gap extends along a second direction perpendicular to the first direction; the method further includes: A second conductive layer is formed covering the first thermal insulation structure and the stacked structure; A second gap is formed, penetrating the second conductive layer and the stacked structure; wherein the second gap extends along a third direction perpendicular to the first direction, and the third direction is perpendicular to the second direction; A second insulating layer is formed to cover the sidewalls of the second gap; The activation treatment is performed on the exposed surface of the second insulating layer; A second thermal insulation structure is formed by filling a second gap, including the second insulating layer, with a second insulating medium; wherein the second thermal insulation structure is in contact with the surface of the second insulating layer after the activation treatment.
8. The method according to claim 7, characterized in that, The method further includes: A second stacked structure is formed on the surface of the second conductive layer; A second gap is formed along the first direction, penetrating the second stacked structure; A second insulating layer is formed to cover the second second gap; The activation treatment is performed on the surface of the second second insulating layer that is exposed. The second insulating medium is used to fill the second second gap, which includes the second second insulating layer, to form a second second thermal insulation structure; wherein the second second thermal insulation structure is in contact with the surface of the second second insulating layer after the activation treatment.
9. The method according to claim 8, characterized in that, The method further includes: A second first conductive layer is formed covering the second second thermal insulation structure and the second stacked structure; A second first gap is formed, penetrating the second first conductive layer and the second stacked structure; A second first insulating layer is formed to cover the sidewall of the second first gap; The activation treatment is performed on the surface of the second first insulating layer that is exposed. The second first gap, including the second first insulating layer, is filled with the first insulating medium to form a second first thermal insulation structure; wherein the second first thermal insulation structure is in contact with the surface of the second first insulating layer after the activation treatment.
Citation Information
Patent Citations
Electronic devices comprising silicon carbide materials and related methods and systems
US20210233768A1