A method, device and medium for managing the startup of ARM server firmware security verification

Abstract

The present invention relates to an ARM server firmware security verification startup management method, device and medium. In the present invention, a security verification management module detects an SCP firmware security verification failure signal and an SCP firmware startup success signal sent by an ARM processor to obtain SCP firmware security verification information and the ARM processor firmware startup status, and records them through a baseboard management controller; when the ARM processor is abnormally started, the security verification management module executes a firmware security verification startup management strategy, records the relevant power supply status, SCP firmware security verification information and the ARM processor firmware startup status, switches the SCP firmware memory connected to the ARM processor, and ensures the operation of the ARM processor through the spare SCP firmware. The reliability and stability of the processor operation of the ARM server are guaranteed; the secure startup of the ARM server is maximized, and the security of the business is higher. The recorded power supply status, SCP firmware security verification information and ARM processor firmware startup status are convenient for analyzing the cause of the failure.

Description

Technical Field

[0001] The present invention relates to the field of ARM processor firmware startup management, and in particular to an ARM server firmware security verification startup management method, device and medium. Background Art

[0002] Compared with X86 processors, ARM processors have advantages such as multiple cores, small size, low power consumption, low cost and high performance. They are more efficient and faster in processing services. Based on the above advantages, servers based on ARM processors are increasingly widely used. For ARM processors, their startup and operation need to rely on external SCP firmware. In order to ensure the secure startup of ARM servers, it is necessary to perform security verification on the SCP firmware of the ARM processor when the ARM server is started.

[0003] At present, the security verification of SCP firmware relies on the security verification module inside the ARM processor, but the ARM server lacks independent out-of-band firmware verification management functions. If the firmware crashes, data is lost, verification is not completed, etc. during the startup process, the existing security verification module cannot identify and solve the above problems, and only manifests itself as the inability to complete the firmware security verification processing task, affecting the server's secure startup, making the overall stability of the server poor, requiring more maintenance, and increasing maintenance costs. In addition, in multi-processor servers, the SCP firmware is verified by relying on the internal security verification module of each processor, and unified verification and coordinated control cannot be achieved. The integrity of the SCP firmware security verification is poor and the coordination is poor. Summary of the invention

[0004] In order to solve the above technical problem or at least partially solve the above technical problem, the present invention provides an ARM server firmware security verification startup management method, device and medium.

[0005] In a first aspect, the present invention provides an ARM server firmware security verification startup management method, comprising:

[0006] After the ARM processor is powered on, a security check is performed on the SCP firmware in the SCP firmware memory;

[0007] Detect whether there is an ARM processor that is successfully started through the SCP firmware under the preset conditions. If so, record the firmware startup status and security verification information of each ARM processor in the ARM server; otherwise, obtain and analyze the results of the SCP firmware security verification performed by the ARM processor;

[0008] If the SCP firmware security check succeeds, the power supply status for the ARM processor is obtained and a first alarm is generated; if the SCP firmware security check fails, the security check information is recorded and a second alarm is generated;

[0009] Determine whether the ARM processor has reached the preset number of startup times. If not, switch the ARM processor to connect to the next-order SCP firmware memory and restart the ARM processor. If yes, issue a shutdown alarm and shut down the ARM server.

[0010] Furthermore, the ARM processor performs security checks on the SCP firmware including:

[0011] The ARM processor first loads SMpro in the SCP firmware for security verification;

[0012] After the SMpro security check succeeds, PMpro in the SCP firmware is loaded for security check;

[0013] If the security check results of SMpro and PMpro fail, the security check of the SCP firmware fails. When the security check of the SCP firmware fails, the ARM processor sends a security check failure signal of the SCP firmware.

[0014] Furthermore, for an ARM server equipped with at least two ARM processors, each ARM processor security-checks the SCP firmware in a preset order and boots up using the SCP firmware that has passed the security check.

[0015] Furthermore, the ARM processor starts up through the SCP firmware that has passed the security verification, and after starting up, the ARM processor sends a SCP firmware startup success signal.

[0016] Furthermore, the detecting whether the ARM processor is successfully started by the SCP firmware under the preset conditions includes:

[0017] After the ARM processor is powered on, the timing starts. When the timing time is within the first time threshold, the powergood signal of the power-on timing control unit that controls the power-on of the ARM processor is detected;

[0018] The timing starts from when the powergood signal is received, and the timing time is within a second time threshold to detect whether the ARM processor is successfully started through the SCP firmware.

[0019] Furthermore, the SCP firmware memory where the SCP firmware that failed the security check is located is determined according to the recorded security check information, the baseboard management controller is controlled to be connected to the SCP firmware memory where the SCP firmware that failed the security check is located, and the SCP firmware that failed the security check is updated through the baseboard management controller.

[0020] Furthermore, the preset number of startup times is equal to the number of SCP firmware memories connected to each ARM processor; and the SCP firmware memories connected to the ARM processor are switched according to the set SCP firmware memory sequence control.

[0021] In a second aspect, the present application provides a device for implementing an ARM server firmware security verification startup management method, comprising: a plurality of ARM processors, each of the ARM processors is connected to a data selector via an I2C bus, the data selector is connected to a plurality of SCP firmware memories, and a control end of the data selector is connected to a security verification management module independent of the processor;

[0022] The processor is connected to the safety verification management module through the first GPIO and the second GPIO, and the safety verification management module is connected to the baseboard management controller;

[0023] The safety verification management module is connected to the processor via a power-on timing control unit.

[0024] Furthermore, the baseboard management controller is connected to the security check management module through a selection pin, the baseboard management controller is connected to the data selector through an I2C bus, the data selector is controlled by the security check management module to realize the baseboard management controller connecting to the SCP firmware memory, and the baseboard management controller updates the SCP firmware that fails the security check in the SCP firmware memory.

[0025] In a third aspect, the present application provides a medium for implementing an ARM server firmware security verification startup management method, characterized in that the medium for implementing the ARM server firmware security verification startup management method stores at least one instruction, and reads and executes the instruction to implement the ARM server firmware security verification startup management method.

[0026] The above technical solution provided by the embodiment of the present invention has the following advantages compared with the prior art:

[0027] In the present invention, at least two SCP firmware memories are configured for the ARM processor, and each firmware memory stores the SCP firmware that supports the startup and operation of the ARM. After the ARM processor is powered on, a security check is performed on the SCP firmware in the connected SCP firmware memory; if the security check succeeds, the ARM processor starts using the SCP firmware that succeeds in the security check, and after the startup succeeds, the ARM processor sends a SCP firmware startup success signal; if the security check succeeds, the ARM processor sends a SCP firmware security check failure signal.

[0028] The security verification management module detects whether there is an ARM processor that successfully starts up through the SCP firmware under preset conditions based on the SCP firmware startup success signal detection. If yes, it is considered that the SCP firmware security verification has passed, and the firmware startup status and security verification information of each ARM processor in the ARM server are recorded. The processor that failed to start can be determined by the firmware startup status of each ARM processor, and the security verification information of the ARM processor that failed to start can be used to determine whether the startup failure is caused by the failure of the security verification module in the ARM processor. Otherwise, the firmware security verification startup management strategy is executed; based on the result of the SCP firmware security verification obtained by the ARM processor, it is determined whether the startup timeout or failure is caused by the SCP firmware security reason; when the startup failure is caused by non-SCP firmware security reasons, the power supply status of the ARM processor is recorded, and it can be analyzed whether it is a power failure or an ARM processor failure based on the power supply status; no matter what kind of failure causes the startup timeout or failure, the firmware security verification startup management strategy switches the SCP firmware memory connected to the processor when there is a backup SCP firmware available, and provides a backup SCP firmware to ensure the operation of the ARM processor. Improve the reliability and stability of the server's secure startup. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0031] Figure 1 A flowchart of an ARM server firmware security verification startup management method provided by an embodiment of the present invention;

[0032] Figure 2 A flowchart of the ARM processor providing a security check on the SCP firmware according to an embodiment of the present invention;

[0033] Figure 3 A flowchart for detecting whether an ARM processor is successfully started by SCP firmware under preset conditions provided by an embodiment of the present invention;

[0034] Figure 4 A flowchart of a firmware security verification startup management strategy provided by an embodiment of the present invention;

[0035] Figure 5A schematic diagram of an ARM server firmware security verification management device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0038] The ARM processor used in the ARM server needs to rely on external SCP firmware for its startup and operation. When the ARM server starts, the SCP firmware of the ARM processor is security-verified, and the verified secure SCP firmware is used to start the server to ensure the secure startup of the ARM server.

[0039] Example 1

[0040] See also Figure 1 As shown, an embodiment of the present invention provides an ARM server firmware security verification startup management method, including:

[0041] S100, after the ARM processor is powered on, a security check is performed on the SCP firmware in the SCP firmware memory; in a specific implementation process, the SCP firmware required for starting the ARM processor is configured into at least two SCP firmware memories, and the SCP firmware memories are connected to each ARM processor through a data selector; after the ARM processor is powered on, a security check is performed on the SCP firmware connected to the SCP firmware memory.

[0042] For details, see Figure 2 As shown in the figure, the ARM processor performs security verification on the SCP firmware including:

[0043] S101, each ARM processor first loads SMpro in the SCP firmware from the connected SCP memory for security verification;

[0044] S102, determine whether the SMpro security verification is successful, if yes, execute S103, otherwise execute S106.

[0045] S103, after the SMpro security check succeeds, PMpro in the SCP firmware is loaded for security check;

[0046] S104, determine whether the PMpro safety verification is successful, if yes, execute S105, otherwise execute S106.

[0047] S105, the ARM processor starts with the SCP firmware that has passed the security verification. Specifically, the ARM processor starts with the SCP firmware that has passed the security verification, and after starting, the ARM processor sends a SCP firmware startup success signal. The firmware startup status of each ARM processor is obtained by detecting the SCP firmware startup success signal of each ARM processor.

[0048] S106, the ARM processor sends a security verification failure signal to the SCP firmware.

[0049] In a specific implementation process, for an ARM server configured with at least two ARM processors, each ARM processor performs security verification of the SCP firmware in a preset order and starts up using the SCP firmware that has passed the security verification.

[0050] S200, detecting whether an ARM processor is successfully started by the SCP firmware under a preset condition, if yes, executing S300, otherwise, executing S400.

[0051] During the specific implementation process, see Figure 3 As shown, the detection of whether the ARM processor is successfully started by the SCP firmware under the preset conditions includes:

[0052] S201, the ARM processor starts the first timing after being powered on.

[0053] S202, whether the first timing time is within the first time threshold, if yes, execute S203, otherwise execute S400. If powergood is received beyond the first time or the startup is successful beyond the first time, it is considered that there is an abnormality causing the startup timeout, which may be a power supply failure, an ARM processor failure, or an SCP firmware abnormality.

[0054] S203, detecting a powergood signal of a power-on timing control unit that controls the ARM processor to power on;

[0055] S204, starting the second timing from the receipt of the powergood signal.

[0056] S205, a second timer is used to detect whether the ARM processor is successfully started by the SCP firmware within a second time threshold. If yes, execute S300, otherwise, execute S400.

[0057] After step S200, after the ARM processor is powered on, if the first timing exceeds the first time threshold or all ARM processors fail to start, S400 is executed.

[0058] S300, record the startup status and security verification information of each ARM processor firmware in the ARM server. In the specific implementation process, if the ARM processor is started by the SCP firmware, it means that the SCP firmware has passed the security verification.

[0059] The enabled and disabled ARM processors in the ARM server are determined according to the firmware startup status of the ARM processors.

[0060] When the ARM processor does not start, there may be other faults.

[0061] For the unstarted ARM processor, determine whether its security verification information is failed. If so, determine that the ARM processor failed to start due to an abnormal security verification module. Otherwise, the ARM processor is faulty.

[0062] In order to ensure the maintenance of ARM server business, the ARM processor is started according to the preset conditions, that is, the ARM server is controlled not to be shut down.

[0063] S400, execute the firmware security verification startup management strategy; for specific implementation, refer to Figure 4 As shown, the firmware security verification startup management strategy includes:

[0064] S401, obtaining the result of the SCP firmware security verification performed by the ARM processor;

[0065] S402, analyze whether the SCP firmware security check is successful, if yes, execute S403, otherwise execute S404. Specifically, all ARM processors are not started after the first timing exceeds the first time threshold, and the present application no longer waits for startup to avoid wasting time. The reasons for the startup timeout of all ARM processors may be that all ARM processors are abnormal, the power supply is abnormal, and the SCP firmware security check fails. Obtain and analyze the results of the SCP firmware security check performed by the ARM processor to verify whether the SCP firmware security check fails.

[0066] S403, obtaining the power status of the ARM processor and generating a first alarm, wherein the first alarm records the power status; when checking that the power status in the first alarm is normal, all ARM processors may be faulty.

[0067] S404, recording security verification information and generating a second alarm, wherein the second alarm includes SCP firmware verification failure information and SCP memory information where the verification-failed SCP firmware is located.

[0068] S405, determine whether the ARM processor has reached a preset number of startup times, if not, execute S406, if yes, execute S407. In the specific implementation process, the preset number of startup times is equal to the number of SCP firmware memories connected to each ARM processor.

[0069] S406, switch the ARM processor to connect to the next-ranked SCP firmware memory, and restart the ARM processor. In the specific implementation process, the SCP firmware memory connected to the ARM processor is switched according to the set SCP firmware memory sequence control.

[0070] S407: Issue a shutdown alarm for the ARM server and shut down the ARM server.

[0071] In a specific implementation process, the SCP firmware memory where the SCP firmware that failed the security check is located is determined according to the recorded security check information, the baseboard management controller is controlled to be connected to the SCP firmware memory where the SCP firmware that failed the security check is located, and the SCP firmware that failed the security check is updated through the baseboard management controller. The baseboard management controller supports out-of-band maintenance, which is convenient for maintenance and management.

[0072] Example 2

[0073] See also Figure 5 As shown, an embodiment of the present invention provides an ARM server firmware security verification management device, including:

[0074] A plurality of ARM processors, each of which is electrically connected to a data selector via an I2C bus. In a specific implementation process, a level converter is provided on the I2C bus between the ARM processor and the data selector. The data selector is connected to a plurality of SCP firmware memories via the I2C bus. Each processor is configured as an I2C host, and the SCP firmware memory is configured as an I2C slave. A feasible SCP firmware memory uses an EEPROM memory. Two SCP firmware memories are used in the accompanying drawings, namely a first SCP firmware memory and a second SCP firmware memory.

[0075] Each of the ARM processors is configured with a first GPIO for sending a SCP firmware security check failure signal, and the ARM processor is configured with a second GPIO for sending an SPC firmware startup success signal, and the first GPIO and the second GPIO are connected to a security check management module independent of the ARM processor. In the specific implementation process, the security check management module is implemented by any one of CPLD or FPGA. The security check management module is connected to the baseboard management controller. The SCP firmware in the connected SCP firmware memory is checked by the internal security check module in the ARM processor. When the check fails, the ARM processor sends the SCP firmware security check failure signal through the first GPIO. After the ARM processor SPC firmware is successfully securely started, the ARM processor sends the SPC firmware security startup success signal through the second GPIO. The security check management module obtains the firmware startup status and security check information of each ARM processor in the ARM server according to the SPC firmware security startup success signal and the SCP firmware security check failure signal. When recording is required, the security check management module sends the ARM processor firmware startup status and security check information to the baseboard management controller, and the baseboard management controller records the ARM processor firmware startup status and security check information as a log.

[0076] The safety verification management module is connected to the ARM processor via a power-on timing control unit. The power-on timing control unit controls the ARM processor to power on, and the power-on timing control unit sends a powergood signal after the power supply voltage reaches the standard.

[0077] The control port of the data selector is connected to the security verification management module. When the ARM processor needs to switch the connected SCP firmware memory, the security verification management module controls the state of the data selector so that the ARM processor is connected to the SCP firmware memory in sequence.

[0078] The security verification management module is configured with a timer, which starts the first timing when the ARM processor is powered on, and starts the second timing process when the timer receives the powergood signal. The security verification management module detects whether there is an ARM processor that is successfully started through the SCP firmware under preset conditions. If so, the firmware startup status and security verification information of each ARM processor in the ARM server are recorded. Otherwise, the firmware security verification startup management strategy is executed.

[0079] The security check management module is configured with a GPIO pin for controlling the data selector, and the GPIO pin is connected to the selection pin of the baseboard management controller. The baseboard management controller is connected to the data selector via an I2C bus. The baseboard management controller controls the data selector through the security check management module to realize that the baseboard management controller is connected to the SCP firmware memory, and the baseboard management controller updates the SCP firmware in the SCP firmware memory that fails the security check.

[0080] Example 3

[0081] An embodiment of the present invention provides a medium for implementing an ARM server firmware security verification startup management method, wherein the medium for implementing the ARM server firmware security verification startup management method stores at least one instruction, and reads and executes the instruction to implement the ARM server firmware security verification startup management method.

[0082] In the embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0083] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0084] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0085] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A method for managing the startup of ARM server firmware security verification, characterized in that: include: The SCP firmware required for starting the ARM processor is configured into at least two SCP firmware memories, and the SCP firmware memories are connected to each ARM processor through a data selector; After the ARM processor is powered on, a security check is performed on the SCP firmware in the SCP firmware memory connected to it; Detect whether there is an ARM processor that is successfully started through the SCP firmware under the preset conditions. If so, record the firmware startup status and security verification information of each ARM processor in the ARM server; otherwise, obtain and analyze the results of the SCP firmware security verification performed by the ARM processor; If the SCP firmware security check succeeds, the power supply status for the ARM processor is obtained and a first alarm is generated; if the SCP firmware security check fails, the security check information is recorded and a second alarm is generated; Determine whether the ARM processor has reached a preset number of startup times. If not, switch the ARM processor to connect to the next-ranked SCP firmware memory and restart the ARM processor. If yes, issue a shutdown alarm and shut down the ARM server. The preset number of startup times is equal to the number of SCP firmware memories connected to each ARM processor. Control the switching of the SCP firmware memory connected to the ARM processor according to the set SCP firmware memory order.

2. The ARM server firmware security verification startup management method according to claim 1, characterized in that: The ARM processor performs security checks on the SCP firmware including: The ARM processor first loads SMpro in the SCP firmware for security verification; After the SMpro security check succeeds, PMpro in the SCP firmware is loaded for security check; If the security check results of SMpro and PMpro fail, the security check of the SCP firmware fails. When the security check of the SCP firmware fails, the ARM processor sends a security check failure signal of the SCP firmware.

3. The ARM server firmware security verification startup management method according to claim 1, characterized in that: For an ARM server equipped with at least two ARM processors, each ARM processor securely verifies the SCP firmware in a preset order and boots up using the SCP firmware that has passed the security verification.

4. The ARM server firmware security verification startup management method according to claim 1, characterized in that: The ARM processor starts up through the SCP firmware that has passed the security verification. After starting up, the AMR processor sends a SCP firmware startup success signal.

5. The ARM server firmware security verification startup management method according to claim 1, characterized in that: The detecting whether there is an ARM processor successfully started by the SCP firmware under a preset condition comprises: After the ARM processor is powered on, the timing starts. When the timing time is within the first time threshold, the powergood signal of the power-on timing control unit that controls the power-on of the ARM processor is detected; The timing starts from when the powergood signal is received, and the timing time is within a second time threshold to detect whether the ARM processor is successfully started through the SCP firmware.

6. The ARM server firmware security verification startup management method according to claim 1, characterized in that: The SCP firmware memory where the SCP firmware that failed the security check is located is determined according to the recorded security check information, the baseboard management controller is controlled to be connected to the SCP firmware memory where the SCP firmware that failed the security check is located, and the SCP firmware that failed the security check is updated through the baseboard management controller.

7. A device for implementing the ARM server firmware security verification startup management method according to any one of claims 1 to 6, characterized in that: include: A plurality of ARM processors, each of which is connected to a data selector via an I2C bus, the data selector is connected to a plurality of SCP firmware memories, and a control end of the data selector is connected to a security verification management module independent of the processor; The processor is connected to the safety verification management module through the first GPIO and the second GPIO, and the safety verification management module is connected to the baseboard management controller; The safety verification management module is connected to the processor via a power-on timing control unit.

8. The device for implementing the ARM server firmware security verification startup management method according to claim 7, characterized in that: The baseboard management controller is connected to the security check management module through a selection pin, the baseboard management controller is connected to the data selector through an I2C bus, the data selector is controlled by the security check management module to realize the baseboard management controller connecting to the SCP firmware memory, and the baseboard management controller updates the SCP firmware that fails the security check in the SCP firmware memory.

9. A medium for implementing an ARM server firmware security verification startup management method, characterized in that: The medium for implementing the ARM server firmware security verification startup management method stores at least one instruction, and reads and executes the instruction to implement the ARM server firmware security verification startup management method as described in any one of claims 1-6.

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