LED chip and preparation method thereof

By introducing a groove structure and a reflective mirror layer into the LED chip, the light is blocked and heat-produced due to the horizontal expansion of current, and the electro-optical conversion efficiency and luminous efficiency of the LED chip are improved.

CN114530533BActive Publication Date: 2025-04-08YANGZHOU CHANGELIGHT
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Patent Information

Application Number
CN202210162936.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-02-22
Publication Date
2025-04-08
Estimated Expiration
2042-02-22

AI Technical Summary

Technical Problem

In existing LED chips, current extends laterally into the active layer in the N-electrode blocking area, causing light to be blocked or absorbed, heat production increases, and electric-optical conversion efficiency is reduced.

Method used

A groove structure is introduced into the LED chip, which penetrates the ohmic contact layer and part of the semiconductor layer, and the groove is filled with a dielectric layer, a mirror layer and a bonding layer, reducing current to the electrode blocking area, and forming a reflective mirror layer on the bottom of the groove and the side walls.

Benefits of technology

The light emission of the active layer that extends horizontally to the electrode blocking area is reduced, the junction temperature is reduced, the electro-optical conversion efficiency of the LED chip is improved, and the reflection of light is increased, further improving the luminous efficiency.

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Abstract

The present application discloses an LED chip and a preparation method thereof, wherein at least a stack consisting of an ohmic contact layer and a portion of a first-type semiconductor layer in a second electrode shielding area is at least partially etched away to form a groove, thereby at least reducing the current flowing from the ohmic contact layer and a portion of the first-type semiconductor layer in the second electrode shielding area into the active layer in the second electrode shielding area, that is, reducing the current from lateral expansion into the active layer in the second electrode shielding area, thereby reducing the luminescence of the active layer in the second electrode shielding area, achieving the purpose of reducing heat generation, lowering junction temperature, and improving the electro-optical conversion efficiency of the LED chip, and at the same time, the current can be expanded more to the active layer not shielded by the second electrode, further improving the electro-optical conversion efficiency of the LED chip.
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Description

Technical Field

[0001] The present application relates to the technical field of light emitting diodes, and in particular to an LED chip and a method for preparing the same. Background Art

[0002] With the development of light-emitting diode (LED) chip technology, the internal quantum efficiency of LED has reached a very high level, but the light extraction efficiency is still relatively low and needs to be improved. At present, high-brightness LED chips usually use omni-directional reflectors (ODR) to improve the reflection efficiency of the reflector and thus improve the light extraction efficiency.

[0003] The omnidirectional reflector usually includes a semiconductor layer, a dielectric layer and a metal mirror layer, which are arranged on the P surface of the LED chip. In order to ensure that the semiconductor layer and the metal mirror layer form an ohmic contact, it is necessary to open a hole in the dielectric layer so that the metal mirror layer forms an ohmic contact with the semiconductor layer by filling the opening in the dielectric layer. The ohmic contact position is the P-side power supply position. In order to reduce the N-electrode blocking the light, the opening on the P-side dielectric layer will avoid the N-electrode position when designing. However, although it is possible to design the opening on the dielectric layer to be staggered from the N-electrode, when the current passes through the epitaxial layer, due to the conductivity of the epitaxial layer, part of the current will still extend laterally to the active layer under the N-electrode to emit light. This part of the light will be blocked or absorbed by the N-electrode, thereby generating heat and increasing the junction temperature, which reduces the electro-optical conversion efficiency of the LED chip. Summary of the invention

[0004] In order to solve the above technical problems, the embodiments of the present application provide an LED chip and a preparation method thereof, so as to reduce the lateral expansion of the current into the active layer in the N-electrode shielding area, thereby reducing the luminescence of the active layer in the N-electrode shielding area, thereby reducing heat generation, lowering junction temperature, and improving the electro-optical conversion efficiency of the LED chip.

[0005] To achieve the above objectives, the present application provides the following technical solutions:

[0006] An LED chip, comprising:

[0007] a first substrate;

[0008] A bonding layer and a stacked structure arranged in sequence on the surface of the first substrate, the stacked structure comprising an omnidirectional reflector layer, a first-type semiconductor layer, an active layer, and a second-type semiconductor layer arranged in sequence in a direction away from the first substrate, the omnidirectional reflector layer comprising a mirror layer, a dielectric layer, and an ohmic contact layer arranged in sequence in a direction away from the first substrate, a plurality of openings being provided in the dielectric layer, so that the mirror layer fills the plurality of openings to form ohmic contact with the ohmic contact layer;

[0009] A first electrode located at a side of the first substrate away from the stacked structure and a second electrode located at a side of the stacked structure away from the first substrate;

[0010] and a groove, wherein a projection of the groove on the surface of the first substrate and a projection of the second electrode on the surface of the first substrate at least partially overlap, the groove at least penetrates the stack composed of the ohmic contact layer and a portion of the first-type semiconductor layer, and the stack composed of the dielectric layer, the mirror layer and the bonding layer fills the groove.

[0011] Optionally, the second electrode includes a solder pad and a plurality of sub-electrodes connected to the solder pad, each of the sub-electrodes corresponds to one of the grooves, and a projection of each of the grooves on the surface of the first substrate at least partially overlaps with a projection of the sub-electrode corresponding to the groove on the surface of the first substrate.

[0012] Optionally, the pad corresponds to one groove, and a projection of the groove on the surface of the first substrate and a projection of the pad on the surface of the first substrate at least partially overlap.

[0013] Optionally, the bonding layer includes a first bonding layer and a second bonding layer arranged in sequence along a direction toward the first substrate, wherein a stack consisting of the dielectric layer, the mirror layer and the first bonding layer fills the groove, and a surface of the first bonding layer facing the first substrate is flat.

[0014] Optionally, the groove at least penetrates the stack consisting of the ohmic contact layer, the first-type semiconductor layer and a portion of the active layer.

[0015] Optionally, the groove at least penetrates the stack consisting of the ohmic contact layer, the first-type semiconductor layer, the active layer and a portion of the second-type semiconductor layer.

[0016] Optionally, the stacked structure further comprises: a current spreading layer located between the second-type semiconductor layer and the second electrode;

[0017] The groove at least penetrates the stacked layer consisting of the ohmic contact layer, the first-type semiconductor layer, the active layer, the second-type semiconductor layer and a portion of the current spreading layer.

[0018] Optionally, the groove is trapezoidal or square.

[0019] A method for preparing an LED chip, comprising:

[0020] providing a first substrate and a second substrate;

[0021] A stacked structure is formed on one side of the second substrate, the stacked structure comprising a second-type semiconductor layer, an active layer, a first-type semiconductor layer and an omnidirectional reflector layer arranged in sequence in a direction away from the second substrate, the omnidirectional reflector layer comprising an ohmic contact layer, a dielectric layer and a mirror layer arranged in sequence in a direction away from the second substrate, a groove is provided in the stacked structure, and the groove at least penetrates the stacked layer consisting of the ohmic contact layer and a portion of the first-type semiconductor layer, wherein the formation process of the stacked structure comprises:

[0022] forming the second-type semiconductor layer, the active layer and the first-type semiconductor layer in sequence on one side of the second substrate;

[0023] forming an ohmic contact layer on a side of the first-type semiconductor layer facing away from the second substrate;

[0024] Etching a stack composed of at least the ohmic contact layer and a portion of the first-type semiconductor layer to form a groove, so that the groove at least penetrates the stack composed of the ohmic contact layer and a portion of the first-type semiconductor layer;

[0025] forming a dielectric layer on a side of the ohmic contact layer facing away from the second substrate, and providing a plurality of openings in the dielectric layer;

[0026] forming a mirror layer on the side of the dielectric layer facing away from the second substrate, so that the mirror layer fills the multiple openings and forms ohmic contact with the ohmic contact layer, thereby obtaining the stacked structure, and the ohmic contact layer, the dielectric layer and the mirror layer constitute the omnidirectional reflector layer;

[0027] forming a first bonding layer on a side of the stacked structure facing away from the second substrate, so that the stacked layer consisting of the dielectric layer, the mirror layer and the first bonding layer fills the groove;

[0028] forming a second bonding layer on the surface of the first substrate;

[0029] Bonding the first bonding layer and the second bonding layer to form a bonding layer, bonding the stacked structure to the first substrate from a side of the stacked structure away from the second substrate, and removing the second substrate to achieve substrate transfer;

[0030] forming a first electrode on a side of the first substrate facing away from the stacked structure, and forming a second electrode on a side of the stacked structure facing away from the first substrate;

[0031] The projection of the groove on the surface of the first substrate and the projection of the second electrode on the surface of the first substrate at least partially overlap.

[0032] Optionally, when forming the stacked structure, before forming the second-type semiconductor layer on one side of the second substrate, the method further includes:

[0033] forming a current spreading layer on one side of the second substrate;

[0034] The groove at least penetrates the stack consisting of the ohmic contact layer, the first-type semiconductor layer, the active layer, the second-type semiconductor layer and a portion of the current spreading layer.

[0035] Optionally, after forming the first bonding layer, the method further includes:

[0036] The surface of the first bonding layer facing away from the second substrate is polished to make the surface of the first bonding layer facing away from the second substrate flat.

[0037] Compared with the prior art, the above technical solution has the following advantages:

[0038] The LED chip provided in the embodiment of the present application includes: a first substrate; a bonding layer and a stacked structure arranged in sequence on the surface of the first substrate, the stacked structure including a mirror layer, a dielectric layer, an ohmic contact layer, a first-type semiconductor layer, an active layer, and a second-type semiconductor layer arranged in sequence in a direction away from the first substrate, wherein the mirror layer, the dielectric layer, and the ohmic contact layer constitute an omnidirectional reflector layer; a first electrode located on the side of the first substrate away from the stacked structure and a second electrode located on the side of the stacked structure away from the first substrate; and a groove, wherein the projection of the groove on the surface of the first substrate and the projection of the second electrode on the surface of the first substrate at least partially overlap, the groove at least penetrates the stacked layer composed of the ohmic contact layer and part of the first-type semiconductor layer, and the stacked layer composed of the dielectric layer, the mirror layer, and the bonding layer fills the groove.

[0039] It can be seen that in the LED chip provided in the embodiment of the present application, the second electrode at least blocks part of the groove, and at least the stack composed of the ohmic contact layer and part of the first-type semiconductor layer corresponding to the part of the groove blocked by the second electrode is etched away, thereby at least reducing the current flowing from the ohmic contact layer and part of the first-type semiconductor layer in the area blocked by the second electrode to the active layer in the area blocked by the second electrode, that is, reducing the lateral expansion of the current into the active layer in the area blocked by the second electrode, thereby reducing the luminescence of the active layer in the area blocked by the second electrode, achieving the purpose of reducing heat generation, lowering junction temperature, and improving the electro-optical conversion efficiency of the LED chip, and at the same time, it can also make the current expand more to the active layer that is not blocked by the second electrode, further improving the electro-optical conversion efficiency of the LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0041] Figure 1 It is a schematic diagram of the structure of a traditional LED chip;

[0042] Figure 2 A schematic diagram of the structure of an LED chip provided in one embodiment of the present application;

[0043] Figure 3 A schematic diagram of the structure of an LED chip provided by another embodiment of the present application;

[0044] Figure 4 A schematic top view of a second electrode in an LED chip provided in one embodiment of the present application.

[0045] Figure 5-Figure 12 A schematic diagram of the structure of the LED chip provided in each embodiment of the present application;

[0046] Figure 13(a)-Figure 13(i) This is a schematic structural diagram corresponding to each step of the method for preparing an LED chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0048] In the following description, many specific details are set forth to facilitate a full understanding of the present application, but the present application may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0049] Secondly, the present application is described in detail with reference to the schematic diagram. When describing the embodiments of the present application in detail, for the sake of convenience, the cross-sectional diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present application. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0050] Figure 1A schematic diagram of the structure of a traditional LED chip is given, such as Figure 1 As shown, the conventional LED chip includes, from bottom to top, a P electrode 01, a substrate 02, a bonding layer 03, a metal mirror layer 04, a dielectric layer 05, a P-type ohmic contact layer 06, a P-type window layer 07, a P-type confinement layer 08, an active layer 09, an N-type confinement layer 010, an N-type window layer 011, an N-type roughening layer 012 and an N-electrode 013, wherein the metal mirror layer 04, the dielectric layer 05 and the P-type ohmic contact layer 06 form an omnidirectional reflector layer 014, and a plurality of openings 051 are provided in the dielectric layer 05, so that the metal mirror layer 04 forms an ohmic contact with the P-type ohmic contact layer 06 by filling the openings 051 in the dielectric layer 05.

[0051] As described in the background technology section, although it is possible to design the opening 051 on the dielectric layer 05 to be staggered with the N electrode 013, Figure 1 As shown, the dotted arrow represents the current flow direction, and the solid arrow represents the light output direction. It can be seen that when the current passes through the P-type ohmic contact layer 06, the P-type window layer 07, the P-type confinement layer 08 and the active layer 09, since these layers are conductive, part of the current will still extend laterally to the active layer 09 under the N-electrode 013 to emit light. This part of the light will be blocked or absorbed by the N-electrode 013, thereby generating heat, increasing the junction temperature, and reducing the electro-optical conversion efficiency of the LED chip.

[0052] In view of this, the present application embodiment provides an LED chip, such as Figure 2 As shown, the LED chip includes:

[0053] A first substrate 10;

[0054] A bonding layer 20 and a stacked structure 30 are sequentially arranged on the surface of the first substrate 10, wherein the stacked structure 30 comprises an omnidirectional reflector layer 31, a first-type semiconductor layer 32, an active layer 33 and a second-type semiconductor layer 34 sequentially arranged in a direction away from the first substrate 10, the omnidirectional reflector layer 31 comprises a mirror layer 311, a dielectric layer 312 and an ohmic contact layer 313 sequentially arranged in a direction away from the first substrate 10, wherein a plurality of openings 314 are provided in the dielectric layer 312, so that the mirror layer 311 fills the plurality of openings 314 to form ohmic contact with the ohmic contact layer 313;

[0055] A first electrode 40 located on a side of the first substrate 10 away from the stacked structure 30 and a second electrode 50 located on a side of the stacked structure 30 away from the first substrate 10;

[0056] And a groove 60, the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 at least partially overlap, the groove 60 at least penetrates the stack composed of the ohmic contact layer 313 and a part of the first-type semiconductor layer 32, and the stack composed of the dielectric layer 312, the mirror layer 311 and the bonding layer 20 fills the groove.

[0057] It should be noted that the stacked structure 30 and the first substrate 10 are bonded to each other via the bonding layer 20. Specifically, the stacked structure 30 can be first grown on a temporary substrate, and then the stacked structure 30 can be bonded to the first substrate 10 from the side of the stacked structure away from the temporary substrate, and the temporary substrate can be removed to achieve substrate transfer.

[0058] refer to Figure 1 As shown, when the current passes through the P-type ohmic contact layer 06, the P-type window layer 07, the P-type limiting layer 08 and the active layer 09, it will expand to the N-electrode 013 shielding area, causing the current to flow into the active layer 09 in the N-electrode 013 shielding area to emit light, and this part of the light is then blocked or absorbed by the N-electrode, generating heat to increase the junction temperature, and reducing the electro-optical conversion efficiency of the LED chip. Therefore, in this embodiment, the reference Figure 2 As shown, in the process of forming the stacked structure 30 on the temporary substrate, at least the stacked layer consisting of the ohmic contact layer 313 and a portion of the first-type semiconductor layer 32 is etched to form the groove 60, so that the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 and a portion of the first-type semiconductor layer 32, and the stacked layer consisting of the dielectric layer 312, the mirror layer 311 and the bonding layer 20 fills the groove 60, and the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 at least partially overlap, refer to Figure 2 It can be seen from the current flow direction represented by the dotted arrow that this can at least reduce the current flowing from the ohmic contact layer 313 and part of the first-type semiconductor layer 32 in the area blocked by the second electrode 50 into the active layer 33 in the area blocked by the second electrode 50, that is, reduce the current lateral expansion into the active layer 33 in the area blocked by the second electrode 50, thereby reducing the luminescence of the active layer 33 in the area blocked by the second electrode 50, thereby achieving the purpose of reducing heat generation, lowering junction temperature, and improving the electro-optical conversion efficiency of the LED chip. At the same time, it can also make the current expand more to the active layer 33 that is not blocked by the second electrode 50, further improving the electro-optical conversion efficiency of the LED chip.

[0059] Furthermore, the stack composed of the dielectric layer 312, the mirror layer 311 and the bonding layer 20 fills the groove 60, so that a reflective mirror layer is formed on the bottom and sidewall of the groove 60. Figure 2 It can be seen from the light emitting direction represented by the solid arrow that the light emitted by the LED chip includes not only the light directly emitted from the active layer 33 and the light emitted from the active layer 33 after being reflected by the omnidirectional reflector 31, but also the light emitted from the active layer 33 after being reflected by the reflective mirror layer on the bottom and side walls of the groove 60, thereby increasing the reflection of the light emitted by the active layer 33 and further improving the electro-optical conversion efficiency of the LED chip.

[0060] Based on the above embodiments, optionally, in one embodiment of the present application, Figure 3 As shown, the laminated structure 30 further includes:

[0061] The first-type current spreading layer 35 is located between the ohmic contact layer 313 and the first-type semiconductor layer 32. The first-type current spreading layer 35 plays a role in current spreading, so that the material of the active layer 33 can be fully utilized, the LED light is more uniform, and the light-emitting area of ​​the LED chip is increased, but at the same time, the current will also expand to the area blocked by the second electrode 50. In this embodiment, the groove 60 at least passes through the stack composed of the ohmic contact layer 313, the first-type current spreading layer 35 and a part of the first-type semiconductor layer 32 to reduce the current from expanding to the area blocked by the second electrode 50.

[0062] It should also be noted that the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 at least partially overlap, including:

[0063] The projection of the groove 60 on the surface of the first substrate 10 is located within the projection range of the second electrode 50 on the surface of the first substrate 10;

[0064] The projection of the second electrode 50 on the surface of the first substrate 10 is located within the projection range of the groove 60 on the surface of the first substrate 10;

[0065] The projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 completely overlap;

[0066] And the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 partially overlap.

[0067] That is to say, in the direction perpendicular to the surface of the first substrate, the second electrode 50 at least blocks a portion of the groove 60, and the stack consisting of at least the ohmic contact layer 313 and a portion of the first-type semiconductor layer 32 corresponding to the portion of the groove 60 blocked by the second electrode 50 is etched away, thereby reducing the lateral expansion of the current into the active layer 33 in the area blocked by the second electrode 50, thereby reducing the luminescence of the portion of the active layer 33 blocked by the second electrode 50, reducing heat generation, lowering the junction temperature, and improving the electro-optical conversion efficiency of the LED chip.

[0068] Since the light emitted by the active layer 33 blocked by the second electrode 50 is ineffective light emission and will generate heat causing the junction temperature to rise, therefore, the more the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 overlap, the more the stack consisting of at least the ohmic contact layer 313 and part of the first-type semiconductor layer 32 blocked by the second electrode is etched away, which is more conducive to reducing heat generation, lowering the junction temperature, and improving the electro-optical conversion efficiency of the LED chip.

[0069] Furthermore, since the light emitted by the active layer 33 that is not blocked by the second electrode 50 is effective light emission, the smaller the non-overlapping portion of the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 is, the smaller the impact on the light emission of the active layer 33 that is not blocked by the second electrode 50 is, thereby reducing the lateral expansion of the current into the active layer 33 blocked by the second electrode 50 while allowing the current to expand more into the active layer 33 that is not blocked by the second electrode 50, thereby further improving the electro-optical conversion efficiency of the LED chip.

[0070] Therefore, in an ideal case, the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 should be set to completely overlap. However, considering the actual process, the projection of the groove 60 on the surface of the first substrate 10 may be located within the projection range of the second electrode 50 on the surface of the first substrate 10, or may overlap with the projection of the second electrode 50 on the surface of the first substrate 10, or the projection of the second electrode 50 on the surface of the first substrate 10 may be located within the projection range of the groove 60 on the surface of the first substrate 10.

[0071] When the projection of the second electrode 50 on the surface of the first substrate 10 is within the projection range of the groove 60 on the surface of the first substrate 10, or the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 partially overlap, it can be set that the proportion of the non-overlapping portion of the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 does not exceed a preset proportion. Optionally, the preset proportion can be 10%, so as to reduce the lateral expansion of the current into the active layer 33 blocked by the second electrode 50 while allowing the current to expand more into the active layer not blocked by the second electrode 50, thereby further improving the electro-optical conversion efficiency of the LED chip.

[0072] It should be further explained that, in the present embodiment, since the stack composed of the dielectric layer 312, the mirror layer 311 and the bonding layer 20 fills the groove, and a plurality of openings 314 are provided in the dielectric layer 312, so that the mirror layer 311 fills the plurality of openings 314 to form ohmic contact with the ohmic contact layer 313, the projection of the plurality of openings 314 on the surface of the first substrate 10 and the projection of the groove 60 on the surface of the first substrate 10 do not overlap.

[0073] Furthermore, the projection of the multiple openings 314 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 may overlap or may not overlap. However, considering that when the openings 314 in the dielectric layer 312 are located in the shielding area of ​​the second electrode 50, since the current tends to take the shortest path, the current will be concentrated in the shielding area of ​​the second electrode 50, resulting in a large current density in the shielding area of ​​the second electrode 50 and a small current density in the area not shielded by the second electrode 50, resulting in a lower overall brightness of the LED. Therefore, the projection of the multiple openings 314 in the dielectric layer 312 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 should be set as far as possible so that they do not overlap.

[0074] In summary, in the LED chip provided in the embodiment of the present application, at least the stack consisting of the ohmic contact layer 313 and part of the first-type semiconductor layer 32 in the area blocked by the second electrode 50 is at least partially etched away, thereby at least reducing the current flowing from the ohmic contact layer 313 and part of the first-type semiconductor layer 32 in the area blocked by the second electrode 50 into the active layer 33 in the area blocked by the second electrode 50, that is, reducing the lateral expansion of the current into the active layer 33 in the area blocked by the second electrode 50, thereby reducing the luminescence of the active layer 33 in the area blocked by the second electrode 50, thereby achieving the purpose of reducing heat generation, lowering junction temperature, and improving the electro-optical conversion efficiency of the LED chip, and at the same time, it can also make the current expand more to the active layer 33 that is not blocked by the second electrode 50, further improving the electro-optical conversion efficiency of the LED chip. Furthermore, the stack composed of the dielectric layer 312, the mirror layer 311 and the bonding layer 20 fills the groove 60, so that a reflective mirror layer is formed on the bottom and side walls of the groove 60, thereby increasing the reflection of the light emitted by the active layer 33 and further improving the electro-optical conversion efficiency of the LED chip.

[0075] Based on the above embodiments, in one embodiment of the present application, Figure 4 As shown, the second electrode 50 includes a pad 51 and a plurality of sub-electrodes 52 connected to the pad 51. At this time, each of the sub-electrodes 52 corresponds to a groove 60, and the projection of each of the grooves 60 on the surface of the first substrate 10 and the projection of the sub-electrode 52 corresponding to the groove on the surface of the first substrate 10 at least partially overlap.

[0076] It should be noted that the present application does not limit the shape and quantity of the sub-electrodes 52, which depends on the specific situation. Figure 4 As shown, the sub-electrode 52 is a finger-shaped electrode, but the sub-electrode 52 can be designed into other shapes according to needs.

[0077] It should also be noted that since the wiring for supplying power to the LED chip is soldered on the pad 51, it is necessary to bond the pad 51 during the specific production process. Therefore, considering the stability of the pad 51, optionally, in one embodiment of the present application, the groove 60 may not be set in the shielding area of ​​the pad 51, and the groove may only be set in the shielding area of ​​each sub-electrode 52.

[0078] However, considering that the groove 60 is filled with the stack consisting of the dielectric layer 312, the mirror layer 311 and the bonding layer 20, optionally, in another embodiment of the present application, the pad 51 also corresponds to a groove 60, and the projection of the groove 60 on the surface of the first substrate 10 and the projection of the pad 51 on the surface of the first substrate 10 at least partially overlap.

[0079] It should be noted that the reference Figure 4 As shown, Figure 4 The circles located on both sides of each of the sub-electrodes 52 are top view schematic diagrams of the openings 314 provided in the dielectric layer 312. It can be seen that: Figure 4 A schematic diagram of an arrangement is given in which the projections of the plurality of openings 314 provided in the dielectric layer 312 on the surface of the first substrate 10 and the projections of the grooves 60 on the surface of the first substrate 10 do not overlap.

[0080] Based on any of the above embodiments, in one embodiment of the present application, Figure 5 As shown, the bonding layer 20 includes a first bonding layer 21 and a second bonding layer 22 arranged in sequence along a direction toward the first substrate 10, wherein a stack composed of the dielectric layer 312, the mirror layer 311 and the first bonding layer 21 fills the groove 60, and the surface of the first bonding layer 21 facing the first substrate 10 is flat.

[0081] It should be noted that, as is known above, the stacked structure 30 can be first grown on a temporary substrate, and then the stacked structure 30 can be bonded to the first substrate 10 from the side of the stacked structure 30 away from the temporary substrate, and the temporary substrate can be removed. Therefore, in order to facilitate the bonding of the stacked structure 30 to the first substrate 10, the first bonding layer 21 is formed on the side of the stacked structure away from the temporary substrate, and the stack composed of the dielectric layer 312, the mirror layer 311 and the first bonding layer 21 fills the groove 60, and the surface of the first bonding layer 21 facing the first substrate 10 should be flat. At the same time, a second bonding layer 22 is formed on the surface of the first substrate 10, so that the first bonding layer 21 and the second bonding layer 22 are bonded to form the bonding layer 20, so that the stacked structure 30 can be bonded to the first substrate 10 from the side of the stacked structure 30 away from the temporary substrate, and the temporary substrate can be removed to achieve substrate transfer.

[0082] It should also be noted that, after the first bonding layer 21 fills the groove, the surface of the first bonding layer 21 facing the first substrate 10 may be uneven, which is not conducive to the subsequent bonding with the second bonding layer 22. Therefore, after the first bonding layer 21 is formed on the side of the stacked structure 30 away from the temporary substrate, the surface of the first bonding layer 21 away from the temporary substrate is polished to make the surface of the first bonding layer 21 facing the first substrate 10 flat. In addition, the first bonding layer 21 is usually a metal layer of Au, Ag or In. The surface of the first bonding layer 21 facing the first substrate 10 is polished to make the surface of the first bonding layer 21 facing the first substrate 10 flat, and the first bonding layer 21 can also be used as a mirror reflection layer to further increase the reflection of the light emitted by the LED chip and improve the luminous efficiency of the LED chip.

[0083] As is known from the above, when the current in the traditional LED chip passes through the P-type ohmic contact layer 06, the P-type window layer 07, the P-type limiting layer 08 and the active layer 09, it will expand to the N-electrode 013 shielding area, causing the current to flow into the active layer 09 in the N-electrode 013 shielding area to emit light, and this part of the light is then blocked or absorbed by the N-electrode, generating heat so that the junction temperature increases, and the electro-optical conversion efficiency of the LED chip decreases. Therefore, in the LED chips provided in each embodiment of the present application, the depth of the groove 60 is not limited to from the ohmic contact layer 313 to at least a portion of the first-type semiconductor layer 32. The depth of the groove 60 is specifically described below by taking the stacked structure including the first-type current expansion layer 35 located between the ohmic contact layer 313 and the first-type semiconductor layer 32 as an example.

[0084] Based on any of the above embodiments, optionally, in an embodiment of the present application, Figure 6 As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 and the first-type semiconductor layer 32 .

[0085] Based on any of the above embodiments, optionally, in an embodiment of the present application, Figure 7 As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 , the first-type semiconductor layer 32 and a portion of the active layer 33 .

[0086] It can be seen that in the present embodiment, at least the stack consisting of the ohmic contact layer 313, the first-type semiconductor layer 32 and part of the active layer 33 in the area blocked by the second electrode 50 is at least partially etched away, thereby further reducing the lateral expansion of the current into the active layer 33 in the area blocked by the second electrode 50, that is, further reducing the luminescence of the active layer 33 in the area blocked by the second electrode 33, further reducing heat generation, lowering the junction temperature, and improving the electro-optical conversion efficiency of the LED chip.

[0087] Based on the above embodiments, in one embodiment of the present application, Figure 8 As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 , the first-type semiconductor layer 32 and the active layer 33 .

[0088] It can be seen that in the above embodiments, the depth of the groove 60 starts from the ohmic contact layer 313, the first-type current spreading layer 35 and part of the first-type semiconductor layer 32, and can reach the interface between the first-type semiconductor layer 32 and the active layer 33, or can reach part of the active layer 33, or can reach the interface between the active layer 33 and the second-type semiconductor layer 34. That is, the depth is getting deeper and deeper, so the effect of reducing the lateral expansion of the current into the active layer 33 in the area blocked by the second electrode 50 is getting better and better. Therefore, ideally, the groove 60 can be set to pass through the stack composed of the ohmic contact layer 313, the first-type current spreading layer 35, the first-type semiconductor layer 32 and the active layer 33.

[0089] However, considering that in the actual process, the depth of the groove 60 may also extend into the second-type semiconductor layer 34, therefore, based on the above embodiment, optionally, in an embodiment of the present application, Fig. 9 As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 , the first-type semiconductor layer 32 , the active layer 33 and a portion of the second-type semiconductor layer 34 .

[0090] Based on the above embodiments, optionally, in one embodiment of the present application, Fig.10As shown, the stacked structure 30 also includes: a current spreading layer 36 located between the second-type semiconductor layer 34 and the second electrode 50, and the current spreading layer is recorded as the second-type current spreading layer 36. The second-type current spreading layer 36 also plays a role in current spreading, so that the material of the active layer can be fully utilized, the LED light is more uniform, and the light-emitting area of ​​the LED chip is also increased; in this embodiment, the groove 60 can at least penetrate the stack composed of the ohmic contact layer 313, the first-type current spreading layer 35, the first-type semiconductor layer 32, the active layer 33, the second-type semiconductor layer 34 and part of the current spreading layer 36 (that is, the second-type current spreading layer 36).

[0091] On the basis of the above embodiments, optionally, in one embodiment of the present application, the groove 60 penetrates the stack consisting of the ohmic contact layer 313, the first-type current spreading layer 35, the first-type semiconductor layer 32, the active layer 33, the second-type semiconductor layer 34 and the current spreading layer (i.e., the second-type current spreading layer 36).

[0092] It should be noted that as the depth of the groove 60 in the direction away from the first substrate 10 increases, the side wall slope of the groove 60 also increases, which is less conducive to the adhesion of the stack composed of the dielectric layer 312, the mirror layer 311 and the first bonding layer 21 on the side wall of the groove 60. Therefore, the depth of the groove 60 should not be too deep.

[0093] The ohmic contact layer between the dielectric layer 312 and the first-type current spreading layer 35 is recorded as the first-type ohmic contact layer 313. Optionally, in one embodiment of the present application, Fig.11 As shown, the stacked structure 30 further includes: a second type ohmic contact layer 37 located between the second type current spreading layer 36 and the second electrode 50 , so that an ohmic contact is formed between the second electrode 50 and the second type ohmic contact layer 37 .

[0094] Furthermore, in order to increase the light output angle of the LED chip and thus improve the light extraction efficiency of the LED chip, as Fig.11 As shown, the surface of the second-type ohmic contact layer 37 facing away from the first substrate 10 may be roughened to form a roughened surface.

[0095] It should be noted that, in the above embodiments, optional, such as Figure 2-Figure 3 , Figure 5-Figure 11 As shown, the groove 60 may be a trapezoid, and the present application does not limit the upper and lower base widths and the side slopes of the trapezoid, which may be determined according to specific circumstances. Fig.12As shown, the groove 60 may also be a square shape, depending on the specific situation. When the groove 60 is a trapezoid, the sidewall of the groove 60 has a certain slope, so that the dielectric layer 312, the mirror layer 311 and the first bonding layer 21 can be better attached to the sidewall of the groove 60 when they are subsequently deposited in the groove 60.

[0096] It should also be noted that, in the above embodiments, the first electrode 40 can be a P electrode, and the second electrode 50 can be an N electrode. Accordingly, the first-type ohmic contact layer 313 can be a P-type ohmic contact layer, the first-type current spreading layer 35 can be a P-type current spreading layer, also called a P-type window layer, the first-type semiconductor layer 32 can be a P-type semiconductor layer, also called a P-type limiting layer, the second-type semiconductor layer 34 can be an N-type semiconductor layer, also called an N-type limiting layer, the second-type current spreading layer 36 can be an N-type current spreading layer, also called an N-type window layer, and the second-type ohmic contact layer 37 can be an N-type ohmic contact layer, also called an N-type roughening layer.

[0097] Optionally, the first substrate 10 may be a Si substrate or a sapphire substrate, and the temporary substrate may be a GaAs substrate;

[0098] The first-type ohmic contact layer 313 may be a GaP layer doped with Mg or C grown at a low temperature;

[0099] The dielectric layer 312 may be a low refractive index transparent film such as SiO2 or MgF2;

[0100] The mirror layer 311 may be an Au or Ag metal mirror layer. It should be noted that the thickness of the mirror layer 311 is not less than the thickness of the dielectric layer 312 to ensure that the mirror layer 311 fills the multiple openings in the dielectric layer 312.

[0101] The first bonding layer 21 and the second bonding layer 22 may both be Au, Ag or In metal layers.

[0102] The present application also provides a method for preparing an LED chip, the method comprising:

[0103] S100 : providing a first substrate 10 and a second substrate 11 .

[0104] S200: forming a stacked structure 30 on one side of the second substrate 11, referring to Figure 2As shown, the stacked structure 30 includes a second-type semiconductor layer 34, an active layer 33, a first-type semiconductor layer 32 and an omnidirectional reflector layer 31 arranged in sequence along a direction away from the second substrate 11, the omnidirectional reflector layer 31 includes an ohmic contact layer 313, a dielectric layer 312 and a mirror layer 311 arranged in sequence along a direction away from the second substrate 11, a groove 60 is provided in the stacked structure 30, and the groove 60 at least penetrates the stack composed of the ohmic contact layer 313 and a part of the first-type semiconductor layer 32, wherein the formation process of the stacked structure 30 includes:

[0105] S210 : As shown in FIG. 13( a ), the second-type semiconductor layer 34 , the active layer 33 and the first-type semiconductor layer 32 are sequentially formed on one side of the second substrate 11 .

[0106] Optionally, the second substrate 11 is a GaAs substrate. More specifically, the second substrate 11 may be a GaAs substrate with a crystal orientation of (100). <111> In the actual process, before forming the second type semiconductor layer 34 on one side of the second substrate 11, a buffer layer and an etching stop layer are usually formed first, and the buffer layer and the etching stop layer are removed together with the second substrate 11 during the subsequent substrate transfer. The buffer layer and the etching stop layer are not shown in FIG. 13(a).

[0107] Specifically, the active layer 33 may be grown by adopting a low-temperature multi-quantum well process.

[0108] S220 : as shown in FIG. 13( b ), an ohmic contact layer 313 is formed on a side of the first-type semiconductor layer 32 away from the second substrate 11 .

[0109] Optionally, the first-type semiconductor layer 32 is a P-type semiconductor layer, the second-type semiconductor layer 34 is an N-type semiconductor layer, and the ohmic contact layer 313 is a low-temperature grown GaP layer doped with Mg or C.

[0110] S230: As shown in FIG. 13( c ), etching the stack composed of at least the ohmic contact layer 313 and a portion of the first-type semiconductor layer 32 to form a groove 60 , so that the groove 60 at least penetrates the stack composed of the ohmic contact layer 313 and a portion of the first-type semiconductor layer 32 .

[0111] Specifically, the groove 60 is formed by dry or wet etching, as shown in FIG13(c), and the depth of the groove 60 starts from the ohmic contact layer 313 and reaches at least a portion of the first-type semiconductor layer 32, so that the groove 60 at least penetrates the stack composed of the ohmic contact layer 313 and a portion of the first-type semiconductor layer 32.

[0112] S240 : As shown in FIG. 13( d ), a dielectric layer 312 is formed on a side of the ohmic contact layer 313 away from the second substrate 11 , and a plurality of openings 314 are provided in the dielectric layer 312 .

[0113] Specifically, first, a dielectric layer 312 is formed by evaporation on the side of the ohmic contact layer 313 away from the second substrate 11; optionally, the dielectric layer is a low-refractive-index transparent film such as SiO2 or MgF2, and the thickness of the dielectric layer 312 may be 1000A-5000A;

[0114] Then, a photolithography mask process is used to make openings 314 of a specific number and size on the dielectric layer 312, and the openings 314 penetrate the dielectric layer 312; it should be noted that the present application does not limit the number, size and position of the openings 314 made on the dielectric layer 312.

[0115] S250: As shown in FIG13( e), a mirror layer 311 is formed on the side of the dielectric layer 312 away from the second substrate 11, so that the mirror layer 311 fills the multiple openings 314 and forms an ohmic contact with the ohmic contact layer 313, thereby obtaining the stacked structure 30, and the ohmic contact layer 313, the dielectric layer 312 and the mirror layer 311 constitute the omnidirectional reflector layer 31.

[0116] Specifically, a mirror layer 311 is formed by vapor deposition on the surface of the dielectric layer 312 facing away from the second substrate 11, so that the mirror layer 311 fills the multiple openings 314 in the dielectric layer 312 to form an ohmic contact with the ohmic contact layer 313; optionally, the mirror layer 311 is an Au or Ag metal mirror layer. It should be noted that the thickness of the mirror layer 311 is not less than the thickness of the dielectric layer 312 to ensure that the mirror layer 311 fills the multiple openings 314 in the dielectric layer 312.

[0117] S300 : as shown in FIG. 13( f ), a first bonding layer 21 is formed on the side of the stacked structure 30 away from the second substrate 11 , so that the stacked layer consisting of the dielectric layer 312 , the mirror layer 311 and the first bonding layer 21 fills the groove 60 .

[0118] Specifically, the first bonding layer 21 is evaporated on the surface of the mirror layer 311 facing away from the second substrate 11 . Optionally, the first bonding layer is a metal layer of Au, Ag or In.

[0119] S400 : as shown in FIG. 13( g ), a second bonding layer 22 is formed on the surface of the first substrate 10 .

[0120] Optionally, the first substrate is a Si substrate or a sapphire substrate, and its thickness may be 150 μm-350 μm; the second bonding layer may be an Au, Ag or In metal layer.

[0121] S500: As shown in FIG. 13(h), the first bonding layer 21 and the second bonding layer 22 are bonded to form a bonding layer 20, so as to bond the stacked structure 30 to the first substrate 10 from the side of the stacked structure 30 facing away from the second substrate 11, and remove the second substrate 11 to achieve substrate transfer.

[0122] Specifically, a bonding machine is used to bond the first bonding layer 21 and the second bonding layer 22 under high pressure and high temperature conditions. The specific conditions may be a bonding pressure of 8000Kg-15000Kg and a bonding temperature of 250 degrees-400 degrees.

[0123] As is known above, in this step, while removing the second substrate 11 , the buffer layer and the etching stop layer between the second substrate 11 and the second-type semiconductor layer 34 are also removed.

[0124] S600: As shown in FIG. 13(i), a first electrode 40 is formed on the side of the first substrate 10 away from the stacked structure 30, and a second electrode 50 is formed on the side of the stacked structure 30 away from the first substrate 10, and finally a Figure 2 The device structure shown.

[0125] Specifically, for the preparation of the second electrode 50, the pattern of the second electrode 50 can be prepared by a photolithography mask method, and then the second electrode 50 is evaporated by electron beam evaporation or sputtering. The material of the second electrode 50 can be Au, Pt, Zn or Ti.

[0126] To prepare the first electrode 40 , the surface of the first substrate 10 facing away from the stacked structure 30 may be ground to a specified thickness, such as 150 μm-250 μm, and then the first electrode 40 may be formed by vapor deposition on the side of the first substrate 10 facing away from the stacked structure 30 .

[0127] In this embodiment, the projection of the groove 60 on the surface of the first substrate 10 at least partially overlaps with the projection of the second electrode 50 on the surface of the first substrate 10 .

[0128] It should be noted that, after the first bonding layer 21 fills the groove 60, the surface of the first bonding layer 21 facing the first substrate 10 may be uneven, which is not conducive to subsequent bonding with the second bonding layer 22. Therefore, optionally, in one embodiment of the present application, after forming the first bonding layer 21, the method further includes:

[0129] S700: Polishing the surface of the first bonding layer 21 away from the second substrate 11 to make the surface of the first bonding layer 21 away from the second substrate 11 flat, so that when the light emitted by the active layer 33 is incident on the first bonding layer 21, it is reflected toward the light emitting surface, thereby improving the luminous efficiency of the LED chip.

[0130] Specifically, the first bonding layer 21 may be polished by a grinding wheel or chemical mechanical polishing (CMP) method, and the polishing thickness may be 3 μm-5 μm.

[0131] It should also be noted that the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 at least partially overlap, including:

[0132] The projection of the groove 60 on the surface of the first substrate 10 is located within the projection range of the second electrode 50 on the surface of the first substrate 10;

[0133] The projection of the second electrode 50 on the surface of the first substrate 10 is located within the projection range of the groove 60 on the surface of the first substrate 10;

[0134] The projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 completely overlap;

[0135] And the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 partially overlap.

[0136] That is, in a direction perpendicular to the surface of the first substrate, the second electrode 50 at least blocks a portion of the groove 60, and the stack consisting of at least the ohmic contact layer 313 and a portion of the first-type semiconductor layer 32 corresponding to the portion of the groove 60 blocked by the second electrode 50 is etched away. Figure 2It can be seen from the current flow direction represented by the dotted arrow that this can at least reduce the current flowing from the ohmic contact layer and part of the first-type semiconductor layer in the second electrode shielding area to the active layer in the second electrode shielding area, that is, reduce the current lateral expansion to the active layer 33 in the second electrode 50 shielding area, thereby reducing the luminescence of the active layer 33 blocked by the second electrode 50, reducing heat generation, lowering the junction temperature, and improving the electro-optical conversion efficiency of the LED chip.

[0137] Furthermore, the stack composed of the dielectric layer 312, the mirror layer 311 and the bonding layer 20 fills the groove 60, so that a reflective mirror layer is formed on the bottom and sidewall of the groove 60. Figure 2 It can be seen from the light emitting direction represented by the solid arrow that the light emitted by the LED chip includes not only the light directly emitted from the active layer 33 and the light emitted from the active layer 33 after being reflected by the omnidirectional reflector 31, but also the light emitted from the active layer 33 after being reflected by the reflective mirror layer on the bottom and side walls of the groove 60, thereby increasing the reflection of the light emitted by the active layer 33 and further improving the electro-optical conversion efficiency of the LED chip.

[0138] Since the light emitted by the active layer 33 blocked by the second electrode 50 is ineffective light emission and will generate heat causing the junction temperature to rise, therefore, the more the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 overlap, the more the stack consisting of at least the ohmic contact layer 313 and part of the first-type semiconductor layer 32 blocked by the second electrode is etched away, which is more conducive to reducing heat generation, lowering the junction temperature, and improving the electro-optical conversion efficiency of the LED chip.

[0139] Furthermore, since the light emitted by the active layer 33 that is not blocked by the second electrode 50 is effective light emission, the smaller the non-overlapping portion of the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 is, the smaller the impact on the light emission of the active layer 33 that is not blocked by the second electrode 50 is, thereby reducing the lateral expansion of the current into the active layer 33 blocked by the second electrode 50 while allowing the current to expand more into the active layer 33 that is not blocked by the second electrode 50, thereby further improving the electro-optical conversion efficiency of the LED chip.

[0140] Therefore, in an ideal case, the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 should be set to completely overlap. However, considering the actual process, the projection of the groove 60 on the surface of the first substrate 10 may be located within the projection range of the second electrode 50 on the surface of the first substrate 10, or may overlap with the projection of the second electrode 50 on the surface of the first substrate 10, or the projection of the second electrode 50 on the surface of the first substrate 10 may be located within the projection range of the groove 60 on the surface of the first substrate 10.

[0141] When the projection of the second electrode 50 on the surface of the first substrate 10 is within the projection range of the groove 60 on the surface of the first substrate 10, or the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 partially overlap, it can be set that the proportion of the non-overlapping portion of the projection of the groove 60 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 does not exceed a preset proportion. Optionally, the preset proportion can be 10%, so as to reduce the lateral expansion of the current into the active layer 33 blocked by the second electrode 50 while allowing the current to expand more into the active layer not blocked by the second electrode 50, thereby further improving the electro-optical conversion efficiency of the LED chip.

[0142] It should be further explained that, in the present embodiment, since the stack composed of the dielectric layer 312, the mirror layer 311 and the bonding layer 20 fills the groove, and a plurality of openings 314 are provided in the dielectric layer 312, so that the mirror layer 311 fills the plurality of openings 314 to form ohmic contact with the ohmic contact layer 313, the projection of the plurality of openings 314 on the surface of the first substrate 10 and the projection of the groove 60 on the surface of the first substrate 10 do not overlap.

[0143] Furthermore, the projection of the multiple openings 314 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 may overlap or may not overlap. However, considering that when the openings 314 in the dielectric layer 312 are located in the shielding area of ​​the second electrode 50, since the current tends to take the shortest path, the current will be concentrated in the shielding area of ​​the second electrode 50, resulting in a large current density in the shielding area of ​​the second electrode 50 and a small current density in the area not shielded by the second electrode 50, resulting in a lower overall brightness of the LED. Therefore, the projection of the multiple openings 314 in the dielectric layer 312 on the surface of the first substrate 10 and the projection of the second electrode 50 on the surface of the first substrate 10 should be set as far as possible so that they do not overlap.

[0144] Based on the above embodiment, optionally, in one embodiment of the present application, when forming the stacked structure 30, before forming the ohmic contact layer 313, the method further includes:

[0145] S221: forming a first-type current spreading layer 35 on the side of the first-type semiconductor layer 32 away from the second substrate 11, and finally obtaining Figure 3 In the device structure shown, the first-type current expansion layer 35 plays a role in current expansion, so that the material of the active layer 33 can be fully utilized, the LED light is more uniform, and the light-emitting area of ​​the LED chip is increased, but at the same time, the current will also expand to the area blocked by the second electrode 50. In this embodiment, the groove 60 at least penetrates the stack composed of the ohmic contact layer 313, the first-type current expansion layer 35 and a part of the first-type semiconductor layer 32 to reduce the current expansion to the area blocked by the second electrode 50.

[0146] Based on the above embodiments, in one embodiment of the present application, Figure 4 As shown, the second electrode 50 includes a pad 51 and a plurality of sub-electrodes 52 connected to the pad 51. At this time, each of the sub-electrodes 52 corresponds to a groove 60, and the projection of each of the grooves 60 on the surface of the first substrate 10 and the projection of the sub-electrode 52 corresponding to the groove on the surface of the first substrate 10 at least partially overlap.

[0147] It should be noted that the present application does not limit the shape and quantity of the sub-electrodes 52, which depends on the specific situation. Figure 4 As shown, the sub-electrode 52 is a finger-shaped electrode, but the sub-electrode 52 can be designed into other shapes according to needs.

[0148] It should also be noted that since the wiring for supplying power to the LED chip is soldered on the pad 51, it is necessary to bond the pad 51 during the specific production process. Therefore, considering the stability of the pad 51, optionally, in one embodiment of the present application, the groove 60 may not be set in the shielding area of ​​the pad 51, and the groove may only be set in the shielding area of ​​each sub-electrode 52.

[0149] However, considering that the groove 60 is filled with the stack consisting of the dielectric layer 312, the mirror layer 311 and the bonding layer 20, optionally, in another embodiment of the present application, the pad 51 also corresponds to a groove 60, and the projection of the groove 60 on the surface of the first substrate 10 and the projection of the pad 51 on the surface of the first substrate 10 at least partially overlap.

[0150] It should be noted that the reference Figure 4 As shown, Figure 4 The circles located on both sides of each of the sub-electrodes 52 are top view schematic diagrams of the openings 314 provided in the dielectric layer 312. It can be seen that: Figure 4 A schematic diagram of an arrangement is given in which the projections of the plurality of openings 314 provided in the dielectric layer 312 on the surface of the first substrate 10 and the projections of the grooves 60 on the surface of the first substrate 10 do not overlap.

[0151] As is known from the above, when the current in the traditional LED chip passes through the P-type ohmic contact layer 06, the P-type window layer 07, the P-type limiting layer 08 and the active layer 09, it will expand to the N-electrode 013 shielding area, causing the current to flow into the active layer 09 in the N-electrode 013 shielding area to emit light, and this part of the light is then blocked or absorbed by the N-electrode, generating heat so that the junction temperature increases, and the electro-optical conversion efficiency of the LED chip decreases. Therefore, in the LED chip prepared by the method provided in each embodiment of the present application, the depth of the groove 60 is not limited to from the ohmic contact layer 313 to at least a portion of the first-type semiconductor layer 32. The depth of the groove 60 is specifically described below by taking the stacked structure including the first-type current expansion layer 35 located between the ohmic contact layer 313 and the first-type semiconductor layer 32 as an example.

[0152] Based on the above embodiments, optionally, in one embodiment of the present application, Figure 6 As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 and the first-type semiconductor layer 32 .

[0153] Based on any of the above embodiments, optionally, in an embodiment of the present application, Figure 7 As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 , the first-type semiconductor layer 32 and a portion of the active layer 33 .

[0154] It can be seen that in the present embodiment, at least the stack consisting of the ohmic contact layer 313, the first-type semiconductor layer 32 and part of the active layer 33 in the area blocked by the second electrode 50 is at least partially etched away, thereby further reducing the lateral expansion of the current into the active layer 33 in the area blocked by the second electrode 50, that is, further reducing the luminescence of the active layer 33 in the area blocked by the second electrode 33, further reducing heat generation, lowering the junction temperature, and improving the electro-optical conversion efficiency of the LED chip.

[0155] Based on the above embodiments, optionally, in one embodiment of the present application, Figure 8As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 , the first-type semiconductor layer 32 and the active layer 33 .

[0156] It can be seen that in the above embodiments, the depth of the groove 60 starts from the ohmic contact layer 313, the first-type current spreading layer 35 and part of the first-type semiconductor layer 32, and can reach the interface between the first-type semiconductor layer 32 and the active layer 33, or can reach part of the active layer 33, or can reach the interface between the active layer 33 and the second-type semiconductor layer 34, that is, the depth is getting deeper and deeper, so the subsequent effect of reducing the lateral expansion of the current into the active layer 33 in the area blocked by the second electrode 50 is getting better and better. Therefore, ideally, the groove 60 can be set to pass through the stack composed of the ohmic contact layer 313, the first-type current spreading layer 35, the first-type semiconductor layer 32 and the active layer 33.

[0157] However, considering that in the actual process, the depth of the groove 60 may also extend into the second-type semiconductor layer 34, therefore, based on the above embodiment, optionally, in an embodiment of the present application, Fig. 9 As shown, the groove 60 at least penetrates the stacked layer consisting of the ohmic contact layer 313 , the first-type current spreading layer 35 , the first-type semiconductor layer 32 , the active layer 33 and a portion of the second-type semiconductor layer 34 .

[0158] Based on the above embodiment, optionally, in one embodiment of the present application, when forming the stacked structure 30, before forming the second-type semiconductor layer 34, the method further includes:

[0159] S211: forming a current spreading layer 36 on one side of the second substrate 11, and finally obtaining Fig.10 In the device structure shown, the current spreading layer is recorded as the second-type current spreading layer 36, and the second-type current spreading layer 36 also plays a role in current spreading, so that the material of the active layer can be fully utilized, the LED light is more uniform, and the light-emitting area of ​​the LED chip is also increased; in this embodiment, the groove 60 can at least penetrate the stack composed of the ohmic contact layer 313, the first-type current spreading layer 35, the first-type semiconductor layer 32, the active layer 33, the second-type semiconductor layer 34 and part of the current spreading layer 36 (that is, the second-type current spreading layer 36).

[0160] On the basis of the above embodiments, optionally, in one embodiment of the present application, the groove 60 penetrates the stack consisting of the ohmic contact layer 313, the first-type current spreading layer 35, the first-type semiconductor layer 32, the active layer 33, the second-type semiconductor layer 34 and the current spreading layer (i.e., the second-type current spreading layer 36).

[0161] It should be noted that as the depth of the groove 60 in the direction away from the first substrate 10 becomes larger and larger, the side wall slope of the groove 60 also becomes larger and larger, which is less conducive to the adhesion of the stack composed of the dielectric layer 312, the mirror layer 311 and the first bonding layer 21 on the side wall of the groove 60. Therefore, the depth of the groove 60 should not be too deep.

[0162] The ohmic contact layer between the dielectric layer 312 and the first-type current spreading layer 35 is recorded as the first-type ohmic contact layer 313. Optionally, in one embodiment of the present application, when forming the stacked structure, before forming the second-type current spreading layer 36 on one side of the second substrate 11, the method further includes:

[0163] A second-type ohmic contact layer 37 is formed on one side of the second substrate 11, so as to form an ohmic contact between the second electrode 50 and the second-type ohmic contact layer 37 in the subsequent step. Fig.11 The device structure shown.

[0164] Furthermore, in order to increase the light output angle of the LED chip and thus improve the light extraction efficiency of the LED chip, after forming the second electrode 50 on the side of the stacked structure 30 away from the first substrate 10, the method further includes:

[0165] The surface of the second-type ohmic contact layer 37 facing away from the first substrate 10 is roughened to form a roughened surface, and finally the following is obtained: Fig.11 The device structure shown.

[0166] Based on any of the above embodiments, the method may further include:

[0167] S800: Cutting or etching the formed chip by using a laser, a blade or an inductively coupled plasma (ICP) to form core particles of a set size.

[0168] It should be noted that, in the above embodiments, optional, such as Figure 2-Figure 3 , Figure 5-Figure 11 As shown, the groove 60 may be a trapezoid, and the present application does not limit the upper and lower base widths and the side slopes of the trapezoid, which may be determined according to specific circumstances. Fig.12As shown, the groove 60 may also be a square shape, depending on the specific situation. When the groove 60 is a trapezoid, the sidewall of the groove 60 has a certain slope, so that the dielectric layer 312, the mirror layer 311 and the first bonding layer 21 can be better attached to the sidewall of the groove 60 when they are subsequently deposited in the groove 60.

[0169] It should also be noted that, in the above embodiments, the first electrode 40 can be a P electrode, and the second electrode 50 can be an N electrode. Accordingly, the first-type ohmic contact layer 313 can be a P-type ohmic contact layer, the first-type current spreading layer 35 can be a P-type current spreading layer, also called a P-type window layer, the first-type semiconductor layer 32 can be a P-type semiconductor layer, also called a P-type limiting layer, the second-type semiconductor layer 34 can be an N-type semiconductor layer, also called an N-type limiting layer, the second-type current spreading layer 36 can be an N-type current spreading layer, also called an N-type window layer, and the second-type ohmic contact layer 37 can be an N-type ohmic contact layer, also called an N-type roughening layer.

[0170] In summary, the LED chip and the preparation method thereof provided in the embodiments of the present application at least partially etches away the stack consisting of at least the ohmic contact layer and part of the first-type semiconductor layer in the second electrode shielding area to form a groove, thereby at least reducing the current flowing from the ohmic contact layer and part of the first-type semiconductor layer in the second electrode shielding area to the active layer in the second electrode shielding area, that is, reducing the lateral expansion of the current into the active layer in the second electrode shielding area, thereby reducing the luminescence of the active layer in the second electrode shielding area, achieving the purpose of reducing heat generation, lowering junction temperature, and improving the electro-optical conversion efficiency of the LED chip, and at the same time, it can also make the current expand more to the active layer not blocked by the second electrode, further improving the electro-optical conversion efficiency of the LED chip; and the groove is filled with a dielectric layer, a mirror layer and a bonding layer, so that a reflective mirror layer is formed on the bottom and side walls of the groove to increase the reflection of the light emitted by the active layer.

[0171] The various parts in this manual are described in a combination of parallel and progressive manners. Each part focuses on the differences from other parts, and the same or similar parts between the various parts can be referenced to each other.

[0172] With respect to the above description of the disclosed embodiments, the features described in the embodiments in this specification may be replaced or combined with each other, so that professionals in the field can implement or use the present application. Various modifications to these embodiments will be apparent to professionals in the field, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that: include: a first substrate; A bonding layer and a stacked structure arranged in sequence on the surface of the first substrate, the stacked structure comprising an omnidirectional reflector layer, a first-type semiconductor layer, an active layer, and a second-type semiconductor layer arranged in sequence in a direction away from the first substrate, the omnidirectional reflector layer comprising a mirror layer, a dielectric layer, and an ohmic contact layer arranged in sequence in a direction away from the first substrate, a plurality of openings being provided in the dielectric layer, so that the mirror layer fills the plurality of openings to form ohmic contact with the ohmic contact layer; A first electrode located at a side of the first substrate away from the stacked structure and a second electrode located at a side of the stacked structure away from the first substrate; and a groove, wherein a projection of the groove on the surface of the first substrate and a projection of the second electrode on the surface of the first substrate at least partially overlap, the groove penetrates the stack composed of the ohmic contact layer and at least a portion of the first-type semiconductor layer, and the groove does not penetrate into the active layer, and the stack composed of the dielectric layer, the mirror layer and the bonding layer fills the groove; The projections of the multiple openings in the dielectric layer on the first substrate surface do not overlap with the projections of the grooves on the first substrate surface, and the projections of the multiple openings in the dielectric layer on the first substrate surface do not overlap with the projections of the second electrode on the first substrate surface.

2. The LED chip according to claim 1, characterized in that: The second electrode includes a pad and a plurality of sub-electrodes connected to the pad, each of the sub-electrodes corresponds to one of the grooves, and a projection of each of the grooves on the surface of the first substrate at least partially overlaps with a projection of the sub-electrode corresponding to the groove on the surface of the first substrate.

3. The LED chip according to claim 2, characterized in that: The pad corresponds to one of the grooves, and a projection of the groove on the surface of the first substrate and a projection of the pad on the surface of the first substrate at least partially overlap.

4. The LED chip according to claim 1, characterized in that: The bonding layer includes a first bonding layer and a second bonding layer arranged in sequence along a direction toward the first substrate, wherein a stack composed of the dielectric layer, the mirror layer and the first bonding layer fills the groove, and a surface of the first bonding layer facing the first substrate is flat.

5. The LED chip according to claim 1, characterized in that: The groove penetrates the stacked layer consisting of the ohmic contact layer and the first-type semiconductor layer.

6. The LED chip according to any one of claims 1 to 5, characterized in that: The groove is trapezoidal or square.

7. A method for preparing an LED chip, characterized in that: include: providing a first substrate and a second substrate; A stacked structure is formed on one side of the second substrate, the stacked structure comprising a second-type semiconductor layer, an active layer, a first-type semiconductor layer and an omnidirectional reflector layer arranged in sequence in a direction away from the second substrate, the omnidirectional reflector layer comprising an ohmic contact layer, a dielectric layer and a mirror layer arranged in sequence in a direction away from the second substrate, a groove is provided in the stacked structure, the groove runs through the stacked layer consisting of the ohmic contact layer and at least part of the first-type semiconductor layer, and the groove does not penetrate into the active layer, wherein the formation process of the stacked structure comprises: forming the second-type semiconductor layer, the active layer and the first-type semiconductor layer in sequence on one side of the second substrate; forming an ohmic contact layer on a side of the first-type semiconductor layer facing away from the second substrate; Etching a stack consisting of the ohmic contact layer and at least a portion of the first-type semiconductor layer to form a groove, so that the groove penetrates the stack consisting of the ohmic contact layer and at least a portion of the first-type semiconductor layer, and the groove does not penetrate into the active layer; forming a dielectric layer on a side of the ohmic contact layer facing away from the second substrate, and providing a plurality of openings in the dielectric layer; forming a mirror layer on the side of the dielectric layer facing away from the second substrate, so that the mirror layer fills the multiple openings and forms ohmic contact with the ohmic contact layer, thereby obtaining the stacked structure, and the ohmic contact layer, the dielectric layer and the mirror layer constitute the omnidirectional reflector layer; forming a first bonding layer on a side of the stacked structure facing away from the second substrate, so that the stacked layer consisting of the dielectric layer, the mirror layer and the first bonding layer fills the groove; forming a second bonding layer on the surface of the first substrate; Bonding the first bonding layer and the second bonding layer to form a bonding layer, bonding the stacked structure to the first substrate from a side of the stacked structure away from the second substrate, and removing the second substrate to achieve substrate transfer; forming a first electrode on a side of the first substrate facing away from the stacked structure, and forming a second electrode on a side of the stacked structure facing away from the first substrate; The projection of the groove on the surface of the first substrate and the projection of the second electrode on the surface of the first substrate at least partially overlap, the projection of the multiple openings in the dielectric layer on the surface of the first substrate and the projection of the groove on the surface of the first substrate do not overlap, and the projection of the multiple openings in the dielectric layer on the surface of the first substrate and the projection of the second electrode on the surface of the first substrate do not overlap.

8. The method according to claim 7, characterized in that After forming the first bonding layer, the method further includes: The surface of the first bonding layer facing away from the second substrate is polished to make the surface of the first bonding layer facing away from the second substrate flat.

Citation Information

Patent Citations

  • LED chip structure and manufacture method

    CN105226154A

  • Gallium-nitride-based light emitting device element

    JP2008205005A