Multi-junction VCSEL with compact active area stacking

Abstract

The present application relates to a multi-junction VCSEL with a compact stack of active regions. The multi-junction VCSEL is formed by a compact structure that reduces lateral current spreading by reducing the spacing between adjacent active regions in the stack of such regions used to form a multi-junction device. At least two active regions within the stack are located at adjacent peaks of the intensity distribution of the VCSEL, and the middle tunnel junction is positioned at the valley between the two peaks. The alignment of the active regions with the peaks maximizes the generated optical power, while the alignment of the tunnel junction with the valley minimizes optical losses. The close spacing on adjacent peaks forms a compact structure (which can even include a cavity with an optical length below λ), which shortens the total path for carrier travel, thereby reducing lateral current spreading.

Description

Technical Field

[0001] The present invention relates to a vertical cavity surface emitting laser (VCSEL) device, and more particularly to a VCSEL having two or more active regions formed in a stack and separated by a tunnel junction, the stack itself being compact in terms of the number of independent layers so as to limit lateral current spreading, which increases optical confinement and minimizes optical losses. Background of the Invention

[0002] VCSEL has a laser cavity, which is sandwiched between and defined by a double mirror stack. VCSELs are typically manufactured on a semiconductor substrate (in many cases a GaAs or InP substrate), where a "bottom" mirror stack is formed on the top surface of the substrate and is then covered by the laser cavity and the "top" mirror stack. Each mirror stack includes a plurality of epitaxial layers having alternating refractive index values ​​(i.e., alternating between "high" and "low" refractive index values). The cavity region itself includes an active region, which can be formed by, for example, one or more quantum well structures. When light is transferred from a layer having one refractive index to a layer having another refractive index, a portion of the light is reflected, resulting in a diffraction Bragg reflector (DBR) structure. By using a sufficient number of alternating layers, a high percentage of light is reflected and a standing wave pattern is generated in the cavity.

[0003] With a sufficiently high bias current (called the threshold current), the injected minority carriers create a population inversion in the quantum well, generating gain. When the optical gain exceeds the total loss in the twin mirrors, laser emission occurs through the outer surface of one of the mirror stacks. Compared to conventional edge-emitting laser diodes, VCSELs have lower threshold currents, low-divergence rounded output beams, and longitudinal single-mode emission (as well as other advantages in specific applications).

[0004] In some configurations, an additional layer is included within the top DBR, and is typically located in a lower layer closer to the active region. This layer is called an oxide aperture layer and is typically one of the original DBR layers that is modified to include a higher concentration of aluminum. A set of process steps is used to oxidize most of this layer, leaving a central portion of its original composition to form an "aperture" for confining the light beam emitted from the active region.

[0005] It has been found that the optical output power that can be delivered by a single VCSEL device is inherently limited by the size of its aperture, which is a requirement to prevent the injected current from spreading laterally as it traverses the depth of the device structure. It has been proposed to achieve higher output powers from individual VCSEL devices by stacking multiple active regions between the mirrors that form the laser cavity. These "multiple active region" devices electrically couple one active region to another via a tunnel junction formed between adjacent active regions. The doping level within the tunnel junction needs to be relatively high (e.g., greater than 1E19 / cm 3 ) in order to efficiently transfer carriers between active regions.

[0006] While an increase in output power can be obtained by using multiple active regions, inherent problems with current spreading and modal instabilities remain. It has been proposed to include a second oxide aperture below the lowest positioned active region to limit current spreading. This has the disadvantage that the two oxide aperture sizes must be controlled and matched as much as possible, which depends on various manufacturing process variables, including but not limited to, the mesa etch profile of the VCSEL, the aluminum composition, and the thickness of the layer designated to form the oxide aperture. In addition to the manufacturing difficulty, the inclusion of the second oxide aperture results in higher resistance within the device (and therefore higher voltage requirements, lower wall plug efficiency, and higher self-heating; all of which result in lower optical output power). SUMMARY OF THE INVENTION

[0007] The problems present in these prior art approaches are solved by the present invention which is directed to a high output power VCSEL having two or more active regions formed in a stack and separated by a tunnel junction, the stack itself being compact in terms of the number of independent layers so as to limit lateral current spreading, which increases optical confinement and minimizes optical losses.

[0008] The multi-junction VCSEL forms a compact structure that reduces lateral current spreading by reducing the spacing between adjacent active regions in the stack of regions used to form the multi-junction device. Specifically, at least two of the active regions within the stack are located at adjacent peaks of the VCSEL's intensity distribution, and the middle tunnel junction is positioned at the valley between the two peaks. The alignment of the active regions with the peaks maximizes the generated optical power, while the alignment of the tunnel junction with the valley minimizes optical losses. The close spacing of adjacent peaks forms a compact structure (which can even include a cavity with a sub-λ optical length), shortening the overall path for carrier travel, thereby reducing lateral current spreading.

[0009] The multi-junction compact VCSEL of the present invention includes some type of carrier confinement element, which in many cases includes an oxide aperture layer positioned above the "top" active region in the stack. Alternatively, a conductive element processed to present a certain rounded form (with a profile similar to the "aperture") can be used, and the conductive element can include the same double-layer structure used to form the tunnel junction.

[0010] An exemplary embodiment of the present invention may take the form of a multi-junction vertical cavity surface emitting laser (VCSEL), comprising the following elements: a first distributed Bragg reflector (DBR) formed on a substrate; a second DBR positioned above and spaced apart from the first DBR, wherein each DBR comprises a stack of layers having alternating refractive index values ​​(the combination of the first DBR and the second DBR forms a resonant structure supporting a standing wave of a lasing field intensity, the standing wave of the lasing field intensity being defined by a plurality of intensity peaks spaced apart by a plurality of intensity valleys); a plurality of active regions, N in number, stacked between the first DBR and the second DBR (each active region comprising an MQW structure); and one or more tunnel junctions, each tunnel junction comprising a high conductivity layer of a first conductivity type disposed on a high conductivity layer of a second conductivity type, and the spaced tunnel junction being disposed between an adjacent pair of active regions in the plurality of active regions, N in number, each tunnel junction forming a path for carrier movement between the associated pair of active regions.

[0011] Other aspects and features of the present invention as well as further aspects and features will become apparent during the following discussion and by reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Referring now to the drawings, wherein like numerals represent like parts throughout the several views:

[0013] Figure 1 is a simplified view of a prior art VCSEL;

[0014] Figure 2 Depicts the aluminum composition of various regions used to form a conventional prior art VCSEL, and the standing wave pattern of the resulting field strength;

[0015] Figure 3 An exemplary double-junction VCSEL formed in accordance with the principles of the present invention is shown;

[0016] Figure 4 is for Figure 3 Arrangement of, plot of aluminum component overlaid with field strength standing wave pattern;

[0017] Figure 5 is a plot of aluminum composition (and field strength) for an embodiment of the present invention in which the spacing between the oxide interstitial layer and the device active region is reduced;

[0018] Figure 6 is similar to Figure 5 's drawing, but in this case associated with the construction of the present invention which utilizes a pair of oxide void layers and maintains a compact physical form;

[0019] Figure 7 An alternative embodiment of the invention is shown, in this case utilizing a stack having four separate active regions (separated by tunnel junctions) to form a high power VCSEL that maintains relatively small physical dimensions;

[0020] Figure 8 is used for Figure 7 Plot of aluminum composition and intensity field of 4 stacking examples;

[0021] Fig. 9 is with Figure 7 Plots associated with a variation of an arrangement of , in which case a second oxide aperture is included within the 4-stack (e.g., between a middle pair of active regions) to reshape the current and reduce the amount of lateral current spreading;

[0022] Fig.10 is a simplified diagram of exemplary steps in a fabrication process for forming a compact VCSEL of the present invention that utilizes a high conductivity central region (rather than a "pore") to provide current confinement;

[0023] Fig.11 Shows Fig.10 A subsequent step in the process outlined in , wherein the high conductivity material is patterned to form the central region into a circular shape; and

[0024] Fig.12 shows a subsequent step in the process, where the “top” DBR is formed on Fig.11 and

[0025] Fig.13 Shows Fig.12 An alternative configuration of an embodiment of the present invention, wherein in this case a second high conductivity central region is formed within the stack of active regions to enhance the current confinement capability of a high power compact multi-junction VCSEL formed according to the principles of the present invention. Detailed Description

[0026] Figure 11 is a simplified view of a conventional prior art VCSEL 1 formed to include a pair of "stacked" active regions 2-1 and 2-2. As shown, a tunnel junction 3 is positioned between the active regions 2-1 and 2-2 and serves to move holes and electrons between the active regions in a manner that excites the two regions from a bias current applied as an input to the structure (not shown). Figure 1 As shown in the enlarged portion of FIG. 1 , the tunnel junction 3 includes a highly doped n-type layer 3n formed on a highly doped p-type layer 3p. In order to allow carriers to tunnel through the tunnel junction, the doping level needs to be 1x10 19 cm -3 A conventional oxide interstitial layer 4 is shown formed within a p-type distributed Bragg reflector (pDBR) 5, wherein the generated light output is generally emitted from the pDBR 5. An n-type DBR (shown as nDBR 6) forms the bottom reflective portion of the laser structure.

[0027] Under reverse bias, the tunnel junction 3 is used to inject an electrode into the n-side of the first active area 2-1 and inject holes into the p-side of the second active area 2-2. In theory, for the same injection current, the inclusion of two active areas will generate more than twice the optical output power (and, by extension, a stack of N active areas will generate N times the output power). Although some additional output power can be generated, the prior art structures described so far exhibit problems with lateral spreading of the injection current when the injection current flows from the first active area 2-1 to the second active area 2-2. As a result, the second active area 2-2 will exhibit a lower current density (and therefore lower gain) than the first active area 2-1. Depending on the specific configuration, an increase in the threshold current can therefore be observed.

[0028] A prior art approach to this problem is to incorporate a second oxide interstitial layer into the structure, e.g. Figure 1 The inclusion of this additional pore will help control the lateral spread of the injected current, thereby improving the optical performance of the device. This approach still suffers from various manufacturing issues, and further extension of the cavity leads to much higher impedance values ​​for the device.

[0029] Figure 2The aluminum composition of various regions of a prior art VCSEL 1 and the standing wave pattern of the generated field strength are depicted, where these parameters are considered to help understand the construction of the VCSEL and the boundaries of the cavity formed by a specific arrangement. The aluminum content within the layers within the nDBR 6 is shown in the left part of the drawing, and the aluminum content within the layers of the pDBR 5 is shown in the right part. The active regions 2-1 and 2-2 are represented by an MQW structure in the central region between the two DBRs, and the tunnel junction 3 is positioned between the n-side of the first active region 2-1 and the p-side of the second active region 2-2 as shown. The oxide pore layer 4 is shown as a layer with a relatively high aluminum content within the pDBR 5 and is shaded for identification purposes. A second oxide pore layer 7 associated with the second active region 2-2 is similarly shown.

[0030] Overlaid on the plot is the field intensity generated by injecting current into the structure, which takes the form of a standing wave pattern, forming a resonant structure between the mirrors created by the nDBR 6 and pDBR 5. In most cases, the active regions 2-1 and 2-2 are positioned to coincide with peaks in the field intensity (to maximize the gain generated), while the tunnel junction 3 and oxide pore layers 4, 7 are positioned to coincide with valleys in the field intensity (to minimize losses). The cavity 8 of the structure is defined as spanning the first intensity peak below the second active region 2-2 (at Figure 2 ) and the region between the first intensity peak (denoted as N-peak in FIG. 1 ) and the first intensity peak (denoted as P-peak) above the first active region 2-1. For this particular structure, the cavity 8 is shown to have an optical length of 3λ, which is quite large and is a factor of the relatively high impedance within the structure and the higher optical losses associated with the longer optical path.

[0031] Figure 3 An exemplary double junction VCSEL 10 formed according to the present invention is shown, which exhibits a relatively compact structure, eliminates the need for a second oxide pore, and also reduces the cavity length of the device. As shown, the VCSEL 10 includes a first active region 12-1 and a second active region 12-2 separated by a tunnel junction 14. In addition, the VCSEL 10 includes an nDBR 16 and a pDBR 18, and an oxide pore layer 20 is formed within the pDBR 18. Figure 4 is a plot of the aluminum composition (and resulting field strength) of the VCSEL 10, similar to that described above. Figure 2 .

[0032] According to the principles of the present invention, the combination of active regions 12-1, 12-2 and tunnel junction 14 is arranged in a compact form that minimizes the lateral spread of injected current as it passes through the structure. Specifically, active regions 12-1 and 12-2 are arranged to be adjacent to peaks in the intensity distribution (in Figure 4 and the tunnel junction 14 is positioned to align with the valley T between adjacent peaks. Figure 2 The compactness of this arrangement is apparent when compared. Figure 4 The locations of the cavity boundaries (ie N-peak, P-peak) of the VCSEL 10 structure of the present invention are also shown in . Associated with this compact arrangement, the optical cavity length is shown to be reduced from a value of 3λ (as described above in the prior art) to a value of 1.5λ.

[0033] To further minimize lateral current spreading within the compact VCSEL 10 of the present invention, the spacing between the oxide pore layer 20 and the first active region 12-1 may be reduced. Various details regarding the relative positioning of the active region and the oxide pore layer of the VCSEL may be found in our co-pending U.S. Patent Application No. 16 / 858,909, filed on April 27, 2020, and incorporated herein by reference.

[0034] Figure 5 2 is a plot associated with this embodiment of the reduced oxide interstitial layer spacing of the present invention. As shown, the active region 12-1 is located at the intensity peak P adjacent to the valley T-20. a On the top, an oxide porous layer 20 is positioned at the valley T-20. Figure 3 and Figure 4 As in the compact configuration discussed above, the second active region 12-2 is located immediately adjacent to the peak (at Figure 5 The peak intensity P is shown in b ), the tunnel junction 14 is positioned at the peak P a and P b . As a result of this configuration, a conventional cavity length of 1λ associated with a "single" active region VCSEL is achieved. By minimizing the spacing between the first active region 12-1 and the oxide pore layer 20 in this manner, lateral current spreading is further reduced, which allows the threshold level of injected current to be reduced (thereby increasing the efficiency of the VCSEL 10). In addition, the reduced optical path minimizes optical losses, which leads to a further reduction in threshold current and an increase in slope efficiency, which also facilitates the generation of higher optical output power.

[0035] If desired, a second oxide interstitial layer may be added to any of these arrangements.Although adding some manufacturing complexity and increasing resistance within the structure, there may be situations where additional confinement of the injected current would be helpful. Figure 6 2 is a plot showing the addition of a second oxide pore layer 22 positioned below the second active region 12-2. The inclusion of this layer changes the intensity profile such that the optical length of the cavity is reduced to 0.5λ. Note that while the second oxide pore layer 22 is positioned at a valley T just below the peak associated with the active region 12-2, the intensity distribution of the cavity is reduced to 0.5λ. a However, the second oxide pore layer 22 may also be placed at the valley T b This can reduce manufacturing issues and still provide additional current limiting.

[0036] As described above, a plurality of active regions, N in number, can be stacked within a VCSEL, providing a nearly N-fold increase in optical output power for substantially the same input current threshold level. Figure 7 An exemplary 4-stacked VCSEL 30 is shown, which includes a series of four separate active regions 32-1, 32-2, 32-3, and 32-4, and separate tunnel junctions are disposed between adjacent active regions. Specifically, a first tunnel junction 34-1 is disposed between active regions 32-1 and 32-2, a second tunnel junction 34-2 is disposed between active regions 32-2 and 32-3, and a third tunnel junction is disposed between active regions 32-3 and 32-4. As shown, the compact 4-stacked VCSEL 30 also includes an nDBR 36 and a pDBR 38, wherein an oxide pore layer 40 is disposed above the first active region 32-1 in the pDBR 38.

[0037] Figure 8 is a drawing associated with a compact 4-stacked VCSEL 30. As with the above arrangement, active regions 32-1, 32-2, 32-3, and 32-4 are shown positioned on adjacent peaks P1, P2, P3, and P4, with tunnel junctions 34-1, 34-2, and 34-3 positioned along valleys T1, T2, T3 between adjacent peaks. In addition, active region 32-1 is shown positioned at the peak just below the location of oxide pore layer 40, which provides additional current confinement. As such, the arrangement of the present invention provides the most compact arrangement of a set of four independent active regions, all within an optical cavity length of 1.5λ.

[0038] Although Figure 7 and Figure 8The configuration is extremely compact, but there is an inherent amount of lateral current spreading over the extent of all four active regions. To reduce current spreading, another configuration of a compact 4-stack VCSEL 30 may be arranged to include an additional oxide interstitial layer 42 within the stack (eg, at the midpoint of the stack). Fig. 9 is the plot associated with this configuration. Here, the second oxide pore layer 42 is positioned at a valley T-42 just below the valley where the tunnel junction 34-2 is located. As described above, these layers can be located at various locations relative to the field intensity diagram, but positioning the oxide pore layer at / near the valley location minimizes optical losses within the device. Therefore, in this case, the choice of positioning the second oxide pore layer 42 at the valley results in an increased spacing between the active regions 32-2 and 32-3 due to the presence of a "null" peak in the distribution between the tunnel junction 34-2 and the second oxide pore layer 42. This dual oxide pore embodiment of the present invention is Fig. 9 A cavity (comprising a stack of four separate active regions) with an optical length of 2λ is shown in , which is still much smaller than the cavity size of 3λ of the prior art dual active region arrangement.

[0039] Although various embodiments of the compact multi-junction VCSEL of the present invention have been described as using an oxide aperture layer for carrier confinement, it will be appreciated that there are other techniques that can be used to provide carrier confinement. For example, instead of using a dielectric layer with a central aperture, a central "highly conductive" element can be used to achieve the same result. Thus, in accordance with the teachings of the present invention, a centrally located tunnel junction structure can be added to the "stack" around the first active region (because a manufacturing process has been developed that includes a step for forming an intervening tunnel junction), and this top tunnel junction is used as a carrier confinement element.

[0040] Figure 10-12 A set of process steps is shown that can be used to form a centrally located tunnel junction within the compact multi-junction VCSEL of the present invention. Fig.10 A point in the process of an exemplary compact dual junction VCSEL 50 is shown where all device layers except the uppermost DBR mirror have been formed. At this point the VCSEL 50 is shown to include a first active region 52-1 and a second active region 52-2 separated by a tunnel junction 54. As shown, the various semiconductor layers required to form such a structure have been fabricated on the nDBR 56.

[0041] Prior to forming the pDBR, tunnel junction 58 is shown formed over the exposed p-side surface of first active region 52-1. In order to provide "confinement", the structure of tunnel junction 58 needs to be modified so that only the central conductive "disk" remains. To achieve this, Fig.10The structure shown is patterned and etched in a manner known in the art to remove the outer portion of tunnel junction 58, leaving only conductive plate 58A, as shown in FIG. Fig.11 Once the conductive plate 58A is formed, a second DBR 60 is added above the exposed surface. In this case, another n-type DBR is used, such as Fig.12 The final device structure is shown in FIG.

[0042] Lateral confinement is achieved by having the conductive disk 58A cover the exposed surface of the conductive disk 58A with an nDBR 60. Although the conductivity of the central region is increased due to the presence of the disk 58A, the PN junction formed between the p-side of the active region 52-1 and the top nDBR 60 will be non-conductive (i.e., reverse biased). Although this approach has the complexity of requiring overgrowth of the nDBR 60, the ability to use an n-type DBR results in lower optical losses (i.e., lower threshold and high slope) and lower resistance (because the conductivity of the n-doped semiconductor material is greater than the conductivity of the p-doped semiconductor material) compared to conventional pDBRs.

[0043] Fig.13 Shows Fig.12 An alternative embodiment of the construction of 50A is shown. In this case, additional carrier confinement is achieved by also etching the tunnel junction 54 to remove the peripheral region, leaving the conductive disk 54A. Again, while this improves carrier confinement within the structure, it again increases the complexity of the manufacturing process.

[0044] While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope as determined by the appended claims.

[0045] Aspects of the present disclosure may be implemented in one or more of the following embodiments:

[0046] Item 1): A multi-junction vertical cavity surface emitting laser (VCSEL), comprising:

[0047] a first distributed Bragg reflector (DBR) formed on the substrate;

[0048] a second DBR positioned above the first DBR, wherein each DBR comprises a stack of layers having alternating refractive index values, the combination of the first DBR and the second DBR forming a resonant structure supporting a standing wave of lasing field intensity defined by a plurality of intensity peaks separated by a plurality of intensity valleys;

[0049] a plurality of active regions, N in number, formed as a stack of active regions between the first DBR and the second DBR, each active region including an MQW structure; and

[0050] One or more tunnel junctions, each tunnel junction includes a high conductivity layer of a first conductivity type arranged above a high conductivity layer of a second conductivity type, and the spaced tunnel junctions are arranged between an adjacent pair of active regions among the plurality of active regions of said number N, and each tunnel junction forms a path for carrier movement between the associated pair of active regions.

[0051] Item 2): The multi-junction VCSEL according to item 1), wherein one or more active regions of the plurality of active regions, N in number, are positioned to overlap with respective intensity peaks of the plurality of intensity peaks.

[0052] Item 3): The multi-junction VCSEL according to item 1), wherein each active region of the plurality of active regions, N in number, is positioned to overlap with a separate intensity peak of the plurality of intensity peaks.

[0053] Item 4): The multi-junction VCSEL according to item 1), wherein one or more tunnel junctions are positioned to overlap with respective intensity valleys of the plurality of intensity valleys.

[0054] Item 5): The multi-junction VCSEL of item 1), wherein each tunnel junction is positioned to overlap a separate intensity valley of the plurality of intensity valleys.

[0055] Item 6): The multi-junction VCSEL according to item 1), wherein the multi-junction VCSEL further comprises:

[0056] A carrier confining element is disposed above and proximate to a top active region in the stack of active regions.

[0057] Item 7): According to the multi-junction VCSEL described in Item 6), the carrier confinement element includes an oxide void layer.

[0058] Item 8): The multi-junction VCSEL according to item 6), wherein the carrier confinement element comprises a conductive element disposed in a central region of the VCSEL structure.

[0059] Item 9): The multi-junction VCSEL according to item 8), wherein the conductive element comprises a tunnel junction, and the tunnel junction is patterned to exhibit a patterned disk structure.

[0060] Item 10): The multi-junction VCSEL according to item 6), wherein the carrier confinement element is positioned close to an intensity valley adjacent to an intensity peak position of the top active region.

[0061] Item 11): The multi-junction VCSEL according to item 6), wherein the multi-junction VCSEL further comprises one or more additional carrier confinement elements, wherein the one or more additional carrier confinement elements are disposed in a cavity between the first DBR and the second DBR.

[0062] Item 12): The multi-junction VCSEL according to item 11), wherein an additional carrier confinement element is positioned at a midpoint of the stack of active regions.

[0063] Item 13): The multi-junction VCSEL according to item 12), wherein the additional carrier confinement element is positioned to overlap with the intensity valley.

[0064] Item 14): A double-junction VCSEL, comprising:

[0065] a first distributed Bragg reflector (DBR) formed on the substrate;

[0066] a second DBR positioned above the first DBR, wherein each DBR comprises a stack of layers having alternating refractive index values, the combination of the first DBR and the second DBR forming a resonant structure supporting a standing wave of lasing field intensity defined by a plurality of intensity peaks separated by a plurality of intensity valleys;

[0067] a first active region and a separate second active region, the first active region and the second active region being formed as a stack between the first DBR and the second DBR, each active region comprising an MQW structure; and

[0068] A tunnel junction, wherein the tunnel junction includes a high conductivity layer of a first conductivity type disposed above a high conductivity layer of a second conductivity type, and the tunnel junction is disposed between the first active region and the second active region to form a path for carrier movement between the first active region and the second active region.

Claims

1. A multi-junction VCSEL comprising: a first distributed Bragg reflector formed on a substrate; a second distributed Bragg reflector positioned above the first distributed Bragg reflector, wherein each distributed Bragg reflector comprises a stack of layers having alternating refractive index values, the combination of the first distributed Bragg reflector and the second distributed Bragg reflector forming a resonant structure supporting a standing wave of a lasing field intensity defined by a plurality of intensity peaks separated by a plurality of intensity valleys; a plurality of active regions, N in number, formed as a stack of active regions between the first distributed Bragg reflector and the second distributed Bragg reflector, each active region comprising an MQW structure; one or more tunnel junctions, each tunnel junction comprising a highly conductive layer of a first conductive type disposed above a highly conductive layer of a second conductive type, and the spaced tunnel junctions being disposed between an adjacent pair of active regions of the plurality of active regions of number N, each tunnel junction forming a path for carrier movement between the associated pair of active regions; and A carrier limiting element, the carrier limiting element comprising a conductive element, wherein the conductive element comprises a tunnel junction patterned to exhibit a patterned disk structure, wherein the first distributed Bragg reflector and the second distributed Bragg reflector are n-type distributed Bragg reflectors, and wherein the carrier limiting element is disposed above and proximate to a top active region in the stack of active regions.

2. The multi-junction VCSEL according to claim 1, wherein: One or more of the plurality of active regions, N, are positioned to overlap respective intensity peaks of the plurality of intensity peaks.

3. The multi-junction VCSEL according to claim 1, wherein: Each active region of the plurality N of active regions is positioned to overlap a separate intensity peak of the plurality of intensity peaks.

4. The multi-junction VCSEL according to claim 1, wherein: The one or more tunnel junctions are positioned to overlap respective intensity valleys of the plurality of intensity valleys.

5. The multi-junction VCSEL according to claim 1, wherein: Each tunnel junction of the one or more tunnel junctions is positioned to overlap a separate intensity valley of the plurality of intensity valleys.

6. The multi-junction VCSEL according to claim 1, wherein: The carrier confinement element includes a conductive element disposed in a central region of the multi-junction VCSEL.

7. The multi-junction VCSEL according to claim 1, wherein: The carrier confinement element is positioned proximate to an intensity valley adjacent to an intensity peak location of the top active region.

8. The multi-junction VCSEL according to claim 1, wherein: The multi-junction VCSEL further includes one or more additional carrier confinement elements disposed in the cavity between the first distributed Bragg reflector and the second distributed Bragg reflector.

9. The multi-junction VCSEL according to claim 8, wherein: The additional charge carrier confinement element is positioned at a midpoint of the stack of active regions.

10. The multi-junction VCSEL according to claim 9, wherein: The additional carrier confinement element is positioned to overlap the intensity valley.

Images