Resistors for integrated circuits

Abstract

A thin film integrated circuit is provided, the thin film integrated circuit including a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor. The semiconductor region of the first semiconductor device, the resistor body of the first resistor, the semiconductor region of the second semiconductor device, and the resistor body of the second resistor are formed from at least one of a first source material and a second source material, and the material of the resistor body of the first resistor and the material of the resistor body of the second resistor have different electrical characteristics.

Description

Technical Field

[0001] The present disclosure relates to a thin film integrated circuit and a method for manufacturing the thin film integrated circuit. Background Art

[0002] Resistors for integrated circuits (ICs) can be provided using a variety of different structures and materials, with each variation in resistor potentially providing a different resistance range. However, when considering resistors for thin-film ICs, the range of resistance that can be provided is more limited due to the limitations of the resistor body when using thin-film materials to provide the resistors, as well as the limitations of the structures that can be used for the resistors. For example, the resistance values ​​that can be provided are generally limited by the electrical properties of the materials that can be used to form the thin-film layers of the thin-film IC.

[0003] More specifically, because thin film IC resistors are typically planar in form, their resistivity is often described in terms of sheet resistance or resistance per square (Ω / □). Typical values ​​are between 10Ω / □ and 150Ω / □, and a resistor with a specific resistance is formed by selecting its width and length in this thin layer of material. Constraints of pattern resolution, resistor film thickness range, resistance tolerance, and limited available IC area may result in a compromise in the range of resistors that can be provided in a thin film IC. This may constrain circuit design, for example by excluding economically viable packages for IC designs that contain hundreds of ohms (~10 2 Ω) and millions of ohms (~10 6 Ω or MΩ) level resistance.

[0004] Therefore, what is needed is a method to efficiently provide an increased range of resistor values ​​in thin film ICs. Summary of the Invention

[0005] According to a first aspect of the present disclosure, there is provided a thin film integrated circuit, which includes a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor, wherein the semiconductor region of the first semiconductor device, the resistor body of the first resistor, the semiconductor region of the second semiconductor device, and the resistor body of the second resistor are formed from at least one of a first source material and a second source material, and wherein the material of the resistor body of the first resistor and the material of the resistor body of the second resistor have different electrical characteristics.

[0006] Among other advantages, by utilizing shared source materials to form semiconductor devices and resistors having different electrical characteristics, an increased range of resistor values ​​can be provided in thin film integrated circuits, while potentially providing improved resistor packaging and value scaling and reducing any increase in manufacturing complexity.

[0007] In one example, the semiconductor region of the first semiconductor device and the resistor body of the first resistor are formed from a first source material, and the semiconductor region of the second semiconductor device and the resistor body of the second resistor are formed from a second source material.

[0008] In another example, at least one of the resistor body of the first resistor and the semiconductor region of the first semiconductor device, and the second material forming the resistor body of the second resistor and the semiconductor region of the second semiconductor device are included in a single deposition layer.

[0009] In another example, the first semiconductor device is a first thin film transistor TFT, and the resistor body of the first resistor and the channel of the first TFT are formed of a first source material, and the second semiconductor device is a second thin film transistor TFT, and the resistor body of the second resistor and the channel of the second TFT are formed of a second source material.

[0010] In another example, the first semiconductor device is a first thin film transistor TFT, and the resistor body of the first resistor and the channel of the first TFT are formed of a first source material, and the second semiconductor device is a Schottky diode, and the resistor body of the second resistor and the semiconductor region of the Schottky diode are formed of a second source material.

[0011] In another example, a material of the semiconductor region of the first semiconductor device and a material of the resistor body of the first resistor have different electrical characteristics.

[0012] In another example, the first source material and the second source material are semiconductors.

[0013] In another example, the first source material is an n-type semiconductor and the second source material is a p-type semiconductor.

[0014] In another example, the first source material and the second source material are the same or different.

[0015] In another example, the first source material and the second source material are intrinsic semiconductors.

[0016] In another example, the first TFT is an n-type TFT (eg, nMOS), and the second TFT is a p-type TFT (eg, pMOS).

[0017] In another aspect of the present disclosure, a method for manufacturing a thin film integrated circuit (IC) is provided, which includes a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor, and the method includes depositing at least one of a first source material and a second source material to form a semiconductor region of the first semiconductor device, a resistor body of the first resistor, a semiconductor region of the second semiconductor device, and a resistor body of the second resistor, and during or after depositing corresponding portions of the source material, changing the electrical properties of at least a portion of the source material forming the semiconductor region of the first semiconductor device, the resistor body of the first resistor, the semiconductor region of the second semiconductor device, and the resistor body of the second resistor, wherein the configuration material of the resistor body of the first resistor and the configuration material of the resistor body of the second resistor have different electrical properties.

[0018] In one example, depositing at least one of the first source material and the second source material includes depositing a first source material layer to form a semiconductor region of a first semiconductor device and a resistor body of a first resistor, and depositing a second source material layer to form a semiconductor region of a second semiconductor device and a resistor body of a second resistor.

[0019] In another example, changing the electrical properties includes at least one of controlling the environmental conditions in which the corresponding portion of the source material is deposited, depositing another material onto the corresponding portion of the source material, exposing the corresponding portion of the source material to electromagnetic radiation, and controlling the electrical properties of the surface on which the corresponding portion of the source material is deposited.

[0020] In another example, changing the electrical properties of a portion of the source material includes one or more of: changing the portion of the source material from an n-type semiconductor to a p-type semiconductor, changing the portion of the source material from a p-type semiconductor to an n-type semiconductor, changing the portion of the source material from an intrinsic semiconductor to an n-type semiconductor or a p-type semiconductor, and changing the portion of the source material from a semiconductor to a conductor.

[0021] In another example, the first semiconductor device is a first thin film transistor TFT, and the resistor body of the first resistor and the channel of the first TFT are formed of a first source material, and the second semiconductor device is a second thin film transistor TFT, and the resistor body of the second resistor and the channel of the second TFT are formed of a second source material.

[0022] In another example, the first semiconductor device is a first thin film transistor TFT, and the resistor body of the first resistor and the channel of the first TFT are formed of a first source material, and the second semiconductor device is a Schottky diode, and the resistor body of the second resistor and the semiconductor region of the Schottky diode are formed of a second source material.

[0023] In another example, a material of the semiconductor region of the first semiconductor device and a material of the resistor body of the first resistor have different electrical characteristics.

[0024] In another example, the first source material and the second source material are semiconductors.

[0025] In another example, the first source material is an n-type semiconductor and the second source material is a p-type semiconductor.

[0026] In another example, the first source material and the second source material are the same or different.

[0027] In another example, the first source material and the second source material are intrinsic semiconductors.

[0028] In another example, the first TFT is an n-type TFT (eg, nMOS) and the second TFT is a p-type TFT (eg, pMOS).

[0029] In another example, there is at least one order of magnitude difference between the resistivity of the material of the resistor body of the first resistor and the resistivity of the material of the resistor body of the second resistor.

[0030] In another example, the first source material and the second source material are metal oxides. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Embodiments of the present disclosure are further described below with reference to the accompanying drawings, in which:

[0032] Figure 1 A schematic diagram of an example thin film transistor (TFT) / resistor pair for a thin film IC is provided;

[0033] Figure 2 Provides a schematic diagram of a TFT / resistor pair for a thin-film IC;

[0034] Figure 3 A schematic diagram of an example TFT / resistor pair for a thin film IC is provided;

[0035] Figure 4 A schematic diagram of an example TFT / resistor pair for a thin film IC is provided;

[0036] Figure 5a-5b An example method of altering the electrical characteristics of a metal oxide film layer used to form a TFT / resistor pair for a thin film IC is provided;

[0037] Figure 6a-6b An example method of altering the electrical characteristics of a metal oxide film layer used to form a TFT / resistor pair for a thin film IC is provided;

[0038] Figure 7 A schematic diagram of two TFT / resistor pairs for providing an increased range of resistor values ​​in a thin film IC is provided;

[0039] Figure 8 Schematics of TFT / resistor pairs and Schottky diode / resistor pairs for providing an increased range of resistor values ​​in thin film ICs are provided;

[0040] FIG9 provides an example fabrication process for making two TFT / resistor pairs in a thin film IC; and

[0041] FIG10 provides an example fabrication process for making two TFT / resistor pairs in a thin film IC. DETAILED DESCRIPTION

[0042] A selectable resistance range in thin film ICs can be provided by using semiconductor-based resistors. For example, for metal oxide semiconductors (MOS), such materials can be used to form n-type (e.g., ZnO, SnO2, InGaZnO, InSnO) and p-type (e.g., ZnO, SnO, NiO, CuMO2) materials. The specific properties of the thin film material may depend on the processing applied to the thin film material. For example, materials such as ZnO can be n-type, p-type, or conductive, depending on their manufacturing process, and can therefore be used to construct resistors in thin film ICs. Further examples of such materials are fullerenes, graphene, and carbon nanotubes, as well as 2D materials such as molybdenum disulfide, tellurides, and selenides.

[0043] However, even when the same material is used to form the semiconductor and resistor components in a thin film IC, the range of resistance that can be achieved may be limited. Thus, the problem remains that the range of resistance that can be achieved in a thin film IC using conventional methods of providing resistors is limited.

[0044] According to the present disclosure, an increased range of resistor values ​​can be achieved in a thin film IC by using two or more resistor types / technologies (i.e., different structures and / or materials). For example, a first type of resistor can be used to provide resistance in a low range, and a second type of resistor can be used to provide resistance in a relatively high range. In addition, by using different resistor types within a single thin film IC, the size of the resistor (i.e., the package) can be scaled more linearly with respect to the value of the resistor, taking into account the potential limitations of the minimum feature size of the thin film IC, thereby resulting in more efficient use of space within the thin film IC. In addition, the use of different resistor types within a thin film IC can also provide advantages in one or more of the required feature size / pattern resolution, resistance tolerance, and film thickness.

[0045] However, while the range of resistors can be increased, providing additional materials within thin film ICs can lead to additional manufacturing complexity, for example in terms of additional deposition and etching steps. Therefore, a method of reducing the complexity of providing different resistor types within thin film ICs is also desirable.

[0046] In order to reduce the complexity associated with providing multiple resistor types in a thin film IC, according to the present disclosure, the same or corresponding materials can be used to form the resistor / resistor body of the resistor and the channel of one or more thin film transistors (TFTs) included in the thin film IC, thereby reducing the range of materials required to provide an increased resistance range, and / or the materials forming the resistor body and the TFT channel are deposited in a single deposition step. Throughout this disclosure, it should be noted that references to the same or corresponding materials encompass a range of variations, for example, the source materials used to form a deposited layer may initially be the same, but during or after deposition, one or more portions of the source material layer may change their electrical properties so that the layer can then be considered to be formed from the corresponding material. For example, treatments including doping, annealing, exposure to electromagnetic radiation can be selectively applied to one or more layers of the same material in order to change the electrical properties of one or more portions of the source material layer so that the material of the component ultimately manufactured is no longer the same as the source material and may have different electrical properties than the material of other components formed from the same source material.

[0047] Reference below Figure 1 to Figure 1 0 describes various structures and fabrication techniques for forming a thin film IC that includes a range of different resistor types in an efficient manner.

[0048] Figure 1 Figures 6 through 7 describe various methods of implementing TFT / resistor pairs in thin film ICs, where the channel and resistor body are formed from the same source material, but where the channel and resistor body have different electrical characteristics. Figure 1 Figures 6 to 6 relate to TFT / resistor pairs, but Figure 7 to Figure 1 0 relates to the use of such pairs in realizing thin films that include an increased range of resistor values ​​in an efficient manner.

[0049] Figure 1A TFT / resistor pair 100 is shown, comprising a TFT 1 and a resistor 2, which can be included in a thin-film integrated circuit (IC). TFT 1 is a field-effect transistor (FET) comprising a source terminal 11, a drain terminal 12, a gate terminal 13, and a channel 10 providing a controllable semiconducting channel between the source and drain terminals. As will be readily understood, the conductivity of the channel is controlled by applying an appropriate voltage to gate terminal 13. Resistor 2 comprises a first resistor terminal 21, a second resistor terminal 22, and a resistor body 20 providing a resistive current path between the first and second resistor terminals. While source and drain terminals 11, 12, and resistor terminals 21, 22 are shown in this embodiment in a "top contact" architecture, i.e., partially covering the end portions of first body 10 and resistor body 20, other examples may include circuits employing alternative terminal architectures. Furthermore, while the TFT illustrated is a "top gate" architecture, with gate terminal 13 positioned above first body 10, other embodiments of the present invention include circuits employing alternative TFT architectures.

[0050] Channel 10 comprises a first portion of a material such as a metal oxide, and resistor body 20 comprises a second portion of the same metal oxide. Thus, the TFT / resistor pair comprises a semiconductor channel and a resistor body, each formed from a portion of the same metal oxide. This can save cost and / or time during manufacturing because the number of materials and methods used to form, pattern, and define the transistor pair and / or thin film IC can be reduced. The first portion of the metal oxide forming channel 10 has been formed on at least a first region 51 of substrate 5 supporting the TFT and resistor. Thus, channel 10 can be considered to have been formed on or above a first region of the surface of substrate 5. The second portion of the metal oxide has been formed above a second region 52 of the substrate surface. Figure 1 Also shown is a layer or body of dielectric material 4 which has been formed over the channel 10 and resistor body 20, source and drain terminals and resistor terminals and provides the gate dielectric for the TFT 1. A gate terminal 13 has then been formed over the layer of dielectric material 4.

[0051] Although Figure 1A channel 10 and a resistor body 20 are shown, each comprising the same metal oxide, as described above, but with the two portions of the metal oxide material having different electrical properties. For example, the two portions of the metal oxide may have been deposited using the same source metal oxide material but under different conditions, such that the portion forming the channel 10 exhibits substantially semiconducting behavior, while the portion forming the resistor body 20 exhibits substantially resistive behavior. It will be appreciated that such differences in electrical / electrical properties may be achieved in a variety of ways. For example, a portion of the metal oxide material may be deposited using physical vapor deposition (PVD) or chemical vapor deposition (CVD) techniques in the presence of a first concentration of oxygen, while another portion may be deposited by PVD / CVD in the presence of a second concentration of oxygen. Alternatively or additionally, different electrical / electrical properties of the portions forming the channel and the resistor body may be achieved by treating the portions in different ways after their initial formation / deposition stages, thereby enabling the use of a single deposition step. Another alternative or additional way of differentiating the electrical / electrical properties of the portions forming the channel and the resistor body is by preparing a first region 51 of the substrate surface that is different from a second region 52 of the substrate surface before depositing one or both portions, and / or by providing a difference between the dielectric material layer 4 formed over the channel and the dielectric material layer 4 formed over the resistor.

[0052] Figure 2 A TFT / resistor pair is shown in which the difference in electrical characteristics of the channel and the resistor body is achieved at least in part by depositing a portion of the metal oxide material forming the channel on a first dopant source 71 that has been formed on a first region 51 of a substrate 5. The dopant source 71 is arranged so that the portion of the metal oxide material forming the channel can be deposited as a resistive layer, wherein a pre-patterned dopant selectively causes the resistive layer deposited on top thereof to become semiconductive. The portion of the metal oxide material forming the resistor body has been deposited as a resistive layer on a second region 52 of the substrate 5 where no dopant source is present. Thus, the portion of the metal oxide material forming the resistor body remains resistive rather than being converted to semiconductive. Thus, the method allows a single deposition step of metal oxide material, but the electrical characteristics of specific portions thereof are altered after deposition according to doping of another material (e.g., dielectric layer 4) applied to the substrate or to portions adjacent to the metal oxide.

[0053] Figure 3An alternative embodiment of a TFT / resistor pair is shown in which a second dopant source 72 has been selectively provided over the second region 52 of the substrate 5. The portions of the metal oxide material forming the channel and the resistor body have each initially been deposited as a semiconducting layer. However, the second dopant source 72 has been selected such that the dopant interacts with the metal oxide portion forming the resistor body to change the electrical properties of the metal oxide portion from substantially semiconducting to substantially resistive, thereby causing the metal oxide portion forming the resistor body to be resistive while the metal oxide portion forming the TFT channel remains semiconducting.

[0054] Although the above reference Figure 2 and Figure 3 The examples discussed include dopant sources 71, 72 below the channel or resistor body, but alternatively or additionally, the dopant sources can be located above or to the sides of one or both of these bodies. For example, the dielectric layer 4 can be a dopant source, and / or the source and drain terminals 11, 12 and / or the resistor terminals 21, 22 can be dopant sources. The dopant sources can remain in the final circuit structure or can be removed during processing. For example, the conductive layer used to form the source and drain terminals 11, 12 and / or the resistor terminals 21, 22 can be a dopant source, and doping of the metal oxide portions forming the channel and resistor body can be achieved before the conductive layer is partially removed (e.g., by patterning and etching) during formation of the terminals.

[0055] It should be understood that while the amount of selectively doped metal oxide material deposited can be used to achieve different electrical characteristics, this technique can also be used in conjunction with depositing the first and second portions of the channel and resistor body materials under different conditions. However, the channel and resistor body materials can be deposited under the same conditions, and their different electrical characteristics can be achieved entirely through their different subsequent processing.

[0056] Figure 4 A portion of an alternative method for forming a TFT / resistor pair in a thin film IC is shown. Here, the TFT channel and resistor have been formed, initially by depositing a quantity of metal oxide material, possibly as a single layer of metal oxide, on respective portions of the surface of a substrate 5. These portions are initially semiconducting. However, in Figure 4In the steps shown, the material portion forming the resistor body is selectively exposed to electromagnetic radiation to increase its conductivity so that it provides a resistive rather than semi-conductive path between the resistor terminals. It will be appreciated that this selective exposure of only one of the metal oxide material portions can be achieved in a variety of ways. For example, the radiation can be directed onto a wider portion of the circuit, with the gate terminal 13 acting as a mask to shield the channel of the metal oxide material or at least a large portion thereof from the effects of the radiation. Alternatively, a separate mask can be used, and / or an electromagnetic radiation source can be used that is capable of irradiating only a small portion of the circuit, including the resistor (for example, a laser beam can be used to perform selective annealing / treatment). GB2525184A describes techniques suitable for use in certain embodiments to increase the conductivity of one or more bodies.

[0057] Figure 5 shows part of another alternative method for forming a TFT / resistor pair in a thin film IC. In this method, the metal oxide material portions forming the channel and the resistor body have been deposited on separate areas of a substrate 5, and initially both are semiconducting. It will be appreciated that Figure 5a The individual portions of metal oxide material shown in can be produced by first depositing a uniform layer, sheet, or other structure of metal oxide material and then patterning it by any suitable means. Alternatively, portions of metal oxide material can be selectively formed on the substrate surface by any suitable technique (e.g., by selective deposition, coating, printing, or other means). Figure 5a In the steps shown, the portion of the metal oxide material forming the body of the resistor is selectively exposed to electromagnetic radiation to increase its conductivity and change its electrical characteristics from substantially semiconducting to resistive. Following this exposure, which can generally be considered to be treating the portion of the metal oxide material forming the body of the resistor differently from the portion forming the TFT channel, we have Figure 5b 5 , the metal oxide material portions forming the TFT channel and the resistor body are formed from the same deposited layers of source material and are processed differently before the remainder of the transistor and resistor are formed (as opposed to the method shown in FIG6 , in which different processing is performed before the transistor and resistor structures are patterned).

[0058] FIG6 shows a portion of another method for forming a TFT / resistor pair in a thin film IC, in which the materials used to form the TFT channel and the resistor body can be deposited as a single layer of source material. Initially, a uniform layer of semiconductor material 1200 is formed to cover the open surface of substrate 5. Separate portions of this layer 1200 provide the metal oxide material used to form the TFT channel and the resistor body. Figure 6a It is also shown that the metal oxide portion forming the resistor body is selectively exposed to electromagnetic radiation to increase its conductivity and thereby reduce its resistivity. It should be understood that such selective exposure can be performed by a variety of suitable techniques, as will be apparent to those skilled in the art from their general knowledge in the art and from the remainder of this disclosure. Thus, in this example, the selective treatment of the metal oxide portion forming the resistor body is performed before layer 1200 is patterned. Figure 6b The structure resulting from patterning layer 1200 is shown by selectively removing portions of layer 1200 to expose underlying regions of the surface of substrate 5. In particular, the metal oxide material has been removed, leaving only portions that form the TFT channel and resistor body. Subsequent structures such as terminals and dielectric layers can then be formed in any suitable manner, such as those described above.

[0059] Resistors with resistances varying by many orders of magnitude are often required in a typical IC. For example, low-power bias networks (such as voltage dividers) and low-frequency oscillators can be efficiently implemented using very high-value resistors, while lower-value resistors are preferred for pull-up / pull-down functions in logic gates and low-frequency oscillators.

[0060] Figure 7 An example structure that can be included in a thin film IC is shown, wherein an increased resistance range is provided compared to conventional structures. More specifically, a first TFT / resistor pair 700 and a second TFT / resistor pair 750 are provided, wherein the first TFT / resistor pair 700 is formed by a first TFT 710 and a first resistor 730, and the second TFT / resistor pair 750 is formed by a first TFT 760 and a first resistor 780. Each of the first TFT / resistor pair 700 and the second TFT / resistor pair 750 can have a resistance greater than that of the first TFT / resistor pair 710 and the first resistor 730. Figures 1 to 3 The geometric shapes are similar to those stated and can therefore be Figure 1 Each is manufactured in a similar manner to FIG. 6 ; however, they are not limited to these techniques.

[0061] The first TFT 710 includes a source terminal 712, a gate terminal 714, a drain terminal 716, a channel 718, and a dielectric layer 720. The first resistor 730 includes a first terminal 732, a second terminal 734, and a resistor body 736. The second TFT 760 includes a source terminal 762, a gate terminal 764, a drain terminal 766, a channel 768, and a dielectric layer 770. The second resistor 780 includes a first terminal 782, a second terminal 784, and a resistor body 786, and the first TFT / resistor pair and the second TFT / resistor pair 700, 750 can be formed on a substrate 790. As described above with respect to Figure 1 As mentioned, for simplicity, the interconnections between the illustrated devices and other devices of the thin film IC are not shown, however, they may be provided in any suitable manner known to those skilled in the art.

[0062] The first and second TFTs 710, 760 can each be an n-type MOSFET (NMOS) or a p-type MOSFET (PMOS), where the type of TFT is defined by the dominant charge carriers in their respective channel regions, i.e., electrons are n-type and holes are p-type. Figure 1 6 , one or more techniques may be used to control the electrical properties of, for example, a semiconductor (such as a metal oxide) used to form the respective channel before, during, or after deposition of the semiconductor material.

[0063] To increase the resistance range that can be provided in a thin film IC, the first resistor 730 and the second resistor 780 can be of different types. For example, the resistor body 736 of the first resistor 730 can be formed of a metal to form a relatively low value resistor, and the resistor body 786 of the second resistor 780 can be formed of a semiconductor or a semiconductor whose electrical properties may have been modified (e.g., using one of the above-described techniques) to achieve a specific resistance that is higher than the resistance of the first resistor 730. In this case, the resistor body 786 of the second resistor 780 can be formed of the same or corresponding material as the channel of one or more of the first TFT 710 and the second TFT 760. Alternatively, the channel 718 and the resistor body 736 of the first TFT / resistor pair 700 can be formed of a first material, and the channel 768 and the resistor body 786 of the second TFT / resistor pair 750 can be formed of a second material, wherein the material portions forming the channel and the resistor body may have their electrical properties modified during or after deposition to achieve the desired electrical characteristics.

[0064] In one example, both the first and second TFTs 710, 760 can be PMOS TFTs such that their channels are formed of p-type material, and the resistor bodies of their respective resistors can be formed of the same material as the channels. However, the material portions forming each resistor body may have been deposited or subsequently processed under different conditions to control their electrical properties, particularly their resistance. For example, the material forming the resistor body 736 of the first resistor 730 may have been deposited under conditions suitable for achieving a first resistance, and the resistor body 768 of the second resistor 780 may have been annealed to achieve a second resistance; however, it should be understood that any combination of techniques may be used to achieve the desired material properties and resistance.

[0065] In another approach, Figure 7 The first and second TFTs 710 and 760 can be of different types, such that they form a complementary metal oxide semiconductor (CMOS) pair of TFTs, and thus they form part of a thin film IC, which is a thin film CMOS IC. For example, the first TFT 710 can be an n-type TFT, and the second TFT 760 can be a p-type TFT, wherein the performance of the respective channels can be achieved by selecting appropriate source semiconductors and / or any of the above-mentioned techniques for changing the electrical characteristics of the semiconductors forming the respective channels.

[0066] Advantageously, when two TFTs 710 and 760 form part of a CMOS thin film IC, the bodies of the first and second resistors 736 and 786 can be formed of materials that form semiconductors with different properties (i.e., n-type and p-type) used in each TFT. In turn, this means that resistors of significantly different values ​​can be manufactured in the same circuit as the TFT, although not necessarily directly connected to the TFT, where the shared material used to form each resistor can be selected based on the manufacturing constraints of the desired resistor value and material. For example, if the first TFT 710 has an n-type channel, the same n-type material can be used as the body of the first resistor 730 to form a relatively low-value resistor. Accordingly, if the second TFT 760 has a p-type channel, the same p-type material can be used as the body of the second resistor 780 to provide a relatively high-value resistor. In addition, the material portion forming each resistor body can also have electrical properties that are changed using one or more of the above-mentioned techniques, so that although the TFT channel and the resistor body can be formed from the same source semiconductor, their electrical properties may be different in order to provide the desired semiconductor and resistance characteristics. Figure 7One example of a CMOS implementation of a TFT / resistor pair can be achieved by using indium gallium zinc oxide (IGZO) for the n-type channel material and nickel oxide (NiO) for the p-type material, where IGZO can be used to provide a resistor with a resistance below about 10 kΩ / □, and NiO can be used to provide a resistor with a resistance above about 10 kΩ / □. In other words, Figure 7 The TFT channel and the resistor body of the resistor can be formed from at least one of a first source material and a second source material, wherein portions of one or more source materials can be altered during or after deposition to achieve desired electrical characteristics of the TFT channel and / or the resistor body.

[0067] Compared to unipolar thin-film ICs, the production of thin-film CMOS ICs may require a relatively complex manufacturing process, including additional deposition steps, because different source materials, such as different metal oxides, may need to be deposited for each type of TFT and / or resistor. Therefore, a reduced complexity method for providing a wider range of resistor values ​​in CMOS thin-film ICs is desirable.

[0068] According to one example, a reduced complexity method for manufacturing CMOS thin film ICs that can include an increased resistor range can be achieved by using bipolar materials (such as metal oxides including SnO, SnO2, CuO, Cu2O, CuO2), for example, whose electrical properties can be modified so that they can form n-type semiconductors, p-type semiconductors, or conductive materials, depending on the processing applied to them. Advantageously, this means that the same material, which can be deposited in a single deposition layer, can be used to form n-type TFTs, p-type TFTs, and higher and lower value resistors.

[0069] For example, techniques such as those described in "Thin Film Complementary Metal Oxide Semiconductor (CMOS) Device Using a Single-Step Deposition of the Channel Layer", Nayaket al, Sci. Rep. 4, 4672, 4672; DOI: 10.1038 / srep04672 (2014) can provide for less complex manufacturing of thin film CMOS TFTs. Thus, the above-described techniques for efficiently providing a wider range of resistor values ​​in thin film ICs can be combined with methods for efficiently providing thin film CMOS ICs to achieve thin film CMOS ICs that include a wide range of resistor values ​​in a space-saving and relatively simple manufacturing method.

[0070] although Figure 7The two TFTs 710 and 760 are shown positioned directly on the same substrate 790 to form part of a CMOS thin film IC, but other approaches are possible. For example, complementary TFTs 710 and 760 can be stacked vertically, as described in GB 2561004A. The first resistor 730 and the second resistor 780 can be positioned at any desired level in the IC structure, and in some examples, the resistor body composed of one material can be formed in the same layer as the TFT channel composed of the same or corresponding material.

[0071] although Figure 7 The present invention relates to a thin film IC comprising two TFT / resistor pairs, but any number of TFT / resistor pairs may be used, each pair having different electrical characteristics. Furthermore, any suitable semiconductor device may be used in addition to TFTs. For example, in some examples, a diode (such as a Schottky diode) may be used instead of Figure 7 One or both of the TFTs, wherein the semiconductor of the Schottky diode can be of the same type as the channel of the first TFT (unipolar) or a different type than the channel of the first TFT (CMOS).

[0072] Figure 8 Yet another example structure that can be included in a thin film IC is shown, wherein an increased resistance range is provided compared to conventional thin film IC structures. Figure 7 Compared to the structure of FIG, the second TFT has been replaced by a Schottky diode 810 formed of a semiconductor layer 812 and a metal layer 814. The semiconductor layer 812 may be n-type or p-type and may be formed of the same or corresponding material as the resistor body of the resistor 780 and / or the first TFT 710 and the first resistor 730. Figure 7 In a similar manner to the TFT / resistor pair, the material portion of the semiconductor region 812 forming the Schottky diode 810 and the material portion of the resistor body 786 can have their electrical characteristics changed so that a diode and / or resistor with desired characteristics can be achieved using any of the above-mentioned methods of changing the electrical characteristics of a semiconductor.

[0073] Although Figure 7 and Figure 8 The description has been made with respect to TFTs and / or Schottky diodes, but any type of two-terminal or three-terminal semiconductor device may be used, e.g. Figure 7 and Figure 8 The semiconductor device may be an alternative type of diode or transistor. However, regardless of the specific type of semiconductor device, the principles of utilizing different semiconductors or materials to form the two resistors and / or processing the same semiconductor in different ways to change the electrical characteristics of the material forming the resistor body can be applied, thereby allowing an increased range of resistor values ​​to be effectively provided in a thin film IC.

[0074] Figures 9a to 9h Provides a method for making Figure 7 , an example process for a similar thin-film IC comprising two TFT / resistor pairs is shown in , where these pairs are based on different types of semiconductors or the same semiconductor whose electrical characteristics have been appropriately modified. For example, the first TFT / resistor pair can be based on an n-type semiconductor such as IGZO, and the second pair can be based on a p-type semiconductor such as NiO, making the IC a thin-film CMOS IC. Furthermore, the values ​​of the resistors can vary significantly depending on the materials and / or material processing used to form the resistor body, making it possible to efficiently provide a wide range of resistors in terms of manufacturing complexity and package size.

[0075] First, in Figure 9a In the embodiment of the present invention, a first semiconductor source material layer 904 is deposited on a substrate 902, wherein the first source material can be an n-type semiconductor, a p-type semiconductor, an intrinsic semiconductor (i.e., neither n-type nor p-type), or an ambipolar material. The first source material can be deposited under certain conditions so as to change the electrical properties of the first source material during deposition, or its electrical properties can be changed after deposition by annealing, exposure to electromagnetic radiation, or doping the substrate or other adjacent materials.

[0076] After the source material 904 has been deposited on the substrate, the source material is then patterned (eg, masked and etched) to form the resistor body 906 and the TFT channel 908, as by Figure 9b Further processing of the resistor body 906 and TFT channel 908 may alternatively or additionally occur at this stage in order to appropriately alter the electrical properties of these portions of the source material in order to achieve the electrical properties required to form the TFT channel and resistor body.

[0077] exist Figure 9c In FIG. 1 , a layer of conductive material 910 (such as metal), for example, is deposited on substrate 902 , resistor body 906 , and TFT channel 908 , for forming at least some contacts / terminals of the TFT and resistor.

[0078] exist Figure 9d , the contacts / terminals formed once the conductive layer has been patterned are shown. Specifically, a first terminal 912 and a second terminal 914 of the resistor and a source terminal 916 and a drain terminal 918 of the TFT have been formed.

[0079] exist Figure 9e In FIG. 9 , a dielectric layer 920 is deposited on the substrate and structures thereon to insulate the resistor and form the gate dielectric of the first TFT.

[0080] exist Figure 9fIn the embodiment of the present invention, a layer of a second source material 922 is deposited over the substrate and structures thereon, wherein the second source material can be an n-type semiconductor, a p-type semiconductor, or an intrinsic semiconductor. As with the first source material, the second source material can be deposited under certain conditions so as to change the electrical properties of the second source material during deposition, or the electrical properties of the second source material can be changed after deposition by annealing, exposure to electromagnetic radiation, or doping the substrate or other adjacent materials.

[0081] exist Figure 9g In FIG. 1 , a second semiconductor source material layer 922 has been patterned to form a channel 924 of a second TFT and a resistor body 926 of a second resistor. Although it has been described that changing the electrical properties of the second source material can occur during or after deposition of the second material, it can also occur after the TFT channel 924 and the resistor body 926 have been patterned, similar to the reference numerals. Figure 5a The way of description.

[0082] exist Figure 9h In the process, a second layer of conductive material 928 (such as metal) is deposited, for example to form at least some contacts / terminals of the second TFT and the second resistor.

[0083] exist Figure 9i , the contacts / terminals formed once the conductive layer 928 has been patterned are shown. Specifically, a gate terminal 930 of a first TFT; a source terminal 932 and a drain terminal 934 of a second TFT; and a first terminal 936 and a second terminal 938 of a second resistor have been formed.

[0084] exist Figure 9j In FIG. 1 , after the terminals are formed, a second dielectric layer 940 is deposited on the substrate and structures thereon to insulate the resistor and form the gate dielectric of the second TFT.

[0085] Finally, in Figure 9k In FIG. 9 , a gate terminal 942 of a second TFT has been formed on the gate dielectric by depositing and patterning a second conductive material layer.

[0086] By following the fabrication process of FIG. 9 , unipolar and CMOS thin film ICs with an increased range of resistor values ​​can be realized.

[0087] Although Figure 9 has been primarily described with respect to using different source semiconductor materials for the two TFT / resistor pairs, as discussed above, the same source material can be used for both TFT / resistor pairs, with appropriate processing or doping of adjacent materials used to appropriately alter the electrical characteristics of the various portions of the semiconductor forming the semiconductor device, thereby potentially resulting in a less complex method of manufacturing thin film ICs having an increased range of resistor values.

[0088] Figure 10 provides another example process for manufacturing two TFT / resistor pairs in a thin film IC, but in which, compared to Figure 9, the source material used to form the devices is deposited as a single deposited layer, and the properties of the material are modified by appropriately selected materials of corresponding portions of adjacent deposited layers, for example, materials that have been appropriately doped.

[0089] First, in Figure 10a In the embodiment of the present invention, a material portion is formed on substrate 1002 that is intended to interact with the semiconductor layer used to form the TFT channel and the resistor body. Each of portions 1004, 1006, 1008, and 1010 can be formed of the same or different materials, depending on the desired electrical characteristics of the TFT channel and the resistor body. Portions 1004-1010 can be formed in any suitable manner, such as by patterning using, for example, photolithography. In other examples, one or more of portions 1004, 1006, 1008, and 1010 may not be required.

[0090] exist Figure 10b , a source semiconductor layer 1012 has been deposited over portions 1004-1010. Although the same source semiconductor has been deposited to form the TFT channel and the resistor body, the electrical properties of the semiconductor regions surrounding portions 1004-1010 can be altered through the interaction of the semiconductor with each of portions 1004-1010. For example, the semiconductor region surrounding portion 1004 can be altered to achieve a first resistance, the semiconductor region surrounding portion 1006 can be altered to an n-type semiconductor, the semiconductor region surrounding portion 1008 can be altered to a p-type semiconductor, and the semiconductor region surrounding portion 1010 can be altered to become resistive, thereby achieving a second resistance.

[0091] exist Figure 10c In FIG. 1 , a deposited semiconductor layer 1012 has been patterned to form a resistor body 1014 of a first resistor, a channel 1016 of a first TFT, a channel 1018 of a second TFT, and a resistor body 1020 of a second resistor.

[0092] exist Figure 10d In the process, a layer 1022 of conductive material (such as metal) is deposited, for example to form at least some contacts / terminals of the TFTs and resistors.

[0093] exist Figure 10e , once the conductive layer 1022 has been patterned, the contacts / terminals have been formed. Specifically, a first terminal 1024 and a second terminal 1026 of the first resistor have been formed; a source terminal 1028 and a drain terminal 1030 of the first TFT; a source terminal 1032 and a drain terminal 1034 of the second TFT; and a first terminal 1036 and a second terminal 1038 of the second resistor have been formed.

[0094] exist Figure 10f In FIG. 1 , after forming the terminals, a dielectric layer 1040 is deposited on the substrate and structures thereon to insulate the resistors and form gate dielectrics for the first and second TFTs.

[0095] Finally, in Figure 10g , a gate terminal 1042 of a first TFT and a gate terminal 1044 of a second TFT have been formed on the respective gate dielectrics by depositing and patterning a second conductive material layer.

[0096] While FIG10 relates to altering the electrical properties of the source semiconductor material used to form the semiconductor regions of the resistor body and TFT via interaction with adjacent materials that have been deposited prior to the source material, many other approaches may be employed. For example, the underlying substrate may be appropriately doped to alter the electrical properties of the deposited source material. Alternatively, after depositing the source material, the portions forming each device may be annealed, selectively exposed to electromagnetic radiation (e.g., ultraviolet light) or another form of radiation, or otherwise treated to appropriately alter their electrical properties.

[0097] Throughout the description and claims of this specification, the words "comprise" and "include" and their variations mean "including but not limited to", and they are not intended to (and do not) exclude other parts, additional parts, components, integers or steps. Throughout the description and claims of this specification, the singular encompasses the plural unless the context requires otherwise. In particular, where the indefinite article is used, the specification will be understood to contemplate plurality as well as singularity unless the context requires otherwise.

[0098] Features, integers, characteristics, compounds, chemical moieties or groups described in conjunction with a particular aspect, embodiment or example of the invention are to be understood to be applicable to any other aspect, embodiment or example described herein unless incompatible therewith. All features disclosed in this specification (including any accompanying claims, abstract and drawings), and / or all steps of any method or process so disclosed may be combined in any combination, except combinations in which at least some of such features and / or steps are mutually exclusive. The invention is not limited to the details of any foregoing embodiments. The invention extends to any novel one or any novel combination of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one or any novel combination of the steps of any method or process so disclosed.

Claims

1. A thin film integrated circuit IC comprising a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor, wherein: The semiconductor region of the first semiconductor device, the resistor body of the first resistor, the semiconductor region of the second semiconductor device, and the resistor body of the second resistor are formed of deposited layers of at least one of a first source material and a second source material, and wherein the material of the resistor body of the first resistor and the material of the resistor body of the second resistor have different electrical characteristics, and wherein the resistor body of the first resistor and the semiconductor region of the first semiconductor device are included in a single deposited layer of the first source material, wherein the first semiconductor device is a thin film transistor (TFT), and the second semiconductor device is a Schottky diode, wherein the resistor body of the second resistor and the semiconductor region of the Schottky diode are included in a single deposited layer of the second source material, wherein the first source material and the second source material are different, and There is a difference of at least one order of magnitude between the resistivity of the material of the resistor body of the first resistor and the resistivity of the material of the resistor body of the second resistor.

2. The thin film integrated circuit IC according to claim 1, wherein A material of the semiconductor region of the first semiconductor device and a material of the resistor body of the first resistor have different electrical characteristics.

3. The thin film integrated circuit IC according to claim 1, wherein The first source material and the second source material are semiconductors.

4. The thin film integrated circuit IC according to claim 1, wherein The first source material is an n-type semiconductor and the second source material is a p-type semiconductor.

5. The thin film integrated circuit IC according to claim 1, wherein The first source material and the second source material are intrinsic semiconductors.

6. The thin film integrated circuit IC according to claim 1, wherein The TFT is an n-type TFT.

7. The thin film integrated circuit IC according to claim 1, wherein The first source material and the second source material are metal oxides.

8. A method for manufacturing a thin film integrated circuit (IC), the thin film integrated circuit (IC) including a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor, the method comprising: depositing a first source material to form a semiconductor region of the first semiconductor device and a resistor body of the first resistor, depositing a second source material to form a semiconductor region of the second semiconductor device, wherein the resistor body of the second resistor is formed by depositing the first source material or the second source material, and changing electrical characteristics of at least a portion of the source material forming the semiconductor region of the first semiconductor device, the resistor body of the first resistor, the semiconductor region of the second semiconductor device, and the resistor body of the second resistor during or after depositing the corresponding portion of the source material, wherein the configuration material of the resistor body of the first resistor and the configuration material of the resistor body of the second resistor have different electrical characteristics, wherein the first semiconductor device is a thin film transistor (TFT), and the second semiconductor device is a Schottky diode, wherein the resistor body of the second resistor and the semiconductor region of the Schottky diode are included in a single deposited layer of the second source material, wherein the first source material and the second source material are different, and There is a difference of at least one order of magnitude between the resistivity of the material of the resistor body of the first resistor and the resistivity of the material of the resistor body of the second resistor.

9. The method according to claim 8, wherein Changing the electrical properties comprises at least one of controlling the environmental conditions in which the corresponding portion of the source material is deposited, depositing another material onto the corresponding portion of the source material, exposing the corresponding portion of the source material to electromagnetic radiation, and controlling the electrical properties of the surface onto which the corresponding portion of the source material is deposited.

10. The method according to claim 8 or 9, wherein: Changing the electrical properties of a portion of the source material includes one or more of: changing the portion of the source material from an n-type semiconductor to a p-type semiconductor, changing the portion of the source material from a p-type semiconductor to an n-type semiconductor, changing the portion of the source material from an intrinsic semiconductor to an n-type semiconductor or a p-type semiconductor, and changing the portion of the source material from a semiconductor to a conductor.

11. The method according to claim 8, wherein The material of the semiconductor region of the first semiconductor device and the material of the resistor body of the first resistor have different electrical characteristics.

12. The method according to claim 8, wherein The first source material and the second source material are semiconductors.

13. The method according to claim 8, wherein The first source material is an n-type semiconductor and the second source material is a p-type semiconductor.

14. The method according to claim 8, wherein The first source material and the second source material are intrinsic semiconductors.

15. The method according to claim 8, wherein The TFT is an n-type TFT.

16. The method according to claim 8, wherein The first source material and the second source material are metal oxides.

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