A mask topography processing method, device and computer equipment

Abstract

The present application relates to the field of photolithography, in particular to a mask topography map processing method, comprising the following steps: obtaining a to-be-processed mask design layout and a mask topography map corresponding to the to-be-processed mask design layout; inputting the mask topography map into a preset trained topography map mapping model to obtain a photoresist topography map corresponding to the mask topography map. The mask topography map processing method, device and computer equipment provided by the present application solve the technical problem of high time cost for processing the mask topography map.

Description

[0001] The present application relates to the field of photolithography, and particularly relates to a mask topography processing method and device and computer equipment.

[0002] Currently, the main way to process a mask topography to obtain a photoresist topography is to simulate the photoresist topography through an optical proximity correction (OPC) process. The OPC process based on computational lithography often needs multiple iterations of optimization, and each optimization needs to apply a computational lithography model to simulate the current mask optimization result, so the time cost is relatively high.

[0003] In order to solve the problem of high time cost in processing a mask topography, the present application provides a mask topography processing method, device and computer equipment.

[0004] In order to solve the above technical problem, the present application provides the following technical solution: a mask topography processing method, comprising the following steps: obtaining a to-be-processed mask design layout and a mask topography corresponding to the to-be-processed mask design layout; inputting the mask topography into a preset trained topography mapping model to obtain a photoresist topography corresponding to the mask topography.

[0005] Preferably, before inputting the mask topography into the preset trained topography mapping model, the following steps are further included: obtaining a typical mask design layout of an initial mask design layout; processing the typical mask design layout to obtain a typical mask topography and a typical photoresist topography corresponding to the typical mask design layout; inputting the typical mask topography and the typical photoresist topography into an untrained topography mapping model, and training the untrained topography mapping model to obtain the trained topography mapping model.

[0006] Preferably, the processing of the typical mask design layout to obtain the typical photoresist topography corresponding to the typical mask design layout includes the following steps: loading a preset computational lithography model on the typical mask design layout to obtain the typical mask topography; loading the preset computational lithography model on the typical mask design layout and performing OPC processing to obtain the typical photoresist topography.

[0007] Preferably, the typical mask design layout includes one or a combination of a typical pattern layout, a key pattern layout and a known defect layout.

[0008] ​​​Preferably, before inputting the mask topography into the preset topography mapping model, the following step is further included: obtaining a typical mask design layout for verifying the mask design layout; matching the typical mask design layout with a preset trained layout database, and if the matching fails, the trained topography mapping model is supplemented with training.

[0009] Preferably, before inputting the mask topography into the preset topography mapping model, the following step is further included: matching the preset computing lithography model with a preset trained computing lithography model database, and if the matching fails, the trained topography mapping model is supplemented with training.

[0010] Preferably, the supplement training includes the following steps: processing the typical mask design layout to obtain a typical mask topography and a typical photoresist topography corresponding to the typical mask design layout; inputting the typical mask topography and the typical photoresist topography into a topography mapping model for supplement training; adding the typical mask design layout into the preset trained layout database; and adding the preset computing lithography model into the preset trained computing lithography model database.

[0011] Preferably, after obtaining the photoresist topography corresponding to the mask topography, the following step is further included: adding a threshold condition to the photoresist topography to obtain a photoresist pattern contour.

[0012] To solve the above technical problems, the present application provides another technical solution as follows: a device applying the above method, the device comprising:

[0013] The input module: obtaining a mask design layout to be processed and a mask topography corresponding to the mask design layout to be processed;

[0014] The processing module: obtaining a photoresist topography corresponding to the mask topography based on a preset trained topography mapping model.

[0015] To solve the above technical problems, the present application provides another technical solution as follows: a computer device comprising a memory, a processor and a computer program stored in the memory, the processor executing the above computer program to realize the steps of the above method.

[0016] Compared with the prior art, the mask topography processing method, device and computer device provided by the present application have the following beneficial effects:

[0017] 1. Obtain a mask design layout to be processed and a mask topography corresponding to the overall design layout; input the mask topography into a preset trained topography mapping model to obtain a photoresist topography corresponding to the mask topography. The trained topography mapping model is used to complete the mapping of the mask topography to the photoresist topography, thereby reducing the time cost of the process flow.

[0018] 2. Obtain a typical mask design layout of an initial mask design layout; process the typical mask design layout to obtain a typical mask topography and a typical photoresist topography corresponding to the typical mask design layout; input the typical mask topography and the typical photoresist topography into an untrained topography mapping model, and train the untrained topography mapping model to obtain a trained topography mapping model. When the topography mapping model is not trained, the typical mask topography and the typical photoresist topography are first input to perform initial training, thereby obtaining a mapping model of the typical mask topography to the typical photoresist topography.

[0019] 3. Processing the typical mask design layout to obtain a typical photoresist topography corresponding to the typical mask design layout includes the following steps: loading a preset calculation lithography model on the typical mask design layout to obtain a typical mask topography; loading the preset calculation lithography model on the typical mask design layout and performing OPC processing to obtain a typical photoresist topography. The OPC processing of the typical mask design layout to obtain the typical photoresist topography provides a sample for the training of the mask topography mapping model, thereby improving the reliability of the mapping model.

[0020] 4. The typical mask design layout includes one or more combinations of a typical pattern layout, a key pattern layout, and a known defect layout. The typical pattern layout, the key pattern layout, and the known defect layout are obtained to train the model, thereby improving the reliability of the trained model in mapping the mask topography of the overall design layout to the photoresist topography.

[0021] 5. Before inputting the mask topography into the preset topography mapping model, the following steps are further included: obtaining a typical mask design layout of a verification mask design layout; matching the typical mask design layout with a preset trained layout database, and if the matching fails, performing supplementary training on the trained topography mapping model. The typical mask design layout that has been selected and trained in the training model does not need to be trained again, and therefore the matching of the typical mask design layout with the preset trained layout database before training is performed to determine whether supplementary training is needed, thereby improving the flexibility and scalability of the mask topography mapping model.

[0022] 6. The typical mask design layout is processed to obtain a typical mask topography map and a typical photoresist topography map corresponding to the typical mask design layout; the typical mask topography map and the typical photoresist topography map are input into the topography map mapping model for supplementary training; the typical mask design layout is added to the preset trained layout database; and the preset computing lithography model is added to the preset trained computing lithography model database. For different computing lithography models, even the same typical mask design layout will have different mask topography maps, so the current computing lithography model needs to be matched with the trained computing lithography model, and if the current computing lithography model has not been trained, supplementary training is performed, thereby improving the reliability of the mask topography map mapping model.

[0023] 7. The supplementary training comprises the following steps: the typical mask design layout is processed to obtain a typical mask topography map and a typical photoresist topography map corresponding to the typical mask design layout; the typical mask topography map and the typical photoresist topography map are input into the topography map mapping model for supplementary training; the typical mask design layout is added to the preset trained layout database; and the preset computing lithography model is added to the preset trained computing lithography model database. For the typical mask design layout and the computing lithography model that have been trained, they are saved in the corresponding database, thereby improving the scalability of the mask topography map mapping model.

[0024] 8. After obtaining the photoresist topography map corresponding to the mask topography map, the following step is further included: adding a threshold condition to the photoresist topography map to obtain a photoresist pattern contour. For the photoresist topography map obtained through the mask topography map mapping model, it cannot be directly applied, and the photoresist topography map is further processed by adding a threshold condition, so that it is convenient for the subsequent process flow, thereby improving the practicability of the mask topography map processing method.

[0025] 9. The embodiment of the present application further provides a device, which has the same beneficial effects as the mask topography map processing method described above, and details are not repeated here.

[0026] 10. The embodiment of the present application further provides a computer device, which has the same beneficial effects as the mask topography map processing method described above, and details are not repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 is a flowchart of the mask topography map processing method provided by the first embodiment of the present application.

[0028] Figure 2 is a flowchart of the first training of the initial mask topography map mapping model provided by the first embodiment of the present application.

[0029] Figure 3 is a flowchart of the supplementary training of the trained mask topography map mapping model provided by the first embodiment of the present application.

[0030] Figure 4 is a flow chart of the supplementary training provided by the first embodiment of the present application.

[0031] Figure 5 is a flow chart of a specific embodiment provided by the first embodiment of the present application.

[0032] Figure 6 is a typical mask design layout provided by the first embodiment of the present application.

[0033] Figure 7 is a mask topography map provided by the first embodiment of the present application.

[0034] Figure 8 is a photoresist topography map provided by the first embodiment of the present application.

[0035] Figure 9 is a schematic diagram of a BP artificial neural network model provided by the first embodiment of the present application.

[0036] Figure 10 is a photoresist pattern profile map provided by the first embodiment of the present application.

[0037] Figure 11 is a schematic diagram of the device provided by the second embodiment of the present application.

[0038] Figure 12 is a schematic diagram of the computer device provided by the third embodiment of the present application.

[0039] The figure identification is explained as follows:

[0040] 1, mask topography map processing method; 2, device; 3, computer device;

[0041] 21, input module; 22, mapping module; 30, memory; 31, processor;

[0042] 300, computer program.

DETAILED DESCRIPTION

[0043] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0044] Please refer to Figure 1 , the first embodiment of the present application provides a mask topography map processing method, which comprises the following steps:

[0045] Step S1: obtaining a mask design layout to be processed and a mask topography map corresponding to the mask design layout to be processed;

[0046] Step S2: inputting the mask topography corresponding to the to-be-processed mask design layout into a preset trained topography and photoresist topography mapping model to obtain a photoresist topography corresponding to the mask topography.

[0047] The present application can quickly complete the mapping from a mask design layout to a mask topography and then to a photoresist topography by using a trained topography mapping model, thereby reducing the time cost of the process flow.

[0048] Please refer to Figure 2 , preferably, the preset trained topography and photoresist topography mapping model is obtained by the following steps:

[0049] S101: obtaining a typical mask design layout of a plurality of initial mask design layouts;

[0050] S102: processing a plurality of typical mask design layouts to obtain a typical mask topography and a typical photoresist topography corresponding to the typical mask design layout;

[0051] S103: inputting the typical mask topography and the typical photoresist topography into an initial mask topography and photoresist topography mapping model (hereinafter referred to as a topography mapping model) for training to obtain a trained topography mapping model. When the topography mapping model has not been trained, the typical mask topography and the typical photoresist topography are first inputted for initial training, thereby obtaining a mapping model of the typical mask topography and the typical photoresist topography.

[0052] Further, inputting the typical mask topography and the typical photoresist topography into the initial topography mapping model for training to obtain the trained topography mapping model further includes the following steps:

[0053] S1030: inputting a mask topography corresponding to a known defect layout in a known defect layout database into the initial topography mapping model for training.

[0054] It can be understood that the known defect layout database includes a mask topography corresponding to a defect layout detected in other process.

[0055] Further, the to-be-processed mask design layout and the initial mask design layout can be the same overall design layout or different overall design layouts. It can be understood that a plurality of trained typical mask design layouts Figure 1 constitute a preset trained layout database.

[0056] Further, the above step S102 includes the following steps:

[0057] S1020: loading a preset calculation lithography model on the typical mask design layout to obtain a typical mask topography;

[0058] S1021: load a preset calculation lithography model on the typical mask design layout and perform OPC processing to obtain a typical photoresist topography map.

[0059] The typical mask design layout is subjected to OPC processing to obtain a typical photoresist topography map, which provides a sample for training of the mask topography map mapping model and improves the reliability of the mapping model.

[0060] Further, the typical mask design layout includes one or a combination of the typical pattern layout, the key pattern layout, and the known defect layout.

[0061] Understandably, the typical pattern layout, the key pattern layout, and the known defect layout are all representative local design layouts extracted from the initial mask design layout, and the typical mask design layout can represent the key pattern on the initial mask design layout to a certain extent and reflect the key information of the initial mask design layout.

[0062] Further, before the step S101 of obtaining the typical mask design layout of the initial mask design layout, the following steps are further included:

[0063] S100: detecting a plurality of initial mask design layouts to obtain a typical pattern layout and a key pattern layout on the initial mask design layout. The typical pattern layout is a local layout with a representative pattern shape in the initial mask design layout, and the key pattern layout is a local layout with a higher frequency on the initial mask design layout.

[0064] Please refer to Figure 3 , preferably, before the step S2 of inputting the mask topography map corresponding to the mask design layout to be processed into the preset trained topography map mapping model, the following steps are further included:

[0065] S111: obtaining a supplementary typical mask design layout of the verification mask design layout;

[0066] S112: matching the verification typical mask design layout with a preset trained layout database, and if the matching fails, performing supplementary training on the trained topography map mapping model.

[0067] Understandably, the trained layout database is a collection of typical mask design layouts corresponding to the mask topography map that has been subjected to initial training and / or supplementary training, and contains the typical mask design layout corresponding to the trained mask topography map.

[0068] By supplementally training the trained topography map mapping model, the accuracy and the calculation efficiency of the trained topography map mapping model can be effectively improved, that is, the trained topography map mapping model is further optimized by supplementally training. It should be understood that when supplementally training the trained topography map mapping model, the typical mask design layout corresponding to the mask topography map to be supplementally trained can be added to the trained layout database to supplementally optimize the trained layout database.

[0069] Understandably, the verification mask design layout and the mask design layout to be processed can be the same overall design layout or different overall design layouts.

[0070] Preferably, before the step S111 of obtaining the typical mask design layout of the verification mask design layout, the following step is further included:

[0071] S110: detecting the verification mask design layout to obtain a typical layout with a representative pattern shape on the verification mask design layout and a high-frequency or key layout appearing on the verification mask design layout.

[0072] For the typical mask design layout corresponding to the mask topography map not trained by the training model, the mask topography map needs to be processed to be trained again, and therefore, before training, the typical mask design layout is matched with the preset trained layout database to determine whether supplementally training is needed. The flexibility and the expandability of the mask topography map mapping model are improved.

[0073] Preferably, before the mask topography map is input into the preset topography map mapping model, the following step is further included:

[0074] S113: matching the preset calculation lithography model with the preset trained calculation lithography model database, and if the matching fails, supplementally training the trained topography map mapping model.

[0075] Understandably, from the typical mask design layout to the typical mask topography map, the calculation lithography model needs to be loaded to achieve. Even for the same typical mask design layout, different typical mask topography maps can be obtained for different calculation lithography models, and therefore, after the calculation lithography model is loaded to obtain the typical mask topography map each time, the current calculation lithography model is added to the trained calculation lithography model database, that is, the trained calculation lithography model database includes the calculation lithography model corresponding to the trained typical mask topography map. The current calculation lithography model is matched with the trained calculation lithography model database, and if the current calculation lithography model does not match the calculation lithography model corresponding to the trained typical mask topography map, supplementally training is performed. The reliability of the mask topography map mapping model is improved.

[0076] Please refer toFigure 4 Preferably, the supplementary training comprises the following steps:

[0077] S1120: processing the typical mask design layout to obtain a typical mask topography map and a typical photoresist topography map corresponding to the typical mask design layout;

[0078] S1121: inputting the typical mask topography map and the typical photoresist topography map into the topography map mapping model for supplementary training;

[0079] S1122: adding the typical mask design layout into a preset trained layout database;

[0080] S1123: adding the preset computing lithography model into a preset trained computing lithography model database.

[0081] For the typical mask design layout and the computing lithography model that have been trained, save them into the corresponding database to improve the scalability of the mask topography map mapping model.

[0082] Further, when the known defect layout database is updated, the supplementary training further comprises the following steps:

[0083] S1124: inputting the mask topography map corresponding to the updated known defect layout in the updated known defect layout database into the mask topography map mapping model for supplementary training.

[0084] Preferably, the mask topography map mapping model is a neural network model. Specifically, the neural network model is a BP artificial neural network model.

[0085] Preferably, after obtaining the photoresist topography map corresponding to the mask topography map, the following steps are further included:

[0086] S3: adding a threshold condition to the photoresist topography map to obtain a photoresist pattern contour.

[0087] After obtaining the photoresist topography map of the mask design layout to be processed, the overall shape of the photoresist topography map is screened according to the threshold condition, and the unnecessary part is removed to obtain the photoresist pattern contour of the mask design layout to be processed. For the photoresist topography map obtained through the mask topography map mapping model, it cannot be directly applied. By adding a threshold condition to the photoresist topography map for further processing, it is convenient for the subsequent process flow, and the practicability of the mask topography map processing method is improved.

[0088] A specific embodiment of the present embodiment is shown in Figure 5 ;

[0089] Exemplarily, please refer to Figure 6 to Figure 8A 40μm*40μm typical mask design layout is selected from the mask design layout to be processed as a training use, as shown in Figure 6 ;

[0090] The mask topography map mapping model is a trained mask topography map mapping model. The typical mask design layout is matched with a preset trained layout database, if the matching fails, the typical mask design layout is input into the mask topography map mapping model for supplementary training, and after the supplementary training, the typical mask design layout is input into the trained layout database; a preset computing lithography model is introduced, and the preset computing lithography model is matched with a preset trained computing lithography model database, if the matching fails, the preset computing lithography model is input into the mask topography map mapping model for supplementary training, and after the training is completed, the computing lithography model is input into the trained computing lithography model database;

[0091] In one specific embodiment of the embodiment, the mask topography maps corresponding to the typical mask design layout and the computing lithography model have not been trained, the typical mask design layout is loaded into the lithography computing model to obtain the mask topography map of the typical mask design layout; as shown in Figure 7 ;

[0092] The typical mask design layout is subjected to OPC processing and applied to the computing lithography model, and multiple iterations are optimized to obtain the photoresist topography map of the typical mask design layout, as shown in Figure 8 ;

[0093] The mask topography map and the photoresist topography map of the typical mask design layout are transmitted into the trained mask topography map mapping model, specifically, the mask topography map mapping model is a BP artificial neural network model, and the trained BP artificial neural network model is a mapping model from the mask topography map to the photoresist topography map, please refer to Figure 9 ;

[0094] The computing lithography model is loaded to the mask design layout to be processed to obtain the mask topography map of the mask design layout to be processed;

[0095] The mask topography map mapping model after the supplementary training is applied to the mask topography map of the mask design layout to be processed to obtain the photoresist topography map of the mask design layout to be processed;

[0096] Please refer to Figure 10 , a threshold condition is added to the photoresist topography map obtained through the topography mapping model, and the photoresist pattern contour of the mask design layout to be processed is obtained.

[0097] The second embodiment of the application further provides a device 2 for realizing the above-mentioned method 1, please refer to Figure 11 , the device comprises:

[0098] The input module 21 acquires a mask design layout to be processed and a mask topography map corresponding to the mask design layout to be processed.

[0099] The processing module 22 obtains a corresponding photoresist topography map from the mask topography map based on a preset trained topography map mapping model.

[0100] The third embodiment of the present application further provides a computer device 3, which comprises a memory 30, a processor 31 and a computer program 300 stored in the memory 30, and the processor 31 executes the computer program 300 to realize the steps of the method 1. Figure 12

[0101] In the embodiments provided in the present application, it should be understood that “B corresponding to A” means that B is associated with A, and B can be determined according to A. However, it should also be understood that the determination of B according to A does not mean that B is determined only according to A, but B can also be determined according to A and / or other information.

[0102] It should be understood that “one embodiment” or “an embodiment” mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, “in one embodiment” or “in an embodiment” appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. Those skilled in the art should also know that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present application.

[0103] In various embodiments of the present application, it should be understood that the size of the serial number of the above processes does not mean the inevitable sequence of execution, and the execution sequence of the processes should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0104] ​The flow diagrams and the block diagrams in the drawings are illustrations of possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a segment, or a portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.

[0105] Compared with the prior art, the mask topography processing method, device and computer equipment provided by the present application have the following beneficial effects:

[0106] 1. Obtain the mask topography corresponding to the to-be-processed mask design layout and the overall design layout; input the mask topography into a preset trained topography mapping model to obtain the photoresist topography corresponding to the mask topography. The trained topography mapping model is used to complete the mapping of the mask topography to the photoresist topography, thereby reducing the time cost of the process flow.

[0107] 2. Obtain a typical mask design layout of an initial mask design layout; process the typical mask design layout to obtain a typical mask topography and a typical photoresist topography corresponding to the typical mask design layout; input the typical mask topography and the typical photoresist topography into an untrained topography mapping model, and train the untrained topography mapping model to obtain a trained topography mapping model. When the topography mapping model is not trained, the typical mask topography and the typical photoresist topography are first input to perform initial training, thereby obtaining a mapping model of the typical mask topography to the typical photoresist topography.

[0108] 3. The processing of the typical mask design layout to obtain the typical photoresist topography corresponding to the typical mask design layout comprises the following steps: loading a preset calculation lithography model on the typical mask design layout to obtain the typical mask topography; loading the preset calculation lithography model on the typical mask design layout and performing OPC processing to obtain the typical photoresist topography. The OPC processing of the typical mask design layout to obtain the typical photoresist topography provides a sample for the training of the mask topography mapping model, thereby improving the reliability of the mapping model.

[0109] 4. The typical mask design layout includes one or more combinations of a typical pattern layout, a critical pattern layout, and a known defect layout. By obtaining the typical pattern layout, the critical pattern layout, and the known defect layout to train the model, the reliability of the trained model for mapping the mask topography of the overall design layout to the photoresist topography is improved.

[0110] 5. Before inputting the mask topography into the preset topography mapping model, the following steps are further included: obtaining a typical mask design layout for verifying the mask design layout; matching the typical mask design layout with the preset trained layout database, and if the matching fails, the trained topography mapping model is supplemented with training. For the typical mask design layout that has been selected and trained by the training model, it is not necessary to train again, and therefore, the matching of the typical mask design layout with the preset trained layout database before training is performed to determine whether the supplementary training is needed, thereby improving the flexibility and scalability of the mask topography mapping model.

[0111] 6. The typical mask design layout is processed to obtain a typical mask topography and a typical photoresist topography corresponding to the typical mask design layout; the typical mask topography and the typical photoresist topography are input into the topography mapping model for supplementary training; the typical mask design layout is added to the preset trained layout database; and the preset calculation lithography model is added to the preset trained calculation lithography model database. For different calculation lithography models, even the same typical mask design layout will have different mask topographies, and therefore, the current calculation lithography model needs to be matched with the trained calculation lithography model, and if the current calculation lithography model has not been trained, the supplementary training is performed, thereby improving the reliability of the mask topography mapping model.

[0112] 7. The supplementary training includes the following steps: the typical mask design layout is processed to obtain a typical mask topography and a typical photoresist topography corresponding to the typical mask design layout; the typical mask topography and the typical photoresist topography are input into the topography mapping model for supplementary training; the typical mask design layout is added to the preset trained layout database; and the preset calculation lithography model is added to the preset trained calculation lithography model database. For the typical mask design layout and the calculation lithography model that have been trained, they are saved in the corresponding database, thereby improving the scalability of the mask topography mapping model.

[0113] 8. After obtaining the photoresist topography corresponding to the mask topography, the following steps are further included: adding a threshold condition to the photoresist topography to obtain a photoresist pattern contour. For the photoresist topography obtained by the mask topography mapping model, it cannot be directly applied, and by adding a threshold condition to the photoresist topography for further processing, it is convenient for the subsequent process flow, thereby improving the practicability of the mask topography processing method.

[0114] 9. The embodiment of the present application also provides an apparatus, which has the same beneficial effects as the mask topography processing method, and will not be described here.

[0115] 10. The embodiment of the present application also provides a computer device, which has the same beneficial effects as the mask topography processing method, and will not be described here.

[0116] The above describes in detail the mask topography processing method, the apparatus and the computer device disclosed by the embodiment of the present application. The principles and implementation manners of the present application are described by applying specific examples. The above embodiment is only used to help understand the method of the present application and its core idea. Meanwhile, for the general skilled in the art, the specific implementation manners and application ranges will be changed according to the idea of the present application. In conclusion, the content of the specification should not be understood as the limitation of the present application. Any modification, equivalent replacement, improvement and the like within the principles of the present application should be included in the protection scope of the present application.

Claims

1. A method for processing mask topography images, characterized in that: Includes the following steps: Obtain the mask design layout to be processed and the mask topography image corresponding to the mask design layout to be processed; The mask topography is input into a preset trained topography mapping model to obtain the photoresist topography corresponding to the mask topography; Before inputting the mask topography image into a preset trained topography image mapping model, the following steps are also included: Obtain a typical mask design layout for the initial mask design layout; The typical mask design layout is processed to obtain the typical mask topography and typical photoresist topography corresponding to the typical mask design layout; The typical mask topography and the typical photoresist topography are input into the untrained topography mapping model, and the untrained topography mapping model is trained to obtain the trained topography mapping model.

2. The method as described in claim 1, characterized in that: The above-described processing of the typical mask design layout to obtain the typical photoresist topography corresponding to the typical mask design layout includes the following steps: A preset computational lithography model is loaded onto the typical mask design layout to obtain the typical mask topography image; A preset computational lithography model is loaded onto the typical mask design layout and OPC processing is performed to obtain the typical photoresist morphology map.

3. The method as described in claim 1, characterized in that: The typical mask design layout includes one or more combinations of typical graphic layout, critical graphic layout, and known defect layout.

4. The method as described in claim 1, characterized in that: The following steps are included before inputting the mask topography image into a preset topography image mapping model: Obtain a typical mask design layout for verification; The typical mask design layout is matched with a preset trained layout database. If the matching fails, the trained topographic mapping model is further trained.

5. The method as described in claim 4, characterized in that: The following steps are included before inputting the mask topography image into a preset topography image mapping model: The preset computational lithography model is matched with the preset trained computational lithography model database. If the matching fails, the trained topography mapping model is further trained.

6. The method as described in claim 5, characterized in that: The supplementary training includes the following steps: The typical mask design layout is processed to obtain the typical mask topography and typical photoresist topography corresponding to the typical mask design layout; The typical mask topography and the typical photoresist topography are input into the topography mapping model for supplementary training. The typical mask design layout is added to the preset trained layout database; The preset computational lithography model is added to the preset trained computational lithography model database.

7. The method as described in claim 1, characterized in that: After obtaining the photoresist topography corresponding to the mask topography, the following steps are also included: A threshold condition is added to the photoresist morphology image to obtain the photoresist pattern outline.

8. An apparatus for use in the method according to any one of claims 1-7, characterized in that: The device includes: Input module: Obtains the mask design layout to be processed and the mask topography image corresponding to the mask design layout to be processed; Processing module: Obtains the corresponding photoresist topography from the mask topography based on a preset trained topography mapping model.

9. A computer device, characterized in that: It includes a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method as described in claim 1.

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