Wafer bonding dynamic calibration method and device

Abstract

The application discloses a wafer bonding dynamic calibration method and device, and the method comprises the following steps: conveying a wafer to a corresponding wafer carrier device, obtaining wafer information, and the wafer information comprises the position of an alignment mark under a wafer coordinate system; judging whether the positions of an alignment mark recognition device and a calibration mark are all aligned with the position of the corresponding wafer alignment mark, if not, respectively controlling the alignment mark recognition device and the calibration mark to move to be aligned with the corresponding wafer alignment mark, and then respectively calibrating the deviation of the alignment mark recognition device through the calibration mark; the alignment mark recognition device respectively identifies the alignment mark of the wafer to obtain the deviation of the alignment mark, and the deviation of the alignment mark recognition device and the deviation of the alignment mark are comprehensively controlled to move the wafer, so that the alignment marks of a pair of wafers are aligned. The calibration mark and the alignment mark recognition device are synchronously moved to the same position of the alignment mark in advance, which can greatly reduce the alignment error, thereby improving the wafer bonding precision.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and more specifically, to a method and apparatus for dynamic calibration of wafer bonding. Background Technology

[0002] As the integration density of semiconductor integrated circuits increases, it becomes increasingly difficult to improve the integration density of transistors in two-dimensional semiconductor chips. Therefore, in order to increase the integration density of transistors in semiconductor chips and reduce external leads, three-dimensional integrated circuits composed of multiple stacked layers have emerged. The emergence of three-dimensional integrated circuits has broken through the physical and material limitations of existing integrated circuits. Three-dimensional integrated circuits are multiple planar devices stacked together. During the manufacturing process, vertical interconnection between multiple chips is achieved through bonding technology, which increases the chip space and improves the transistor integration density. Before the packaging process, the chips are located within the wafer, and the stacking effect between chips is achieved through wafer-to-wafer bonding.

[0003] The bonding process in semiconductor wafer manufacturing involves aligning and bonding two wafers to achieve device alignment. Therefore, precise position measurement and control are crucial for the two wafers used in the bonding process. The bonding process comprises two parts: alignment and bonding. Alignment mark recognition devices are used to collect alignment marks from the upper and lower wafers. During the alignment process, these devices are first calibrated using calibration marks to determine the positional deviation of the alignment mark recognition devices on each wafer.

[0004] During the calibration process, the alignment mark recognition device is first moved to the position of the calibration mark, and the deviation between the positions of the two wafer alignment mark recognition devices is calculated. Then, based on the wafer alignment mark information, the alignment mark recognition device is moved to the alignment mark position of the wafer, and the alignment mark is collected. The deviation of the alignment mark recognition device and the difference of the alignment mark are combined to indicate the wafer alignment, thereby performing the bonding operation.

[0005] However, in existing technologies, calibration marks are fixedly mounted on the wafer alignment device. Each calibration inevitably requires controlling the movement of the alignment mark recognition device. When the alignment mark position on a batch of wafers is not aligned with the device's calibration position, or when the distance between the two marks is different, the alignment mark recognition device moves from its current position to the calibration mark position for calibration during the alignment process, and then back to the wafer's alignment mark recognition position. This introduces additional motion errors, which are very easy to introduce into nanometer-level control processes.

[0006] Currently, only patent CN201880000756.2 reduces errors through compensation during the alignment process; no method has yet been found to address errors caused by the movement of the alignment mark recognition position. Summary of the Invention

[0007] The problem solved by the present invention is to eliminate the movement of the alignment mark identification device during the calibration process of the same batch of wafers, thereby reducing the amount of error introduced during the alignment process and improving the alignment accuracy.

[0008] A dynamic alignment method for wafer bonding, used to align a pair of vertically arranged wafers, includes:

[0009] The wafer is transferred to the corresponding wafer carrier device, and wafer information is obtained, including the alignment mark position in the wafer coordinate system;

[0010] Determine whether the positions of the alignment mark recognition device and the calibration mark are aligned with the positions of the alignment marks on the corresponding wafer. If they are not aligned, control the alignment mark recognition device and the calibration mark to move to be aligned with the alignment marks on the corresponding wafer. Then, calibrate the deviation of the alignment mark recognition device using the calibration mark.

[0011] The alignment mark recognition device identifies the alignment marks on the wafers to obtain the deviation of the alignment marks. The deviation of the alignment mark recognition device and the deviation of the alignment marks are combined to control the wafer movement so that the alignment marks of a pair of wafers are aligned.

[0012] Optionally, before determining whether the position of the alignment mark recognition device and the position of the calibration mark are aligned with the alignment mark position of the wafer, the method further includes:

[0013] The wafer coordinate system is a coordinate system with the wafer center as the center and the positioning notch as the Y direction. The coordinates of the alignment marks on the wafer are converted into coordinates in the alignment device coordinate system through a coordinate system transformation method.

[0014] Optionally, the calibration mark is mounted on a calibration mark movement control device, which is a slide rail.

[0015] Optionally, the calibration mark is a calibration mark strip with graduations, and the calibration mark is moved by changing the graduations on the calibration mark strip.

[0016] Optionally, the alignment mark recognition device uses an image template recognition algorithm to calculate the deviation of the alignment mark in the alignment device coordinate system.

[0017] Optionally, the alignment mark recognition device includes a first recognition sensor above and a second recognition sensor below, wherein the first recognition sensor is used to recognize alignment marks on the upper wafer and the second recognition sensor is used to recognize alignment marks on the lower wafer.

[0018] Optionally, the alignment device controls the position of the wafer carrier holding the upper wafer so that the alignment mark of the upper wafer is aligned with the first identification sensor. The alignment device also controls the position of the wafer carrier holding the lower wafer so that the alignment mark of the lower wafer is aligned with the second identification sensor, thereby obtaining the alignment mark deviation of a pair of wafers.

[0019] Optionally, there may be at least two alignment marks on any wafer.

[0020] The wafer information acquisition module is used to acquire wafer information after the wafer is transferred to the corresponding wafer carrier device. The wafer information includes the alignment mark position in the wafer coordinate system.

[0021] The alignment judgment module is used to determine whether the positions of the alignment mark recognition device and the calibration mark are aligned with the alignment mark positions of the corresponding wafer. If they are not aligned, the alignment mark recognition device and the calibration mark are controlled to move to be aligned with the alignment marks of the corresponding wafer. Then, the deviation of the alignment mark recognition device is calibrated by the calibration mark.

[0022] The wafer alignment module enables the alignment mark recognition device to identify the alignment marks on the wafer and obtain the deviation of the alignment marks. The deviation of the alignment mark recognition device and the deviation of the alignment marks are combined to control the wafer movement so that the alignment marks of a pair of wafers are aligned.

[0023] This invention moves the calibration mark and alignment mark recognition device to the same position as the alignment mark in advance. In this way, the alignment mark recognition device will not be moved during the alignment of wafers in the same batch. The error caused by the movement of the alignment mark recognition device accounts for a large proportion of the error in the entire alignment process. Therefore, reducing this movement can greatly reduce the alignment error and improve the wafer bonding accuracy. Attached Figure Description

[0024] The above features and technical advantages of the present invention will become clearer and easier to understand by describing its embodiments in conjunction with the accompanying drawings.

[0025] Figure 1 This is a flowchart illustrating the wafer bonding dynamic calibration method according to an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram showing the alignment of the calibration marks and alignment marks on the first wafer according to an embodiment of the present invention;

[0027] Figure 3 This is a schematic diagram showing the alignment of the calibration marks and alignment marks on the second wafer according to an embodiment of the present invention;

[0028] Figure 4 This is a schematic diagram indicating that the calibration marks and alignment marks are not aligned;

[0029] Figure 5 This is a schematic diagram illustrating that the alignment mark spacing on the wafer is relatively wide in an embodiment of the present invention;

[0030] Figure 6 This is a schematic diagram illustrating an alignment mark recognition device according to an embodiment of the present invention. Detailed Implementation

[0031] Embodiments of the present invention will now be described with reference to the accompanying drawings. Those skilled in the art will recognize that the described embodiments can be modified in various ways or combinations thereof without departing from the spirit and scope of the invention. Therefore, the drawings and description are illustrative in nature and not intended to limit the scope of the claims. Furthermore, in this specification, the drawings are not drawn to scale, and the same reference numerals denote the same parts.

[0032] The wafer bonding dynamic alignment method in this embodiment is used to align a pair of vertically arranged wafers, such as... Figure 1 As shown, it includes:

[0033] Step S1: Transfer the wafer and obtain wafer information, including the alignment mark positions of the wafer. Transferring the wafer refers to transferring the wafer to the wafer carrier device 2, such as... Figure 2 , Figure 3 In the alignment device 1, a first wafer 31 is mounted on one wafer carrier 2, and a second wafer 32 is mounted on the other, to bond the first wafer 31 and the second wafer 32 together. Each wafer has at least two alignment marks, with the alignment marks of a pair of wafers corresponding to each other. In this embodiment, the alignment marks of the first wafer 31 include first wafer alignment marks 311 and 312, and the alignment marks of the second wafer 32 include second wafer alignment marks 321 and 322. Specifically, the first wafer alignment mark 311 corresponds to the second wafer alignment mark 321, and the first wafer alignment mark 312 corresponds to the second wafer alignment mark 322.

[0034] Furthermore, the alignment mark position is calculated using wafer information. Specifically, the wafer information includes the coordinates of the wafer alignment mark in a coordinate system (wafer coordinate system) with the wafer center as the center and the positioning notch (notch opening) as the Y direction. The coordinates of the alignment mark on the wafer can be converted into coordinates in the alignment device coordinate system using a coordinate system transformation method. The specific transformation method will not be detailed here.

[0035] Step S2: Based on the alignment mark position, determine whether the position of the alignment mark recognition device and the position of the calibration mark are aligned with the alignment mark position of the corresponding wafer. If they are aligned, proceed to step S4; otherwise, proceed to step S3. The alignment mark recognition device can be a mobile image recognition device that moves for alignment by acquiring and recognizing the alignment marks. One alignment mark recognition device is set up for each alignment mark, such as... Figure 4 In this configuration, each alignment mark identification device 5 includes an upper first identification sensor 51 and a lower second identification sensor 52. The upper first identification sensor 51 is used to identify the alignment marks on the upper wafer, and the lower second identification sensor 52 is used to identify the alignment marks on the lower wafer. Each wafer also has corresponding calibration marks. For the first wafer, calibration marks 41 and 42 are provided, and for the second wafer, another pair of calibration marks 41 and 42 are provided. These calibration marks can be movable, and the calibration marks 41 and 42 are mounted on a calibration mark movement control device 4, which controls the movement of the calibration marks.

[0036] like Figure 4 As shown, if the calibration marks 41 and 42 of the first wafer are not aligned with the alignment marks of the first wafer, the calibration marks 41 and 42 can be moved to be aligned with them by the calibration mark movement control device 4.

[0037] The calibration mark movement control device 4 can be, for example, a slide rail, and the calibration marks 41 and 42 can be marking points on an object that slides on the slide rail. Alternatively, a graduated strip of calibration marks can be used, and the movement of the calibration marks can be achieved by changing the scale on the calibration mark strip.

[0038] Step S3: Control the alignment mark recognition device and the calibration mark to move to align with the alignment mark of the corresponding wafer.

[0039] Based on the positional deviations between the alignment mark recognition device, the calibration mark, and the alignment mark, the alignment mark recognition device and the calibration mark are moved to align with the alignment mark of the corresponding wafer.

[0040] The alignment mark recognition device may use image recognition to determine the alignment mark, for example, by using an image template recognition algorithm to calculate the precise deviation of the alignment mark in the alignment device coordinate system.

[0041] For each wafer, align the alignment mark identification point with the alignment mark, and also move the calibration mark to align with the alignment mark. The alignment result is as follows. Figure 2 , Figure 3 As shown, for the first wafer at the top, alignment mark 311 and calibration mark 41 are on the same dashed line, and alignment mark 312 and calibration mark 42 are on the same dashed line. For the second wafer at the bottom, alignment mark 321 and calibration mark 41 are on the same dashed line, and alignment mark 322 and calibration mark 42 are on the same dashed line.

[0042] Step S4: The deviation between the two alignment mark recognition devices is calibrated using calibration marks;

[0043] In step S5, a pair of alignment mark recognition devices respectively recognize the alignment marks of a pair of wafers, and calculate the deviation of the recognized alignment marks through an image template recognition algorithm. The wafer movement is controlled by combining the deviation of the alignment mark recognition devices and the deviation of the alignment marks, so that the alignment marks of the two wafers are aligned, thereby enabling the bonding operation to be performed.

[0044] The process of the alignment mark recognition device recognizing alignment marks is explained below. The alignment device can control the position of the wafer carrier 2 carrying the first wafer 31, so that the first wafer alignment marks 311 and 312 of the first wafer are aligned with the first recognition sensor 51. The alignment device can also control the position of the wafer carrier 2 carrying the second wafer 32, so that the second wafer alignment marks 321 and 322 of the second wafer are aligned with the second recognition sensor 52. After alignment, the position of the wafer carrier 2 can be recorded. Furthermore, the alignment device can control the wafer carrier 2 to move the first wafer and the second wafer horizontally, thereby aligning the pair of wafers with the alignment marks as a reference.

[0045] In this embodiment, the positions of the alignment marks are different when aligning wafers from different batches, such as... Figure 3 This is a schematic diagram showing a narrow spacing between alignment marks on a wafer; Figure 5This diagram illustrates a wafer with relatively wide alignment mark spacing, but the alignment mark positions are identical for wafers in the same batch. By pre-synchronizing the calibration marks and alignment mark recognition devices to the same position on the alignment marks, the alignment mark recognition device will not repeatedly move between the calibration marks and wafer alignment marks during wafer alignment and bonding within the same batch. This eliminates the need for movement control of the alignment mark recognition device during the calibration process. Since the error caused by the movement of the alignment mark recognition device accounts for a large proportion of the overall alignment error, reducing this movement can significantly reduce alignment errors and improve wafer bonding accuracy.

[0046] The present invention also provides a wafer bonding dynamic calibration device, comprising the following modules, each module being stored in a storage medium and executed by a processor to perform the same function as described above. The device specifically includes:

[0047] The wafer information acquisition module is used to acquire wafer information after the wafer is transferred to the corresponding wafer carrier device. The wafer information includes the alignment mark position in the wafer coordinate system.

[0048] The alignment judgment module is used to determine whether the positions of the alignment mark recognition device and the calibration mark are aligned with the alignment mark positions of the corresponding wafer. If they are not aligned, the alignment mark recognition device and the calibration mark are controlled to move to be aligned with the alignment marks of the corresponding wafer. Then, the deviation of the alignment mark recognition device is calibrated by the calibration mark.

[0049] The wafer alignment module enables the alignment mark recognition device to identify the alignment marks on the wafer and obtain the deviation of the alignment marks. The deviation of the alignment mark recognition device and the deviation of the alignment marks are combined to control the wafer movement so that the alignment marks of a pair of wafers are aligned.

[0050] The present invention also provides an electronic device. In this embodiment, the wafer bonding dynamic calibration method can be applied to the electronic device to determine the position of the wafer alignment mark. Specifically, for electronic devices that require wafer bonding dynamic calibration, the wafer bonding dynamic calibration function provided by the method of this application can be directly integrated into the electronic device, or it can be run on the electronic device in the form of a software development kit.

[0051] The hardware architecture for implementing the wafer bonding dynamic calibration method is described below. The electronic device includes a memory and at least one processor. The memory stores program code and various data, such as the wafer bonding dynamic calibration program installed in the electronic device, and enables high-speed, automatic access to the program or data during the operation of the electronic device. The memory includes a read-only memory, a programmable read-only memory, an erasable programmable read-only memory, a programmable read-only memory, an electronically erasable rewritable read-only memory, a read-only optical disc or other optical disc storage, a disk storage, a magnetic tape storage, or any other computer-readable storage medium capable of carrying or storing data.

[0052] The at least one processor can be composed of integrated circuits, such as a single packaged integrated circuit or multiple integrated circuits with the same or different functions, including combinations of one or more central processing units, microprocessors, digital processing chips, graphics processing units, and various control chips. The at least one processor is the control core of the electronic device, connecting various components of the entire electronic device through various interfaces and lines. It executes programs or modules stored in the memory and calls data stored in the memory to perform various functions of the electronic device and process data, such as performing wafer bonding dynamic calibration.

[0053] The wafer bonding dynamic calibration method can be divided into multiple functional modules consisting of program code segments. Each functional module is a different program code corresponding to the above division of the wafer bonding dynamic calibration method. The program code of each program segment can be stored in memory and executed by at least one processor to realize the wafer bonding dynamic calibration method.

[0054] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for dynamic alignment of wafer bonding, used to align a pair of vertically arranged wafers, characterized in that, include: The wafer is transferred to the corresponding wafer carrier device, and wafer information is obtained, including the alignment mark position in the wafer coordinate system; Determine whether the positions of the alignment mark recognition device and the calibration mark are aligned with the positions of the alignment marks on the corresponding wafer. If they are not aligned, control the alignment mark recognition device and the calibration mark to move to be aligned with the alignment marks on the corresponding wafer. Then, calibrate the deviation of the alignment mark recognition device using the calibration mark. The alignment mark recognition device identifies the alignment marks on the wafer to obtain the deviation of the alignment marks. The deviation from both the alignment mark recognition device and the alignment mark deviation are combined to control wafer movement, ensuring that the alignment marks of a pair of wafers are aligned. The calibration mark is set on the calibration mark movement control device, which is a slide rail, and the calibration mark is a mark point that slides on the slide rail.

2. The wafer bonding dynamic calibration method according to claim 1, characterized in that, Before determining whether the positions of the alignment mark recognition device and the calibration marks are aligned with the alignment mark positions on the wafer, the process also includes: The wafer coordinate system is a coordinate system with the wafer center as the center and the positioning notch as the Y direction. The coordinates of the alignment marks on the wafer are converted into coordinates in the alignment device coordinate system through a coordinate system transformation method.

3. The wafer bonding dynamic calibration method according to claim 1, characterized in that, The calibration mark is a graduated calibration mark strip, and the calibration mark is moved by changing the scale on the calibration mark strip.

4. The wafer bonding dynamic calibration method according to claim 1, characterized in that, The alignment mark recognition device uses an image template recognition algorithm to calculate the deviation of the alignment mark in the alignment device coordinate system.

5. The wafer bonding dynamic calibration method according to claim 1, characterized in that, The alignment mark recognition device includes a first recognition sensor at the top and a second recognition sensor at the bottom. The first recognition sensor is used to recognize the alignment marks on the upper wafer, and the second recognition sensor is used to recognize the alignment marks on the lower wafer.

6. The wafer bonding dynamic calibration method according to claim 5, characterized in that, The alignment device controls the position of the wafer carrier holding the upper wafer, so that the alignment mark of the upper wafer is aligned with the first identification sensor. The alignment device also controls the position of the wafer carrier holding the lower wafer, so that the alignment mark of the lower wafer is aligned with the second identification sensor, thereby obtaining the alignment mark deviation of a pair of wafers.

7. The wafer bonding dynamic calibration method according to claim 1, characterized in that, Each wafer must have at least two alignment marks.

8. A wafer bonding dynamic calibration device, characterized in that, The wafer information acquisition module is used to acquire wafer information after the wafer is transferred to the corresponding wafer carrier device. The wafer information includes the alignment mark position in the wafer coordinate system. The alignment judgment module is used to determine whether the positions of the alignment mark recognition device and the calibration mark are aligned with the alignment mark positions of the corresponding wafer. If they are not aligned, the alignment mark recognition device and the calibration mark are controlled to move to be aligned with the alignment marks of the corresponding wafer. Then, the deviation of the alignment mark recognition device is calibrated by the calibration mark. The wafer alignment module enables the alignment mark recognition device to identify the alignment marks on the wafer and obtain the deviation of the alignment marks. The module combines the deviation from the alignment mark recognition device with the deviation of the alignment marks to control wafer movement, thereby aligning the alignment marks of a pair of wafers. The calibration mark is set on the calibration mark movement control device, which is a slide rail, and the calibration mark is a mark point that slides on the slide rail.

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