A method, device, equipment and storage medium for determining storage capacity

Abstract

The present application discloses a method, apparatus, device, and storage medium for determining memory capacity, comprising: storing first target data in a preset position of a target memory; determining an offset increment, and determining a position at a distance from the preset position equal to the offset increment as the offset position; obtaining second target data at the offset position, and determining whether the first target data and the second target data are consistent. If so, determining the offset increment as the capacity of the target memory. It can be seen that the present application writes data to a preset position and reads data from an offset position. When it is determined that the read and write data are consistent, the position difference between the preset position and the offset position is determined as the memory capacity, thereby avoiding deviations caused by static detection of memory capacity through hardware codes, RDID, or REMS, and can quickly and accurately detect the storage capacity of the memory.

Description

Technical Field

[0001] The present invention relates to the field of data storage technology, and in particular to a method, device, equipment and storage medium for determining memory capacity. Background Art

[0002] Existing SRAM or DRAM memories generally use hardware code to record the memory capacity. For flash memories such as SPI or NOR Flash, RDID or REMS is generally used to calculate the memory ID and a corresponding table is created in the firmware ( Figure 1 、 Figure 2 As shown). Then, the Flash capacity is obtained through the ID of the memory. Specifically, the ID is first obtained through RDID or REMS, where ID is the ID of the manufacturer or device. Then the ID is checked with the built-in table to determine whether the ID meets the requirements. If the ID meets the requirements, the capacity is reported, the determination is successful, and the process ends. Otherwise, it is determined whether there is a next ID. If there is a next ID, the ID is checked cyclically. If not, it is determined to be a failure and the process ends. Although the above method can detect the capacity of the memory, the accuracy and dynamism of the detection results cannot be guaranteed due to the possibility of lag and other deviations in the table data.

[0003] Therefore, how to quickly and accurately determine the storage capacity of a memory is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the Invention

[0004] In view of this, the present invention aims to provide a method, apparatus, device, and storage medium for determining memory capacity, which can quickly and accurately detect the storage capacity of a memory. The specific solution is as follows:

[0005] A first aspect of the present application provides a method for determining memory capacity, comprising:

[0006] storing the first target data in a preset location of the target memory;

[0007] Determining an offset increment, and determining a position at a distance from the preset position by the offset increment as an offset position;

[0008] The second target data at the offset position is acquired, and it is determined whether the first target data is consistent with the second target data. If so, the offset increment is determined as the capacity of the target memory.

[0009] Optionally, after determining whether the first target data is consistent with the second target data, the method further includes:

[0010] If the first target data is inconsistent with the second target data, determining a position at a distance from the offset position by the offset increment as a new offset position;

[0011] Acquire the third target data at the new offset position, and determine whether the third target data is consistent with the first target data. If so, determine the offset increment between the preset position and the new offset position as the capacity of the target memory.

[0012] Optionally, after determining whether the first target data is consistent with the second target data, the method further includes:

[0013] If the first target data is inconsistent with the second target data, a new offset increment is determined, and a position at a distance from the preset position by the new offset increment is determined as a new offset position;

[0014] Acquire the fourth target data at the new offset position, and determine whether the fourth target data is consistent with the first target data. If so, determine the new offset increment as the capacity of the target memory.

[0015] Optionally, the memory capacity determination method further includes:

[0016] The position of the lowest address of the processor bus connected to the target memory is determined as the preset position, so as to store the first target data in the preset position of the target memory.

[0017] Optionally, the offset increment is 1K*2 n ; where n is a non-negative integer.

[0018] Optionally, the memory capacity determination method further includes:

[0019] The value of n is dynamically determined according to the current capacity of the target memory to obtain an offset increment corresponding to the value of n.

[0020] Optionally, the target memory is composed of a physical memory and a plurality of virtual memories with the same capacity as the physical memory; wherein the virtual memories back up the storage data of the physical memory at the same location.

[0021] A second aspect of the present application provides a memory capacity determination device, comprising:

[0022] A storage module, configured to store the first target data in a preset location of the target memory;

[0023] an offset determination module, configured to determine an offset increment, and determine a position at a distance from the preset position by the offset increment as an offset position;

[0024] An acquisition and judgment module is used to acquire the second target data at the offset position and judge whether the first target data is consistent with the second target data; if so, the offset increment is determined as the capacity of the target memory.

[0025] A third aspect of the present application provides an electronic device, comprising a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the aforementioned memory capacity determination method.

[0026] A fourth aspect of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions. When the computer-executable instructions are loaded and executed by a processor, the aforementioned memory capacity determination method is implemented.

[0027] In this application, the first target data is first stored in a preset position of the target memory; then an offset increment is determined, and the position at a distance from the preset position equal to the offset increment is determined as the offset position; finally, the second target data at the offset position is obtained, and it is determined whether the first target data and the second target data are consistent. If so, the offset increment is determined as the capacity of the target memory. It can be seen that this application writes data to the preset position and reads data from the offset position. When it is determined that the read and write data are consistent, the position difference between the preset position and the offset position is determined as the capacity of the memory, avoiding deviations caused by static detection of the memory capacity through hardware code, and can quickly and accurately detect the storage capacity of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0029] Figure 1 An internal inspection table for calculating the existing memory capacity provided by this application;

[0030] Figure 2 An internal inspection table for calculating the existing memory capacity provided by this application;

[0031] Figure 3 A flow chart of a method for determining memory capacity provided by this application;

[0032] Figure 4 A schematic diagram of a specific memory architecture provided for this application;

[0033] Figure 5 A schematic diagram of the structure of a memory capacity determination device provided in this application;

[0034] Figure 6 This is a structural diagram of an electronic device for determining memory capacity provided by this application. DETAILED DESCRIPTION

[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0036] Existing SRAM or DRAM memories generally use hardware code to record the memory capacity. For flash memories such as SPI or NOR Flash, RDID or REMS is generally used to calculate the memory ID and a corresponding table is created in the firmware ( Figure 1 、 Figure 2 As shown). Then, the Flash capacity is obtained through the ID of the memory. Although the above approach can detect the capacity of the memory, the accuracy and dynamism of the detection results cannot be guaranteed due to the possible lag and other deviations in the table data. In response to the above technical defects, the present application provides a memory capacity determination solution, which writes data to a preset position and reads data from an offset position. When it is determined that the read and write data are consistent, the position difference between the preset position and the offset position is determined as the capacity of the memory, avoiding deviations in static detection of memory capacity through hardware code, RDID or REMS, and can quickly and accurately detect the storage capacity of the memory.

[0037] Figure 3 This is a flow chart of a method for determining memory capacity provided by an embodiment of the present application. Figure 3 As shown, the memory capacity determination method includes:

[0038] S11: storing the first target data in a preset location of the target memory.

[0039] In this embodiment, first target data is first stored in a preset location of the target memory. The first target data can be a simple, non-repeating double-word number, such as "01234," or a random number derived from a default value at power-up. The default value varies for each device. Furthermore, the lowest address location on the processor bus connected to the target memory is determined as the preset location, and the first target data is stored in the preset location of the target memory.

[0040] In this embodiment, the target memory is composed of a physical memory and a plurality of virtual memories with the same capacity as the physical memory; wherein the virtual memories back up the data stored in the physical memory at the same location. Figure 4 As shown, a feature of Memory Windows is that when the maximum range of the entity is exceeded, it will restart from the entity offset position 0x0000_0000. In other words, Memory Windows provides more memory than the physical capacity ( Figure 4 Solid line) with larger virtual capacity ( Figure 4 (shown by the dotted line). In other words, there is a physical memory and a virtual memory, and the virtual memory has multiple zones, each with a capacity equal to the capacity of the physical memory. For every piece of data stored in a location in the physical memory, there is a copy of that data stored in a corresponding location in each zone of the virtual memory. There is an offset between adjacent copies, and this offset is equal to the capacity of the physical memory.

[0041] S12: Determine an offset increment, and determine a position at a distance from the preset position by the offset increment as the offset position.

[0042] In this embodiment, an offset increment is determined, and a position at a distance from the preset position equal to the offset increment is determined as the offset position. n The offset increment is set to 1K*2. n , where n is a non-negative integer, that is, a suitable positive integer, including 0. The offset position is an offset increment away from the preset position. Furthermore, this embodiment dynamically determines the value of n based on the current capacity of the target memory to obtain the offset increment corresponding to the value of n. In other words, the value of n is related to the capacity. Since the capacity is automatically detected, if the offset position exceeds the capacity, the hardware is likely damaged and requires repair by engineering personnel.

[0043] S13: Acquire the second target data at the offset position, and determine whether the first target data is consistent with the second target data; if so, determine the offset increment as the capacity of the target memory.

[0044] In this embodiment, second target data at the offset position is obtained, and a determination is made as to whether the first target data and the second target data are consistent. If so, the offset increment is determined as the capacity of the target memory. In one embodiment, if the first target data and the second target data are inconsistent, a position that is the distance from the offset position by the offset increment is determined as a new offset position. Third target data at the new offset position is then obtained, and a determination is made as to whether the third target data and the first target data are consistent. If so, the offset increment between the preset position and the new offset position is determined as the capacity of the target memory. In another embodiment, if the first target data and the second target data are inconsistent, a new offset increment is determined, and a position that is the distance from the preset position by the new offset increment is determined as the new offset position. Fourth target data at the new offset position is then obtained, and a determination is made as to whether the fourth target data and the first target data are consistent. If so, the new offset increment is determined as the capacity of the target memory.

[0045] As can be seen, the embodiment of the present application first stores the first target data in a preset position of the target memory; then determines an offset increment, and determines the position at a distance from the preset position equal to the offset increment as the offset position; finally, obtains the second target data at the offset position, and determines whether the first target data and the second target data are consistent. If so, the offset increment is determined as the capacity of the target memory. The embodiment of the present application writes data to the preset position and reads data from the offset position. When it is determined that the read and write data are consistent, the position difference between the preset position and the offset position is determined as the capacity of the memory, thereby avoiding deviations caused by static detection of the memory capacity through hardware code, and can quickly and accurately detect the storage capacity of the memory.

[0046] See also Figure 5 As shown, the embodiment of the present application also discloses a memory capacity determination device, including:

[0047] The storage module 11 is configured to store the first target data in a preset location of the target memory;

[0048] an offset determination module 12, configured to determine an offset increment, and determine a position at a distance from the preset position by the offset increment as an offset position;

[0049] The acquisition and judgment module 13 is configured to acquire the second target data at the offset position and judge whether the first target data is consistent with the second target data; if so, determine the offset increment as the capacity of the target memory.

[0050] As can be seen, the embodiment of the present application first stores the first target data in a preset position of the target memory; then determines an offset increment, and determines the position at a distance from the preset position equal to the offset increment as the offset position; finally, obtains the second target data at the offset position, and determines whether the first target data and the second target data are consistent. If so, the offset increment is determined as the capacity of the target memory. The embodiment of the present application writes data to the preset position and reads data from the offset position. When it is determined that the read and write data are consistent, the position difference between the preset position and the offset position is determined as the capacity of the memory, thereby avoiding deviations caused by static detection of the memory capacity through hardware code, and can quickly and accurately detect the storage capacity of the memory.

[0051] In some specific embodiments, the memory capacity determination device further includes:

[0052] a preset position determining module, configured to determine the position of the lowest address of the processor bus connected to the target memory as the preset position, so as to store the first target data in the preset position of the target memory;

[0053] a first loop module, configured to, if the first target data is inconsistent with the second target data, determine a position at a distance from the offset position by the offset increment as a new offset position, obtain third target data at the new offset position, and determine whether the third target data is consistent with the first target data; if so, determine the offset increment between the preset position and the new offset position as the capacity of the target memory;

[0054] The second loop module is used to determine a new offset increment if the first target data is inconsistent with the second target data, and determine the position at a distance from the preset position by the new offset increment as the new offset position, and obtain the fourth target data at the new offset position, and determine whether the fourth target data is consistent with the first target data. If so, the new offset increment is determined as the capacity of the target memory.

[0055] In some specific embodiments, the offset increment is 1K*2 n , wherein, when n is a non-negative integer, the memory capacity determination device is further configured to dynamically determine the value of n according to the current capacity of the target memory to obtain an offset increment corresponding to the value of n.

[0056] Furthermore, an embodiment of the present application also provides an electronic device. Figure 6 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content in the diagram should not be considered as any limitation to the scope of application of the present application.

[0057] Figure 6 This is a schematic diagram of the structure of an electronic device 20 provided in an embodiment of the present application. The electronic device 20 may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps of the memory capacity determination method disclosed in any of the aforementioned embodiments.

[0058] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and the external device. The communication protocol it follows is any communication protocol that can be applied to the technical solution of this application and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world. Its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0059] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or CD, etc. The resources stored thereon may include an operating system 221, a computer program 222 and data 223, etc. The storage method can be temporary storage or permanent storage.

[0060] The operating system 221 is used to manage and control the hardware devices and computer program 222 on the electronic device 20, enabling the processor 21 to operate and process the massive amount of data 223 in the memory 22. The operating system 221 can be Windows Server, NetWare, Unix, Linux, etc. In addition to including computer programs capable of implementing the memory capacity determination method disclosed in any of the aforementioned embodiments and executed by the electronic device 20, the computer program 222 can further include computer programs capable of performing other specific tasks. The data 223 can include target data collected by the electronic device 20.

[0061] Furthermore, an embodiment of the present application also discloses a storage medium, in which a computer program is stored. When the computer program is loaded and executed by a processor, the steps of the memory capacity determination method disclosed in any of the aforementioned embodiments are implemented.

[0062] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from the other embodiments. Reference can be made to the descriptions of the identical or similar parts between the various embodiments. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the methods.

[0063] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0064] The above is a detailed introduction to the memory capacity determination method, device, equipment and storage medium provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core ideas. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

Claims

1. A method for determining memory capacity, characterized in that: include: storing the first target data in a preset location of the target memory; Determining an offset increment, and determining a position at a distance from the preset position by the offset increment as an offset position; The offset increment is dynamically determined according to the current capacity of the target memory; obtaining the second target data at the offset position, and determining whether the first target data is consistent with the second target data; if so, determining the offset increment as the capacity of the target memory; The target memory is composed of a physical memory and a plurality of virtual memories with the same capacity as the physical memory; the virtual memories back up the storage data of the physical memory at the same location.

2. The method for determining memory capacity according to claim 1, wherein: After determining whether the first target data is consistent with the second target data, the method further includes: If the first target data is inconsistent with the second target data, determining a position at a distance from the offset position by the offset increment as a new offset position; Acquire the third target data at the new offset position, and determine whether the third target data is consistent with the first target data. If so, determine the offset increment between the preset position and the new offset position as the capacity of the target memory.

3. The method for determining memory capacity according to claim 1, wherein: After determining whether the first target data is consistent with the second target data, the method further includes: If the first target data is inconsistent with the second target data, a new offset increment is determined, and a position at a distance from the preset position by the new offset increment is determined as a new offset position; Acquire the fourth target data at the new offset position, and determine whether the fourth target data is consistent with the first target data. If so, determine the new offset increment as the capacity of the target memory.

4. The method for determining memory capacity according to claim 1, wherein: Also includes: The position of the lowest address of the processor bus connected to the target memory is determined as the preset position, so as to store the first target data in the preset position of the target memory.

5. The method for determining memory capacity according to claim 1, wherein: The offset increment is 1K*2 n ; where n is a non-negative integer.

6. The method for determining memory capacity according to claim 5, wherein: Also includes: The value of n is dynamically determined according to the current capacity of the target memory to obtain an offset increment corresponding to the value of n.

7. A device for determining memory capacity, characterized in that: include: A storage module, configured to store the first target data in a preset location of the target memory; an offset determination module, configured to determine an offset increment, and determine a position at a distance from the preset position by the offset increment as an offset position; The offset increment is dynamically determined according to the current capacity of the target memory; an acquisition and judgment module, configured to acquire the second target data at the offset position, and determine whether the first target data is consistent with the second target data; if so, determining the offset increment as the capacity of the target memory; The target memory is composed of a physical memory and a plurality of virtual memories with the same capacity as the physical memory; the virtual memories back up the storage data of the physical memory at the same location.

8. An electronic device, characterized in that: The electronic device comprises a processor and a memory, wherein: The memory is used to store computer programs; The computer program is loaded and executed by the processor to implement the memory capacity determination method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that Used to store computer-executable instructions, which, when loaded and executed by a processor, implement the memory capacity determination method according to any one of claims 1 to 6.

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