High-voltage frequency converter and output voltage detection method and device thereof, and storage medium

Abstract

The application discloses a high-voltage frequency converter and an output voltage detection method and device thereof and a storage medium, wherein each phase bridge arm of the high-voltage frequency converter is composed of a plurality of H-bridge cascades, the method comprises the following steps: acquiring bus voltages of each H-bridge and three-phase currents of the high-voltage frequency converter, and determining voltage instructions of each H-bridge; determining a current direction according to the three-phase currents, and determining a bridge arm switch state of each H-bridge according to the voltage instructions; determining an output voltage of each H-bridge according to the bus voltages, the current direction and the bridge arm switch state, and determining each phase output voltage of the high-voltage frequency converter according to the output voltage of each H-bridge. The method can calculate real-time output voltages of the cascade type high-voltage frequency converter, and can realize accurate acquisition of the output voltages of the high-voltage frequency converter.

Description

Technical Field

[0001] The present invention relates to the technical field of frequency converters, and in particular to a high-voltage frequency converter and an output voltage detection method, device, and storage medium thereof. Background Art

[0002] Usually, the output voltage sampling of the high-voltage inverter is realized by using high-voltage resistor voltage division to collect voltage or high-voltage resistor current limiting to collect current. Figure 1 As shown, for the U-phase output voltage of the high-voltage inverter, high-voltage resistors Rux, Ru(x-1), ..., Ru1 are used for voltage division, and the voltage at point A is collected to obtain the sampling voltage of the U-phase output voltage; for the V-phase output voltage of the high-voltage inverter, high-voltage resistors Rvx, Rv(x-1), ..., Rv1 are used for voltage division, and the voltage at point B is collected to obtain the sampling voltage of the V-phase output voltage; for the W-phase output voltage of the high-voltage inverter, high-voltage resistors Rwx, Rw(x-1), ..., Rw1 are used for voltage division, and the voltage at point C is collected to obtain the sampling voltage of the W-phase output voltage.

[0003] After using high-voltage resistors for voltage division or current limiting, the sampling range must be matched to the inverter's entire output voltage range. However, when the inverter is outputting at a low frequency or identifying motor parameters, the output voltage is low, often less than 1% of the motor's rated voltage. Using high-voltage resistors for voltage division or current limiting to sample the output voltage in these situations will result in significant errors. High-performance inverters operating in vector mode require precise control of the output voltage to achieve precise control of motor torque, which requires accurate calculation of the inverter's output voltage. However, using high-voltage resistors for voltage division or current limiting to sample the output voltage cannot meet these high-precision requirements. Summary of the Invention

[0004] The present invention aims to at least partially address one of the technical problems in the related art. To this end, a first object of the present invention is to provide a method for detecting the output voltage of a high-voltage inverter. This method can accurately obtain the output voltage of the high-voltage inverter, meeting the requirements for high-precision output voltage.

[0005] A second objective of the present invention is to provide a high-voltage frequency converter.

[0006] A third object of the present invention is to provide a computer-readable storage medium.

[0007] A fourth object of the present invention is to provide an output voltage detection device for a high-voltage inverter.

[0008] To achieve the above-mentioned objectives, an embodiment of the first aspect of the present invention proposes a method for detecting the output voltage of a high-voltage inverter, wherein each phase arm of the high-voltage inverter is composed of multiple H-bridges in cascade. The method includes: obtaining the bus voltage of each H-bridge and the three-phase current of the high-voltage inverter, and determining the voltage instruction of each H-bridge; determining the current direction according to the three-phase current, and determining the bridge arm switching state of each H-bridge according to the voltage instruction; determining the output voltage of each H-bridge according to the bus voltage, current direction and bridge arm switching state, and determining the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge.

[0009] According to the output voltage detection method of the high-voltage inverter according to the embodiment of the present invention, by obtaining the bus voltage of each H-bridge in each phase bridge arm of the high-voltage inverter and the three-phase current of the high-voltage inverter, and determining the voltage instruction of each H-bridge, and determining the current direction according to the three-phase current, and determining the bridge arm switching state of each H-bridge according to the voltage instruction, and determining the output voltage of each H-bridge according to the bus voltage, current direction and bridge arm switching state, and determining the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge, the output voltage of the high-voltage inverter can be accurately obtained to meet the needs of high-precision output voltage occasions.

[0010] According to one embodiment of the present invention, determining the voltage instruction of each H-bridge includes: comparing the modulated wave with the triangular carrier wave, and determining the voltage instruction according to the comparison result.

[0011] According to one embodiment of the present invention, determining a voltage instruction based on a comparison result includes: when the count value of the modulation wave is greater than 0, if the count value of the modulation wave is greater than the count value of the triangular carrier, determining the voltage instruction to be +Udc; if the count value of the modulation wave is less than or equal to the count value of the triangular carrier, determining the voltage instruction to be 0, wherein Udc is the bus voltage; when the count value of the modulation wave is less than or equal to 0, if the count value of the modulation wave is less than the count value of the triangular carrier, determining the voltage instruction to be -Udc; if the count value of the modulation wave is greater than or equal to the count value of the triangular carrier, determining the voltage instruction to be 0.

[0012] According to one embodiment of the present invention, the switching state of each bridge arm of the H-bridge is determined according to the voltage instruction, including: when the voltage instruction is +Udc, the upper tube of the left bridge arm and the lower tube of the right bridge arm of the corresponding H-bridge are turned on, where Udc is the bus voltage; when the voltage instruction is -Udc, the lower tube of the left bridge arm and the upper tube of the right bridge arm of the corresponding H-bridge are turned on; when the voltage instruction is 0, the upper tube of the right bridge arm of the corresponding H-bridge remains off, the lower tube of the right bridge arm remains on, the upper tube of the left bridge arm is switched from on to off, and the lower tube of the left bridge arm is switched from off to on, or, the upper tube of the left bridge arm of the corresponding H-bridge remains off, the lower tube of the left bridge arm remains on, the upper tube of the right bridge arm is switched from on to off, and the lower tube of the right bridge arm is switched from off to on.

[0013] According to one embodiment of the present invention, the output voltage of each H-bridge is determined based on the bus voltage, the current direction, and the bridge arm switching state, including: when the upper tube of the left bridge arm and the lower tube of the right bridge arm in any H-bridge are turned on, +Udc is used as the output voltage of the H-bridge, where Udc is the bus voltage; when the lower tube of the left bridge arm and the upper tube of the right bridge arm in any H-bridge are turned on, -Udc is used as the output voltage of the H-bridge; when the upper tube of the left bridge arm and the lower tube of the left bridge arm in any H-bridge are turned off and the lower tube of the right bridge arm is turned on, if the current direction is forward, the output voltage of the H-bridge is 0; if the current direction is reverse, +Udc is used as the output voltage of the H-bridge; when the lower tube of the left bridge arm is turned on and the upper tube of the right bridge arm and the lower tube of the right bridge arm in any H-bridge are turned off, if the current direction is forward, -Udc is used as the output voltage of the H-bridge; if the current direction is reverse, the output voltage of the H-bridge is 0.

[0014] According to one embodiment of the present invention, the output voltage of each H-bridge is determined based on the bus voltage, the current direction, and the bridge arm switch state, and further includes: when the upper tube of the left bridge arm and the lower tube of the left bridge arm are turned off, and the upper tube of the right bridge arm and the lower tube of the right bridge arm are turned off in any H-bridge, if the current direction is forward, then -Udc is used as the output voltage of the H-bridge; if the current direction is reverse, then +Udc is used as the output voltage of the H-bridge, where Udc is the bus voltage.

[0015] According to one embodiment of the present invention, the same clock signal is used when acquiring the bus voltage of each H-bridge and the three-phase current of the high-voltage inverter, and determining the voltage command of each H-bridge.

[0016] According to one embodiment of the present invention, before determining the output voltage of each H-bridge, a delay process is performed on the voltage instruction of each H-bridge.

[0017] According to one embodiment of the present invention, determining the output voltage of each phase of the high-voltage inverter based on the output voltage of each H-bridge includes: adding the output voltages of multiple H-bridges in each phase bridge arm to obtain the output voltage of each phase of the high-voltage inverter.

[0018] To achieve the above-mentioned purpose, the second aspect of the present invention proposes a high-voltage inverter, including a memory, a processor, and an output voltage detection program of the high-voltage inverter stored in the memory and runnable on the processor. When the processor executes the output voltage detection program of the high-voltage inverter, the above-mentioned output voltage detection method of the high-voltage inverter is adopted.

[0019] According to the high-voltage inverter of the embodiment of the present invention, the output voltage of the high-voltage inverter can be accurately obtained through the above-mentioned output voltage detection method of the high-voltage inverter, meeting the occasions requiring high precision of the output voltage.

[0020] To achieve the above-mentioned purpose, the third aspect of the present invention proposes a computer-readable storage medium on which an output voltage detection program of a high-voltage inverter is stored. When the output voltage detection program of the high-voltage inverter is executed by a processor, the output voltage detection method of the high-voltage inverter is adopted.

[0021] According to the computer-readable storage medium of the embodiment of the present invention, the output voltage detection method of the high-voltage inverter can accurately obtain the output voltage of the high-voltage inverter, meeting the requirements of high-precision output voltage.

[0022] To achieve the above-mentioned purpose, the fourth embodiment of the present invention proposes an output voltage detection device for a high-voltage inverter, wherein each phase bridge arm of the high-voltage inverter is composed of multiple H-bridges in cascade, and the device includes: a voltage acquisition module for acquiring the bus voltage of each H-bridge; a current acquisition module for acquiring the three-phase current of the high-voltage inverter; a voltage instruction determination module for determining the voltage instruction of each H-bridge; a voltage calculation module for determining the current direction according to the three-phase current, and determining the bridge arm switching state of each H-bridge according to the voltage instruction, as well as determining the output voltage of each H-bridge according to the bus voltage, current direction and bridge arm switching state, and determining the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge.

[0023] According to the output voltage detection device of the high-voltage inverter according to the embodiment of the present invention, the bus voltage of each H-bridge in each phase bridge arm of the high-voltage inverter is obtained through the voltage acquisition module, and the three-phase current of the high-voltage inverter is obtained through the current acquisition module, and the voltage instruction of each H-bridge is determined through the voltage instruction determination module, and the current direction is determined according to the three-phase current through the voltage calculation module, and the bridge arm switching state of each H-bridge is determined according to the voltage instruction, and the output voltage of each H-bridge is determined according to the bus voltage, current direction and bridge arm switching state, and the output voltage of each phase of the high-voltage inverter is determined according to the output voltage of each H-bridge. This can achieve accurate acquisition of the output voltage of the high-voltage inverter and meet the needs of high-precision output voltage.

[0024] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Schematic diagram of output voltage sampling of a high-voltage inverter in related technology;

[0026] Figure 2 A schematic structural diagram of a high-voltage frequency converter according to an embodiment of the present invention;

[0027] Figure 3 for Figure 2The schematic diagram of the structure of each power unit in the high-voltage inverter is shown;

[0028] Figure 4 is a flow chart of a method for detecting an output voltage of a high-voltage inverter according to an embodiment of the present invention;

[0029] Figure 5 is a schematic diagram of a modulated wave and a triangular carrier according to an embodiment of the present invention;

[0030] Figure 6 is a current flow diagram of an H-bridge according to an embodiment of the present invention;

[0031] Figure 7 is a current flow diagram of an H-bridge according to another embodiment of the present invention;

[0032] Figure 8 2 is a schematic structural diagram of an output voltage calculation function module according to an embodiment of the present invention;

[0033] Figure 9 A schematic diagram of delaying a voltage instruction according to an embodiment of the present invention;

[0034] Figure 10 FIG. 1 is a structural diagram of an output voltage detection device for a high-voltage inverter according to an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The following describes embodiments of the present invention in detail, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and are not to be construed as limiting the present invention.

[0036] In an embodiment of the present invention, each phase bridge arm of the high-voltage inverter is composed of a plurality of H-bridge cascades.

[0037] Specifically, Figure 2 This is a schematic diagram of the structure of a three-phase high-voltage inverter. Figure 2 As shown, the three-phase high-voltage inverter includes a U-phase bridge arm, a V-phase bridge arm and a W-phase bridge arm. Each phase bridge arm is composed of a plurality of cascaded power units, wherein the number of power units in each phase bridge arm is the same. The specific number can be set according to actual needs and is not limited here. For example, the U-phase bridge arm is composed of five cascaded power units A1 to A5, the V-phase bridge arm is composed of five cascaded power units B1 to B5, and the W-phase bridge arm is composed of five cascaded power units C1 to C5.

[0038] like Figure 3 As shown, each power unit may include a rectifier circuit, a bus capacitor C and an H bridge.

[0039] For example, the rectifier circuit can be a three-phase uncontrolled rectifier circuit, which can be composed of six diodes D1 to D6, wherein the anode of the first diode D1 is connected to the cathode of the second diode D2, and the connection point is connected to the first AC terminal L1 of the three-phase AC power; the anode of the third diode D3 is connected to the cathode of the fourth diode D4, and the connection point is connected to the second AC terminal L2 of the three-phase AC power; the anode of the fifth diode D5 is connected to the cathode of the sixth diode D6, and the connection point is connected to the third AC terminal L3 of the three-phase AC power; the cathodes of the first diode D1, the third diode D3, and the fifth diode D5 are connected to form the first output terminal of the three-phase uncontrolled rectifier circuit; the anode of the second diode D2, the fourth diode D4, and the sixth diode D6 are connected to form the second output terminal of the three-phase uncontrolled rectifier circuit. The three-phase uncontrolled rectifier circuit is used to rectify the input three-phase AC power to obtain direct current.

[0040] The bus capacitor C is connected between the first output terminal and the second output terminal of the three-phase uncontrolled rectifier circuit and is used for filtering the direct current output by the three-phase uncontrolled rectifier circuit.

[0041] The H-bridge can be composed of four controllable switch tubes (such as IGBTs) S1 to S4, wherein the first end of the first controllable switch tube S1 is connected to the first output end of the three-phase uncontrolled rectifier circuit, the second end of the first controllable switch tube S1 is connected to the first end of the second controllable switch tube S2, and the connection point serves as the first output end of the H-bridge, the second end of the second controllable switch tube S2 is connected to the second output end of the three-phase uncontrolled rectifier circuit; the first end of the third controllable switch tube S3 is connected to the first output end of the three-phase uncontrolled rectifier circuit, the second end of the third controllable switch tube S3 is connected to the first end of the fourth controllable switch tube S4. The two ends are connected, and the connection point serves as the second output end of the H-bridge. The second end of the fourth controlled switch tube S4 is connected to the second output end of the three-phase uncontrolled rectifier circuit; the first controlled switch tube S1 and the second controlled switch tube S2 constitute the left bridge arm of the H-bridge, and the first controlled switch tube S1 is also called the upper tube of the left bridge arm of the H-bridge, and the second controlled switch tube S2 is also called the lower tube of the left bridge arm of the H-bridge; the third controlled switch tube S3 and the fourth controlled switch tube S4 constitute the right bridge arm of the H-bridge, and the third controlled switch tube S3 is also called the upper tube of the right bridge arm of the H-bridge, and the fourth controlled switch tube S4 is also called the lower tube of the right bridge arm of the H-bridge. The H-bridge is used to invert the filtered DC power into single-phase AC power, and for the high-voltage inverter, multiple H-bridges in the same phase bridge arm (such as the U-phase bridge arm, the V-phase bridge arm, and the W-phase bridge arm) are cascaded with each other, so that multiple power units in the same phase bridge arm are cascaded with each other, that is, the output ends of multiple H-bridges are connected in series, and the AC power output by each H-bridge is connected in series on the inverter side to obtain the AC power output by the corresponding bridge arm.

[0042] like Figure 2As shown, the input end of the three-phase high-voltage inverter is equipped with a phase-shifting transformer, such as an isolated phase-shifting transformer. This isolated phase-shifting transformer converts the input high-voltage AC power into multiple groups of low-voltage AC power with different phases, which are then output to the corresponding power unit. Each power unit rectifies and inverts the input low-voltage AC power to obtain AC power. The AC power output by each power unit in the same phase bridge arm is connected in series on the inverter side to obtain the AC power of the corresponding bridge arm. Taking the U-phase bridge arm as an example, the phase-shifting transformer converts the high-voltage AC power into a first group of low-voltage AC power with a 24° phase lead and outputs it to power unit A1. It also converts the high-voltage AC power into a second group of low-voltage AC power with a 12° phase lead and outputs it to power unit A2. It also converts the high-voltage AC power into a third group of low-voltage AC power with no phase shift and outputs it to power unit A3, and so on. Power units A1 to A5 rectify and invert their respective input low-voltage AC power to output AC power. The AC power output by power units A1 to A5 is connected in series on the inverter side and serves as the AC power output of the U-phase bridge arm. The working principles of the V-phase bridge arm, the W-phase bridge arm and the U-phase bridge arm are the same and will not be described in detail here.

[0043] Typically, high-voltage inverter output voltage sampling is achieved using methods such as high-voltage resistor voltage division or current limiting. However, this method can result in significant sampling errors under certain operating conditions and cannot meet high-precision requirements. Furthermore, due to the wide output frequency range of inverters, analog sampling filter circuits typically have a fixed cutoff frequency, resulting in different sampling phase shifts at different output frequencies, further causing errors in the inverter control system.

[0044] Based on this, an embodiment of the present invention provides a high-voltage inverter and its output voltage detection method, device and storage medium. By utilizing the switching state of the bridge arm of each H-bridge (that is, the switching state of each switch tube in the left bridge arm and the right bridge arm of the H-bridge), and by detecting the bus voltage and current direction of each H-bridge, the output voltage of each H-bridge is calculated respectively, and then the output voltage of each phase bridge arm of the high-voltage inverter is reconstructed according to the output voltage of each H-bridge. This can achieve accurate acquisition of the output voltage of the high-voltage inverter and meet the needs of high-precision output voltage.

[0045] The high-voltage inverter and its output voltage detection method, device and storage medium provided by the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0046] Figure 4 FIG. 1 is a flow chart of a method for detecting an output voltage of a high-voltage inverter according to an embodiment of the present invention. Figure 4 As shown, the output voltage detection method of the high-voltage inverter may include the following steps:

[0047] Step S101 : obtaining the bus voltage of each H-bridge and the three-phase current of the high-voltage inverter, and determining the voltage command of each H-bridge.

[0048] Specifically, refer to Figure 2 As shown, a current detection circuit can be set for at least two phases of the U phase, V phase and W phase of the high-voltage inverter. The current of at least two phases of the U phase, V phase and W phase is detected by the current detection circuit. When the current of two phases of the U phase, V phase and W phase is detected, the remaining phase current can be obtained by current reconstruction technology, that is, the remaining phase current is calculated based on the two-phase current and the sum of the three-phase current is zero, thereby obtaining the three-phase current of the high-voltage inverter. Figure 3 As shown, voltage detection circuits can be provided at the positive and negative ends of the DC bus of each H-bridge to detect the bus voltage Udc of each H-bridge. The voltage command for each H-bridge can be determined based on target requirements using voltage modulation technology. Specifically, a modulation wave can be determined based on the current output voltage, and PWM (Pulse Width Modulation) modulation can be performed on the modulation wave and a triangular carrier to obtain the voltage command for each H-bridge. The frequency and amplitude of the output voltage can be adjusted by adjusting the frequency and amplitude of the modulation wave.

[0049] In some embodiments of the present invention, determining the voltage command of each H-bridge includes: comparing the modulated wave with the triangular carrier wave, and determining the voltage command according to the comparison result.

[0050] Furthermore, determining the voltage command based on the comparison result includes: when the count value of the modulated wave is greater than 0, if the count value of the modulated wave is greater than the count value of the triangular carrier, determining the voltage command to be +Udc; if the count value of the modulated wave is less than or equal to the count value of the triangular carrier, determining the voltage command to be 0, where Udc is the bus voltage. When the count value of the modulated wave is less than or equal to 0, if the count value of the modulated wave is less than the count value of the triangular carrier, determining the voltage command to be -Udc; and if the count value of the modulated wave is greater than or equal to the count value of the triangular carrier, determining the voltage command to be 0.

[0051] Specifically, the triangular carrier can be generated by a carrier generator, which contains a counter. The output range of the counter is between -32767 and +32767 (this is just an example), and the counter increases or decreases at the rising edge of each clock. When the counter increases from -32767 to +32767, then decreases from +32767 to -32767, and then continues to increase from -32767 to +32767, and so on, forming a continuous change, a periodically stable triangular carrier can be finally obtained, such as Figure 5 The modulation wave is the output duty cycle value of each H bridge, and the value range is -32767 to +32767, such as Figure 5Wm in.

[0052] When comparing the modulated wave with the triangular carrier wave, assuming that the count value of the modulated wave is Tz and the count value of the triangular carrier wave is Sz, such as Figure 5 As shown in the figure, when Tz>0, if Tz>Sz, the voltage command is +Udc; if Tz≤Sz, the voltage command is 0; when Tz≤0, if Tz<Sz, the voltage command is -Udc; if Tz≥Sz, the voltage command is 0. Thus, the voltage command can be obtained based on the voltage modulation technology.

[0053] Step S102 : determining the current direction according to the three-phase current, and determining the switching state of each H-bridge arm according to the voltage command.

[0054] Specifically, after obtaining the three-phase current of the high-voltage inverter, the current direction can be determined based on the three-phase current. It should be noted that because the H-bridges in the same phase arm of the high-voltage inverter are connected in series, the current direction of each H-bridge in the same phase arm is consistent. After obtaining the voltage command, the switching state of each H-bridge arm, that is, the switching state of each switch in each H-bridge, can be determined based on the voltage command.

[0055] In some embodiments of the present invention, reference Figure 3 As shown, the switching state of each H-bridge arm is determined according to the voltage command, including: when the voltage command is +Udc, the upper tube S1 of the left bridge arm and the lower tube S4 of the right bridge arm of the corresponding H-bridge are turned on; when the voltage command is -Udc, the lower tube S2 of the left bridge arm and the upper tube S3 of the right bridge arm of the corresponding H-bridge are turned on; when the voltage command is 0, the upper tube S3 of the right bridge arm of the corresponding H-bridge remains off, the lower tube S4 of the right bridge arm remains on, the upper tube S1 of the left bridge arm switches from on to off, and the lower tube S2 of the left bridge arm switches from off to on, or, the upper tube S1 of the left bridge arm of the corresponding H-bridge remains off, the lower tube S2 of the left bridge arm remains on, the upper tube S3 of the right bridge arm switches from on to off, and the lower tube S4 of the right bridge arm switches from off to on.

[0056] That is to say, when Tz>0, if Tz>Sz, the voltage command is +Udc, at this time the upper tube S1 of the left bridge arm and the lower tube S4 of the right bridge arm in the H bridge are turned on, and if Tz≤Sz, the voltage command is 0, at this time the upper tube S3 of the right bridge arm in the H bridge remains off, the lower tube S4 of the right bridge arm remains on, and the upper tube S1 of the left bridge arm and the lower tube S2 of the left bridge arm are switched on or off; when Tz≤0, if Tz<Sz, the voltage command is -Udc, at this time the lower tube S2 of the left bridge arm and the upper tube S3 of the right bridge arm in the H bridge are turned on, and if Tz≥Sz, the voltage command is 0, at this time the upper tube S1 of the left bridge arm in the H bridge remains off, the lower tube S2 of the left bridge arm remains on, and the upper tube S3 of the right bridge arm and the lower tube S4 of the right bridge arm are switched on or off.

[0057] Step S103 , determining the output voltage of each H-bridge according to the bus voltage, the current direction and the switching state of the bridge arms of the H-bridge, and determining the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge.

[0058] Specifically, after obtaining the bus voltage, current direction and bridge arm switching state of each H-bridge, the output voltage of each H-bridge can be obtained based on the relationship between the current direction and the bridge arm switching state and combined with the bus voltage, and then the output voltage of each phase of the high-voltage inverter can be reconstructed based on the output voltage of each H-bridge.

[0059] In some embodiments, reference Figure 3 As shown, the output voltage of each H-bridge is determined according to the bus voltage, current direction and bridge arm switch state, including: when the upper tube S1 of the left bridge arm and the lower tube S4 of the right bridge arm in any H-bridge are turned on, +Udc is used as the output voltage of the H-bridge, that is, regardless of the current direction, the output voltage of the H-bridge is +Udc; when the lower tube S2 of the left bridge arm and the upper tube S3 of the right bridge arm in any H-bridge are turned on, -Udc is used as the output voltage of the H-bridge, that is, regardless of the current direction, the output voltage of the H-bridge is -Udc; when the upper tube S1 of the left bridge arm and the lower tube S2 of the left bridge arm in any H-bridge are turned off and the lower tube S4 of the right bridge arm is turned on, if the current direction is forward, the output voltage of the H-bridge is 0, and if the current direction is reverse, +Udc is used. As the output voltage of the H-bridge, that is, the output voltage of the H-bridge is +Udc; when the lower tube S2 of the left bridge arm is turned on, the upper tube S3 of the right bridge arm and the lower tube S4 of the right bridge arm are turned off in any H-bridge, if the current direction is forward, then -Udc is used as the output voltage of the H-bridge, that is, the output voltage of the H-bridge is -Udc, and if the current direction is reverse, then the output voltage of the H-bridge is 0; when the upper tube S1 of the left bridge arm and the lower tube S2 of the left bridge arm are turned off, and the upper tube S3 of the right bridge arm and the lower tube S4 of the right bridge arm are turned off in any H-bridge, if the current direction is forward, then -Udc is used as the output voltage of the H-bridge, that is, the output voltage of the H-bridge is -Udc, and if the current direction is reverse, then +Udc is used as the output voltage of the H-bridge, that is, the output voltage of the H-bridge is +Udc. The details are shown in Table 1:

[0060] Table 1

[0061]

[0062]

[0063] It should be noted that S1, S2, S3 and S4 in Table 1 are respectively the upper tube of the left bridge arm, the lower tube of the left bridge arm, the upper tube of the right bridge arm and the lower tube of the right bridge arm of each H bridge.

[0064] Specifically, when the voltage command is +Udc, the upper tube S1 of the left bridge arm and the lower tube S4 of the right bridge arm in the H bridge are turned on. At this time, if the current direction of the H bridge is forward, such as Figure 6 As shown, the current flows through the positive end of the DC bus of the H bridge, the upper tube S1 of the left bridge arm, the output load of the H bridge, and the lower tube S4 of the right bridge arm, and flows into the negative end of the DC bus of the H bridge. At this time, the output voltage Uo of the H bridge is +Udc; if the current direction of the H bridge is negative, such as Figure 7 As shown, the current flows into the positive terminal of the DC bus of the H bridge through the negative terminal of the DC bus of the H bridge, the parallel diode of the lower tube S4 of the right bridge arm, the output load of the H bridge, and the parallel diode of the upper tube S1 of the left bridge arm. At this time, the output voltage Uo of the H bridge is +Udc.

[0065] When the voltage command is -Udc, the upper tube S3 of the right bridge arm and the lower tube S2 of the left bridge arm are turned on. At this time, if the current direction of the H-bridge is negative, that is, the current flows through the positive end of the DC bus of the H-bridge, the upper tube S3 of the right bridge arm, the output load of the H-bridge, and the lower tube S2 of the left bridge arm, and flows into the negative end of the DC bus of the H-bridge. At this time, the output voltage Uo of the H-bridge is -Udc. If the current direction of the H-bridge is positive, that is, the current flows through the negative end of the DC bus of the H-bridge, the parallel diode of the lower tube S2 of the left bridge arm, the output load of the H-bridge, and the parallel diode of the upper tube S3 of the right bridge arm, and flows into the positive end of the DC bus of the H-bridge. At this time, the output voltage Uo of the H-bridge is -Udc.

[0066] When the voltage command of the H-bridge is switched, there is a dead time, that is, the time when the upper tube S1 and the lower tube S2 of the left bridge arm are fully turned off or the upper tube S3 and the lower tube S4 of the right bridge arm are fully turned off. When both the left and right bridge arms are fully turned off, it is defined as the full dead zone state. At this time, if the current direction is positive, the output voltage Uo of the H-bridge is -Udc; if the current direction is negative, the output voltage Uo of the H-bridge is +Udc.

[0067] When the left bridge arm is blocked, that is, the upper tube S1 and the lower tube S2 of the left bridge arm are turned off and the lower tube S4 of the right bridge arm is turned on, if the current direction is positive, the output voltage Uo of the H bridge is 0; if the current direction is negative, the output voltage Uo of the H bridge is +Udc.

[0068] When the right bridge is blocked, that is, the upper tube S3 and the lower tube S4 of the right bridge arm are both turned off and the lower tube S2 of the left bridge arm is turned on, if the current direction is positive, the output voltage Uo of the H bridge is -Udc; if the current direction is negative, the output voltage Uo of the H bridge is 0.

[0069] Therefore, the switching state of the bridge arms of the H-bridge can be determined based on the voltage command of the H-bridge, and then the output voltage of each H-bridge can be obtained according to the switching state of the bridge arms, the current direction of the H-bridge and the bus voltage.

[0070] After obtaining the output voltage of each H-bridge, the output voltages of multiple H-bridges in each phase bridge arm may be added together to obtain the output voltage of each phase bridge arm of the high-voltage inverter, that is, the output voltage of each phase.

[0071] In some embodiments of the present invention, the same clock signal is used when obtaining the bus voltage of each H-bridge and the three-phase current of the high-voltage inverter, and determining the voltage command of each H-bridge, to ensure that each parameter can be obtained at the same time, thereby ensuring the accuracy of the output voltage of each H-bridge.

[0072] In some embodiments of the present invention, before determining the output voltage of each H-bridge, the voltage command of each H-bridge is also delayed to ensure that the driving control moment of each switch tube of the H-bridge based on the voltage command is consistent with the moment of calculating the output voltage of the H-bridge based on the voltage command, thereby avoiding the problem of inaccurate output voltage acquisition caused by the inconsistency between the driving control moment of the switch tube and the output voltage calculation moment due to voltage command transmission delay and driving delay.

[0073] The following is a specific example to illustrate this. Because FPGAs (Field Programmable Gate Arrays) have parallel processing capabilities, high-voltage inverter control can be implemented based on FPGAs. During this control process, the output voltage of each phase of the high-voltage inverter can be acquired using the output voltage detection method for a high-voltage inverter according to an embodiment of the present invention.

[0074] Specifically, the parallel processing capability of FPGA can be used to build an output voltage calculation function module for each H-bridge. By calculating the output voltage of each H-bridge and summing the output voltages of all H-bridges in the same phase, the output voltage of each phase of the high-voltage inverter can be constructed.

[0075] like Figure 8 As shown, the output voltage calculation function module of each H-bridge may include: a carrier generator, a modulation wave generator, a voltage command calculation unit, a delay unit, a drive command calculation unit, a bus voltage detection unit, a current detection unit and an output voltage calculation unit. All modules are controlled by the same clock signal CLK. Specifically, the internal algorithm of the module can be executed on the rising edge of the clock signal CLK to ensure the consistency of the calculation of each module.

[0076] Among them, the carrier generator and the modulation wave generator can generate a triangular carrier and a modulation wave in the above-mentioned manner. The voltage instruction calculation unit compares the modulation wave and the triangular carrier to generate a voltage instruction, which is the driving signal of each switch tube in the H-bridge, as described above. After the voltage instruction calculation unit completes the calculation, it will drive the corresponding switch tube to operate through the communication line and the driving circuit inside the power unit for controlling the opening or closing of each switch tube of the H-bridge. Since there is a signal transmission delay in the communication line and there is a signal decoding and driving delay inside the power unit, it is necessary to delay the voltage instruction calculated by the voltage instruction calculation unit so that when the output voltage is calculated, the voltage instruction received by each switch tube is consistent with the calculated voltage instruction. In other words, the voltage instruction calculated by the voltage instruction calculation unit needs to be delayed for a fixed time before the control chip inside the power unit outputs the corresponding driving signal. Therefore, the voltage instruction calculated by the voltage instruction calculation unit can be delayed by the delay unit. For example, the communication delay and signal decoding and driving delay can be obtained in advance based on experimental testing, and the total delay can be summed to obtain T-delay. This delay is set in the delay unit. After the voltage command calculation unit calculates the voltage command, the calculated voltage command is delayed by T-delay time. Optionally, T-delay can generally be set between 0.5us and 3us, and can be specifically set to 1.2us.

[0077] After the voltage command is delayed by the delay unit, the drive command calculation unit obtains the on / off status of each switch in the H-bridge, i.e., the switch status of the H-bridge arm, based on the delayed voltage command. It should be noted that since the upper and lower switches in the same arm of the H-bridge cannot be directly connected, specifically, the upper switch S1 of the left arm of the H-bridge and the lower switch S2 of the left arm cannot be turned on at the same time, i.e., if one is turned on, the other must be turned off. Similarly, the upper switch S3 of the right arm of the H-bridge and the lower switch S4 of the right arm cannot be turned on at the same time, i.e., if one is turned on, the other must be turned off. For example, to switch from the upper switch S1 of the left arm being on and the lower switch S2 being off to the upper switch S1 being off and the lower switch S2 being on, the dead time T-dead must first be passed, during which the upper switch S1 is turned off and the lower switch S2 is then turned on. That is, the upper switch S1 is turned off first, and after the dead time T-dead is delayed, the lower switch S2 is turned on again. Therefore, when determining the on or off state of each switch tube in the H-bridge based on the voltage command, it is necessary to consider the dead time T-dead. This dead time can be obtained in advance through experimental testing or calculation. Ultimately, the switching state of the bridge arm of the H-bridge is determined based on the voltage command and the dead time T-dead. For example, the drive command calculation unit does not delay the shutdown command of the upper and lower tubes of the left and right bridge arms of the H-bridge, but delays the opening command by T-dead to calculate the switching state of the bridge arm of the H-bridge, that is, the drive signal of each switch tube in the H-bridge.

[0078] For further reference, Figure 9 As shown, the delay unit receives the voltage instruction output by the voltage instruction calculation unit, such as the voltage instruction of the left bridge arm, and the delay unit delays the voltage instruction of the left bridge arm by T-delay and then outputs it to the drive instruction calculation unit. Figure 9 In the example, "1" is defined as the upper tube of the same arm of the H-bridge being turned on and the lower tube being turned off, and "0" is defined as the upper tube of the same arm of the H-bridge being turned off and the lower tube being turned on. After receiving the delayed voltage command for the left arm, the drive command calculation unit delays the turn-on command for the upper tube of the left arm and the lower tube of the left arm by the T-dead time, and does not delay the turn-off command for the upper tube of the left arm and the lower tube of the left arm before outputting it to the output voltage calculation unit. It should be noted that the voltage command processing for the right arm is the same as that for the left arm, and will not be repeated here.

[0079] The bus voltage detection unit detects the bus voltage of the H-bridge, the current detection unit detects the three-phase current of the high-voltage inverter and determines the current direction of the H-bridge based on the three-phase current. The output voltage calculation unit obtains the output voltage of the H-bridge through Table 1 according to the bus voltage, current direction and the switching state of the bridge arm of the H-bridge.

[0080] It should be noted that the output voltage calculation function module of each H-bridge can obtain the output voltage of the corresponding H-bridge. For the same phase bridge arm of the high-voltage inverter, the output voltages of all H-bridges can be summed to obtain the output voltage of the phase bridge arm, and finally the output voltage of each phase of the high-voltage inverter can be obtained.

[0081] Therefore, calculations are performed based on the H-bridge bus voltage, current direction, bridge arm switch status, communication delay, signal decoding and drive delay, and dead time, and finally the output voltage of each phase of the high-voltage inverter is reconstructed, realizing accurate acquisition of the high-voltage inverter output voltage.

[0082] According to the output voltage detection method of the high-voltage inverter according to the embodiment of the present invention, by obtaining the bus voltage of each H-bridge in each phase bridge arm of the high-voltage inverter and the three-phase current of the high-voltage inverter, and determining the voltage instruction of each H-bridge, and determining the current direction according to the three-phase current, and determining the bridge arm switching state of each H-bridge according to the voltage instruction, and determining the output voltage of each H-bridge according to the bus voltage, current direction and bridge arm switching state, and determining the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge, the output voltage of the high-voltage inverter can be accurately obtained to meet the needs of high-precision output voltage occasions.

[0083] In some embodiments, a high-voltage inverter is also provided, including a memory, a processor, and an output voltage detection program of the high-voltage inverter stored in the memory and runnable on the processor. When the processor executes the output voltage detection program of the high-voltage inverter, the above-mentioned output voltage detection method of the high-voltage inverter is adopted.

[0084] According to the high-voltage inverter of the embodiment of the present invention, the output voltage of the high-voltage inverter can be accurately obtained through the above-mentioned output voltage detection method of the high-voltage inverter, meeting the occasions requiring high precision of the output voltage.

[0085] In some embodiments, a computer-readable storage medium is further provided, on which an output voltage detection program for a high-voltage inverter is stored. When the output voltage detection program for a high-voltage inverter is executed by a processor, the output voltage detection method for a high-voltage inverter is adopted.

[0086] According to the computer-readable storage medium of the embodiment of the present invention, the output voltage detection method of the high-voltage inverter can accurately obtain the output voltage of the high-voltage inverter, meeting the requirements of high-precision output voltage.

[0087] Figure 10 FIG. 1 is a schematic diagram of a structure of an output voltage detection device for a high-voltage inverter according to an embodiment of the present invention, referring to FIG. Figure 10 As shown, the output voltage detection device includes: a voltage acquisition module 10 , a current acquisition module 20 , a voltage instruction determination module 30 and a voltage calculation module 40 .

[0088] Among them, the voltage acquisition module 10 is used to obtain the bus voltage of each H-bridge; the current acquisition module 20 is used to obtain the three-phase current of the high-voltage inverter; the voltage instruction determination module 30 is used to determine the voltage instruction of each H-bridge; the voltage calculation module 40 is used to determine the current direction according to the three-phase current, and determine the bridge arm switching state of each H-bridge according to the voltage instruction, and determine the output voltage of each H-bridge according to the bus voltage, current direction and bridge arm switching state, and determine the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge.

[0089] According to an embodiment of the present invention, the voltage command determination module 30 is specifically configured to compare the modulated wave with the triangular carrier wave, and determine the voltage command according to the comparison result.

[0090] According to one embodiment of the present invention, the voltage command determination module 30 is specifically configured to: when the count value of the modulated wave is greater than 0, if the count value of the modulated wave is greater than the count value of the triangular carrier, determine the voltage command to be +Udc; if the count value of the modulated wave is less than or equal to the count value of the triangular carrier, determine the voltage command to be 0, where Udc is the bus voltage. When the count value of the modulated wave is less than or equal to 0, if the count value of the modulated wave is less than the count value of the triangular carrier, determine the voltage command to be -Udc; if the count value of the modulated wave is greater than or equal to the count value of the triangular carrier, determine the voltage command to be 0.

[0091] According to one embodiment of the present invention, the voltage calculation module 40 is specifically used to: when the voltage instruction is +Udc, the upper tube of the left bridge arm and the lower tube of the right bridge arm in the corresponding H-bridge are turned on, where Udc is the bus voltage; when the voltage instruction is -Udc, the lower tube of the left bridge arm and the upper tube of the right bridge arm in the corresponding H-bridge are turned on; when the voltage instruction is 0, the upper tube of the right bridge arm in the corresponding H-bridge remains turned off, the lower tube of the right bridge arm remains turned on, the upper tube of the left bridge arm is switched from on to off, and the lower tube of the left bridge arm is switched from off to on, or, the upper tube of the left bridge arm in the corresponding H-bridge remains turned off, the lower tube of the left bridge arm remains turned on, the upper tube of the right bridge arm is switched from on to off, and the lower tube of the right bridge arm is switched from off to on.

[0092] According to one embodiment of the present invention, the voltage calculation module 40 is specifically configured to: when the upper tube of the left bridge arm and the lower tube of the right bridge arm in any H-bridge are turned on, use +Udc as the output voltage of the H-bridge, where Udc is the bus voltage; when the lower tube of the left bridge arm and the upper tube of the right bridge arm in any H-bridge are turned on, use -Udc as the output voltage of the H-bridge; when the upper tube of the left bridge arm and the lower tube of the left bridge arm in any H-bridge are turned off and the lower tube of the right bridge arm is turned on, if the current direction is forward, the output voltage of the H-bridge is 0; if the current direction is reverse, use +Udc as the output voltage of the H-bridge; when the lower tube of the left bridge arm in any H-bridge is turned on and the upper tube of the right bridge arm and the lower tube of the right bridge arm are turned off, if the current direction is forward, use -Udc as the output voltage of the H-bridge; if the current direction is reverse, the output voltage of the H-bridge is 0.

[0093] According to one embodiment of the present invention, the voltage calculation module 40 is further configured to: when the upper tube of the left bridge arm and the lower tube of the left bridge arm are turned off, and the upper tube of the right bridge arm and the lower tube of the right bridge arm are turned off in any H-bridge, if the current direction is forward, use -Udc as the output voltage of the H-bridge; if the current direction is reverse, use +Udc as the output voltage of the H-bridge.

[0094] According to one embodiment of the present invention, the same clock signal is used when acquiring the bus voltage of each H-bridge and the three-phase current of the high-voltage inverter, and determining the voltage command of each H-bridge.

[0095] According to an embodiment of the present invention, the voltage calculation module 40 is further configured to perform delay processing on the voltage instruction of each H-bridge before determining the output voltage of each H-bridge.

[0096] According to an embodiment of the present invention, the voltage calculation module 40 is specifically configured to add the output voltages of multiple H-bridges in each phase arm to obtain the output voltage of each phase of the high-voltage inverter.

[0097] It should be noted that, for the description of the output voltage detection device of the high-voltage inverter in this application, please refer to the description of the output voltage detection method of the high-voltage inverter in this application, and the details will not be repeated here. It should also be noted that the voltage acquisition module 10 may include Figure 8 The bus voltage detection unit in the current acquisition module 20 may include Figure 8 The current detection unit in the voltage command determination module 30 may include Figure 8 The carrier generator, modulation wave generator and voltage instruction calculation unit in the voltage calculation module 40 may include Figure 8 The delay unit, drive instruction calculation unit and output voltage calculation unit in it.

[0098] According to the output voltage detection device of the high-voltage inverter according to the embodiment of the present invention, the bus voltage of each H-bridge in each phase bridge arm of the high-voltage inverter is obtained through the voltage acquisition module, and the three-phase current of the high-voltage inverter is obtained through the current acquisition module, and the voltage instruction of each H-bridge is determined through the voltage instruction determination module, and the current direction is determined according to the three-phase current through the voltage calculation module, and the bridge arm switching state of each H-bridge is determined according to the voltage instruction, and the output voltage of each H-bridge is determined according to the bus voltage, current direction and bridge arm switching state, and the output voltage of each phase of the high-voltage inverter is determined according to the output voltage of each H-bridge. This can achieve accurate acquisition of the output voltage of the high-voltage inverter and meet the needs of high-precision output voltage.

[0099] It should be noted that the logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can fetch and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic device), a portable computer disk cartridge (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and programmable read-only memory (EPROM or flash memory), fiber optic devices, and portable compact disc read-only memory (CDROM). Furthermore, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing it in another suitable manner if necessary, and then storing it in a computer memory.

[0100] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0101] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0102] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0103] In the present invention, unless otherwise specified or limited, the terms "installed," "connected," "connect," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two components, or interaction between two components, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0104] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A method for detecting the output voltage of a high-voltage inverter, characterized in that: Each phase bridge arm of the high-voltage inverter is composed of a plurality of H-bridge cascades, and the method includes: Obtaining the bus voltage of each H-bridge and the three-phase current of the high-voltage inverter, and determining the voltage command of each H-bridge; Determining the current direction according to the three-phase current, and determining the switching state of each H-bridge arm according to the voltage command; Determine the output voltage of each H-bridge according to the bus voltage, the current direction and the bridge arm switch state, and determine the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge; The voltage command of each H-bridge is determined as follows: Compare the modulated wave with the triangular carrier wave; When the count value of the modulated wave is greater than 0, if the count value of the modulated wave is greater than the count value of the triangular carrier, the voltage command is determined to be +Udc; if the count value of the modulated wave is less than or equal to the count value of the triangular carrier, the voltage command is determined to be 0, where Udc is the bus voltage; When the count value of the modulated wave is less than or equal to 0, if the count value of the modulated wave is less than the count value of the triangular carrier, the voltage command is determined to be -Udc; if the count value of the modulated wave is greater than or equal to the count value of the triangular carrier, the voltage command is determined to be 0.

2. The method according to claim 1, characterized in that Determining the switching state of each H-bridge arm according to the voltage command includes: When the voltage command is +Udc, the upper tube of the left bridge arm and the lower tube of the right bridge arm in the H bridge are turned on, where Udc is the bus voltage; When the voltage command is -Udc, the lower tube of the left bridge arm and the upper tube of the right bridge arm in the corresponding H bridge are turned on; When the voltage command is 0, the upper tube of the right bridge arm in the corresponding H-bridge remains turned off, the lower tube of the right bridge arm remains turned on, the upper tube of the left bridge arm switches from on to off, and the lower tube of the left bridge arm switches from off to on; or, the upper tube of the left bridge arm in the corresponding H-bridge remains turned off, the lower tube of the left bridge arm remains turned on, the upper tube of the right bridge arm switches from on to off, and the lower tube of the right bridge arm switches from off to on.

3. The method according to claim 2, characterized in that Determining the output voltage of each H-bridge according to the bus voltage, the current direction, and the bridge arm switch state includes: When the upper tube of the left bridge arm and the lower tube of the right bridge arm in any H-bridge are turned on, +Udc is used as the output voltage of the H-bridge, where Udc is the bus voltage; When the lower tube of the left bridge arm and the upper tube of the right bridge arm of any H-bridge are turned on, -Udc is used as the output voltage of the H-bridge; When the upper tube of the left bridge arm and the lower tube of the left bridge arm in any H-bridge are turned off and the lower tube of the right bridge arm is turned on, if the current direction is forward, the output voltage of the H-bridge is 0; if the current direction is reverse, +Udc is used as the output voltage of the H-bridge; When the lower tube of the left bridge arm in any H-bridge is turned on and the upper tube of the right bridge arm and the lower tube of the right bridge arm are turned off, if the current direction is forward, -Udc is used as the output voltage of the H-bridge; if the current direction is reverse, the output voltage of the H-bridge is 0.

4. The method according to claim 2, characterized in that The method further comprises: determining the output voltage of each H-bridge according to the bus voltage, the current direction and the bridge arm switch state; When the upper tube of the left bridge arm and the lower tube of the left bridge arm in any H-bridge are turned off, and the upper tube of the right bridge arm and the lower tube of the right bridge arm are turned off, if the current direction is forward, -Udc is used as the output voltage of the H-bridge; if the current direction is reverse, +Udc is used as the output voltage of the H-bridge, where Udc is the bus voltage.

5. The method according to claim 1, wherein The same clock signal is used when acquiring the bus voltage of each H-bridge and the three-phase current of the high-voltage inverter, and determining the voltage instruction of each H-bridge.

6. The method according to claim 5, characterized in that Before determining the output voltage of each H-bridge, a delay process is performed on the voltage instruction of each H-bridge.

7. The method according to claim 1, characterized in that Determining the output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge includes: The output voltages of multiple H bridges in each phase bridge arm are added together to obtain the output voltage of each phase of the high-voltage inverter.

8. A high voltage frequency converter, characterized in that: The invention comprises a memory, a processor and an output voltage detection program of a high-voltage inverter stored in the memory and executable on the processor. When the processor executes the output voltage detection program of the high-voltage inverter, the output voltage detection method of the high-voltage inverter according to any one of claims 1 to 7 is adopted.

9. A computer-readable storage medium, characterized in that An output voltage detection program of a high-voltage inverter is stored thereon, and when the output voltage detection program of the high-voltage inverter is executed by the processor, the output voltage detection method of the high-voltage inverter according to any one of claims 1-7 is adopted.

10. An output voltage detection device for a high-voltage inverter, characterized in that: Each phase bridge arm of the high-voltage inverter is composed of multiple H-bridge cascades, and the device includes: Voltage acquisition module, used to obtain the bus voltage of each H-bridge; A current acquisition module, configured to acquire the three-phase current of the high-voltage inverter; A voltage command determination module is used to determine the voltage command of each H-bridge; a voltage calculation module, configured to determine a current direction according to the three-phase current, determine a bridge arm switch state of each H-bridge according to the voltage command, determine an output voltage of each H-bridge according to the bus voltage, the current direction, and the bridge arm switch state, and determine an output voltage of each phase of the high-voltage inverter according to the output voltage of each H-bridge; The voltage command of each H-bridge is determined as follows: Compare the modulated wave with the triangular carrier wave; When the count value of the modulated wave is greater than 0, if the count value of the modulated wave is greater than the count value of the triangular carrier, the voltage command is determined to be +Udc; if the count value of the modulated wave is less than or equal to the count value of the triangular carrier, the voltage command is determined to be 0, where Udc is the bus voltage; When the count value of the modulated wave is less than or equal to 0, if the count value of the modulated wave is less than the count value of the triangular carrier, the voltage command is determined to be -Udc; if the count value of the modulated wave is greater than or equal to the count value of the triangular carrier, the voltage command is determined to be 0.

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