A carrier-based ultra-thin wafer dicing process

Through the ultra-thin wafer cutting process based on the carrier disk, the Bernoulli principle and the stress support of the groove-type carrier disk are used to solve the warping and lobe problems of ultra-thin wafers during the cutting process, achieving a more efficient cutting effect.

CN114628251BActive Publication Date: 2025-07-29SHAOXING TONGXINCHENG INTEGRATED CIRCUIT CO LTD
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Patent Information

Application Number
CN202210234121.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-10
Publication Date
2025-07-29
Estimated Expiration
2042-03-10

AI Technical Summary

Technical Problem

In the prior art, ultra-thin wafers are prone to warping and lobes during the cutting process, especially on compound semiconductor substrates, which are obvious in bending and deformation, and traditional cutting methods are difficult to effectively solve.

Method used

The ultra-thin wafer cutting process based on the carrier disk is adopted. The ultra-thin wafer is blown flattened by using the Bernoulli principle and placed in the grooved carrier disk. Combined with the grooved carrier disk, the rear lobes are pre-cut twice.

Benefits of technology

It effectively overcomes the warping problem of ultra-thin wafers, avoids lobes during direct cutting, and improves the reliability and success rate of cutting.

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Abstract

The present invention discloses an ultra-thin wafer cutting process based on a carrier plate, which specifically includes the following steps: S1, pre-cutting a certain depth after the front-end process is completed; S2, thinning the back surface of the wafer; S3, placing the thinned wafer in the carrier plate; S4, forming an annular photoresist seal at the edge of the wafer and pre-cutting a certain depth on the back surface of the wafer; S5, completing the back-end metal process and removing the photoresist seal; S6, using a dicing and film pulling machine to disconnect the unbroken part of the wafer; S7, transferring the front surface of the wafer to the second cutting die frame to complete the cutting of the wafer. The present invention uses the Bernoulli principle to blow the ultra-thin wafer flat and then place it in a groove-type carrier plate for loading, overcoming the warping problem of the ultra-thin wafer. At the same time, the groove-type carrier plate is used to provide stress support, and dicing is performed after two pre-cuttings, which also solves the problem that the ultra-thin wafer is prone to chipping during direct cutting.
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Description

Technical Field

[0001] The present invention relates to the technical field of wafer processing, and in particular to a carrier-based ultra-thin wafer cutting process. Background Art

[0002] Ultra-thin chip designs are gaining increasing popularity to improve product performance. Integrated circuit wafers are typically about 1 mm thick. If thinned to less than 100 microns, the wafer will warp, especially on larger diameter wafers. In current wafer manufacturing processes, compound semiconductors are difficult to thin, so the thickness of the compound semiconductor substrate is minimized during fabrication, leading to significant warping.

[0003] Existing wafer dicing methods typically include backside waterjet semi-cutting and cleaving processes and laser dicing. When using current processes to slice ultra-thin wafers, the wafers are prone to warping after grinding and cracking during subsequent processing. In particular, when using traditional diamond knives to cut ultra-thin, low-k wafers, delamination between metal layers is a common problem. Summary of the Invention

[0004] In order to solve the deficiencies mentioned in the above background technology, the purpose of the present invention is to provide an ultra-thin wafer cutting process based on a carrier. The present invention uses the Bernoulli principle to blow the ultra-thin wafer flat and then place it on a grooved carrier, overcoming the warping problem of the ultra-thin wafer. At the same time, the grooved carrier is used to provide stress support, and the wafer is split after two pre-cutting operations, which also solves the problem that ultra-thin wafers are prone to splitting during direct cutting.

[0005] The purpose of the present invention can be achieved through the following technical solutions:

[0006] A carrier-based ultra-thin wafer dicing process specifically includes the following steps:

[0007] S1. After the wafer completes the front-side process, a certain depth is cut along the cutting street area;

[0008] S2. Attaching grinding tape to the front side of the wafer to complete thinning of the back side of the wafer;

[0009] S3, flattening the thinned wafer using Bernoulli's principle and attaching it to the carrier;

[0010] S4. Coating photoresist on the back side of the wafer and the surface of the carrier plate, exposing, developing, and etching to form a ring-shaped photoresist seal at the edge of the wafer, and then cutting along the scribe line area on the back side of the wafer, with a cutting depth of 70-85% of the total thickness of the remaining wafer;

[0011] S5, completing the back metal process, and simultaneously using a solvent to dissolve and remove the blocked area of the photoresist;

[0012] S6. Attach the back side of the wafer to the first cutting die frame, and use a dicing and film pulling machine to disconnect the unbroken part of the wafer.

[0013] S7. Attach the front side of the wafer to the second cutting die frame, transfer the disconnected chips to the second cutting die frame, and leave the fracture residues on the first cutting die frame to complete the cutting of the wafer.

[0014] Further preferably, in step S1, the cutting depth is 40 - 60 μm.

[0015] Further preferably, in step S3, in a negative pressure operation box, use a robotic arm with a jet mechanism to blow air on the back side of the wafer to make the wafer float, and then place a carrier plate with air holes above the wafer through a mechanical clamping arm, and then turn the wafer and the carrier plate over as a whole so that the wafer is placed in the groove of the carrier plate.

[0016] Further preferably, in step S3, the carrier plate is provided with a groove in the middle, and a plurality of ventilation holes are provided at the bottom of the groove. The carrier plate is a metal, glass or ceramic carrier plate.

[0017] Further preferably, in step S5, the backside metal process is evaporation or sputtering of Ti / Ni / Ag or other metals that can weld the substrate.

[0018] Advantages of the present invention:

[0019] Before thinning the wafer, pre-cut a partial depth on the front side, and then perform backside thinning. After thinning, use the Bernoulli principle to blow the thinned wafer flat and place it in a groove-type carrier plate, effectively overcoming the warping problem of the thinned wafer. At the same time, use the stress support provided by the groove-type carrier plate to facilitate further pre-cutting of the back side of the wafer; after pre-cutting the back side of the wafer, perform evaporation or sputtering. Except that only a part of the metal will be formed at the bottom of the pre-cut dicing channel on the wafer surface, so the metal on the wafer surface can be automatically disconnected at the dicing channel, and there is no need to perform the process step of backside metal cutting. Finally, transfer the processed wafer from the carrier plate to the cutting die frame and use a dicing machine to complete the cutting of the wafer. Compared with the existing ultra-thin wafer cutting process, the present invention uses the Bernoulli principle to blow the ultra-thin wafer flat and place it in the groove-type carrier plate for loading, overcoming the warping problem of the ultra-thin wafer. At the same time, use the stress support provided by the groove-type carrier plate to perform dicing after two pre-cuts, and also solve the problem that the ultra-thin wafer is prone to chipping during direct cutting. Description of the Drawings

[0020] The following further describes the present invention with reference to the drawings.

[0021] Figure 1 is a schematic diagram of process step S1 of the present invention;

[0022] Figure 2 It is a schematic diagram of process step S2 of the present invention;

[0023] Figure 3 It is a schematic diagram of process step S3 of the present invention;

[0024] Figure 4 It is a schematic diagram of process step S4 of the present invention;

[0025] Figure 5 It is a schematic diagram of process step S5 of the present invention;

[0026] Figure 6 It is a schematic diagram of process step S5 of the present invention;

[0027] Figure 7 It is a schematic diagram of process step S5 of the present invention. Detailed implementation manners

[0028] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0029] Embodiment 1

[0030] An ultra-thin wafer cutting process based on a carrier plate specifically includes the following steps:

[0031] S1. After the front process of the wafer is completed, it is cut along the dicing street area, and the depth of the deep cut is 40 μm;

[0032] S2. Attach the front side of the wafer to the polishing tape to complete the back thinning of the wafer;

[0033] S3. In a negative pressure operation box, use a robotic arm with a jet mechanism to blow air on the back side of the wafer to make the wafer float, and then place a carrier plate with pores above the wafer through a mechanical clamping arm, and then turn the wafer and the carrier plate over as a whole so that the wafer is placed in the groove of the carrier plate;

[0034] S4. Coating photoresist on the back side of the wafer and the surface of the carrier plate, after exposure, development, and etching, form an annular photoresist seal at the edge of the wafer, and then cut along the dicing street area on the back side of the wafer, and the cutting depth is 85% of the remaining total thickness of the wafer;

[0035] S5. Evaporate or sputter Ti / Ni / Ag or other metals that can weld the substrate to complete the back metal process, and at the same time use a solvent to dissolve and remove the photoresist seal area;

[0036] S6. Attach the back side of the wafer to the first cutting die frame, and use a dicing and film pulling machine to disconnect the unbroken part of the wafer.

[0037] S7. Attach the front side of the wafer to the second cutting die frame, transfer the disconnected die chips to the second cutting die frame, and leave the fracture residues on the first cutting die frame to complete the cutting of the wafer.

[0038] In step S3, a groove is provided in the middle of the carrier plate, and a plurality of ventilation holes are provided at the bottom of the groove. The carrier plate is a metal, glass or ceramic carrier plate.

[0039] Embodiment 2

[0040] A cutting process for ultra-thin wafers based on a carrier plate specifically includes the following steps:

[0041] S1. After the front side process of the wafer is completed, cut along the cutting track area, and the cutting depth is 60 μm.

[0042] S2. Attach the front side of the wafer to the grinding tape to complete the back thinning of the wafer.

[0043] S3. Place the thinned wafer in a negative pressure operation box, use a robotic arm with a jet mechanism to blow air on the back side of the wafer to make the wafer float, and then use a mechanical clamping arm to place the carrier plate with air holes above the wafer and then turn the wafer and the carrier plate as a whole so that the wafer is placed in the groove of the carrier plate.

[0044] S4. Coat photoresist on the back side of the wafer and the surface of the carrier plate, and after exposure, development and etching, form an annular photoresist seal at the edge of the wafer, and then cut along the cutting track area on the back side of the wafer, and the cutting depth is 70% of the remaining total thickness of the wafer.

[0045] S5. Evaporate or sputter Ti / Ni / Ag or other metals that can be welded to the substrate to complete the back metal process, and at the same time use a solvent to dissolve and remove the sealed area of the photoresist.

[0046] S6. Attach the back side of the wafer to the first cutting die frame, and use a dicing and film pulling machine to disconnect the unbroken part of the wafer.

[0047] S7. Attach the front side of the wafer to the second cutting die frame, transfer the disconnected die chips to the second cutting die frame, and leave the fracture residues on the first cutting die frame to complete the cutting of the wafer.

[0048] In step S3, a groove is provided in the middle of the carrier plate, and a plurality of ventilation holes are provided at the bottom of the groove. The carrier plate is a metal, glass or ceramic carrier plate.

[0049] The foregoing has shown and described the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments, and what is described in the above embodiments and the specification is only to illustrate the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements fall within the scope of the present invention claimed.

Claims

1. A carrier-based ultra-thin wafer cutting process, characterized in that, Specifically, it includes the following steps: S1. After the front process of the wafer is completed, cut a part of the depth along the scribe lane area; S2. Attach the front side of the wafer to the grinding tape to complete the back thinning of the wafer; S3. After the thinned wafer is blown flat using the Bernoulli principle, attach it to the carrier; S4. Coating photoresist on the back of the wafer and the surface of the carrier, after exposure, development, and etching, form an annular photoresist seal at the edge of the wafer, and then cut along the scribe lane area on the back of the wafer, and the cutting depth is 70-85% of the total remaining thickness of the wafer; S5. Complete the back metal process, and at the same time dissolve the photoresist seal area using a solvent; S6. Attach the back of the wafer to the first cutting die frame, and use a die splitting and film pulling machine to disconnect the unbroken part of the wafer; S7. Attach the front of the wafer to the second cutting die frame, transfer the disconnected die to the second cutting die frame, and leave the fracture residue on the first cutting die frame to complete the cutting of the wafer; In step S3, in a negative pressure operation box, a robotic arm with a jet mechanism is used to blow air against the back of the wafer to make the wafer float, and then through a mechanical clamping arm, a carrier with air holes is placed above the wafer, and then the wafer and the carrier are flipped as a whole so that the wafer is placed in the groove of the carrier; In step S3, the carrier has a groove in the middle, and a number of air holes are opened at the bottom of the groove, and the carrier is a metal, glass or ceramic carrier.

2. The wafer dicing process based on a carrier according to claim 1, wherein In step S1, the cutting depth is 40-60μm.

3. The wafer dicing process based on a carrier according to claim 1, wherein, In step S5, the back metal process is evaporation or sputtering of Ti / Ni / Ag or other metals that can weld the substrate.

Citation Information

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