Epitaxial isolated LED chip and preparation method thereof

Abstract

The present invention provides an epitaxially isolated LED chip and a method for fabricating the same, comprising: providing a substrate, etching a groove on the substrate; depositing a compound that inhibits epitaxial layer growth on the bottom, sidewalls, and top of the groove; removing the compound deposited on the top and bottom of the groove by etching; and sequentially growing an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer on the bottom of the groove. The epitaxially isolated LED chip and method for fabricating the same, in the present invention, first etches a groove on the substrate to form a self-isolating structure, deposits a compound that inhibits epitaxial layer growth on the sidewalls of the groove, and then grows the epitaxial layer on the self-isolating structure. Pre-isolating the chip before growing the epitaxial layer avoids contamination of the epitaxial layer by etching, thereby improving the chip's luminous efficiency.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxially isolated LED chip and a preparation method thereof. Background Art

[0002] With the development of Micro LED display technology, the size of LED chips is shrinking. LED chips typically consist of a P-type semiconductor on one end, where holes dominate, and an N-type semiconductor on the other end, where electrons dominate. When these two semiconductors are connected, a PN junction is formed. When current flows through the conductor and acts on the chip, electrons are pushed to the P region, where they recombine with holes and emit energy as photons.

[0003] A complete circuit is composed of separate devices connected by specific electrical pathways. Therefore, in integrated circuit manufacturing, the devices must be isolated so that they can be interconnected to form the required specific circuit structure.

[0004] In existing technology, common isolation techniques in the LED industry primarily involve depositing N-epitaxial, MQW, and P-epitaxial layers on a substrate. After the epitaxial layer is deposited, ICP etching is used to etch the epitaxial layer down to the PSS layer, isolating the chips to form independent chips. The chips are then ground, cut, and tested. However, the etching process in this isolation technique can contaminate the epitaxial layer, affecting the luminous efficiency of the LED chip. Summary of the Invention

[0005] Based on this, the purpose of the present invention is to provide an epitaxially isolated LED chip and a preparation method thereof, so as to solve the problem in the isolation technology in the background art that etching causes contamination of the epitaxial layer, resulting in low luminous efficiency of the LED chip.

[0006] The present invention provides a method for preparing an epitaxially isolated LED chip, the method comprising:

[0007] Providing a substrate, forming a first photolithographic pattern on the substrate, and etching a pattern corresponding to the first photolithographic pattern to form a groove on the substrate;

[0008] Depositing a compound for inhibiting epitaxial layer growth on the bottom, sidewall and top of the groove respectively;

[0009] removing the compound deposited on the top and bottom of the groove respectively by etching;

[0010] A second photolithography pattern is formed on the substrate, a pattern corresponding to the second photolithography pattern is etched, and an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer are sequentially grown at the bottom of the groove.

[0011] The method for preparing an epitaxially isolated LED chip of the present invention first etches a groove on a substrate, and deposits a compound that inhibits the growth of an epitaxial layer on the bottom, sidewalls, and top of the groove. Then, an etching technique is used to remove the compound at the top and top of the groove, leaving the compound on the sidewalls to wrap around the groove, forming a self-isolating structure. The chip can be isolated in advance, and then an epitaxial layer is grown on the self-isolating structure. The self-isolating structure formed in advance and then grown on the epitaxial layer can avoid contamination of the epitaxial layer by etching, and the subsequent cutting process can be cut along both sides of the substrate groove, thereby not damaging the chip. This solves the problem of epitaxial layer contamination caused by etching in the isolation technology of the background art, resulting in low luminous efficiency of the LED chip. Furthermore, because the sidewalls of the groove are coated with the compound that inhibits the growth of the epitaxial layer, the epitaxial layer will mainly grow at the bottom of the substrate 1, avoiding growth on the sidewalls, thereby occupying a larger chip area and improving the luminous brightness of the chip.

[0012] Furthermore, the depth of the groove is 5um-15um.

[0013] Furthermore, the compound is an oxide or a nitride.

[0014] Furthermore, the second photolithographic pattern is a cone.

[0015] Furthermore, the substrate is a sapphire substrate.

[0016] Furthermore, in the steps of depositing the compound on the bottom, sidewall and top of the groove respectively:

[0017] The first gas reactant is introduced into the cavity, and the introduction time is controlled to be 0.1s-60s;

[0018] Stop introducing the first gas reactant and introduce a purge gas to remove the first gas reactant remaining in the cavity, and control the blowing time to be 0.1s-60s, wherein the purge gas includes an inert gas;

[0019] The second gas reactant is introduced into the cavity, and the introduction time is controlled to be 0.1s-60s;

[0020] Stop introducing the second gas reactant and introduce a purge gas to remove the remaining second gas reactant in the cavity, and control the blowing time to be 0.1s-60s;

[0021] The above steps are repeated cyclically until the thickness of the deposited compound reaches a preset thickness.

[0022] Furthermore, the thickness of the compound is 10 nm-1000 nm.

[0023] The present invention also provides an epitaxially isolated LED chip, comprising a substrate, and an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer sequentially arranged on the substrate from bottom to top, wherein the substrate is provided with a groove, and a compound for inhibiting the growth of the epitaxial layer is provided on the inner side wall of the groove, and the N-type semiconductor layer, the light-emitting layer, and the P-type semiconductor layer are respectively located in the groove.

[0024] Furthermore, the depth of the groove is 5um-15um.

[0025] Furthermore, the compound is an oxide or a nitride.

[0026] The epitaxially isolated LED chip of the present invention forms a self-isolating structure by arranging a groove on the substrate and arranging an oxide layer capable of inhibiting the growth of the epitaxial layer on the sidewall of the groove. The epitaxial layer is grown on the self-isolating structure, and the subsequent cutting process can be cut along both sides of the groove, thereby not damaging the chip. Moreover, because the sidewalls of the groove are coated with oxide, the oxide will inhibit the growth of the epitaxial layer on the sidewall. Therefore, the epitaxial layer of the structure of the present invention is mainly concentrated at the bottom of the substrate, occupying a larger chip area, thereby improving the luminous brightness of the chip, and solving the problem in the background technology that the epitaxial layer of the chip grows along the sidewall when growing on the substrate, causing easy damage to the chip during cutting and reducing the brightness of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 Schematic diagram of a self-isolating structure substrate in a first embodiment of the present invention;

[0028] Figure 2 This is a schematic diagram of the structure of an epitaxial isolated LED chip in the first embodiment of the present invention;

[0029] The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings.

[0030] Description of main component symbols:

[0031] substrate 1 N-type semiconductor layer 12 PN electrode 14 P-type semiconductor layer 13 DBR Bragg reflector 15 PN pad 16 oxide layer 11 light-emitting layer 17 DETAILED DESCRIPTION

[0032] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. The drawings illustrate several embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.

[0033] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0035] Example 1

[0036] like Figure 1 As shown, this embodiment provides a method for preparing an epitaxial isolated LED chip, which includes the following steps S1-S8.

[0037] S1. Etching a groove on substrate 1.

[0038] Provide a substrate 1, form a first photolithography on the basis of the substrate 1, and then form a self-isolating structure substrate 1 by etching technology. Figure 1 As shown, the substrate 1 in this embodiment is a sapphire substrate 1, and a first photolithography pattern is covered on the sapphire substrate 1. The first photolithography pattern is a groove pattern, and the groove pattern is etched on the substrate 1 by etching techniques such as IPC, and finally a groove is formed on the substrate 1, wherein the depth of the groove is 5um-15um, and 8um is preferably used in this embodiment.

[0039] S2. Depositing a compound that inhibits the growth of the epitaxial layer on the bottom, top, and sidewalls of the recess of the substrate 1.

[0040] like Figure 2 As shown, Figure 2 For Figure 1 On the basis of the above, a compound that inhibits epitaxial layer growth is deposited in the groove of the substrate 1, wherein the compound is formed on the bottom, sidewalls, and top of the groove respectively. The oxide can be an oxide or a nitride, such as SiO2, TiO2, SiN, or AlN. The deposition method can be chemical deposition, vapor deposition, liquid deposition, or other deposition techniques.

[0041] In this embodiment, ALD (atomic layer deposition) is mainly used to deposit oxide, and the deposition steps are as S21-S24.

[0042] S21, introducing a first gas reactant into the chamber, controlling the introduction time to be 0.1s-60s, so that the first gas reactant undergoes chemical adsorption with the substrate in the reaction chamber;

[0043] S22, stopping the introduction of the first gas reactant, introducing a purge gas to remove the residual first gas reactant in the cavity, and controlling the blowing time to be 0.1s-60s, wherein the purge gas includes an inert gas;

[0044] S23, introducing a second gaseous reactant into the chamber, controlling the introduction time to be 0.1s-60s, so that the second gaseous reactant will chemically react with the substance adsorbed on the substrate;

[0045] S24, stop introducing the second gas reactant, introduce a purge gas to remove the residual second gas reactant in the cavity, and control the blowing time to be 0.1s-60s.

[0046] Repeat steps S21 to S24 until the thickness of the oxide deposited on the substrate 1 reaches a preset thickness, and finally form an oxide layer 11 on the bottom, top and sidewall of the groove. Each cycle can control the thickness of the oxide deposited on the groove surface to The final thickness of the deposited oxide is 10 nm to 1000 nm, preferably 100 nm in this embodiment.

[0047] In some other optional embodiments, the first gaseous reactant for depositing SiO2 may be silane, alkylsilane, aminosilane, alkylaminosilane, silanol, or alkoxysilane. The second gaseous reactant may be oxygen (O2), ozone (O3), atomic oxygen (O), hydrogen peroxide (H2O2), nitrous oxide (N2O), nitric oxide (NO), nitrogen pentoxide (N2O5), nitrogen dioxide (NO2), water (H2O), and derivatives or combinations thereof.

[0048] S3. Use etching technology to remove the compound at the top and bottom of the groove.

[0049] The ICP etching process is used to remove the oxide layer 11 at the top and bottom of the recessed substrate 1. The ICP etching process can evenly remove the oxide layer 11 at the top and bottom of the substrate 1, ultimately forming a recessed substrate 1 with oxide-wrapped sidewalls. The recessed substrate 1 is etched by ICP etching. Because ICP etching only etches in the vertical direction, the oxide layer 11 on the sidewalls cannot be removed. Only the oxide at the bottom and top of the recess is removed, ultimately forming a substrate 1 with a self-isolating structure. The self-isolating structure can isolate the chip in advance.

[0050] S4. Growing an epitaxial layer on the recessed substrate 1.

[0051] A second photolithographic pattern is formed at the bottom of the recessed substrate 1, forming a patterned sapphire substrate 1 at the bottom of the recess. In this embodiment, the second photolithographic pattern is conical. An N-type semiconductor layer 12, a quantum well light-emitting layer 17, and a P-type semiconductor layer 13 are sequentially grown upward within the recessed substrate 1. Because oxide is deposited on the sidewalls of the recess, but not at the bottom and top, which would inhibit the epitaxial layers from attaching to the sidewalls, the epitaxial layers converge and grow at the center of the recessed bottom. This increases the area occupied by the light-emitting layer 17, improving the chip's brightness.

[0052] After the epitaxial layer growth is completed, PN electrodes 14 are formed on the P-type semiconductor layer 13 and the N-type semiconductor layer 12, respectively. The bottom layer of the electrode layer is a highly reflective metal layer, such as aluminum or other metal. A DBR Bragg reflector layer 15 is deposited on one side of the P-type epitaxial layer. In the embodiment provided by the present invention, the DBR reflector layer is composed of alternating high-refractive index and low-refractive index film layers. The high-refractive index is TiO2, Ti3O5, or any combination thereof, while the low-refractive index is SiO2, SiNx, or any combination thereof. Furthermore, a PN pad 16 is fabricated. PN pad 16 is electrically conductive to PN electrode 14. In the embodiment provided by the present invention, the metal material used for the bottom layer of the pad is aluminum or other metal with high reflectivity.

[0053] S5. Cut the LED wafer to form core particles.

[0054] After the above steps are completed, a special film is deposited on the LED wafer surface using an E-Beam or Sputter machine. This film can be deposited at either high or low temperatures, and can be made from particles or a target. Finally, the chip is cut along the sides of the groove, which is lined with the substrate's insulating material, preventing damage to the chip itself. After cutting, LED chip particles are formed.

[0055] In summary, the method for preparing an epitaxially isolated LED chip in the above-mentioned embodiment of the present invention is to first etch a groove on the substrate, and deposit a compound that inhibits the growth of the epitaxial layer on the bottom, sidewalls and top of the groove, and then use etching technology to remove the compound at the top and top of the groove, leaving the compound on the sidewall to wrap the groove, forming a self-isolating structure, which can isolate the chip in advance, and then grow the epitaxial layer on the self-isolating structure. The self-isolating structure formed in advance and then growing the epitaxial layer can avoid contamination of the epitaxial layer by etching, and the subsequent cutting process can be cut along both sides of the substrate groove, so as not to damage the chip, solving the problem of epitaxial layer contamination caused by etching in the isolation technology in the background technology, resulting in low luminous efficiency of the LED chip. Furthermore, because the sidewalls of the groove are coated with the compound that inhibits the growth of the epitaxial layer, the epitaxial layer will mainly grow at the bottom of the substrate 1, avoiding growth on the sidewalls, thereby occupying a larger chip area and improving the luminous brightness of the chip.

[0056] Example 2

[0057] This embodiment provides an epitaxial isolated LED chip, such as Figure 1 The figure shows the self-isolating structure formed after etching in this embodiment. The substrate 1 is a sapphire substrate 1, and the depth of the groove formed after etching is 5um-15um.

[0058] like Figure 2 The epitaxial isolated LED chip is shown. The chip includes Figure 1 The substrate 1 with a self-isolating structure, and the N-type semiconductor layer 12, the light-emitting layer 17 and the P-type semiconductor layer 13 are sequentially arranged on the substrate 1 from bottom to top. The left and right side walls inside the groove are coated with compounds that can inhibit the growth of the epitaxial layer. The compounds can be oxides and nitrides, such as SiO2, TiO2, SiN, and AlN. In this embodiment, the compound coated on the sidewall is an oxide layer 11, wherein the thickness of the oxide layer 11 is 10nm-1000nm, preferably 100nm. The oxide is used to inhibit the growth of the epitaxial layer on the sidewall of the groove, so that the epitaxial layer is concentrated on the bottom of the groove. The N-type semiconductor layer 12, the light-emitting layer 17, and the P-type semiconductor layer 13 are sequentially located in the groove.

[0059] PN electrodes 14 are formed on the N-type semiconductor layer 12 and the P-type semiconductor layer 13 respectively. SiO2 and a DBR Bragg reflector layer 15 are deposited on one side of the P-type semiconductor layer 13. A PN pad 16 is provided on the DBR Bragg reflector layer 15 and is electrically connected to the PN electrode 14.

[0060] The epitaxially isolated LED chip in this embodiment forms a self-isolating structure by providing a groove in the substrate and disposing a compound capable of inhibiting epitaxial layer growth on the sidewalls of the groove. This pre-forms the self-isolating structure, allowing the epitaxial layer to be grown on the self-isolating structure. This prevents contamination of the epitaxial layer by etching in the prior art, and allows subsequent cutting along both sides of the groove without damaging the chip. Furthermore, because the sidewalls of the groove are coated with an oxide, which inhibits the growth of the epitaxial layer on the sidewalls, the epitaxial layer in the structure of the present invention is primarily concentrated at the bottom of the substrate, occupying a larger chip area and improving the chip's luminous brightness. This solves the problem of epitaxial layer contamination caused by etching in prior art isolation techniques, which results in low luminous efficiency in the LED chip.

[0061] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0062] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A method for preparing an epitaxial isolated LED chip, characterized in that: The method comprises: Providing a substrate, forming a first photolithographic pattern on the substrate, and etching a pattern corresponding to the first photolithographic pattern to form a groove on the substrate; Depositing a compound for inhibiting epitaxial layer growth on the bottom, sidewall and top of the groove respectively; removing the compound deposited on the top and bottom of the groove respectively by etching; forming a second photolithographic pattern on the substrate, etching a pattern corresponding to the second photolithographic pattern, and sequentially growing an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer at the bottom of the groove; In the steps of depositing a compound on the bottom, sidewall and top of the groove respectively: The first gas reactant is introduced into the cavity, and the introduction time is controlled to be 0.1s-60s; Stop introducing the first gas reactant and introduce a purge gas to remove the first gas reactant remaining in the cavity, and control the blowing time to be 0.1s-60s, wherein the purge gas includes an inert gas; The second gas reactant is introduced into the cavity, and the introduction time is controlled to be 0.1s-60s; Stop introducing the second gas reactant, introduce the purge gas to remove the second gas reactant remaining in the cavity, and control the blowing time to be 0.1s-60s; The above steps are repeated cyclically until the thickness of the deposited compound reaches a preset thickness.

2. The method for preparing an epitaxial isolated LED chip according to claim 1, wherein: The depth of the groove is 5um-15um.

3. The method for preparing an epitaxial isolated LED chip according to claim 1, wherein: The compound is an oxide or a nitride.

4. The method for preparing an epitaxial isolated LED chip according to claim 1, wherein: The second photolithographic pattern is a cone.

5. The method for preparing an epitaxial isolated LED chip according to claim 1, wherein: The substrate is a sapphire substrate.

6. The method for preparing an epitaxial isolated LED chip according to claim 1, wherein: The thickness of the compound is 10 nm to 1000 nm.

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