A method, device and storage medium for realizing global coupling of quantum chips

Abstract

The present application discloses a method, device and storage medium for realizing global coupling of quantum chips. The method includes: setting a planar waveguide resonant cavity in the center of the quantum chip, connecting the quantum bits in the quantum chip with the planar waveguide resonant cavity; when a two-bit logic gate operation is required between the first quantum bit and the second quantum bit, based on the first characteristic frequency corresponding to the first quantum bit and the second characteristic frequency corresponding to the second quantum bit, performing single-bit gate operations on the first quantum bit and the second quantum bit respectively; adjusting the first characteristic frequency and the second characteristic frequency to the characteristic frequency of the resonant cavity corresponding to the planar waveguide resonant cavity through flux control; performing an ISWAP gate operation on the first quantum bit and the second quantum bit during the control time of the flux control, thereby realizing a two-bit logic gate operation. The present application avoids adding additional two-bit logic gate operations when mapping quantum circuits to real quantum computing devices through the above method.

Description

Technical Field

[0001] The present application relates to the field of quantum computing technology, and in particular to a method, device and storage medium for realizing global coupling of quantum chips. Background Art

[0002] Superconducting quantum computing is currently recognized as one of the most likely technical solutions to commercialize quantum computing in a short period of time. However, when the quantum circuit corresponding to the quantum algorithm is applied to a real superconducting quantum computer, the topological structure of the quantum bit coupling in the quantum chip needs to be taken into account. Specifically, only when there is an actual physical coupling relationship between two real quantum bits in the quantum chip can the two-bit logic gate operation be directly applied between the two quantum bits, and there is no such restriction when designing quantum circuits. Therefore, it is possible that the two quantum bits acted on by the two-bit logic gate designed in the quantum circuit have no actual physical connection in the real quantum chip, so it is necessary to add an additional two-bit logic gate to equivalently realize this two-bit operation. For current quantum computing devices, two-bit logic gates are the main source of quantum operation errors, and the additional two-bit gates will directly affect the fidelity of the results of the quantum algorithm acting on the real quantum computer.

[0003] Therefore, how to avoid adding additional two-bit logic gate operations when mapping quantum circuits to real quantum computing devices becomes an urgent problem to be solved. Summary of the invention

[0004] The embodiments of the present application provide a method, device and storage medium for realizing global coupling of a quantum chip, so as to solve the following technical problem: how to avoid adding additional two-bit logic gate operations when mapping quantum circuits to real quantum computing devices.

[0005] In a first aspect, an embodiment of the present application provides a method for realizing global coupling of a quantum chip, characterized in that the method includes: setting a planar waveguide resonant cavity in the center of the quantum chip, and establishing a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity; when a two-bit logic gate operation is required between the first quantum bit and the second quantum bit, based on a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit, a first single-bit gate operation is performed on the first quantum bit, and a second single-bit gate operation is performed on the second quantum bit; wherein the first quantum bit and the second quantum bit are any two quantum bits in the quantum chip; through flux control, the first characteristic frequency corresponding to the first quantum bit and the second characteristic frequency corresponding to the second quantum bit are adjusted to the characteristic frequency of the resonant cavity corresponding to the planar waveguide resonant cavity; within the control time of the flux control, an iswap gate operation is performed on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit.

[0006] The embodiment of the present application provides a method for realizing global coupling of a quantum chip, which can establish a connection between any two quantum bits by using a planar waveguide resonant cavity as a switching center. When a two-bit logic gate operation is performed between a first quantum bit and a second quantum bit, a two-bit logic gate operation between the first quantum bit and the second quantum bit can be realized by respectively realizing a single-bit gate operation and an iswap gate operation, which effectively avoids adding an additional two-bit logic gate operation when mapping the quantum circuit to a real quantum computing device.

[0007] In one implementation of the present application, after the quantum bits in the quantum chip are connected to the planar waveguide resonant cavity, the method further includes: calibrating the iswap gates between all the quantum bits, specifically including: S1: preparing the first quantum bit from the |0> state to the |1> state through the Pauli-X gate; S2: based on the preset starting control time, performing magnetic flux control on the first quantum bit and the second quantum bit, so that the first characteristic frequency and the second characteristic frequency are adjusted to the characteristic frequency of the resonant cavity, and recording the states of the first quantum bit and the second quantum bit; wherein the states of the first quantum bit and the second quantum bit are represented by |jk> ; Wherein, |j> represents the basic state of the first quantum bit, and |k> represents the basic state of the second quantum bit; the basic states include: |0> state, |1> state; S3: Under the initial control duration, the first quantum bit and the second quantum bit are subjected to flux control for a preset number of times; S4: Based on the preset time step, the control duration of the flux control is adjusted, and S2-S3 are repeated until the termination control duration is reached; S5: Based on the probability that the states of the first quantum bit and the second quantum bit are |01> state and |10> state under each control duration, the operating parameters of the iswap gate between the first quantum bit and the second quantum bit are determined.

[0008] In one implementation of the present application, based on the probability that the states of the first qubit and the second qubit are the |01> state and the |10> state at each control time length, the operating parameters of the iswap gate between the first qubit and the second qubit are determined, specifically including: based on the probability that the states of the first qubit and the second qubit are the |01> state and the |10> state at each control time length, determining the Rabi oscillation between the |01> state and the |10> state; determining the time corresponding to a preset number of cycles in the Rabi oscillation as the operating parameter of the iswap gate between the first qubit and the second qubit.

[0009] In one implementation of the present application, the quantum bits in the quantum chip are designed using a frequency-adjustable SQUID structure.

[0010] In one implementation of the present application, after establishing a connection between the quantum bits in the quantum chip and the planar waveguide resonant cavity, the method further includes: adjusting the SQUID structure corresponding to each quantum bit so that the absolute value of the difference between the characteristic frequency corresponding to each quantum bit and the characteristic frequency of the resonant cavity is greater than a preset threshold, thereby ensuring sufficient isolation between each quantum bit and the planar waveguide resonant cavity without performing a two-bit logic gate operation.

[0011] In one implementation of the present application, based on a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit, a first single-bit gate operation is performed on the first quantum bit, and a second single-bit gate operation is performed on the second quantum bit, specifically including: determining the first characteristic frequency corresponding to the first quantum bit and the second characteristic frequency corresponding to the second quantum bit based on a first SQUID structure corresponding to the first quantum bit and a second SQUID structure corresponding to the second quantum bit; generating a first microwave signal and a second microwave signal based on the first characteristic frequency and the second characteristic frequency, and determining a first single-bit gate corresponding to the first quantum bit and a second single-bit gate corresponding to the second quantum bit respectively based on the first microwave signal and the second microwave signal; performing a first single-bit gate operation on the first quantum bit through the first single-bit gate, and performing a second single-bit gate operation on the second quantum bit through the second single-bit gate.

[0012] In one implementation of the present application, the method further includes: adjusting the characteristic frequency by flux control by changing the amplitude of a DC signal connecting the quantum bits.

[0013] In one implementation of the present application, a connection is established between a quantum bit in a quantum chip and a planar waveguide resonant cavity, specifically including: adding a preset model capacitor between the quantum bit and the planar waveguide resonant cavity to establish a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity.

[0014] In a second aspect, an embodiment of the present application further provides a device for achieving global coupling of quantum chips, characterized in that the device comprises: a processor; and a memory on which executable code is stored, and when the executable code is executed, the processor executes a method such as any one of the above.

[0015] In a third aspect, an embodiment of the present application further provides a non-volatile computer storage medium for achieving global coupling of a quantum chip, storing computer executable instructions, characterized in that the computer executable instructions are configured to: set a planar waveguide resonant cavity in the center of the quantum chip, and establish a connection between the quantum bits in the quantum chip and the planar waveguide resonant cavity; when a two-bit logic gate operation is required between the first quantum bit and the second quantum bit, based on a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit, perform a first single-bit gate operation on the first quantum bit, and perform a second single-bit gate operation on the second quantum bit; wherein the first quantum bit and the second quantum bit are any two quantum bits in the quantum chip; through flux control, the first characteristic frequency corresponding to the first quantum bit and the second characteristic frequency corresponding to the second quantum bit are adjusted to the characteristic frequency of the resonant cavity corresponding to the planar waveguide resonant cavity; within the control time of the flux control, perform an iswap gate operation on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 A flow chart of a method for realizing global coupling of quantum chips provided in an embodiment of the present application;

[0018] Figure 2 A schematic diagram of the internal structure of a device for realizing global coupling of quantum chips provided in an embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in combination with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0020] The embodiments of the present application provide a method, device and storage medium for realizing global coupling of a quantum chip, so as to solve the following technical problem: how to avoid adding additional two-bit logic gate operations when mapping quantum circuits to real quantum computing devices.

[0021] The technical solution proposed in the embodiments of the present application is described in detail below with reference to the accompanying drawings.

[0022] Figure 1 A flowchart of a method for realizing global coupling of quantum chips provided in an embodiment of the present application. Figure 1 As shown, a method for realizing global coupling of quantum chips provided in an embodiment of the present application specifically includes the following steps:

[0023] Step 101: a planar waveguide resonant cavity is arranged at the center of the quantum chip, and a connection is established between the quantum bits in the quantum chip and the planar waveguide resonant cavity.

[0024] In one embodiment of the present application, in order to achieve global coupling of the quantum chip, a planar waveguide resonant cavity is set as an exchange center in the center of the quantum chip in the embodiment of the present application, and the planar waveguide resonant cavity has a resonant cavity characteristic frequency. With the planar waveguide resonant cavity as the center, the quantum bits in the quantum chip adopt a frequency-adjustable SQUID structure design, and are all connected to the planar waveguide resonant cavity. A preset model capacitor is added between the quantum bit and the planar waveguide resonant cavity to establish a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity.

[0025] In one embodiment of the present application, after the quantum bit is connected to the planar waveguide resonant cavity, the SQUID structure corresponding to each quantum bit is adjusted so that the absolute value of the difference between the characteristic frequency corresponding to each quantum bit and the characteristic frequency of the resonant cavity is greater than a preset threshold, so that there is sufficient isolation between each quantum bit and the planar waveguide resonant cavity without performing a two-bit logic gate operation. It should be noted that maintaining sufficient isolation is to ensure the accuracy of the quantum bit operation. This is further illustrated by the following example.

[0026] For example, the characteristic frequency of the resonant cavity is ω0, and there are N quantum bits ω1, ω2, ..., ω N , for any i∈[1, 2, 3, ..., N], |ω i -ω0|>X; where X is a preset threshold.

[0027] It should be noted that, since any two-bit logic gate can be obtained by combining a single-bit gate and an ISWAP gate, the single-bit gate operation and the ISWAP gate operation can be implemented separately to realize any two-bit logic gate operation. Since the operation parameters of the corresponding ISWAP gates between different qubits are different, before using the corresponding ISWAP gates between qubits, the ISWAP gates between all qubits need to be calibrated.

[0028] First, it should be noted that in the embodiment of the present application, the first quantum bit and the second quantum bit are any two quantum bits in the quantum chip, respectively represented by j and k, and the first characteristic frequency and the second characteristic frequency can be respectively represented by ω j With ω kRepresented by, the characteristic frequency of the resonant cavity is represented by ω0.

[0029] Specifically, S1: prepare the first quantum bit from the |0> state to the |1> state through the Pauli-X gate;

[0030] S2: Based on the preset starting control time t1, the first quantum bit j and the second quantum bit k are subjected to magnetic flux control so that the first characteristic frequency ω j With the second characteristic frequency ω k Adjust to the cavity characteristic frequency ω0, and record the states of the first quantum bit and the second quantum bit; wherein the states of the first quantum bit j and the second quantum bit k are represented by |jk>; wherein |j> represents the basic state of the first quantum bit, and |k> represents the basic state of the second quantum bit; the basic state includes: |0> state, |1> state;

[0031] S3: Under the initial control time t1, the first quantum bit and the second quantum bit are subjected to magnetic flux control for a preset number of times A;

[0032] S4: Based on the preset time step t w , adjust the control time of the flux control, repeat S2-S3 until the termination control time t is reached e ; Understandably, t e =(m-1)t w +t1; wherein, m is the number of times the flux control is adjusted; it should also be noted that, in the embodiment of the present application, the flux control is adjusted to the characteristic frequency by changing the amplitude of the DC signal connecting the quantum bits.

[0033] S5: Based on the probability that the states of the first quantum bit j and the second quantum bit k are |01> and |10> at each control time length, determine the operating parameters of the iswap gate between the first quantum bit and the second quantum bit.

[0034] It should be noted that, based on the probability that the states of the first qubit and the second qubit are |01> and |10> under each control time length, determining the operation parameters of the iswap gate between the first qubit and the second qubit specifically includes the following steps:

[0035] Based on the probability that the states of the first quantum bit j and the second quantum bit k are |01> and |10> at each control time length, the Rabi oscillation between the |01> and |10> states is determined;

[0036] The time corresponding to a preset number of cycles in the Rabi oscillation is determined to be the operating parameter of the iswap gate between the first quantum bit j and the second quantum bit k.

[0037] Step 102: When a two-bit logic gate operation is required between the first quantum bit and the second quantum bit, a first single-bit gate operation is performed on the first quantum bit and a second single-bit gate operation is performed on the second quantum bit based on a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit.

[0038] In one embodiment of the present application, when a two-bit logic gate operation is required between a first quantum bit j and a second quantum bit k, the implementation of a single-bit gate operation on the first quantum bit j and the second quantum bit k specifically includes the following steps:

[0039] Based on the first SQUID structure corresponding to the first quantum bit j and the second SQUID structure corresponding to the second quantum bit k, the first characteristic frequency ω corresponding to the first quantum bit j is determined j The second characteristic frequency ω corresponding to the second quantum bit k k ; Based on the first characteristic frequency ω j With the second characteristic frequency ω k , generate a first microwave signal and a second microwave signal, and determine the first single-bit gate corresponding to the first quantum bit and the second single-bit gate corresponding to the second quantum bit based on the first microwave signal and the second microwave signal respectively; perform a first single-bit gate operation on the first quantum bit through the first single-bit gate, and perform a second single-bit gate operation on the second quantum bit through the second single-bit gate. It can be understood that the frequencies corresponding to the first microwave signal and the second microwave signal are ω respectively. j With ω k .

[0040] Step 103: By means of magnetic flux control, a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit are adjusted to the resonant cavity characteristic frequencies corresponding to the planar waveguide resonant cavity.

[0041] In one embodiment of the present application, the implementation of the iswap gate operation on the first quantum bit j and the second quantum bit k first requires flux control to change the first characteristic frequency ω corresponding to the first quantum bit j to j The second characteristic frequency ω corresponding to the second quantum bit k k , adjusted to the characteristic frequency ω0 of the resonant cavity corresponding to the planar waveguide resonant cavity; that is, the characteristic frequencies of quantum bits j and k are adjusted to ω by flux control. j =ω0=ω k .

[0042] Step 104: within the control time of the flux control, perform an iswap gate operation on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit.

[0043] In one embodiment of the present application, when the first characteristic frequency ω j With the second characteristic frequency ω k After adjusting to the characteristic frequency of the resonant cavity ω0, the control time t of the corresponding iswap gate operation parameters for the first quantum bit j and the second quantum bit k is continued jk , and at the control time t jk An iswap gate operation is performed on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit.

[0044] Based on the same inventive concept, the present application also provides a device for realizing global coupling of quantum chips, whose internal structure is as follows: Figure 2 shown.

[0045] Figure 2 A schematic diagram of the internal structure of a device for realizing global coupling of quantum chips provided in an embodiment of the present application. Figure 2 As shown, the device includes: a processor 201; a memory 202, on which executable instructions are stored. When the executable instructions are executed, the processor 201 executes a method for realizing global coupling of quantum chips as described above.

[0046] In one embodiment of the present application, the processor 201 is used to set a planar waveguide resonant cavity at the center of the quantum chip, and establish a connection between the quantum bits in the quantum chip and the planar waveguide resonant cavity; when a two-bit logic gate operation is required between the first quantum bit and the second quantum bit, a first single-bit gate operation is performed on the first quantum bit, and a second single-bit gate operation is performed on the second quantum bit based on a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit; wherein the first quantum bit and the second quantum bit are any two quantum bits in the quantum chip; through flux control, the first characteristic frequency corresponding to the first quantum bit and the second characteristic frequency corresponding to the second quantum bit are adjusted to the characteristic frequency of the resonant cavity corresponding to the planar waveguide resonant cavity; within the control time of the flux control, an iswap gate operation is performed on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit.

[0047] Some embodiments of the present application provide corresponding Figure 1 A non-volatile computer storage medium for realizing global coupling of quantum chips, storing computer executable instructions, wherein the computer executable instructions are set as:

[0048] A planar waveguide resonant cavity is arranged at the center of the quantum chip, and a connection is established between the quantum bit in the quantum chip and the planar waveguide resonant cavity;

[0049] When a two-bit logic gate operation is required between a first qubit and a second qubit, a first single-bit gate operation is performed on the first qubit and a second single-bit gate operation is performed on the second qubit based on a first characteristic frequency corresponding to the first qubit and a second characteristic frequency corresponding to the second qubit; wherein the first qubit and the second qubit are any two qubits in the quantum chip;

[0050] By controlling the magnetic flux, a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit are adjusted to the characteristic frequency of the resonant cavity corresponding to the planar waveguide resonant cavity;

[0051] During the control time of the flux control, an iswap gate operation is performed on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit.

[0052] Each embodiment in this application is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the IoT device and medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.

[0053] The system and medium provided in the embodiments of the present application correspond one-to-one to the method. Therefore, the system and medium also have similar beneficial technical effects to the corresponding methods. Since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the system and medium will not be repeated here.

[0054] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0055] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0056] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0057] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0058] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0059] The memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0060] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0061] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0062] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A method for realizing global coupling of quantum chips, characterized in that: The method comprises: A planar waveguide resonant cavity is arranged at the center of the quantum chip, and a connection is established between the quantum bit in the quantum chip and the planar waveguide resonant cavity; When a two-bit logic gate operation is required between a first qubit and a second qubit, a first single-bit gate operation is performed on the first qubit and a second single-bit gate operation is performed on the second qubit based on a first characteristic frequency corresponding to the first qubit and a second characteristic frequency corresponding to the second qubit; wherein the first qubit and the second qubit are any two qubits in the quantum chip; By magnetic flux control, the first characteristic frequency corresponding to the first quantum bit and the second characteristic frequency corresponding to the second quantum bit are adjusted to the resonant cavity characteristic frequency corresponding to the planar waveguide resonant cavity; During the control time of the flux control, an iswap gate operation is performed on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit; After establishing a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity, the method further includes: Calibrate the iswap gates between all qubits, including: S1: The first qubit is prepared from the |0> state to the |1> state through the Pauli-X gate; S2: Based on a preset starting control duration, the first quantum bit and the second quantum bit are subjected to magnetic flux control so that the first characteristic frequency and the second characteristic frequency are adjusted to the characteristic frequency of the resonant cavity, and the states of the first quantum bit and the second quantum bit are recorded; wherein the states of the first quantum bit and the second quantum bit are represented by |jk>; wherein |j> represents the basic state of the first quantum bit, and |k> represents the basic state of the second quantum bit; the basic state includes: |0> state, |1> state; S3: performing a preset number of magnetic flux controls on the first quantum bit and the second quantum bit during the initial control time; S4: Based on the preset time step, adjust the control duration of the flux control, and repeat S2-S3 until the termination control duration is reached; S5: Based on the probability that the states of the first quantum bit and the second quantum bit are |01> and |10> at each control time length, determine the operating parameters of the iswap gate between the first quantum bit and the second quantum bit.

2. A method for realizing global coupling of quantum chips according to claim 1, characterized in that: Based on the probability that the states of the first quantum bit and the second quantum bit are |01> and |10> at each control time length, determining the operation parameters of the iswap gate between the first quantum bit and the second quantum bit, specifically including: Based on the probability that the states of the first quantum bit and the second quantum bit are |01> state and |10> state at each control time length, determining the Rabi oscillation between the |01> state and the |10> state; The time corresponding to a preset number of cycles in the Rabi oscillation is determined as an operation parameter of an iswap gate between the first quantum bit and the second quantum bit.

3. A method for realizing global coupling of quantum chips according to claim 1, characterized in that: The quantum bits in the quantum chip are designed with a frequency-adjustable SQUID structure.

4. A method for realizing global coupling of quantum chips according to claim 3, characterized in that: After establishing a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity, the method further includes: The SQUID structure corresponding to each quantum bit is adjusted so that the absolute value of the difference between the characteristic frequency corresponding to each quantum bit and the characteristic frequency of the resonant cavity is greater than a preset threshold, so that each quantum bit and the planar waveguide resonant cavity have sufficient isolation without performing a two-bit logic gate operation.

5. A method for realizing global coupling of quantum chips according to claim 4, characterized in that: Based on a first characteristic frequency corresponding to the first quantum bit and a second characteristic frequency corresponding to the second quantum bit, performing a first single-bit gate operation on the first quantum bit and performing a second single-bit gate operation on the second quantum bit specifically includes: Determine a first characteristic frequency corresponding to the first qubit and a second characteristic frequency corresponding to the second qubit based on a first SQUID structure corresponding to the first qubit and a second SQUID structure corresponding to the second qubit; Generate a first microwave signal and a second microwave signal based on the first characteristic frequency and the second characteristic frequency, and determine a first single-bit gate corresponding to the first quantum bit and a second single-bit gate corresponding to the second quantum bit based on the first microwave signal and the second microwave signal respectively; A first single-bit gate operation is performed on the first quantum bit through the first single-bit gate, and a second single-bit gate operation is performed on the second quantum bit through the second single-bit gate.

6. A method for realizing global coupling of quantum chips according to claim 1, characterized in that: The method further comprises: By changing the amplitude of the DC signal connecting the quantum bits, the characteristic frequency can be adjusted by flux control.

7. A method for realizing global coupling of quantum chips according to claim 1, characterized in that: Establishing a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity specifically includes: A preset capacitor is added between the quantum bit and the planar waveguide resonant cavity to establish a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity.

8. A device for realizing global coupling of quantum chips, characterized in that: The device comprises: processor; and a memory having executable codes stored thereon, which, when the executable codes are executed, enable the processor to execute a method as described in any one of claims 1 to 7.

9. A non-volatile computer storage medium for realizing global coupling of quantum chips, storing computer executable instructions, characterized in that: The computer executable instructions are configured to: A planar waveguide resonant cavity is arranged at the center of the quantum chip, and a connection is established between the quantum bit in the quantum chip and the planar waveguide resonant cavity; When a two-bit logic gate operation is required between a first qubit and a second qubit, a first single-bit gate operation is performed on the first qubit and a second single-bit gate operation is performed on the second qubit based on a first characteristic frequency corresponding to the first qubit and a second characteristic frequency corresponding to the second qubit; wherein the first qubit and the second qubit are any two qubits in the quantum chip; By magnetic flux control, the first characteristic frequency corresponding to the first quantum bit and the second characteristic frequency corresponding to the second quantum bit are adjusted to the resonant cavity characteristic frequency corresponding to the planar waveguide resonant cavity; During the control time of the flux control, an iswap gate operation is performed on the first quantum bit and the second quantum bit, thereby realizing a two-bit logic gate operation between the first quantum bit and the second quantum bit; After establishing a connection between the quantum bit in the quantum chip and the planar waveguide resonant cavity, the method further includes: Calibrate the iswap gates between all qubits, including: S1: The first qubit is prepared from the |0> state to the |1> state through the Pauli-X gate; S2: Based on a preset starting control duration, the first quantum bit and the second quantum bit are subjected to magnetic flux control so that the first characteristic frequency and the second characteristic frequency are adjusted to the characteristic frequency of the resonant cavity, and the states of the first quantum bit and the second quantum bit are recorded; wherein the states of the first quantum bit and the second quantum bit are represented by |jk>; wherein |j> represents the basic state of the first quantum bit, and |k> represents the basic state of the second quantum bit; the basic state includes: |0> state, |1> state; S3: performing a preset number of magnetic flux controls on the first quantum bit and the second quantum bit during the initial control time; S4: Based on the preset time step, adjust the control duration of the flux control, and repeat S2-S3 until the termination control duration is reached; S5: Based on the probability that the states of the first quantum bit and the second quantum bit are |01> and |10> at each control time length, determine the operating parameters of the iswap gate between the first quantum bit and the second quantum bit.

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