Technological improvements for partial writes

By introducing volatile memory as a cache for non-volatile memory in the memory device, and using an interface controller to perform partial write command processing for dataset combination, the problems of low partial write efficiency and high power consumption in the memory device are solved, achieving efficient data storage and compatibility.

CN114639419BActive Publication Date: 2026-06-23MICRON TECHNOLOGY INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
MICRON TECHNOLOGY INC
Filing Date
2021-12-15
Publication Date
2026-06-23

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Abstract

This application is directed to improvements in technology for partial writes. A memory device can include a non-volatile memory and a volatile memory configured to serve as a cache for the non-volatile memory. The memory device can receive, from a host device, a write command for a first set of data provided by the host device. Based on the write command, the memory device can store the first set of data in a buffer coupled with the volatile memory. After storing the first set of data in the buffer, the memory device can communicate a set of data including the first set of data and a second set of data to the volatile memory. The first set of data and the second set of data can be associated with adjacent addresses of the volatile memory and can each have a size that is less than a threshold size associated with the volatile memory.
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