Ceramic microelectronic device and method for manufacturing the same

Abstract

Microelectronic devices and methods of making the same are provided that have a form factor (e.g., size and functionality) comparable to that of conventional microelectronic devices but with a substantially simplified design. Microelectronic devices and methods of implementing microelectronic devices can be formed without the need for vias. Exemplary dielectrics in these embodiments include, but are not limited to, high-Q, temperature-stable, and high-K dielectrics. Microelectronic devices and methods can be combined with any other passive electronic components (such as resistors or inductors) to further improve functionality and reduce space requirements on the circuit. Microelectronic devices and methods are configured to be mounted to short blocks or other devices without the use of through vias, thereby simplifying connections to the circuit.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit and priority under 35 U.S.C. §119(e) to U.S. Provisional Patent Application No. 62 / 867,786, entitled “Ceramic Microelectronic Devices and Methods of Their Manufacture,” filed on June 27, 2019. The disclosure of U.S. Provisional Patent Application No. 62 / 867,786 is incorporated herein by reference in its entirety for all purposes. Technical Field

[0003] The present application relates to ceramic microelectronic devices and methods for making the same. Background Art

[0004] Microelectronics is a subfield of electronics and deals with the study and manufacture (or microfabrication) of very small electronic designs and components. Typically, but not always, these devices may contain features on the order of micrometers or smaller. Ceramic microelectronics are microelectronic devices in which the support structure and some active components are formed from ceramic or glass materials. Co-fired ceramic devices are monolithic ceramic microelectronic devices in which the entire ceramic support structure and any conductive, resistive, and dielectric materials are fired simultaneously in a kiln. Typical devices include capacitors, inductors, resistors, transformers, and hybrid circuits. This technology is also used in the electronics industry for robust assembly and packaging of multilayer packages of electronic components, such as military electronics, MEMS, microprocessors, and RF applications. Summary of the invention

[0005] Apparatus and methods according to various embodiments of the present invention relate to ceramic microelectronic devices and methods of making the same.Many embodiments relate to ceramic microelectronic devices having at least one continuous electrode between at least two layers of ceramic dielectric.

[0006] Still further embodiments include continuous electrodes without the use of conductive pastes and / or vias in the device to form the circuit.

[0007] However, many embodiments are directed to microelectronic devices formed from continuous electrodes, including (but not limited to): capacitors, resistors, inductors, transformers, diodes.

[0008] Still other embodiments relate to ceramic microelectronic devices without vias.

[0009] There are also many embodiments for connecting the ceramic microelectronic device to external circuits, including (but not limited to): wire bonding, solder attach, and die bonding.

[0010] Still further embodiments eliminate the via filling process, simplifying the manufacturing process and eliminating numerous steps from the manufacturing method.

[0011] One embodiment of the present invention includes a microelectronic device, comprising: a dielectric; at least one first conductive layer, which has at least a first portion and a second portion, the first portion is embedded in the dielectric and extends through at least a portion of the dielectric along a first plane in the dielectric, so that a portion of a dielectric material forming the dielectric covers the first portion, the second portion is continuously interconnected with the first portion, and the second portion is in a second plane parallel to the first plane, wherein the second portion is exposed to the top surface of the dielectric or embedded in the dielectric.

[0012] In another embodiment, the microelectronic device further comprises at least one second conductive layer on the top surface of the dielectric body and parallel to the first plane of the first conductive layer, such that a dielectric material layer is disposed therebetween and defines a dielectric thickness.

[0013] In another embodiment, the microelectronic device further comprises

[0014] at least one second conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane within the dielectric body such that a portion of the dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion, and the second portion being exposed to a top surface of the dielectric body in a second plane parallel to the first plane; wherein the first planes of the first conductive layer and the second conductive layer are disposed parallel to each other within the dielectric body such that a layer of dielectric material is disposed therebetween and defines a dielectric thickness.

[0015] In yet another embodiment, the microelectronic device further includes at least one electronic component on the top surface of the dielectric body, the electronic component being connected to the microelectronic device through the second portion of the first conductive layer and the second portion of the second conductive layer.

[0016] Yet another embodiment also includes a microelectronic device further comprising at least one third conductive layer on the top surface of the dielectric body, parallel to the first portion of the first conductive layer and the first portion of the second conductive layer, wherein the third conductive layer overlaps the second portion of the first conductive layer, such that the dielectric material layer is disposed between the second conductive layer and the first portion of the first conductive layer and defines a first dielectric thickness. The dielectric material layer is disposed between the first portion of the second conductive layer and defines a second dielectric thickness.

[0017] In yet another embodiment, the microelectronic device further includes a conductive paste deposited on left and right sides of the microelectronic device, wherein the conductive paste partially overlaps a top surface and a bottom surface of the dielectric, wherein the bottom surface is opposite the top surface.

[0018] In another embodiment, the microelectronic device also includes at least one third conductive layer embedded in the dielectric and extending along a first plane within the dielectric and parallel to the first portion of the first conductive layer; at least one fourth conductive layer embedded in the dielectric and extending along a first plane within the dielectric and parallel to the first portion of the first conductive layer; wherein the third conductive layer and the fourth conductive layer are arranged parallel to each other within the dielectric, so that a dielectric material layer is arranged between the two and defines a dielectric thickness; and wherein the conductive layers are connected by conductive paste.

[0019] In another embodiment, the microelectronic device further comprises at least one third conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric and extending through at least a portion of the dielectric along a first plane within the dielectric, such that a portion of the dielectric material forming the dielectric covers the first portion, the second portion being continuously interconnected with the first portion, the second portion being exposed to a bottom surface of the dielectric in a second plane parallel to the first plane, wherein the bottom surface is opposite to the top surface; and at least one fourth conductive layer on the bottom surface of the dielectric, parallel to the first plane of the third conductive layer, such that a dielectric material layer is arranged between the two and defines a dielectric thickness.

[0020] In yet another embodiment, the microelectronic device further comprises at least one third conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric and extending through at least a portion of the dielectric along a first plane within the dielectric, so that a portion of the dielectric material forming the dielectric covers the first portion, the second portion is continuously interconnected with the first portion, and the second portion is exposed to a bottom surface of the dielectric in a second plane parallel to the first plane, wherein the bottom surface is opposite to the top surface; at least one fourth conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric and extending through at least a portion of the dielectric along a first plane within the dielectric, so that a portion of the dielectric material forming the dielectric covers the first portion, the second portion is continuously interconnected with the first portion, and the second portion is exposed to the bottom surface of the dielectric in a second plane parallel to the first plane; wherein the first planes of the third conductive layer and the fourth conductive layer are arranged parallel to each other within the dielectric, so that a dielectric material layer is arranged between the two and defines a dielectric thickness.

[0021] In another additional embodiment, the microelectronic device further

[0022] at least one second conductive layer having at least a first portion, a second portion, and a third portion, the first portion being embedded in the dielectric and extending through at least a portion of the dielectric along a first plane within the dielectric so that a portion of the dielectric material forming the dielectric covers the first portion, the second portion being continuously interconnected with the first portion, the second portion being exposed to a bottom surface of the dielectric in a second plane parallel to the first plane, the third portion being continuously interconnected with the first portion and embedded in the dielectric and extending through at least a portion of the dielectric along a third plane within the dielectric so that a portion of the dielectric material forming the dielectric covers the third portion, wherein the bottom surface is opposite to the top surface; wherein the first portion of the first conductive layer and the third portion of the second conductive layer are disposed parallel to each other within the dielectric so that a layer of dielectric material is disposed between the first portion of the first conductive layer and the third portion of the second conductive layer and defines a first dielectric thickness, and the first and third portions of the second conductive layer are disposed parallel to each other within the dielectric so that a layer of dielectric material is disposed between the first and third portions of the second conductive layer and defines a second dielectric thickness.

[0023] In another additional embodiment, the microelectronic device further comprises at least a third portion of the first conductive layer, which is continuously interconnected with the first portion and embedded in the dielectric body, and extends through at least a portion of the dielectric body along a third plane in the dielectric body, so that a portion of the dielectric material forming the dielectric body covers the third portion; at least a second conductive layer, the at least second conductive layer having at least a first portion, a second portion, and a third portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body, so that a portion of the dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion, the second portion being exposed to a bottom surface of the dielectric body in a second plane parallel to the first plane, and the third portion being continuously interconnected with the first portion and embedded in the dielectric body. within the dielectric body, and extending along a third plane within the dielectric body through at least a portion of the dielectric body so that a portion of the dielectric material forming the dielectric body covers the third portion, wherein the bottom surface is opposite to the top surface; wherein the first and third portions of the first conductive layer are arranged parallel to each other within the dielectric body so that the dielectric material layer is arranged between the first and third portions of the first conductive layer and defines a first dielectric thickness, and the first and third portions of the second conductive layer are arranged parallel to each other within the dielectric body so that the dielectric material layer is arranged between the first and third portions of the second conductive layer and defines a second dielectric thickness, and the third portions of the first conductive layer and the second conductive layer are arranged parallel to each other within the dielectric body so that the dielectric material layer is arranged between the first conductive layer and the third portions of the second conductive layer and define a third dielectric thickness.

[0024] In yet another embodiment, the microelectronic device further includes at least a third portion of the first conductive layer that is continuously interconnected with the first portion, the third portion being exposed to a top surface of the dielectric body in the second plane.

[0025] In yet another embodiment, the microelectronic device further comprises at least a second conductive layer on the top surface of the dielectric body, such that the second and third portions of the first conductive layer are on the same top surface as the second conductive layer; wherein an electronic component is deposited on the top surface of the dielectric body and connected to the third portion of the first conductive layer and the second conductive layer.

[0026] In yet another embodiment, the electronic component is an inductor.

[0027] In another embodiment, the microelectronic device also includes at least a second and a third conductive layer on the top surface of the dielectric, so that the second and third portions of the first conductive layer and the second and third conductive layers are on the same top surface; wherein an electronic component is deposited on the top surface of the dielectric and connected to the second conductive layer and the third conductive layer.

[0028] In yet another additional embodiment, the microelectronic device further comprises at least a third conductive layer on the top surface of the dielectric body, such that the second portions of the first and second conductive layers are on the same top surface as the third conductive layer; wherein an electronic component is deposited on the top surface of the dielectric body and connected to the second portions of the first conductive layer and the third conductive layer.

[0029] In yet another embodiment, the first conductive layer and the second portion of the second conductive layer are independently wire bonded to a portion of the circuit.

[0030] In yet another embodiment, at least the dielectric body is formed of a material selected from the group consisting of P100, NPO, X7R, and Y5V dielectric materials.

[0031] Yet another additional embodiment includes a method of manufacturing a microelectronic device: casting a sheet of a dielectric substrate having first and second surfaces; forming an opening in the dielectric substrate; applying a plurality of conductive layers to the sheet of the dielectric substrate; aligning the sheet of the dielectric substrate so that at least a first conductive layer has at least a first portion and a second portion, the first portion being embedded within the dielectric material and extending through at least a portion of the dielectric body along a first plane within the dielectric body, so that a portion of the dielectric material forming the dielectric body covers the first portion, the second portion is continuously interconnected with the first portion, the second portion is in a second plane parallel to the first plane, wherein the second portion is exposed to a top surface of the dielectric body or embedded within the dielectric body; laminating the aligned sheets together; cutting the sheets into singulated devices; and sintering the devices.

[0032] In yet another embodiment, firing is again included, which may include one of curing or firing.

[0033] Yet another embodiment further comprises firing prior to cutting.

[0034] Additional embodiments and features are set forth in part in the following description, and in part will become apparent to those skilled in the art upon examination of the specification, or may be learned by practicing the disclosed subject matter. A further understanding of the nature and advantages of the present disclosure may be achieved by reference to the remainder of the specification and the accompanying drawings which form a part of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] These and other features and advantages of the present invention will be better understood by reference to the following detailed description when considered in conjunction with the accompanying data and drawings, in which:

[0036] Figure 1 A schematic diagram of a ceramic microelectronic device having vias according to the prior art is provided.

[0037] Figure 2 A schematic diagram of stencil printing of conventional vias in ceramic microelectronic devices according to the prior art is provided.

[0038] Figure 3 Schematic diagrams of ceramic microelectronic devices according to certain embodiments are provided.

[0039] Figure 4 A flow chart of a method of fabricating a ceramic microelectronic device according to certain embodiments is provided.

[0040] Figure 5 Schematic diagrams of methods of fabricating ceramic microelectronic devices according to certain embodiments are provided.

[0041] Figure 6 Schematic diagrams of cutting ceramic microelectronic devices according to certain embodiments are provided.

[0042] Figure 7 Schematic diagrams of capacitors having one curved electrode formed in a ceramic microelectronic device according to certain embodiments are provided.

[0043] Figure 8 Schematic diagrams of capacitors with two curved electrodes formed in ceramic microelectronic devices according to certain embodiments are provided.

[0044] Fig. 9 Schematic diagrams of capacitors with additional electrical components formed in a ceramic microelectronic device are provided in accordance with certain embodiments.

[0045] Fig.10 Schematic diagrams of more complex capacitors with curved electrodes formed in ceramic microelectronic devices according to certain embodiments are provided.

[0046] Fig.11 Schematic diagrams of ceramic microelectronic devices with end terminations including single capacitors and multilayer capacitors are provided in accordance with certain embodiments.

[0047] Fig.12 Schematic diagrams of ceramic microelectronic devices having top and bottom surfaces including curved electrodes are provided in accordance with certain embodiments.

[0048] Fig.13Schematic diagrams of capacitors having curved electrodes on opposing sides of a ceramic microelectronic device are provided in accordance with certain embodiments.

[0049] Fig.14 Schematic diagrams of capacitors having curved electrodes with multiple bends on opposing faces of a ceramic microelectronic device are provided in accordance with certain embodiments.

[0050] Fig.15 Schematic diagrams of ceramic microelectronic devices having electrodes that curve inside the ceramic body and return again to the top surface, thereby forming tunnels that bypass components on the top surface of the device, are provided in accordance with certain embodiments.

[0051] Fig.16 Schematic diagrams of ceramic microelectronic devices including inductors according to certain embodiments are provided.

[0052] Fig.17 Schematic diagrams of ceramic microelectronic devices including inductors and capacitors according to certain embodiments are provided.

[0053] Fig.18 Schematic diagrams of ceramic microelectronic devices having end terminations including inductors and capacitors are provided in accordance with certain embodiments.

[0054] Figures 19A-19B Schematic diagrams of inductors (19A) and end terminations in castellations (19B) in ceramic microelectronic devices according to certain embodiments are provided.

[0055] Fig. 20 Schematic diagrams of ceramic microelectronic devices including inductors with end terminations and multilayer capacitors are provided in accordance with certain embodiments.

[0056] Fig.21 Schematic diagrams of ceramic microelectronic devices having a continuous conductor with two curved electrodes to bypass electrical components are provided in accordance with certain embodiments.

[0057] Fig. 22 Schematic diagrams of ceramic microelectronic devices having a continuous conductor with two bent electrodes to bypass an electrical component and connect to another electrical component are provided in accordance with certain embodiments.

[0058] Fig.23 Schematic diagrams of ceramic microelectronic devices having electrical components and decoupling capacitors are provided in accordance with certain embodiments.

[0059] Figures 24A-24B Schematic diagrams of interconnections of microelectronic devices and circuits according to certain embodiments are provided. DETAILED DESCRIPTION

[0060] The embodiments of the invention described herein are not intended to be exhaustive or to limit the invention to the precise forms disclosed. Rather, the embodiments have been chosen for description to enable those skilled in the art to practice the invention.

[0061] Turning now to the accompanying drawings, microelectronic devices and methods of making the same are provided that have a form factor (e.g., size and functionality) comparable to that of conventional microelectronic devices but have a substantially simplified design. Many embodiments of the present invention provide microelectronic devices and methods of implementing at least one continuous electrode between at least two layers of pre-fired ceramic sheets having dielectric properties. In some embodiments, at least one continuous electrode forms a conductive pad on a first plane and an embedded electrode is formed on a second plane parallel to the first plane. According to some embodiments, the continuous electrode forms a curved structure connecting two parallel planes. Many embodiments of the present invention provide microelectronic devices and methods of implementing microelectronic devices that can be formed without the need for conventional vias.

[0062] Many embodiments include more than one continuous electrode in various configurations to form multiple microelectronic devices. In such embodiments, the continuous electrode can form an electronic component within the microelectronic device. Examples of microelectronic devices formed by continuous electrodes according to some embodiments include (but are not limited to): capacitors, resistors, inductors, transformers, diodes. The electronic components in such embodiments can be connected in series, in parallel, or any combination thereof. Exemplary ceramic dielectrics in these embodiments include, but are not limited to, high-Q, temperature-stable, and high-K dielectrics. Many embodiments of the present invention provide microelectronic devices and methods that implement the integration of multiple dielectric types in a single device that produces high-frequency performance characteristics. Exemplary dielectric materials in these embodiments include, but are not limited to, P100, NP0, X7R, Y5V. Many embodiments provide microelectronic devices and methods that implement at least one thin single-layer capacitor interconnected to a Low Temperature Co-Fired Ceramic (LTCC) substrate. In multiple embodiments, the capacitors and methods described below allow devices to be manufactured with much higher capacitance.

[0063] In many embodiments, a continuous electrode in a ceramic microelectronic device can be assembled from a plurality of ceramic sheets. Some ceramic sheets used to manufacture ceramic microelectronic devices according to some embodiments do not have metallization or openings. In some embodiments, some ceramic sheets are cast, blanked, punched and metallized with metal conductors on the surface. In some embodiments, the ceramic sheet can be an unfired ceramic material. Examples of ceramic sheets include, but are not limited to: Ferro A6M. In some embodiments, a conductive paste compatible with dielectric materials can be used for the metallization process. Examples of conductors compatible with Ferro A6M include, but are not limited to: Ferro CN30-080M gold paste. In many embodiments, ceramic sheets with and without metallization are aligned and laminated. In many embodiments, sufficient lamination pressure can be applied to form a device with a flat top and bottom surface. In some embodiments, lamination is performed under isostatic pressing. In some embodiments, sintering may include a firing process, but may also include curing. Due to the plastic nature of the ceramic sheet, the metal conductor is slightly deformed. According to various embodiments, this allows a continuous electrode to connect the outside of the device to an internal layer within the ceramic component, thereby avoiding the need for a via. In some embodiments, a continuous electrode can connect two layers within the device, thereby avoiding the need for a buried via.

[0064] In some embodiments, the dielectric sheet and metal electrodes can be made using screen printing and / or digital printing techniques. Some embodiments describe dielectric substrates that can be screen printed. Many embodiments include screen printed metal electrodes. In some embodiments, 3D printing processes can be used to make dielectric substrates and electrodes.

[0065] Various embodiments include continuous electrodes that can be bent at different angles, which makes it possible to manufacture more complex electronic components within a microelectronic device. In some embodiments, a conductive material can be applied to the side of the microelectronic device to allow other internal electronic components or electrodes to be connected to the bent electrode. In an embodiment, the side termination portion can allow greater flexibility in mounting the device to an external circuit. In many embodiments, continuous electrodes can be formed on both sides of a ceramic microelectronic device. Being able to manufacture curved electrodes on both sides of a device can eliminate the need to orient the device and provide redundant circuits and / or add additional electronic components to the same device. Some embodiments implement a continuous electrode with multiple bends that can penetrate deeper into a dielectric device. In various embodiments, the continuous electrode can be bent inside a ceramic body and returned to the surface to create a tunnel that bypasses a component on the surface of the microelectronic device. In some embodiments, the component can be a spiral inductor.

[0066] Many embodiments of the present invention provide microelectronic devices and methods that can be combined with any other passive electronic components (such as resistors or inductors), thereby further improving functionality and reducing space requirements on the circuit. Some embodiments provide microelectronic devices and methods that are configured to be mounted to a short block or other device without using a through-hole, thereby simplifying the connection to the circuit. In some embodiments, a ceramic microelectronic device with a continuous electrode can be connected to at least one external component. The external component can be any electronic circuit component. Examples of external components include (but are not limited to): capacitors, resistors, inductors, transformers, diodes, transistors, conductors, and ground planes. In some embodiments, the microelectronic device can be wire-bonded, solder-attached, and / or die-bonded to connect to an external circuit. Continuous electrodes can eliminate the risk of electrical failures caused by poor connections between vias and electrodes. According to various embodiments, the elimination of vias can reduce the complexity and cost of manufacturing ceramic microelectronic devices.

[0067] These and other embodiments and methods described below allow ceramic microelectronic devices to be made smaller, ultimately saving space on the circuit and allowing the ability to miniaturize or add redundant circuitry in the same space for high reliability applications.

[0068] Microelectronics

[0069] Co-fired ceramic devices are manufactured using a multilayer process. The starting material is a composite green tape, which consists of ceramic particles mixed with a polymer binder. Green tape refers to unfired ceramic material. The tape is flexible and can be machined, for example, using cutting, milling, punching and embossing. Metal structures can be added to the layers, typically using via filling and screen printing. The individual tapes are then bonded together in a lamination process before the device is fired in a kiln, where the polymer portion of the tape burns and the ceramic particles sinter together, forming a hard and dense ceramic component.

[0070] Co-firing can be divided into low-temperature (LTCC) and high-temperature (HTCC) applications: low-temperature means that the sintering temperature can be below 1000°C (1830°F), while high-temperature is around 1600°C (2910°F). The lower sintering temperature of LTCC materials is achieved by adding a glass phase to the ceramic, which reduces its melting temperature.

[0071] Due to the multilayer approach based on glass ceramic sheets, the technology offers the possibility to integrate passive electrical components, which are usually manufactured in thick film technology, into the LTCC body and conductor lines. This is different from semiconductor device manufacturing, in which layers are processed serially and each new layer is manufactured on top of the previous layer.

[0072] Blind vias and buried vias are used to connect between layers of ceramic multilayer circuits, where space is at a premium. Blind vias connect an outer layer to one or more inner layers but do not pass through the entire board. Buried vias connect two or more inner layers but do not pass through an outer layer.

[0073] Many ceramic microelectronic devices are manufactured using a multilayer approach. This includes devices such as conductors, capacitors, inductors, resistors, transformers, and hybrid circuits, as well as packaging of devices for medical, military, MEMS, microprocessors, microwave, and RF applications. Many of these devices can be manufactured as individual components or combined to form a monolithic circuit. Conventionally, such devices are constructed using layers of ceramic sheets with specific dielectric properties. Individual sheets are patterned using pastes with different conductive properties. The sheets are stacked together, and vias are used to connect the different layers of conductive paste to form a circuit or device. Exemplary process steps for creating such a device may include the following:

[0074] ·Ceramic sheet punching

[0075] Via punching

[0076] Via forming

[0077] oVia filling

[0078] oExtruded Vias

[0079] oDry filled via tape

[0080] Conductor printing

[0081] Layer alignment and lamination

[0082] ·sintering

[0083] Cut into individual devices / circuits

[0084] The formation and filling of vias themselves requires multiple steps. There are also many potential problems associated with the use of vias in these devices, including poor connection to the buried conductive layer, which may lead to device failure and changes in surface topography associated with shrinkage of the via filling material. Changes in surface topography may affect the ability to connect the device to external circuits using wire bonding, soldering or other attachment techniques. Changes in surface topography may also affect the integrity of additional thin film layers or thick film layers (such as conductors or resistors).

[0085] exist Figure 1An example of a simple ceramic capacitor manufactured using via technology is schematically shown in FIG. An external pad (2) is connected to a conductor or other component (3) contained within a ceramic body (1) using a via (4). This type of component will typically be built in a multilayer structure where the internal conductor (3) and external pad (2) are screen printed on a ceramic tape. The vias are punched out on a sheet of additional ceramic tape. The vias are then filled (4) using a stencil printing process. The sheets are aligned, pinned together, laminated and fired to produce a monolithic ceramic component. This system requires multiple screens and printing processes to produce a simple electrical connection between horizontal layers in a microelectronic ceramic component. The ability to completely fill the via during stencil printing and the shrinkage of the via material during the sintering process can result in voids within the via itself and possible connection issues between the via (4) and the external pad (2) and internal conductor (3). These can lead to reliability issues and performance issues for the device that are often exacerbated at higher voltages and frequencies. These types of devices are typically wire bonded to external circuits that require a flat surface for reliable connections. Shrinking vias often leave "pits" on the top surface of the conductive pad (2), which can make wire bonding difficult.

[0086] exist Figure 2 An example of a stencil printing process for making vias in a microelectronic device is schematically shown in . A raw ceramic sheet containing punched vias (11) is placed on a substrate (12). The substrate (12) is typically composed of a porous material, and a vacuum is applied to the substrate to secure the ceramic sheet (11) and assist in filling the vias. A metal template (14) having openings corresponding to the vias in the ceramic tape (11) is carefully aligned with the ceramic sheet. A conductive paste (13) is pushed through the template by a squeegee (15), leaving the filled vias (16). This method presents a number of technical difficulties that require careful attention. Typically, the vias are left incompletely filled or are overfilled with conductive paste, and a planarization step is required. Correctly filling vias on extremely thin ceramic sheets is also difficult because, for stability, these ceramic sheets must be backed by a PET film. Removing this film during the stacking stage removes the via filling material or leaves material beyond the vias.

[0087] Embodiments of microelectronic devices

[0088] Devices according to various embodiments of the present invention rely on a continuous electrode that can connect the exterior of the microelectronic device to at least one internal layer within the ceramic body of the device. As discussed further below, according to various embodiments of the present invention, any of a variety of electrode structures can be appropriately utilized depending on the requirements of a particular application.

[0089] Many embodiments relate to microelectronic devices in which vias are replaced by novel electrode structures. In various embodiments, the microelectronic part has at least one continuous electrode between at least two layers of pre-fired ceramic dielectric. According to some embodiments, the at least one continuous electrode can form a conductive pad on a first plane and an embedded electrode on a second plane parallel to the first plane. According to various embodiments, the continuous electrode can form a curved structure connecting two parallel planes, thereby forging a connection to the outside of the device to an inner layer within the ceramic component, thereby eliminating the need for vias. In some embodiments, the continuous electrode can connect two layers within the device, thereby avoiding the need for buried vias. In some embodiments, the continuous electrode can replace blind vias and / or buried vias.

[0090] Figure 3 A microelectronic device with curved electrodes according to an embodiment of the present invention is shown in FIG. The device includes a single continuous electrode (10) having parallel portions within a dielectric (9). The metal conductor (10) is slightly curved to allow the continuous electrode to pass from the outside of the device and reach the inner layer within the ceramic dielectric component without the use of vias. The device can be sintered to produce a single-piece component. The conductive surface of the metal conductor 10 can be directly bonded to an external circuit.

[0091] Although the above reference Figure 3 The structures of continuous electrodes and curved electrodes in microelectronic devices are described, but according to various embodiments of the present invention, any kind of structure that implements continuous electrodes connecting different layers by bending can be utilized in the design and manufacture of microelectronic devices to suit the requirements of a specific application. The process for manufacturing microelectronic devices according to various embodiments of the present invention is further discussed below.

[0092] Method for manufacturing a microelectronic device

[0093] Methods and processes according to various embodiments of the present invention rely on fabricating a microelectronic device having at least one continuous electrode. As discussed further below, according to various embodiments of the present invention, any of a variety of fabrication processes may be appropriately utilized depending on the requirements of a particular application.

[0094] Figure 4, a method for manufacturing a microelectronic device with continuous electrodes according to an embodiment of the present invention is shown in . Process 400 can begin with casting a ceramic sheet (401). Many embodiments relate to embodiments that include a pre-fired dielectric substrate. In some embodiments, the ceramic sheet has dielectric properties. Exemplary ceramic dielectric properties in these embodiments include, but are not limited to, high Q, temperature stable, and high K dielectrics. Exemplary dielectrics in these embodiments include, but are not limited to, P100, NPO, X7R, Y5V. In some embodiments, the ceramic sheet can be a green tape, which refers to an unfired ceramic material. Examples of ceramic sheets include, but are not limited to, Ferro A6M. Many embodiments provide integrated microelectronic devices and methods that implement multiple dielectric types in a single device that manufactures high frequency performance characteristics. The ceramic sheet is then punched (402). Openings are punched out in some of the punched ceramic sheets (403). The ceramic sheet is metalized (404) with a conductor material. In some embodiments, a conductive paste compatible with the dielectric material can be used in the metallization process. Examples of conductors compatible with Ferro A6M include (but are not limited to): Ferro CN30-080M gold paste. Some of the ceramic sheets are not metallized (not shown). The metallized and unmetallized ceramic sheets are then aligned and laminated (405). Careful positioning and design of the openings and positioning of the metallization pattern allow continuous conductors to deform from one layer to one or more adjacent layers. In some embodiments, the lamination pressure is sufficient to form a device with a flat top surface. In some embodiments, the lamination is performed under isostatic pressing. The laminated ceramic sheets are sintered to form a monolithic microelectronic device (406). In some embodiments, sintering may include a firing process. In many embodiments, once the layers are deposited and formed, they can be cured / fired, ground as needed to form the appropriate thickness, and then covered with the desired conductive layer to form the device. The sheets can then be cut (407) as needed to form individual devices, such as electronic components and / or circuits. Figure 5 A method for manufacturing a microelectronic device having continuous electrodes assembled from ceramic sheets according to an embodiment of the present invention is shown in FIG.

[0095] Process 501 shows a multi-layer green ceramic sheet: the base layer (5) of the green ceramic sheet has no metallization or openings, the layer (6) of the green ceramic sheet has a metal conductor (7) printed on top, and the top layer of the green ceramic sheet has openings (8) punched into it and no metal print. Process 502 shows the green ceramic sheets from process 301 being carefully aligned and secured to each other.

[0096] Process 503 shows subjecting the stack of ceramic sheets from process 502 to isostatic pressing to form a device with a flat top surface. Due to the plastic nature of the ceramic sheets, the metal conductor (10) deforms slightly. This allows a continuous electrode to pass from the outside of the device and reach the inner layer within the ceramic component. The device can now be sintered to form a single component. In such an embodiment, the green ceramic sheets can be formulated by dispersing ceramic powders into a polymer binder system. When subjected to lamination conditions, the stack of ceramic loaded sheets may undergo plastic deformation. According to certain embodiments, careful positioning and design of the openings and positioning of the metallization pattern allow the continuous conductor to deform from one layer to one or more adjacent layers.

[0097] In certain embodiments, multiple microelectronic devices may be fabricated on the same substrate. Once the ceramic sheets are deposited and formed, they may then be cured / fired, ground as needed to form the appropriate thickness, and then covered with the desired conductive layer to form the device. Figure 6 Multiple devices on the same substrate are shown according to an embodiment. The sheet can be cut (a / b) as needed to form individual devices.

[0098] Although the above reference Figure 4-6 Methods for fabricating continuous electrodes and curved electrodes in microelectronic devices are described, but according to various embodiments of the present invention, any kind of process for fabricating continuous electrodes that are curved to connect different layers can be used in the design and manufacture of microelectronic devices to suit the requirements of a particular application.

[0099] Embodiments of implementing a microelectronic device

[0100] Devices according to many embodiments of the present invention rely on continuous electrodes within microelectronic devices, which can form various electronic components. Although some device architectures are provided and discussed below, it should be understood that electrode structures according to embodiments can be expected to be used in other devices. As further discussed below, according to various embodiments of the present invention, any of a variety of microelectronic devices can be appropriately utilized according to the requirements of a particular application.

[0101] Many embodiments include that more than one continuous electrode may be formed in a microelectronic device. In such embodiments, the continuous electrode may form an electronic component within the microelectronic device. Examples of microelectronic devices formed with continuous electrodes include (but are not limited to): capacitors, resistors, inductors, transformers, diodes, conductors, ground planes. The electronic components in such embodiments may be connected in series, in parallel, or any combination thereof.

[0102] Figure 7, a microelectronic device with curved electrodes forming a capacitor according to an embodiment of the present invention is shown in . In some such embodiments, a ceramic body (101) includes a continuous electrode (102) that forms a conductive pad on the external top surface or first plane of the device and an embedded electrode in a second plane parallel to the first plane within the device, as shown in 701. Additional electrodes (103) are printed on the top surface of the device and serve as external pads and electrodes to create a simple capacitor. 702 represents a simplified circuit diagram of a capacitor as shown in 701.

[0103] Figure 8 A microelectronic device having two curved electrodes forming a capacitor therein according to an embodiment of the present invention is shown in 801. In some such embodiments, a ceramic body (104) is provided that includes two continuous electrodes (105, 106) as shown in 801. Each continuous electrode has a conductive pad on the external top surface or first plane of the device and an embedded electrode in a second plane within the device parallel to the first plane. The parallel continuous electrodes 105 and 106 form a capacitor embedded within the device (104). Additional curved electrodes can be added to make more complex components or arrays. 802 represents a simplified circuit diagram of a capacitor as shown in 801.

[0104] Many embodiments of the present invention provide microelectronic devices and methods that can be combined with any other passive electronic components (such as resistors or inductors), thereby further improving functionality and reducing space requirements on the circuit. Some embodiments provide microelectronic devices and methods that are configured to be mounted to short blocks or other devices without the use of through-holes, thereby simplifying the connection to the circuit. In some embodiments, the ceramic microelectronic device with continuous electrodes can be connected to at least one external component. The external component can be any electronic circuit component. Examples of external components include (but are not limited to): capacitors, resistors, inductors, transformers, diodes, transistors, conductors, ground planes.

[0105] Fig. 9 A microelectronic device according to an embodiment of the present invention is shown in , which has two curved electrodes that form a capacitor internally and has additional external components. In some such embodiments, a ceramic body (107) is provided that includes two continuous electrodes (108, 109) as shown in 901. Each continuous electrode has a conductive pad on the external top surface or first plane of the device and an embedded electrode in a second plane parallel to the first plane within the device. Parallel continuous electrodes 108 and 109 form a capacitor embedded in the device. Additional external components can be applied to the surface (110) connected to one or more electrodes. The external component can be a resistor or other electrical component. 902 represents a simplified circuit diagram of a capacitor connected to an electrical component as shown in 901.

[0106] Many embodiments include at least one continuous electrode having additional printed electrodes on a surface of the microelectronic device. Fig.10 1001 shows a microelectronic device having two curved electrodes and additional printed electrodes forming a capacitor according to an embodiment of the present invention. In some such embodiments, a ceramic body (111) includes two continuous electrodes (112, 113) as shown in 1001. Each continuous electrode has a conductive pad on the external top surface or first plane of the device and an embedded electrode in a second plane parallel to the first plane within the device. Parallel continuous electrodes (112) and (113) are embedded within the device. One of the continuous electrodes (113) has an additional printed electrode (113') after stacking the top layer, thereby forming a forked electrode. The forked electrodes (113) and (113') can interact with the second continuous electrode (112) to form a more complex capacitor. 1002 represents a simplified circuit diagram of the capacitor network shown in 1001.

[0107] In some embodiments, conductive material may be applied to the sides of the microelectronic device to terminate the conductive pathway and allow other internal electronic components or electrodes to connect with the curved electrodes. In another embodiment, the side terminations may allow for greater flexibility in mounting the device to external circuits.

[0108] In many embodiments, single layer capacitors using curved electrodes may be provided in combination with multilayer capacitors. According to certain embodiments, devices of this construction may be particularly useful in high frequency or broadband circuits. Some embodiments are configured to provide as low an inductance as possible (at least for the lower capacitor portion). The use of via connections in the device inherently adds some inductance, so according to some embodiments, removing vias is particularly advantageous in high frequency applications. In addition, in some embodiments, the need for wire bonding may be eliminated by positioning the curved electrode capacitor at the bottom of the device (again reducing inductance). According to such embodiments, there are also performance advantages to positioning the capacitor as close to the ground plane of the circuit as possible.

[0109] exist Fig.11, a microelectronic device having single layer capacitors and multilayer capacitors inside a ceramic body with side terminations according to an embodiment of the present invention is shown. In some such embodiments, the ceramic body (114) includes a continuous electrode (115) that forms a conductive pad on the external top surface or first plane of the device and an embedded electrode in a second plane parallel to the first plane within the device, as shown in 1101. Electrodes (116) are printed on the top surface of the device and serve as external pads and electrodes to form a simple capacitor. External conductive "terminations" (118) can be applied to the device to allow other internal components or electrodes to be connected to the curved electrodes. In this case, multilayer capacitors (117) can be combined in parallel with simple single layer capacitors. These terminations can also allow greater flexibility when mounting the device to an external circuit using soldering attachment. 1102 represents a simplified circuit diagram of two capacitors in parallel as shown in 1101.

[0110] In many embodiments, continuous electrodes can be provided on both sides of a ceramic microelectronic device.Being able to fabricate curved electrodes on both sides of a device can eliminate the need to orient the device and provide redundant circuitry and / or add additional electronic components to the same device.

[0111] Fig.12 , a microelectronic device according to an embodiment of the present invention is shown in , wherein both the top and bottom surfaces include components formed using curved electrodes. In many such embodiments, the ceramic body (119) includes a continuous electrode (120) on the top surface, which forms a conductive pad on the external top surface or first plane of the device, and forms an embedded electrode in a second plane parallel to the first plane inside the device, as shown in 1201. The electrode (121) is printed on the top surface of the device and serves as an external pad and electrode to form a simple capacitor. A continuous electrode (122) on the bottom surface, the continuous electrode (122) forms a conductive pad on the external top surface or third plane of the device, and forms an embedded electrode in a fourth plane parallel to the third plane inside the device. The electrode (123) is printed on the bottom surface of the device and serves as an external pad and electrode to form a capacitor. 1202 represents a simplified circuit diagram of two capacitors with separate electrical connections as shown in 1201.

[0112] Various embodiments are configured such that successive electrodes can be initiated on opposing surfaces of a device, which enables the fabrication of variable electronic component structures within a microelectronic device. Fig.131301 shows a microelectronic device having two curved electrodes on opposite surfaces forming a capacitor according to an embodiment of the present invention. In some such embodiments, a ceramic body (124) includes two continuous electrodes (125, 126) as shown in 1301. One continuous electrode (125) has a conductive pad on the external top surface or first plane of the device and an embedded electrode in a second plane within the device parallel to the first plane. One continuous electrode (126) has a conductive pad on the external bottom surface or third plane of the device and an embedded electrode in a fourth plane within the device parallel to the third plane. Parallel continuous electrodes (125) and (126) form a capacitor embedded in the ceramic body (124). 1302 shows a simplified circuit diagram of the capacitor shown in 1301.

[0113] Some embodiments implement a continuous electrode with multiple bends that can penetrate deeper into the dielectric device. Fig.14 1401 shows a microelectronic device having multiple curved electrodes on opposite surfaces forming capacitors according to an embodiment of the present invention. In some such embodiments, a ceramic body (127) is provided, which includes two continuous electrodes (128, 129) having multiple bends as shown in 1401. One continuous electrode (128) has a conductive pad on the external top surface or first plane of the device, an embedded electrode in a second plane parallel to the first plane within the device, and an embedded electrode in a third plane parallel to the first and second planes within the device. One continuous electrode (129) has a conductive pad on the external bottom surface or fourth plane of the device, an embedded electrode in a fifth plane parallel to the fourth plane within the device, and an embedded electrode in a sixth plane parallel to the fourth and fifth planes within the device. The parallel continuous electrodes (128) and (129) form a capacitor that penetrates deeper and farther within the ceramic body (127). 1402 shows a circuit diagram of the capacitor shown in 1401.

[0114] Due to the relatively flat surface topography, according to some embodiments, additional components can be easily added to the surface of the microelectronic device. In some embodiments, thick film resistors can be printed on the surface of the device between two exposed portions of the conductor to create an RC circuit. In various embodiments, thick film and / or thin film components can be added to the microelectronic device to form more complex hybrid circuits. Some additional components may have more challenging connection requirements. According to some embodiments, these additional components can be buried inside or on the surface of the device. Many embodiments include that by positioning conductors and openings at different locations and on different layers within the device, quite complex circuits can be obtained. In multiple embodiments, multiple inductors, resistors, capacitors, transformers, conductors, and ground planes can be in series, parallel, or series / parallel configurations.

[0115] In various embodiments, the continuous electrode can bend inside the ceramic body and return to the surface and form a tunnel connecting the components on the surface of the microelectronic device. In some embodiments, the component can be a spiral inductor. In some embodiments, the inductor can be printed on the top surface and / or inside the ceramic body. Fig.15 A microelectronic device with curved electrodes forming a chip inductor according to an embodiment of the present invention is shown in FIG. In some such embodiments, a device is provided having an electrode (131) that curves inside a ceramic body (130) and returns to the top surface again, thereby forming a tunnel around a component (133) on the top surface of the device. In this case, the component can be a spiral inductor, with the center of the inductor connected to a pad at the other edge of the device by a continuous electrode including a double bend (131), and the outer part of the spiral conductor connected to a pad (132) at one edge of the device. Fig.16 Shows Fig.15 Another view of the device depicted in , showing the top surface of the device, the spiral inductor (113) and the right side pad (132) and left side pad formed by the meandering conductor (131).

[0116] Fig.17 A microelectronic device forming a capacitor according to an embodiment of the present invention is shown in the figure, which has a continuous electrode connected to an electronic component. In some such embodiments, a device is provided with an electrode (134) that bends inside a ceramic body (137) and returns to the top surface again, thereby forming a tunnel that bypasses a component (135) on the top surface of the device. The continuous electrode (134) has an additional curved electrode (134') parallel to the top surface, thereby forming a forked electrode. A second continuous electrode (136) is embedded in the ceramic body (137) and is parallel to the forked electrode (134'). The forked electrode (134') can interact with the second continuous electrode (136) to form a capacitor. In some cases, the component (135) can be a surface printed inductor having a coil shape, with one termination at the outer edge of the pattern and one termination at the center of the coil. This can be accommodated by adding an additional conductor 134 exposed in the device at a suitable location for connecting to the inductor coil.

[0117] In some embodiments, mounting to an external circuit can be facilitated by terminating the ends of the device with a conductive paste.In some embodiments, both the top and bottom surfaces of the device can be used for additional or repeating components to be included. Fig.18A microelectronic device according to an embodiment of the present invention is shown in the figure, which has a continuous electrode on both sides of the device and an electrode connected to an electronic component. In some such embodiments, a device is provided with an electrode (138) that bends inside a ceramic body (141) and returns to the top surface again, thereby forming a channel that bypasses a component (139) on the top surface of the device. Through the continuous electrode including a double bend (138), an external component is connected to a pad (140) at one edge of the device, and the center of the component is connected to the pad at the other edge of the device. Side terminations (142) are added on both sides of the microelectronic device to enable other internal electronic components and / or electrodes to be connected to the bent electrodes. A capacitor (143) formed with a bent electrode inside the ceramic body (141) is located on the opposite side of the microelectronic device.

[0118] In some implementations, electronic components may be printed on the top surface of or inside the ceramic body. According to some embodiments, by terminating the ends of the device with a conductive paste, it may be easier to mount to an external circuit. Fig.19A A microelectronic device having a curved electrode connecting an external electronic component and a side termination according to an embodiment of the present invention is shown. In some such embodiments, a device having an electrode (144) is provided, which is bent inside a ceramic body (147) and returns to the top surface again, thereby creating a tunnel that bypasses a component (145) on the top surface of the device. Through a continuous electrode including a double bend (144), an external component is connected to a pad (146) at one edge of the device, and the center of the component is connected to a pad at the other edge of the device. Side terminations (148) are added on both sides of the microelectronic device to enable other internal electronic components or electrodes to be connected to the curved electrode.

[0119] In various embodiments, castellated mounting holes can be added to a microelectronic device to allow connection to additional structures within the device. Fig.19B 1 shows a castellated structure that can be mounted to the side of a microelectronic device according to an embodiment of the present invention. The castellated holes (148) allow connection to other structures within the device, such as multilayer ceramic capacitors.

[0120] Fig. 20A microelectronic device having side terminations and / or castellations that allow connection to a multilayer capacitor according to an embodiment of the present invention is shown. In some such embodiments, a device having an electrode (171) is provided that bends inside a ceramic body (170) and returns to the top surface again, thereby forming a tunnel that bypasses a component (173) on the top surface of the device. By means of a continuous electrode including a double bend (171), an external component is connected to a pad (172) at one edge of the device, and the center of the component is connected to a pad at the other edge of the device. Side terminations and / or castellations (174) are added on both sides of the microelectronic device to enable other internal electronic components to be connected to the bent electrodes. A multilayer capacitor (175) formed inside the ceramic body (170) is located on opposite sides of the microelectronic device.

[0121] In many embodiments, the curved electrodes can also be used on ceramic substrates used as circuit substrates, where via technology is often used to connect devices together and / or to signal lines, voltage sources, and ground strips. In some embodiments, wire bonding can be used to solder, die bond, or attach surface mount devices.

[0122] Fig.21 A microelectronic device with a curved electrode that bypasses an electronic component according to an embodiment of the present invention is shown in FIG. In some such embodiments, a device having a ceramic circuit board (150) is provided. A continuous conductor with two bends (153) allows electrical connection between pads (151) and (152). The continuous conductor (153) bypasses another component on the board (154).

[0123] Fig. 22 A microelectronic device having a curved electrode that bypasses electronic components of different configurations according to an embodiment of the present invention is shown in FIG. In some such embodiments, a device having a ceramic circuit board (155) is provided. A continuous conductor having two bends (158) allows electrical connection between pads (156) and (156'). The continuous conductor (158) is connected to an external component (159) between pad (156') and an external pad (157). Due to the tunnel formed by the curved electrode, the continuous conductor (158) bypasses another external component on the board (159').

[0124] In some embodiments, the curved electrodes will also allow passive devices such as decoupling capacitors to be easily buried in the ceramic substrate. Fig.23A microelectronic device having a curved electrode according to an embodiment of the present invention is shown, which forms a decoupling capacitor when connected to an external electronic component. In some such embodiments, a device having a ceramic circuit board (160) is provided. The component (161) is mounted to the circuit by a simple conductive trace (162) on one side. A continuous conductor (163) forms a pad for another connection to the component and extends a certain distance into the circuit board. A second curved continuous electrode (164) forms an external conductive pad and also extends a certain distance into the circuit board. The first curved electrode (163) and the second curved electrode (164) are overlapped a certain distance (165), which forms a decoupling capacitor.

[0125] In some embodiments, the microelectronic device can be wire bonded, solder attached and / or die bonded to connect to external circuits. The continuous electrode can eliminate the risk of electrical failure due to poor connection of the via to the electrode. Many embodiments include that the conductive pad as part of the continuous electrode does not have the topography associated with the via below and is therefore ideal for wire bonding, solder attachment and / or die bonding. Fig.24A A microelectronic device having a continuous electrode that can be wire bonded to an external circuit according to embodiments is shown. In some such embodiments, a device having a curved electrode (13) deposited on a substrate (10) is provided. A contact pad (17) on the surface of the device can be wire bonded (12) to an external contact pad located on the substrate (10). Alternatively, the contact pad (17) can be die bonded (11) to an external contact pad. Fig. 24B A microelectronic device having continuous electrodes that can be solder attached and die attached to external circuits according to embodiments of the present invention is shown. In some such embodiments, a device having curved electrodes on the bottom side (14) is provided that can be connected to external contact pads via solder attachment (16) and / or chip bonding (15).

[0126] Although capacitors according to many embodiments may include any suitable combination of dielectric materials and conductive materials, in various embodiments, exemplary dielectrics include, but are not limited to, P100, NPO, X7R, Y5V, and the like. Similarly, any suitable conductive material may be incorporated, including, for example, any compatible metallization material. In addition, as described above, these dielectric and conductive layers may be provided in any thickness suitable for providing the desired capacitance. In various embodiments, the minimum thickness of the substrate is limited only by the particle size of the ceramic material used and the ability to disperse the ceramic into a polymer binder system. In some embodiments, the limiting factor for the thinness of the dielectric layer will be voltage breakdown and possible arc discharge between the conductors.

[0127] Although specific embodiments of microelectronic devices are described herein, it should be understood that many alternative embodiments may be made that incorporate the capabilities described herein and / or may be made in terms of fabrication methods.

[0128] Principle of Equivalence

[0129] This summary of the invention has been presented for the purpose of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form described, and many modifications and variations are possible in light of the above teachings. The embodiments are selected and described in order to best explain the principles of the invention and its practical application. This description will enable others skilled in the art to best utilize and practice the invention in various embodiments and through various modifications suitable for a particular purpose. The scope of the invention is defined by the appended claims.

Claims

1. A microelectronic device comprising: A dielectric body, forming a monomer structure; at least one first conductor formed from a first continuous member of conductive material, the at least one first conductor comprising at least one first conductive layer having at least a first portion and a second portion, the first portion being embedded in a monolithic structure of the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body such that some portion of the dielectric material forming the dielectric body surrounds the first portion, the second portion being continuously interconnected with the first portion via a connecting portion, the second portion extending along a second plane parallel to the first plane; wherein the second portion is exposed on a top surface of the dielectric body or is embedded within a monolithic structure of the dielectric body such that portions of a dielectric material forming the dielectric body surround the second portion; and Wherein the connecting portion is formed by a bent portion of a first continuous member of conductive material, and wherein the connecting portion is not perpendicular to the first portion or the second portion of the first conductive layer.

2. The microelectronic device according to claim 1, further comprising: At least one second conductive layer is on the top surface of the dielectric body, parallel to the first or second portion of the first conductive layer, so that some portions of the dielectric material forming the monomer structure of the dielectric body are arranged therebetween and define a dielectric material layer having a dielectric thickness.

3. The microelectronic device according to claim 1 , further comprising: at least one second conductor formed from a second continuous member of conductive material, the at least one second conductor comprising at least a second conductive layer having at least a first portion and a second portion, the first portion being embedded in a monolithic structure of the dielectric body and extending through at least a portion of the dielectric body along a third plane within the dielectric body such that portions of the dielectric material forming the dielectric body surround the first portion, the second portion being continuously interconnected with the first portion via a second conductive layer connecting portion, the second portion being exposed to a top surface of the dielectric body extending along a fourth plane parallel to the first plane; wherein the first conductive layer and the first portion of the second conductive layer are disposed parallel to each other within the dielectric body such that portions of dielectric material forming a monolithic structure of the dielectric body are disposed therebetween and define a first dielectric thickness; and Wherein the second conductive layer connection portion is formed by a bent portion of a second continuous member of conductive material, and wherein the second conductive layer connection portion is not perpendicular to the first portion or the second portion of the second conductive layer.

4. The microelectronic device according to claim 3 further comprising: At least one electronic component is disposed on the top surface of the dielectric body and connected to the second portion of the first conductive layer and the second portion of the second conductive layer.

5. The microelectronic device according to claim 3, further comprising: At least one third conductive layer on the top surface of the dielectric body is parallel to the first portion of the first conductive layer and the first portion of the second conductive layer, wherein the third conductive layer overlaps the second portion of the first conductive layer and is arranged to be parallel to the first portion of the second conductive layer, so that some portions of the dielectric material layer forming the monomer structure of the dielectric body are arranged between the first portion of the second conductive layer and the third conductive layer and define a second dielectric thickness.

6. The microelectronic device according to claim 2 or 3, further comprising: A conductive paste is deposited on left and right sides of the microelectronic device, wherein the conductive paste partially overlaps a top surface and a bottom surface of the dielectric body, wherein the bottom surface is opposite the top surface.

7. The microelectronic device according to claim 6, further comprising: at least one third conductive layer embedded in the monomer structure of the dielectric body and extending along a third plane in the dielectric body and parallel to the first portion of the first conductive layer; at least one fourth conductive layer embedded in the monomer structure of the dielectric body and extending along a fourth plane in the dielectric body and parallel to the first portion of the first conductive layer; wherein the third conductive layer and the fourth conductive layer are disposed within the dielectric body in parallel with each other such that portions of the dielectric material forming the monomeric structure of the dielectric body are disposed therebetween and define a second dielectric thickness; and The conductive layers are connected via conductive paste.

8. The microelectronic device according to claim 2, further comprising: at least one third conductor formed from a third continuous member of conductive material, the at least one third conductor comprising at least a third conductive layer having at least a first portion and a second portion, the first portion being embedded in the monolithic structure of the dielectric body and extending through at least a portion of the dielectric body along a third plane within the dielectric body such that portions of the dielectric material forming the monolithic structure of the dielectric body surround the first portion, the second portion being continuously interconnected with the first portion via a third conductive layer connecting portion, the second portion being exposed to a bottom surface of the dielectric body in a fourth plane parallel to the third plane, wherein the bottom surface is opposite the top surface; at least one fourth conductive layer on the bottom surface of the dielectric body, parallel to the first portion of the third conductive layer, such that portions of the dielectric material forming the monolithic structure of the dielectric body are disposed therebetween and define a second dielectric thickness; and Wherein the third conductive layer connection portion is formed by a bent portion of a third continuous member of conductive material, and wherein the third conductive layer connection portion is not perpendicular to the first portion or the second portion of the third conductive layer.

9. The microelectronic device according to claim 3, further comprising: at least one third conductor formed from a third continuous member of conductive material, the at least one third conductor comprising at least a third conductive layer having at least a first portion and a second portion, the first portion being embedded in a monolithic structure of the dielectric body and extending through at least a portion of the dielectric body along a fifth plane within the dielectric body such that portions of the dielectric material forming the monolithic structure of the dielectric body surround the first portion of the third conductive layer, the second portion of the third conductive layer being continuously interconnected with the first portion via a third conductive layer connecting portion, the second portion of the third conductive layer being exposed to a bottom surface of the dielectric body in a sixth plane parallel to the fifth plane, wherein the bottom surface is opposite to the top surface; at least one fourth conductor formed from a fourth continuous member of conductive material, the at least one fourth conductor comprising at least a fourth conductive layer having at least a first portion and a second portion, the first portion being embedded in a monolithic structure of the dielectric body and extending through at least a portion of the dielectric body along a seventh plane within the dielectric body, such that portions of the dielectric material forming the monolithic structure of the dielectric body cover the first portion of the fourth conductive layer, the second portion of the fourth conductive layer being continuously interconnected with the first portion of the fourth conductive layer via a fourth conductive layer connecting portion, and the second portion of the fourth conductive layer being exposed to a bottom surface of the dielectric body in an eighth plane parallel to the seventh plane; and wherein the fifth and seventh planes of the third conductive layer and the fourth conductive layer are disposed parallel to each other within the monomer structure of the dielectric body such that portions of the dielectric material forming the monomer structure of the dielectric body are disposed therebetween and define a second dielectric thickness; and Wherein the fourth conductive layer connection portion is formed by a bent portion of a fourth continuous member of conductive material, and wherein the fourth conductive layer connection portion is not perpendicular to the first portion or the second portion of the fourth conductive layer.

10. The microelectronic device according to claim 1, further comprising: at least one second conductor formed of a second continuous member of conductive material, the at least one second conductor comprising at least one second conductive layer having at least a first portion, a second portion and a third portion, the first portion being embedded within the monolithic structure of the dielectric body and extending through at least a portion of the dielectric body along a third plane within the dielectric body such that portions of the dielectric material forming the monolithic structure of the dielectric body surround the first portion, the second portion being continuously interconnected with the first portion via a second conductive layer first connection portion, the second portion being exposed to a bottom surface of the dielectric body in a fourth plane parallel to the third plane, the third portion being continuously interconnected with the first portion via a second conductive layer second connection portion and embedded within the monolithic structure of the dielectric body, and extending through at least a portion of the dielectric body along a fifth plane within the dielectric body such that portions of the dielectric material forming the monolithic structure of the dielectric body surround the third portion, wherein the bottom surface is opposite to the top surface; wherein the first portion of the first conductive layer and the third portion of the second conductive layer are arranged parallel to each other within the monomer structure of the dielectric body, such that some portion of the dielectric material forming the monomer structure of the dielectric body is arranged between the first portion of the first conductive layer and the third portion of the second conductive layer and defines a first dielectric thickness, and the first and third portions of the second conductive layer are arranged parallel to each other within the dielectric body, such that some portion of the dielectric material forming the monomer structure of the dielectric body is arranged between the first and third portions of the second conductive layer and defines a second dielectric thickness; and wherein the second conductive layer first connection portion and the second conductive layer second connection portion are formed by bent portions of a second continuous member of conductive material, and wherein the second conductive layer connection portion is not perpendicular to the first, second or third portions of the second conductive layer.

11. The microelectronic device according to claim 1 , further comprising: at least a third portion of the first conductive layer, which is continuously interconnected with the first portion via a first conductive layer second connecting portion and embedded within the monomer structure of the dielectric body, and extends through at least a portion of the dielectric body along a third plane within the dielectric body, such that some portion of the dielectric material forming the dielectric body surrounds the third portion; at least one second conductor formed by a second continuous member of conductive material, the at least one second conductor comprising at least one at least one second conductive layer, the at least one second conductive layer having at least a first portion, a second portion and a third portion, the first portion being embedded in a monolithic structure of the dielectric body and extending through at least a portion of the dielectric body along a fourth plane within the dielectric body such that some portions of the dielectric material forming the monolithic structure of the dielectric body surround the first portion, the second portion being continuously interconnected with the first portion via a second conductive layer first connecting portion, the second portion being exposed to a bottom surface of the dielectric body in a fifth plane parallel to the fourth plane, the third portion being continuously interconnected with the first portion via a second conductive layer second connecting portion and embedded in the monolithic structure of the dielectric body, and extending through at least a portion of the dielectric body along a sixth plane within the dielectric body such that some portions of the dielectric material forming the monolithic structure of the dielectric body surround the third portion, wherein the bottom surface is opposite to the top surface; and wherein the first and third portions of the first conductive layer are arranged parallel to each other within the monomer structure of the dielectric body, such that some portions of the dielectric material forming the monomer structure of the dielectric body are arranged between the first and third portions of the first conductive layer and define a first dielectric thickness, and the first and third portions of the second conductive layer are arranged parallel to each other within the dielectric body, such that some portions of the dielectric material forming the monomer structure of the dielectric body are arranged between the first and third portions of the second conductive layer and define a second dielectric thickness, and the third portions of the first conductive layer and the second conductive layer are arranged parallel to each other within the dielectric body, such that some portions of the dielectric material forming the monomer structure of the dielectric body are arranged between the first conductive layer and the third portions of the second conductive layer and define a third dielectric thickness; and wherein the first conductive layer second connection portion is formed by a bent portion of a first continuous member of conductive material, and wherein the second conductive layer first connection portion and the second conductive layer second connection portion are formed by a bent portion of a second continuous member of conductive material, and wherein the first conductive layer second connection portion is not perpendicular to the first, second or third portion of the first conductive layer, and the second conductive layer connection portion is not perpendicular to the first, second or third portion of the second conductive layer.

12. The microelectronic device according to claim 1, further comprising: at least a third portion of the first conductive layer, which is continuously interconnected with the first portion via a second connecting portion, the third portion being exposed to the top surface of the dielectric body in the second plane; as well as Wherein the second connecting portion is formed by a bent portion of a first continuous member of conductive material, and wherein the connecting portion is not perpendicular to the first, second or third portions of the first conductive layer.

13. The microelectronic device according to claim 12, further comprising: at least a second conductive layer on the top surface of the dielectric body, such that the second and third portions of the first conductive layer are on the same top surface as the second conductive layer; and An electronic component is deposited on the top surface of the dielectric body and is connected to the third portion of the first conductive layer and the second conductive layer. The microelectronic device of claim 13 , wherein the electronic component is an inductor.

15. The microelectronic device according to claim 12, further comprising: at least a second and a third conductive layer on the top surface of the dielectric body, such that the second and third portions of the first conductive layer and the second and third conductive layers are on the same top surface; and An electronic component is deposited on the top surface of the dielectric body and connected to the second conductive layer and the third conductive layer.

16. The microelectronic device according to claim 3, further comprising: at least a third conductive layer on the top surface of the dielectric body, such that the second portions of the first and second conductive layers are on the same top surface as the third conductive layer; and An electronic component is deposited on the top surface of the dielectric body and connected to the second portion of the first conductive layer and the third conductive layer.

17. The microelectronic device of claim 3, wherein the second portions of the first and second conductive layers are independently wire-bonded to a portion of a circuit.

18. The microelectronic device of claim 1, wherein at least the dielectric body is formed of a material selected from the group consisting of P100, NPO, X7R, and Y5V dielectric materials.

19. A microelectronic device comprising: Dielectrics; at least one first conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body such that a portion of a dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion via a connecting portion, the second portion being in a second plane parallel to the first plane, wherein the second portion is exposed at a top surface of the dielectric body or embedded within the dielectric body; at least one second conductive layer, the second conductive layer being on the top surface of the dielectric body and parallel to the first plane of the first conductive layer such that a layer of dielectric material is disposed therebetween and defines a dielectric thickness; a conductive paste deposited on left and right sides of the microelectronic device, wherein the conductive paste partially overlaps a top surface and a bottom surface of the dielectric body, wherein the bottom surface is opposite the top surface; wherein the connecting portion is not perpendicular to the first portion or the second portion; and The dielectric body is a monomer structure.

20. The microelectronic device according to claim 19, further comprising: at least one third conductive layer embedded in the dielectric body and extending along a first plane within the dielectric body and parallel to the first portion of the first conductive layer; at least one fourth conductive layer embedded in the dielectric body and extending along a first plane within the dielectric body and parallel to the first portion of the first conductive layer; wherein the third conductive layer and the fourth conductive layer are disposed parallel to each other within the dielectric body such that a dielectric material layer is disposed therebetween and defines a dielectric thickness; and The conductive layers are connected via conductive paste.

21. A microelectronic device comprising: Dielectrics; at least one first conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body such that a portion of a dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion via a connecting portion, the second portion being in a second plane parallel to the first plane, wherein the second portion is exposed at a top surface of the dielectric body or embedded within the dielectric body; at least one second conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane within the dielectric body such that a portion of the dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion, and the second portion being exposed to a top surface of the dielectric body in a second plane parallel to the first plane; a conductive paste deposited on left and right sides of the microelectronic device, wherein the conductive paste partially overlaps a top surface and a bottom surface of the dielectric body, wherein the bottom surface is opposite the top surface; wherein the first planes of the first conductive layer and the second conductive layer are disposed parallel to each other within the dielectric body such that a dielectric material layer is disposed therebetween and defines a dielectric thickness; wherein the connecting portion is not perpendicular to the first portion or the second portion; and The dielectric body is a monomer structure.

22. The microelectronic device according to claim 21, further comprising: at least one third conductive layer embedded in the dielectric body and extending along a first plane within the dielectric body and parallel to the first portion of the first conductive layer; at least one fourth conductive layer embedded in the dielectric body and extending along a first plane within the dielectric body and parallel to the first portion of the first conductive layer; wherein the third conductive layer and the fourth conductive layer are disposed parallel to each other within the dielectric body such that a dielectric material layer is disposed therebetween and defines a dielectric thickness; and The conductive layers are connected via conductive paste.

23. A microelectronic device comprising: Dielectrics; at least one first conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body such that a portion of a dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion via a connecting portion, the second portion being in a second plane parallel to the first plane, wherein the second portion is exposed at a top surface of the dielectric body or embedded within the dielectric body; at least one second conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane within the dielectric body such that a portion of the dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion, and the second portion being exposed to a top surface of the dielectric body in a second plane parallel to the first plane; at least one third conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane within the dielectric body such that a portion of the dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion, the second portion being exposed to a bottom surface of the dielectric body in a second plane parallel to the first plane, wherein the bottom surface is opposite the top surface; at least one fourth conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane within the dielectric body such that a portion of the dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion, and the second portion being exposed to a bottom surface of the dielectric body in a second plane parallel to the first plane; and wherein the first planes of the third conductive layer and the fourth conductive layer are disposed parallel to each other within the dielectric body such that a dielectric material layer is disposed therebetween and defines a dielectric thickness; wherein the first planes of the first conductive layer and the second conductive layer are disposed parallel to each other within the dielectric body such that a dielectric material layer is disposed therebetween and defines a dielectric thickness; wherein the connecting portion is not perpendicular to the first portion or the second portion; and The dielectric body is a monomer structure.

24. A microelectronic device comprising: Dielectrics; at least one first conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body such that a portion of a dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion via a connecting portion, the second portion being in a second plane parallel to the first plane, wherein the second portion is exposed at a top surface of the dielectric body or embedded within the dielectric body; at least one second conductive layer having at least a first portion, a second portion, and a third portion, the first portion being embedded in the dielectric and extending through at least a portion of the dielectric along a first plane within the dielectric so that a portion of the dielectric material forming the dielectric covers the first portion, the second portion being continuously interconnected with the first portion, the second portion being exposed to a bottom surface of the dielectric in a second plane parallel to the first plane, the third portion being continuously interconnected with the first portion and embedded in the dielectric and extending through at least a portion of the dielectric along a third plane within the dielectric so that a portion of the dielectric material forming the dielectric covers the third portion, wherein the bottom surface is opposite the top surface; and wherein the first portion of the first conductive layer and the third portion of the second conductive layer are disposed parallel to each other within the dielectric body such that a layer of dielectric material is disposed between the first portion of the first conductive layer and the third portion of the second conductive layer and defines a first dielectric thickness, and the first and third portions of the second conductive layer are disposed parallel to each other within the dielectric body such that a layer of dielectric material is disposed between the first and third portions of the second conductive layer and defines a second dielectric thickness; wherein the connecting portion is not perpendicular to the first portion or the second portion; and The dielectric body is a monomer structure.

25. A microelectronic device comprising: Dielectrics; at least one first conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body such that a portion of a dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion via a connecting portion, the second portion being in a second plane parallel to the first plane, wherein the second portion is exposed at a top surface of the dielectric body or embedded within the dielectric body; at least a third portion of the first conductive layer that is continuously interconnected with the first portion and embedded within the dielectric body and extends through at least a portion of the dielectric body along a third plane within the dielectric body such that a portion of the dielectric material forming the dielectric body covers the third portion; at least one second conductive layer, the at least second conductive layer having at least a first portion, a second portion, and a third portion, the first portion being embedded in the dielectric and extending through at least a portion of the dielectric along a first plane within the dielectric so that a portion of the dielectric material forming the dielectric covers the first portion, the second portion being continuously interconnected with the first portion, the second portion being exposed to a bottom surface of the dielectric in a second plane parallel to the first plane, the third portion being continuously interconnected with the first portion and embedded in the dielectric and extending through at least a portion of the dielectric along a third plane within the dielectric so that a portion of the dielectric material forming the dielectric covers the third portion, wherein the bottom surface is opposite to the top surface; wherein the first and third portions of the first conductive layer are disposed parallel to each other within the dielectric body such that a layer of dielectric material is disposed between the first and third portions of the first conductive layer and defines a first dielectric thickness, and the first and third portions of the second conductive layer are disposed parallel to each other within the dielectric body such that the layer of dielectric material is disposed between the first and third portions of the second conductive layer and defines a second dielectric thickness, and the third portions of the first conductive layer and the second conductive layer are disposed parallel to each other within the dielectric body such that a layer of dielectric material is disposed between the first conductive layer and the third portions of the second conductive layer and defines a third dielectric thickness; wherein the connecting portion is not perpendicular to the first portion or the second portion; and The dielectric body is a monomer structure.

26. A microelectronic device comprising: Dielectrics; at least one first conductive layer having at least a first portion and a second portion, the first portion being embedded in the dielectric body and extending through at least a portion of the dielectric body along a first plane in the dielectric body such that a portion of a dielectric material forming the dielectric body covers the first portion, the second portion being continuously interconnected with the first portion via a connecting portion, the second portion being in a second plane parallel to the first plane, wherein the second portion is exposed at a top surface of the dielectric body or embedded within the dielectric body; at least a third portion of the first conductive layer, which is continuously interconnected with the first portion, the third portion being exposed to the top surface of the dielectric body in the second plane; wherein the connecting portion is not perpendicular to the first portion or the second portion; and The dielectric body is a monomer structure.

27. The microelectronic device according to claim 26 further comprising: at least a second conductive layer on the top surface of the dielectric body, such that the second and third portions of the first conductive layer are on the same top surface as the second conductive layer; An electronic component is deposited on the top surface of the dielectric body and is connected to the third portion of the first conductive layer and the second conductive layer.

28. The microelectronic device of claim 27, wherein the electronic component is an inductor.

29. The microelectronic device according to claim 26, further comprising: at least a second and a third conductive layer on the top surface of the dielectric body, such that the second and third portions of the first conductive layer and the second and third conductive layers are on the same top surface; An electronic component is deposited on the top surface of the dielectric body and connected to the second conductive layer and the third conductive layer.

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