Semiconductor structure, self-supporting doped gallium nitride layer and method for producing same

Abstract

The application relates to a semiconductor structure, a self-supporting doped gallium nitride layer and a preparation method of the semiconductor structure. The preparation method of the semiconductor structure comprises the following steps: providing a substrate; placing the substrate in a hydride vapor phase epitaxy device; introducing a nitrogen-containing gas and a silicon-containing mixed gas into the hydride vapor phase epitaxy device, the nitrogen-containing gas and the silicon-containing mixed gas react to form a patterned mask layer on the substrate, and the patterned mask layer has a plurality of pores; after adjusting the flow of the silicon-containing mixed gas, continuously introducing the silicon-containing mixed gas and the nitrogen-containing gas into the hydride vapor phase epitaxy device; and introducing hydrogen chloride gas into the hydride vapor phase epitaxy device to form a doped gallium nitride layer in the pores and on the surface of the patterned mask layer away from the substrate. The preparation method provided by the above embodiment is not easy to introduce new pollution, and can simplify the design of the hydride vapor phase epitaxy device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a semiconductor structure, a self-supporting doped gallium nitride layer and a preparation method thereof. BACKGROUND

[0002] Compared with traditional substrate materials, gallium nitride has superior characteristics such as large band gap, high breakdown voltage, large thermal conductivity, high electron saturation drift speed, strong radiation resistance and good chemical stability. It is the highest material system in theory so far in terms of electro-optical and photoelectric conversion efficiency. Gallium nitride substrate is difficult to prepare, and needs to be prepared by a method of heteroepitaxy of gallium nitride material on a sapphire, silicon carbide, silicon, gallium arsenide or other substrate. The gallium nitride substrate is then peeled off from the substrate by a peeling method to obtain the gallium nitride substrate. When a light emitting diode or a power electronic device is prepared using the gallium nitride substrate, the gallium nitride substrate is usually required to have a small resistivity. At present, the resistivity of the gallium nitride substrate is reduced by doping during epitaxial growth of the gallium nitride.

[0003] At present, the method for peeling off the substrate is to form a patterned mask layer on the substrate to reduce the bonding force between the substrate and the epitaxially doped gallium nitride, thereby facilitating separation. However, the preparation of this patterned mask layer is very difficult, and requires ten to thirty processes, including uniform angle, film hardening, photolithography, development, glue removal, film plating, etching, glue removal again, multiple cleaning, etc. The whole process flow is complex, the production efficiency is low, and the production cost is high. At the same time, many devices including deposition equipment, photolithography equipment and etching equipment are used. The substrate is easily contaminated during the formation of the patterned mask layer, which introduces a pollution source for the subsequent epitaxy of doped gallium nitride, thereby affecting the quality of the doped gallium nitride.

[0004] Therefore, how to prepare a doped gallium nitride substrate that is easy to peel off is a problem that needs to be solved at present. SUMMARY

[0005] Therefore, it is necessary to provide a semiconductor structure, a self-supporting doped gallium nitride layer and a preparation method thereof in view of the problems in the prior art.

[0006] In order to achieve the above-mentioned purpose or other purposes, according to some embodiments of the present application, a preparation method of a semiconductor structure is provided, comprising:

[0007] providing a substrate;

[0008] placing the substrate in a hydride vapor phase epitaxy device; introducing a nitrogen-containing gas and a silicon-containing mixed gas into the hydride vapor phase epitaxy device, the nitrogen-containing gas and the silicon-containing mixed gas react to form a patterned mask layer on the substrate, the patterned mask layer has a plurality of pores therein;

[0009] After adjusting the flow rate of the silicon-containing mixed gas, the silicon-containing mixed gas and the nitrogen-containing gas are continuously introduced into the hydride vapor phase epitaxy device, and hydrogen chloride gas is introduced into the hydride vapor phase epitaxy device to form a doped gallium nitride layer in the pores and on the surface of the patterned mask layer away from the substrate.

[0010] The method for preparing a semiconductor structure provided by the above embodiment forms a patterned mask layer on a substrate by introducing a nitrogen-containing gas and a silicon-containing mixed gas into a hydride vapor phase epitaxy device, that is, the required patterned mask layer is obtained by the reaction of the nitrogen-containing gas and the silicon-containing mixed gas using the same device as that for forming a doped gallium nitride layer, without the need for photolithography and etching processes, greatly simplifying the process flow and improving production efficiency, while saving production costs, and also avoiding the introduction of new pollution to the subsequent growth of the doped gallium nitride layer and improving the growth quality of the doped gallium nitride layer; and without the need to activate deposition equipment, photolithography equipment, or etching equipment and other semiconductor equipment, simplifying the structural design of the preparation device.

[0011] Meanwhile, the formation of the patterned mask layer with pores on the surface of the substrate facilitates the subsequent peeling of the formed doped gallium nitride layer. After the growth of the patterned mask layer is completed, the flow rate of the silicon-containing mixed gas is adjusted to make the nitrogen-containing gas react with gallium chloride to generate gallium nitride as the main reaction to form a doped gallium nitride layer.

[0012] In addition, since the above preparation method includes the step of introducing a nitrogen-containing gas into a hydride vapor phase epitaxy device, no additional growth equipment is required when growing a gallium nitride layer; and since the pipeline for introducing a silicon-containing mixed gas into a hydride vapor phase epitaxy device during the formation of a patterned mask layer can also be used during the formation of a doped gallium nitride layer, the structural design of the preparation device can be further simplified and production costs can be reduced.

[0013] In one embodiment, before forming the patterned mask layer on the substrate, the method further comprises:

[0014] forming a first nitride buffer layer on the surface of the substrate; and forming the patterned mask layer on the first nitride buffer layer.

[0015] In one embodiment, after forming the first nitride buffer layer on the surface of the substrate, and before forming the patterned mask layer on the substrate, the method further comprises:

[0016] forming a second nitride buffer layer on the surface of the first nitride buffer layer away from the substrate; and forming the patterned mask layer on the surface of the second nitride buffer layer away from the first nitride buffer layer.

[0017] In one of the embodiments, the porosity of the apertures in the patterned mask layer is less than 30%.

[0018] In the method for preparing the semiconductor structure provided in the above embodiments, the porosity of the patterned mask layer formed is less than 30%, i.e., the area of the substrate covered by the patterned mask layer is greater than 70%, so that the collapse of the subsequently formed doped gallium nitride layer caused by too many apertures of the patterned mask layer can be avoided, and the doped gallium nitride layer formed in the above embodiments is further facilitated to be peeled off in the subsequent process.

[0019] In one of the embodiments, the nitrogen-containing gas includes ammonia, and the silicon-containing mixed gas includes silane mixed gas; in the process of forming the patterned mask layer on the substrate, the reaction temperature of the nitrogen-containing gas and the silicon-containing mixed gas is 800-1100℃; the reaction time of the nitrogen-containing gas and the silicon-containing mixed gas is 10s-30min; the flow rate of the nitrogen-containing gas is 1sccm-20slm; and the flow rate of the silicon-containing mixed gas is 20sccm-10slm.

[0020] In one of the embodiments, in the process of forming the doped gallium nitride layer in the apertures and on the surface of the patterned mask layer away from the substrate, the flow rate of the silicon-containing mixed gas is less than or equal to 10sccm.

[0021] In one of the embodiments, the hydride vapor phase epitaxy device includes a gallium boat area, a substrate area, a first gas supply pipeline, a second gas supply pipeline and a third gas supply pipeline.

[0022] The gallium boat area and the substrate area are arranged at intervals, and the gallium boat area is provided with a gallium boat containing gallium.

[0023] The substrate is located in the substrate area.

[0024] The first gas supply pipeline extends to the substrate area and is used for introducing the nitrogen-containing gas into the hydride vapor phase epitaxy device.

[0025] The second gas supply pipeline extends to the substrate area and is used for introducing the silicon-containing mixed gas into the hydride vapor phase epitaxy device.

[0026] The third gas supply pipeline extends to the gallium boat area and is used for introducing the hydrogen chloride gas into the hydride vapor phase epitaxy device.

[0027] Based on the same inventive concept, the present application also provides, according to some embodiments, a semiconductor structure prepared by using the method for preparing the semiconductor structure provided in any one of the above embodiments.

[0028] The semiconductor structure provided in the above embodiment is prepared by using the method for preparing a semiconductor structure provided in any of the above embodiments, and thus the technical effects achieved by the method for preparing a semiconductor structure can also be achieved by the semiconductor structure provided in the embodiment, which will not be described here.

[0029] Based on the same inventive concept, the application also provides, according to some embodiments, a method for preparing a self-supporting doped gallium nitride layer, comprising:

[0030] The semiconductor structure is prepared by using the method for preparing a semiconductor structure provided in any of the above embodiments.

[0031] The semiconductor structure is subjected to a cooling treatment, so that the N-type doped gallium nitride layer is automatically peeled off to obtain a self-supporting doped gallium nitride layer.

[0032] In the method for preparing a self-supporting doped gallium nitride layer provided in the above embodiment, the semiconductor structure is prepared by using the method for preparing a semiconductor structure provided in any of the above embodiments, and thus the technical effects achieved by the method for preparing a semiconductor structure can also be achieved by the method for preparing a self-supporting doped gallium nitride layer provided in the embodiment, which will not be described here. Through the cooling treatment, the N-type doped gallium nitride layer can be automatically peeled off due to the thermal mismatch between the N-type doped gallium nitride layer and the substrate.

[0033] Based on the same inventive concept, the application also provides, according to some embodiments, a self-supporting doped gallium nitride layer, which is prepared by using the method for preparing a self-supporting doped gallium nitride layer provided in the above embodiments.

[0034] The self-supporting doped gallium nitride layer provided in the above embodiment is prepared by using the method for preparing a self-supporting doped gallium nitride layer provided in the above embodiments, and thus the technical effects achieved by the method for preparing a self-supporting doped gallium nitride layer can also be achieved by the self-supporting doped gallium nitride layer provided in the embodiment, which will not be described here. BRIEF DESCRIPTION OF DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0036] Figure 1 The flowchart of the method for preparing a semiconductor structure provided in one of the embodiments of the application;

[0037] Figure 2The cross-sectional structure schematic diagram of the structure obtained in step S11 in the method for manufacturing a semiconductor structure provided in one of the embodiments of the present application is shown in the following figure.

[0038] Figure 3 The cross-sectional structure schematic diagram of the structure obtained before step S12 in the method for manufacturing a semiconductor structure provided in one of the embodiments of the present application is shown in the following figure.

[0039] Figure 4 The cross-sectional structure schematic diagram of the structure obtained in step S12 in the method for manufacturing a semiconductor structure provided in one of the embodiments of the present application is shown in the following figure.

[0040] Figure 5 The cross-sectional structure schematic diagram of the structure obtained in step S13 in the method for manufacturing a semiconductor structure provided in one of the embodiments of the present application is shown in the following figure.

[0041] Figure 6 The flow chart of the method for manufacturing a self-supporting doped gallium nitride layer provided in one of the embodiments of the present application is shown in the following figure.

[0042] Explanation of reference numerals:

[0043] 10, substrate; 20, first nitride buffer layer; 30, second nitride buffer layer; 40, patterned mask layer; 401, aperture; 50, doped gallium nitride layer. DETAILED DESCRIPTION

[0044] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The preferred embodiments of the present application are shown in the accompanying drawings. However, the present application can be realized in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present application is more thorough and complete.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein only for the purpose of describing the specific embodiments of the present application, and is not intended to limit the present application.

[0046] It should be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on another element or layer or intervening elements or layers can be present. In addition, it should be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application, for example, a first nitride buffer layer can be termed a second nitride buffer layer, and similarly, a second nitride buffer layer can be termed a first nitride buffer layer; the first nitride buffer layer and the second nitride buffer layer are different nitride buffer layers.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0048] In the case of using "include", "have", and "contain" in this document, unless an explicit limiting term is used, such as "only", "consisting of", etc., another component can be added. Unless otherwise mentioned, the singular form of the term can include the plural form, and it cannot be understood as one in number.

[0049] Gallium nitride substrate is difficult to prepare, and needs to be prepared by a method of growing gallium nitride material on a substrate such as sapphire, silicon carbide, silicon, gallium arsenide, etc. to prepare gallium nitride substrate, and then peeled off from the substrate to obtain gallium nitride substrate by peeling method.

[0050] At present, the method of peeling off gallium nitride single crystal substrate is to plate a patterned substrate on the substrate to reduce the bonding force between the substrate and the gallium nitride single crystal substrate, and help separation. However, the preparation of the patterned substrate is very difficult, which needs ten to thirty processes, such as uniform angle, film hardening, photoetching, development, degumming, film plating, degumming and multiple cleaning, etc. However, the existing method of forming patterned mask layer is complex and cumbersome, and needs to use many semiconductor devices such as deposition equipment, photoetching equipment and etching equipment. When gallium nitride is grown, additional growth equipment is needed, which leads to low production efficiency and high production cost. In the preparation process, the substrate is easily contaminated, which introduces pollution source for subsequent gallium nitride epitaxy.

[0051] Therefore, how to prepare a doped gallium nitride substrate which is easy to peel off is a problem to be solved at present.

[0052] Based on the above deficiencies in the prior art, according to some embodiments, a semiconductor structure preparation method is provided.

[0053] Please refer to Figure 1 In one embodiment, the semiconductor structure preparation method can specifically include the following steps:

[0054] S11: providing a substrate.

[0055] S12: placing the substrate in a hydride vapor phase epitaxy (HVPE) device; introducing a nitrogen-containing gas and a silicon-containing mixed gas into the HVPE device, the nitrogen-containing gas and the silicon-containing mixed gas react to form a patterned mask layer on the substrate, the patterned mask layer has a plurality of pores.

[0056] S13: after adjusting the flow of the silicon-containing mixed gas, continuously introducing the silicon-containing mixed gas and the nitrogen-containing gas into the HVPE device; and introducing hydrogen chloride gas into the HVPE device, the hydrogen chloride gas reacts with gallium in the HVPE device and then reacts with the nitrogen-containing gas to form a doped gallium nitride layer in the pores and on the surface of the patterned mask layer away from the substrate.

[0057] The semiconductor structure preparation method provided by the above embodiment forms a patterned mask layer on the substrate by introducing a nitrogen-containing gas and a silicon-containing mixed gas into the HVPE device, that is, using the same equipment as forming the doped gallium nitride layer, the desired patterned mask layer can be obtained by the reaction of the nitrogen-containing gas and the silicon-containing mixed gas without photolithography and etching process steps, greatly simplifying the process flow, improving production efficiency, saving production costs, avoiding introducing new pollution to the subsequent doped gallium nitride layer growth, and improving the growth quality of the doped gallium nitride layer; and without starting the deposition equipment, photolithography equipment or etching equipment and other semiconductor equipment, the structure design of the preparation device is simplified.

[0058] At the same time, the patterned mask layer with pores formed on the surface of the substrate helps the subsequent doped gallium nitride layer to be peeled off. After the growth of the patterned mask layer is completed, the flow of the silicon-containing mixed gas is adjusted, the nitrogen-containing gas reacts with gallium chloride to generate gallium nitride as the main reaction to form the doped gallium nitride layer.

[0059] In addition, since the preparation method includes the step of introducing the nitrogen-containing gas into the hydride vapor phase epitaxy device, no additional growth device is needed when growing the gallium nitride layer; and since the pipeline for introducing the silicon-containing mixed gas into the hydride vapor phase epitaxy device during the process of forming the patterned mask layer can continue to be used during the process of forming the doped gallium nitride layer, the structure design of the preparation device can be further simplified, and the production cost is reduced.

[0060] For step S11, refer to step S11 in Figure 1 and Figure 2 , the substrate 10 is provided and placed in the hydride vapor phase epitaxy device.

[0061] The material of the substrate 10 is not specifically limited in the present application, and the substrate 10 can include one or more of a silicon (Si) substrate, a sapphire substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an aluminum nitride (AlN) substrate, or a gallium nitride (GaN) substrate, etc.

[0062] For step S12, in one embodiment, as shown in Figure 1 and Figure 3 , before forming the patterned mask layer 40 on the substrate 10, the step of forming a first nitride buffer layer 20 on the surface of the substrate 10 can also be included.

[0063] In the preparation method provided in the above embodiment, the patterned mask layer 40 is formed on the first nitride buffer layer 20.

[0064] The material of the first nitride buffer layer 20 is not specifically limited in the present application, and the first nitride buffer layer 20 can include but is not limited to an aluminum nitride layer.

[0065] In one embodiment, as shown in Figure 1 and Figure 3 , after forming the first nitride buffer layer 20 on the surface of the substrate 10, and before forming the patterned mask layer 40 on the substrate 10, the step of forming a second nitride buffer layer 30 on the surface of the first nitride buffer layer 20 away from the substrate 10 can also be included.

[0066] In the preparation method provided in the above embodiment, the patterned mask layer 40 is formed on the surface of the second nitride buffer layer 30 away from the first nitride buffer layer 20.

[0067] The material of the second nitride buffer layer 30 is not specifically limited in the present application, and the second nitride buffer layer 30 can include one or more of a gallium nitride layer, a gallium indium nitride (InGaN) layer, a magnesium-doped gallium indium nitride (MgInGaN) layer, or a magnesium-doped gallium nitride (MgGaN) layer, etc.

[0068] The thickness of the second nitride buffer layer 30 is not limited in the present application. In one embodiment, the thickness of the second nitride buffer layer 30 can be 1 μm to 50 μm, for example, the thickness of the second nitride buffer layer 30 can be 1 μm, 15 μm, 25 μm, 35 μm or 50 μm, and the like. It can be understood that the above data is only for example, in actual embodiments, the thickness of the second nitride buffer layer 30 can be set according to actual needs, and is not limited by the above data.

[0069] Specifically, the first nitride buffer layer 20 and the second nitride buffer layer 30 can be formed by any one of metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE) process, ammonia thermal method, and the like.

[0070] The step S12 will be described below. Referring to the step S12 in Figure 1 and Figure 4 , the substrate 10 is placed in a hydride vapor phase epitaxy device; nitrogen-containing gas and silicon-containing mixed gas are introduced into the hydride vapor phase epitaxy device, the nitrogen-containing gas and the silicon-containing mixed gas react to form a patterned mask layer 40 on the substrate 10, the patterned mask layer 40 has a plurality of apertures 401.

[0071] In the preparation method provided in the above embodiment, the product of the reaction of the nitrogen-containing gas and the silicon-containing mixed gas in the hydride vapor phase epitaxy device is deposited on the substrate 10 to form the patterned mask layer 40 having a plurality of apertures 401.

[0072] The material of the patterned mask layer 40 is not limited in the present application, and the patterned mask layer 40 can include a silicon-based nitride mask layer. For example, the silicon-based nitride can include, but is not limited to, silicon nitride (SiN x ).

[0073] The growth process of the patterned mask layer 40 is not limited in the present application, and the growth temperature of the patterned mask layer 40 can be 800°C to 1100°C, for example, the growth temperature of the patterned mask layer 40 can be 800°C, 900°C, 1000°C or 1100°C, and the like. It can be understood that the above data is only for example, in actual embodiments, the growth temperature of the patterned mask layer 40 can be set according to actual needs, and is not limited by the above data.

[0074] In addition, the thickness and porosity of the patterned mask layer 40 can also be controlled by controlling the time of introducing the nitrogen-containing gas and the silicon-containing mixed gas.

[0075] This application does not specifically limit the thickness of the patterned mask layer 40. In one embodiment, the thickness of the patterned mask layer 40 can be 1 nm to 3 μm, for example, the thickness of the patterned mask layer 40 can be 1 nm, 3 nm, 7 nm, 500 nm, 1 μm, 2 μm, or 3 μm, etc. Preferably, the thickness of the patterned mask layer 40 can be 3 nm to 2 μm; more preferably, the thickness of the patterned mask layer 40 can be 5 nm to 1 μm; even more preferably, the thickness of the patterned mask layer 40 can be 7 nm to 500 nm. It is understood that the above data are only examples, and in actual embodiments, the thickness of the patterned mask layer 40 can be set according to actual needs and is not limited to the above data.

[0076] In one embodiment, the porosity of the pores 401 in the patterned mask layer 40 is less than 30%.

[0077] In the semiconductor structure fabrication method provided in the above embodiments, the porosity of the patterned mask layer 40 is less than 30%, that is, the area of ​​the substrate 10 covered by the mask layer 40 is greater than 70%, which can avoid the collapse of the subsequently formed gallium nitride layer 50 due to the excessive number of pores 401 in the patterned mask layer 40, and further facilitate the peeling off of the gallium nitride layer 50 formed in the above embodiments.

[0078] Optionally, the porosity of pore 401 can be 5% to 30%, for example, 5%, 15%, 20%, 25%, or 30%, etc. It is understood that the above data are only examples, and in actual embodiments, the porosity of pore 401 can be set according to actual needs and is not limited to the above data.

[0079] In one embodiment, the nitrogen-containing gas may include ammonia (NH3), and the silicon-containing mixed gas may include silane (Si). n H 2n+2 The reaction temperature of the nitrogen-containing gas and the silicon-containing gas mixture is 800℃~1100℃; the reaction time of the nitrogen-containing gas and the silicon-containing gas mixture is 10s~30min; the flow rate of the nitrogen-containing gas is 1sccm~20slm; and the flow rate of the silicon-containing gas mixture is 20sccm~10slm.

[0080] It is to be noted that the type of the silicon-containing gas mixture is not limited in the present application. In one embodiment, the silicon-containing gas mixture used can include a mixture of a silicon-containing gas and other gases. For example, the silicon-containing gas can include, but is not limited to, one or more of silane, monochlorosilane, dichlorosilane, trichlorosilane, and tetrachlorosilane, and the like, and the other gases in the mixture can include other gases that do not react with the silicon-containing gas, such as, but not limited to, one or more of hydrogen, nitrogen, helium, argon, and hydrogen chloride, and the like. For example, the volume content of the silicon-containing gas can be 0.01% to 99.9%, such as, but not limited to, 0.01%, 1%, 10%, 50%, 70%, 90%, or 99.9%, and the like.

[0081] The method for preparing the semiconductor structure provided in the above embodiments forms the patterned mask layer 40 in the hydride vapor phase epitaxy apparatus, which is simple in process and unlikely to introduce new contamination.

[0082] Since the silicon-containing gas includes silane, the pipeline for introducing the silicon-containing gas can also be used for the silicon doping step in the subsequent process, which simplifies the design of the hydride vapor phase epitaxy apparatus.

[0083] In one embodiment, the product of the reaction of the ammonia and silane mixture in the hydride vapor phase epitaxy apparatus is deposited on the substrate 10 to form the patterned mask layer 40 having a plurality of pores 401.

[0084] The flow rate of the nitrogen-containing gas introduced into the hydride vapor phase epitaxy apparatus is not limited in the present application, and can be set according to actual needs. In one embodiment, the flow rate of the nitrogen-containing gas can be 1 sccm (standard cubic centimeter per minute) to 20 slm (standard liter per minute), such as, but not limited to, 1 sccm, 100 sccm, 200 sccm, 13 slm, 15 slm, or 20 slm, and the like. Preferably, the flow rate of the nitrogen-containing gas can be 100 sccm to 15 slm; more preferably, the flow rate of the nitrogen-containing gas can be 200 sccm to 13 slm; more preferably, the flow rate of the nitrogen-containing gas can be 500 sccm to 15 slm, and the like. It can be understood that the above data is only an example, and the flow rate of the nitrogen-containing gas introduced into the hydride vapor phase epitaxy apparatus in the actual embodiment can be set according to actual needs, and is not limited by the above data.

[0085] The flow rate of the silicon-containing mixed gas introduced into the hydride vapor phase epitaxy apparatus during the formation of the patterned mask layer 40 is not particularly limited and can be set according to actual needs. In one embodiment, the flow rate of the silicon-containing mixed gas can be 20 seem to 10 slm, for example, the flow rate of the silicon-containing mixed gas can be 20 seem, 50 seem, 250 seem, 500 seem, 1000 seem, 5 slm or 10 slm, and the like. Preferably, the flow rate of the silicon-containing mixed gas can be 70 seem to 5 slm; more preferably, the flow rate of the silicon-containing mixed gas can be 100 seem to 2 slm. It can be understood that the above data is only an example, and in actual embodiments, the flow rate of the silicon-containing mixed gas introduced into the hydride vapor phase epitaxy apparatus during the formation of the patterned mask layer 40 can be set according to actual needs, and is not limited by the above data.

[0086] The reaction time of the nitrogen-containing gas and the silicon-containing mixed gas is not particularly limited and can be set according to actual needs. In one embodiment, the reaction time of the nitrogen-containing gas and the silicon-containing mixed gas can be 10 s to 30 min, for example, the reaction time of the nitrogen-containing gas and the silicon-containing mixed gas can be 10 s, 30 s, 5 min, 15 min or 30 min, and the like. It can be understood that the above data is only an example, and in actual embodiments, the flow rate of the nitrogen-containing gas and the silicon-containing mixed gas introduced into the hydride vapor phase epitaxy apparatus can be set according to actual needs, and is not limited by the above data.

[0087] The growth temperature of the patterned mask layer 40 is not particularly limited and can be set according to actual needs. For example, the growth temperature of the patterned mask layer 40 can be 800°C to 1100°C, for example, the growth temperature of the patterned mask layer 40 can be 800°C, 900°C, 1000°C or 1100°C, and the like. It can be understood that the above data is only an example, and in actual embodiments, the growth temperature of the patterned mask layer 40 can be set according to actual needs, and is not limited by the above data.

[0088] In addition, the thickness and porosity of the patterned mask layer 40 can also be controlled by controlling the time of introducing the nitrogen-containing gas and / or the amount of silicon nitride generated.

[0089] The thickness of the patterned mask layer 40 is not limited in the present application. In one embodiment, the thickness of the patterned mask layer 40 can be in the range of 1 nm to 3 μm, for example, the thickness of the patterned mask layer 40 can be 1 nm, 3 nm, 7 nm, 500 nm, 1 μm, 2 μm or 3 μm, etc. Preferably, the thickness of the patterned mask layer 40 can be in the range of 3 nm to 2 μm; more preferably, the thickness of the patterned mask layer 40 can be in the range of 5 nm to 1 μm; more preferably, the thickness of the patterned mask layer 40 can be in the range of 7 nm to 500 nm. It is to be understood that the above data are only examples, and the thickness of the patterned mask layer 40 can be set according to actual needs in actual embodiments, and is not limited by the above data.

[0090] In one embodiment, the nitrogen-containing gas and the silicon-containing mixed gas can be introduced into the hydride vapor phase epitaxy apparatus at the same time, and a carrier gas can also be introduced into the hydride vapor phase epitaxy apparatus at the same time.

[0091] The type of the carrier gas is not limited in the present application. Specifically, the carrier gas can include one or more of hydrogen, nitrogen, helium and argon, etc. It is to be understood that the type of the carrier gas can be set according to actual needs in actual embodiments. More specifically, in one embodiment, the carrier gas includes hydrogen.

[0092] For step S13, please refer to step S13 in Figure 1 and Figure 5 After adjusting the flow rate of the silicon-containing mixed gas, the silicon-containing mixed gas and the nitrogen-containing gas are continuously introduced into the hydride vapor phase epitaxy apparatus, and hydrogen chloride gas is also introduced into the hydride vapor phase epitaxy apparatus to form a doped gallium nitride layer 50 in the pores 401 and on the surface of the patterned mask layer 40 away from the substrate 10.

[0093] It is to be noted that the flow rate of the silicon-containing mixed gas introduced into the hydride vapor phase epitaxy apparatus is not limited in the present application during the formation of the doped gallium nitride layer 50. The flow rate of the silicon-containing mixed gas introduced into the hydride vapor phase epitaxy apparatus can be set according to actual needs, as long as the flow rate of the silicon-containing mixed gas introduced into the hydride vapor phase epitaxy apparatus during the formation of the patterned mask layer 40 is greater than the flow rate of the silicon-containing mixed gas introduced into the hydride vapor phase epitaxy apparatus during the formation of the doped gallium nitride layer 50.

[0094] For example, the flow rate of the silicon-containing mixed gas during the formation of the doped gallium nitride layer 50 can be less than or equal to 10 sccm, such as 10 sccm, 7 sccm, 5 sccm, 2 sccm, 1 sccm, or the like. It should be understood that the above data is merely exemplary, and the flow rate of the silicon-containing mixed gas into the hydride vapor phase epitaxy apparatus during the formation of the doped gallium nitride layer 50 can be set according to actual needs, and is not limited by the above data.

[0095] The present application does not make specific limitation on the flow rate of the hydrogen chloride into the hydride vapor phase epitaxy apparatus, and the flow rate of the hydrogen chloride into the hydride vapor phase epitaxy apparatus can be set according to actual needs. In one embodiment, the flow rate of the hydrogen chloride into the hydride vapor phase epitaxy apparatus can be 1 sccm to 500 sccm, such as 1 sccm, 50 sccm, 200 sccm, 400 sccm, or 500 sccm, or the like. It should be understood that the above data is merely exemplary, and the flow rate of the hydrogen chloride into the hydride vapor phase epitaxy apparatus in actual embodiments can be set according to actual needs, and is not limited by the above data.

[0096] The present application does not make specific limitation on the molar ratio of the silicon-containing mixed gas to the hydrogen chloride during the formation of the doped gallium nitride layer 50 in the pores 401 and away from the surface of the substrate 10. In one embodiment, the molar ratio of the silicon-containing mixed gas to the hydrogen chloride during the formation of the doped gallium nitride layer 50 can be 1:100000 to 1:100, such as 1:100000 to 1:100, 1:100000 to 1:1000, or 1:100000 to 1:10000, or the like. It should be understood that the above data is merely exemplary, and the molar ratio of the silicon-containing mixed gas to the hydrogen chloride during the formation of the doped gallium nitride layer 50 in actual embodiments can be set according to actual needs, and is not limited by the above data. In actual embodiments, the doping amount of the doped gallium nitride layer 50 can be adjusted by adjusting the proportion of the silicon-containing mixed gas.

[0097] The present application does not make specific limitation on the growth rate of the doped gallium nitride layer 50. In one embodiment, low-speed growth of the doped gallium nitride layer 50 can be performed first, and then high-speed growth of the doped gallium nitride layer 50 can be performed after a certain period of time. In other embodiments, the doped gallium nitride layer 50 can also be grown at a constant speed. It should be understood that the growth rate of the doped gallium nitride layer 50 can be adjusted by adjusting the flow rate of the hydrogen chloride in actual embodiments.

[0098] In one of the embodiments, the hydride vapor phase epitaxy apparatus can include a gallium boat region, a substrate region, a first gas supply line, a second gas supply line, and a third gas supply line.

[0099] The gallium boat region can be arranged apart from the substrate region, and a gallium boat containing gallium is placed in the gallium boat region. The substrate 10 can be located in the substrate region. The first gas supply line can extend to the substrate region for introducing a nitrogen-containing gas into the hydride vapor phase epitaxy apparatus. The second gas supply line can extend to the substrate region for introducing a silicon-containing mixed gas into the hydride vapor phase epitaxy apparatus. The third gas supply line can extend to the gallium boat region for introducing a hydrogen chloride gas into the hydride vapor phase epitaxy apparatus.

[0100] The preparation method of the semiconductor structure provided by the above embodiments can provide the nitrogen-containing gas to the substrate region through the first gas supply line and introduce the silicon-containing mixed gas into the substrate region through the second gas supply line in the process of forming the patterned mask layer 40. In the process of forming the doped gallium nitride layer 50, the nitrogen-containing gas is continuously provided to the substrate region through the first gas supply line, and the hydrogen chloride gas is provided to the gallium boat region through the third gas supply line. In this way, the substrate 10 does not need to be taken out by furnace opening operation, thereby avoiding secondary pollution. The second gas supply line can continue to provide the silicon-containing mixed gas for the process of forming the doped gallium nitride layer 50, and no additional gas or gas line is needed, thereby simplifying the device for executing the preparation method.

[0101] Meanwhile, the hydrogen chloride gas is provided to the gallium boat region through the third gas supply line, which can avoid the reaction of the hydrogen chloride gas with other substances to generate additional loss, thereby saving raw material cost.

[0102] In the preparation method of the semiconductor structure, the amount of the silicon-containing mixed gas is increased at the beginning of the growth, so that the silicon-containing mixed gas reacts with the nitrogen-containing gas to generate silicon-based nitride (such as silicon nitride) to form a discontinuous film layer as the patterned mask layer 40, which serves for the subsequent self-stripping of the doped gallium nitride. After the growth of the patterned mask layer 40 is completed, only the amount of the silicon-containing mixed gas needs to be adjusted to be reduced, so that the nitrogen-containing gas reacts with gallium chloride (generated by the reaction of hydrogen chloride and gallium) to generate gallium nitride as the main reaction, and the silicon-containing mixed gas serves as an N-type doping gas to increase the ion concentration, thereby preparing an N-type doped gallium nitride layer.

[0103] Based on the same inventive concept, the present application also provides a semiconductor structure according to some embodiments.

[0104] Please continue to refer to Figure 5 The semiconductor structure is prepared by the preparation method of the semiconductor structure provided in any of the preceding embodiments, and the technical effects that can be achieved by the preparation method of the semiconductor structure are also achieved by the semiconductor structure, which will not be described in detail here.

[0105] Based on the same inventive concept, the application also provides, according to some embodiments, a preparation method of a self-supporting doped gallium nitride layer.

[0106] Please refer to Figure 6 In one embodiment, the preparation method of the self-supporting doped gallium nitride layer can include the following steps:

[0107] S1: preparing a semiconductor structure by using the preparation method of the semiconductor structure provided in any of the preceding embodiments;

[0108] S2: performing a cooling treatment on the semiconductor structure, so that the doped gallium nitride layer 50 is automatically peeled off to obtain a self-supporting doped gallium nitride layer.

[0109] In the preparation method of the self-supporting doped gallium nitride layer, the semiconductor structure is prepared by using the preparation method of the semiconductor structure provided in any of the preceding embodiments, so the technical effects that can be achieved by the preparation method of the semiconductor structure are also achieved by the preparation method of the self-supporting doped gallium nitride layer provided in this embodiment, which will not be described in detail here. Through the cooling treatment, the doped gallium nitride layer 50 can be automatically peeled off due to the thermal mismatch between the doped gallium nitride layer 50 and the substrate 10.

[0110] The application also provides, according to some embodiments, a self-supporting doped gallium nitride layer prepared by using the preparation method of the self-supporting doped gallium nitride layer provided in the preceding embodiments, so the technical effects that can be achieved by the preparation method of the self-supporting doped gallium nitride layer are also achieved by the self-supporting doped gallium nitride layer, which will not be described in detail here.

[0111] It should be understood that, although Figure 1 the steps in the flowcharts of Figure 6 are displayed in sequence according to the arrows, these steps are not necessarily executed in sequence according to the arrows. Unless otherwise specified herein, the execution of these steps is not strictly limited in sequence, and these steps can be executed in other sequences. Moreover, Figure 1 at least some of the steps in Figure 6 may include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution sequence of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least some of the steps or stages in other steps.

[0112] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described, but as long as the combinations of the technical features do not contradict, they should be considered as within the scope of the present disclosure.

[0113] The above-described embodiments are merely illustrative of several embodiments of the present application, which are described in more detail and in a more specific and detailed manner, but should not be construed as limiting the scope of the patent application. It should be noted that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method of fabricating a semiconductor structure, characterized by, The method comprises the following steps: providing a substrate; placing the substrate in a hydride vapor phase epitaxy device; introducing a nitrogen-containing gas and a silicon-containing mixed gas into the hydride vapor phase epitaxy device, the nitrogen-containing gas and the silicon-containing mixed gas react to form a patterned mask layer on the substrate, the patterned mask layer has a plurality of pores therein; 2. The method of claim 1, wherein the semiconductor structure is prepared by a method comprising: adjusting the flow rate of the silicon-containing mixed gas to be reduced, continuously introducing the silicon-containing mixed gas and the nitrogen-containing gas into the hydride vapor phase epitaxy device, and introducing hydrogen chloride gas into the hydride vapor phase epitaxy device to form a doped gallium nitride layer in the pores and on the surface of the patterned mask layer away from the substrate, the nitrogen-containing gas and the hydrogen chloride gas are used to generate gallium nitride, and the silicon-containing mixed gas acts as a doping gas. Before forming the patterned mask layer on the substrate, the method further comprises the following steps:

3. The method of claim 2, wherein the semiconductor structure is prepared by a method comprising: forming a first nitride buffer layer on the surface of the substrate; and forming the patterned mask layer on the first nitride buffer layer.

4. The method of claim 1, wherein the semiconductor structure is prepared by a method comprising: After forming the first nitride buffer layer on the surface of the substrate and before forming the patterned mask layer on the substrate, the method further comprises the following steps:

5. The method of claim 1, wherein the semiconductor structure is prepared by a method comprising: forming a second nitride buffer layer on the surface of the first nitride buffer layer away from the substrate; and 6. The method of claim 5, wherein the semiconductor structure is prepared by a method comprising: forming the patterned mask layer on the surface of the second nitride buffer layer away from the first nitride buffer layer.

7. The method of producing a semiconductor structure according to any one of claims 1 to 6, wherein The porosity of the pores in the patterned mask layer is less than 30%. The nitrogen-containing gas comprises ammonia, and the silicon-containing mixed gas comprises silane mixed gas; during the process of forming the patterned mask layer on the substrate, the reaction temperature of the nitrogen-containing gas and the silicon-containing mixed gas is 800-1100℃; the reaction time of the nitrogen-containing gas and the silicon-containing mixed gas is 10s-30min; the flow rate of the nitrogen-containing gas is 1sccm-20slm; and the flow rate of the silicon-containing mixed gas is 20sccm-10slm. During the process of forming the doped gallium nitride layer in the pores and on the surface of the patterned mask layer away from the substrate, the flow rate of the silicon-containing mixed gas is less than or equal to 10sccm. The hydride vapor phase epitaxy device comprises a gallium boat area, a substrate area, a first gas supply pipeline, a second gas supply pipeline and a third gas supply pipeline. The gallium boat area and the substrate area are arranged at intervals, and a gallium boat containing gallium is placed in the gallium boat area. The substrate is located in the substrate area.

8. A semiconductor structure, characterized by The first gas supply pipeline extends to the substrate area and is used for introducing the nitrogen-containing gas into the hydride vapor phase epitaxy device.

9. A method of producing a self-supporting doped gallium nitride layer, characterized by, The second gas supply pipeline extends to the substrate area and is used for introducing the silicon-containing mixed gas into the hydride vapor phase epitaxy device. The third gas supply pipeline extends to the gallium boat area and is used for introducing the hydrogen chloride gas into the hydride vapor phase epitaxy device. The semiconductor structure is prepared by the method for preparing a semiconductor structure according to any one of claims 1-7. The method comprises the following steps: preparing the semiconductor structure by the method for preparing a semiconductor structure according to any one of claims 1-7. The semiconductor structure is subjected to a cooling treatment, so that the doped gallium nitride layer is automatically peeled off, to obtain a self-supporting doped gallium nitride layer.

10. A self-supporting doped gallium nitride layer, characterized by, The self-supporting doped gallium nitride layer is prepared by the method for preparing a self-supporting doped gallium nitride layer according to claim 9.

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