An operational amplifier with fA-level input bias current

Abstract

An operational amplifier with fA-level input bias current, including an ESD protection circuit module, a complementary source follower circuit module, a V GS Calibration circuit module, main operational amplifier circuit module A1; it clamps the voltage across the electrostatic protection device ESD by setting a complementary source follower circuit module at the input end of the main operational amplifier module, and can also significantly reduce the leakage current of the main operational amplifier circuit module A1, avoiding the leakage current from interfering with the current amplification of the main operational amplifier circuit module A1. The area and power consumption of the complementary source follower circuit module are smaller, and the complexity of the internal circuit design of the chip can be simplified and the reliability of the operational amplifier is improved.

Description

Technical field

[0001] The present invention relates to the field of analog integrated circuit design, and in particular to an operational amplifier with femtoampere input bias current. [Background Technology]

[0002] In applications where high-precision current front-end equipment such as electrometers is used, weak current signals at the femtoampere level need to be detected. To accurately detect such weak current signals at the femtoampere level, the weak current signal must first be amplified. The difficulty in amplifying and detecting weak current signals lies in the fact that the current signal to be detected is very weak and easily interfered with by leakage current in the circuit. This leakage current primarily comes from leakage current on the printed circuit board (PCB) or from ESD protection devices within the chip. Furthermore, leakage current can often reach tens of picoamperes, which can overwhelm the femtoampere current signal to be detected.

[0003] Although existing technology can shield leakage current by providing a buffer within the circuit to track the input common-mode voltage, and connecting the output of the buffer to the other end of the ESD protection device, so that the voltage across the ESD protection device is clamped to zero volts by the output of the buffer, this shielding process not only requires a high-precision operational amplifier to act as a buffer, but also places high requirements on the offset voltage of the operational amplifier. Trim technology is usually required to calibrate the offset voltage of the operational amplifier, which increases the chip area and power consumption, as well as the design complexity of the internal chip circuits. [Summary of the invention]

[0004] The purpose of the present invention is to provide an operational amplifier with an input bias current of femtoampere level, which clamps the voltage across the electrostatic protection device ESD by setting a complementary source follower circuit module at the input end of the main operational amplifier module, wherein the area and power consumption of the complementary source follower circuit module are smaller, and the complexity of the internal circuit design of the chip is simplified and the reliability of the operational amplifier is improved.

[0005] The purpose of the present invention is achieved through the following technical solutions:

[0006] An operational amplifier with a fA-level input bias current, the operational amplifier is respectively connected to a positive power supply V DD , negative power supply V SS , non-inverting input terminal V in+ , inverting input terminal V in- Connected to the protection output terminal GRD; comprising:

[0007] An ESD protection circuit module, the ESD protection circuit module comprising a plurality of interconnected diodes, a current limiting resistor R1, a current limiting resistor R2, and an anti-latch resistor R3;

[0008] Complementary source follower circuit module, the complementary source follower circuit module includes an NMOS source follower and a PMOS source follower cascaded with each other; the complementary source follower circuit module is respectively connected to the positive power supply V DD , negative power supply V SS , current limiting resistor R1, current limiting resistor R2 are connected;

[0009] V GS calibration circuit module, the V GS The calibration circuit module includes V GS Calibration logic circuit; the V GS The calibration circuit module is connected to the complementary source follower circuit module and is used to adjust the gate-source voltage of the PMOS source follower;

[0010] The main operational amplifier circuit module A1 is connected to the current limiting resistor R1 and the current limiting resistor R2 respectively; the main operational amplifier circuit module A1 is used for current amplification.

[0011] In one embodiment, the ESD protection circuit module includes a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, and a diode D6 connected to each other; the anode of the diode D1 is connected to the protection output terminal GRD, and the cathode is connected to the non-inverting input terminal V in+ Connect the anode of diode D2 to the non-inverting input terminal V in+ The cathode of diode D3 is connected to the protection output terminal GRD; the anode of diode D3 is connected to the inverting input terminal V in- The cathode of diode D4 is connected to the protection output terminal GRD, and the anode of diode D4 is connected to the protection output terminal GRD, and the cathode of diode D4 is connected to the inverting input terminal V in- Connection: The anode of diode D5 is connected to the protection output terminal GRD, and the cathode is connected to the positive power supply V DD Connect the anode of diode D6 to the negative power supply V SS The cathode is connected to the protection output terminal GRD.

[0012] In one embodiment, one end of the current limiting resistor R1 is connected to the non-inverting input terminal V in+ The other end is connected to the non-inverting input terminal of the main operational amplifier circuit module A1; one end of the current limiting resistor R2 is connected to the inverting input terminal V in- The other end is connected to the inverting input end of the main operational amplifier circuit module A1.

[0013] In one embodiment, one end of the anti-latch resistor R3 is connected to the protection output terminal GRD, and the other end is connected to the output terminal of the complementary source follower circuit module.

[0014] In one embodiment, the NMOS source follower includes an NMOS transistor M1 and a variable current source I1; the PMOS source follower includes a PMOS transistor M2 and a current source I2.

[0015] In one embodiment, the gate of the NMOS transistor M1 is connected to the non-inverting input terminal of the main operational amplifier circuit module A1; the drain of the NMOS transistor M1 is connected to the positive power supply V DD The source of the NMOS transistor M1 is connected to the negative power supply V through the variable current source I1 SS connect.

[0016] In one embodiment, the gate of the PMOS transistor M2 is connected to the source of the NMOS transistor M1; the drain of the PMOS transistor M2 is connected to the negative power supply V SS The drain of the PMOS transistor M2 is also connected to the protection output terminal GRD through the current limiting resistor R2; the source of the PMOS transistor M2 is connected to the positive power supply V DD connect.

[0017] In one embodiment, the V GS Calibrate the V of the circuit module GS The calibration logic circuit is connected to the variable current source I1 and is used to adjust the current of the variable current source I1 so that the absolute value of the gate-source voltage of the NMOS transistor M1 is equal to the absolute value of the gate-source voltage of the PMOS transistor M2.

[0018] In one embodiment, when V GS When the calibration logic circuit increases the current of the variable current source I1, the gate-source voltage of the NMOS transistor M1 increases accordingly; when V GS When the calibration logic circuit reduces the current of the variable current source I1 , the gate-source voltage of the NMOS transistor M1 decreases accordingly.

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] The operational amplifier with fA-level input bias current provided in the present application clamps the voltage across the electrostatic protection device ESD by setting a complementary source follower circuit module at the input end of the main operational amplifier module. The use of the complementary source follower circuit module has smaller area and power consumption overhead, and also simplifies the complexity of the internal circuit design of the chip and improves the reliability of the operation of the operational amplifier.

Brief Description of the Drawings

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without inventive efforts. Among them:

[0022] Figure 1 This is a structural block diagram of an operational amplifier with fA-level input bias current provided by this application.

[0023] Figure 2 yes Figure 1 The circuit schematic of an operational amplifier with fA-level input bias current is shown.

[0024] Figure 3 This is a schematic diagram of a curve showing how the leakage current of an operational amplifier without an ESD protection circuit module varies with the input common-mode voltage in the prior art.

[0025] Figure 4 yes Figure 1 FIG. 4 is a schematic diagram showing a curve of leakage current of an operational amplifier with an input bias current of the fA level as a function of input common-mode voltage. [Specific implementation method]

[0026] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. It will be understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only some, rather than all, structures related to the present application are shown in the accompanying drawings. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0027] As used herein, the terms "comprise," "comprising," and "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0028] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0029] See also Figures 1 to 2 As shown, an operational amplifier with fA-level input bias current provided by an embodiment of the present application includes an ESD protection circuit module, a complementary source follower circuit module, V GS Calibration circuit module, main operational amplifier circuit module A1.

[0030] The ESD protection circuit module is used to shield the ESD from leakage current when the operational amplifier is connected to the ESD, thereby reducing the interference of the leakage current in the ESD.

[0031] The complementary source follower circuit module is used to clamp the voltage across the electrostatic protection device ESD when the operational amplifier is connected to the electrostatic protection device ESD, so that the voltage across the electrostatic protection device ESD is clamped to zero volt.

[0032] V GS The calibration circuit module is used to calibrate the gate-source voltage of the transistor in the complementary source follower circuit module, so that the complementary source follower circuit module can accurately clamp the voltage of the electrostatic protection device ESD, thereby improving the working accuracy and reliability of the complementary source follower circuit module.

[0033] The main operational amplifier circuit module A1 is used to amplify the current signal to be detected and output it through its output terminal V O Output the amplified current signal to be detected.

[0034] In addition, the fA-level input bias current of the operational amplifier is also respectively related to the positive power supply V DD , negative power supply V SS , non-inverting input terminal V in+ , inverting input terminal V in- And connected to the protection output terminal GRD. Among them, the positive power supply V DD and negative power supply V SS Provides stable positive and negative power supply for the normal operation of the operational amplifier. in+ and the inverting input V in- It provides stable in-phase input signal and reverse input signal for the normal operation of the operational amplifier. The protection output terminal GRD is used to protect the output of the ESD protection circuit module.

[0035] Please continue reading Figures 1 to 2 The ESD protection circuit module includes several interconnected diodes, current limiting resistors R1, R2, and anti-latch resistors R3. The ESD protection circuit module can specifically include six diodes, namely diode D1, diode D2, diode D3, diode D4, diode D5, and diode D6. The anode of diode D1 is connected to the protection output terminal GRD, and the cathode is connected to the non-inverting input terminal V in+ Connect the anode of diode D2 to the non-inverting input terminal V in+ The cathode of diode D3 is connected to the protection output terminal GRD; the anode of diode D3 is connected to the inverting input terminal V in- The cathode of diode D4 is connected to the protection output terminal GRD, and the anode of diode D4 is connected to the protection output terminal GRD, and the cathode of diode D4 is connected to the inverting input terminal V in- Connection: The anode of diode D5 is connected to the protection output terminal GRD, and the cathode is connected to the positive power supply V DD Connect the anode of diode D6 to the negative power supply V SS The cathode is connected to the protection output terminal GRD.

[0036] In addition, one end of the current limiting resistor R1 is connected to the non-inverting input terminal V in+ The other end is connected to the non-inverting input terminal of the main operational amplifier circuit module A1. One end of the current limiting resistor R2 is connected to the inverting input terminal V in- One end of the anti-latch resistor R3 is connected to the protection output terminal GRD, and the other end is connected to the output terminal of the complementary source follower circuit module.

[0037] The complementary source follower circuit module includes an NMOS source follower and a PMOS source follower connected in cascade. The complementary source follower circuit module is connected to the positive power supply V DD , negative power supply V SS , current limiting resistor R1, current limiting resistor R2 are connected. The NMOS source follower may include but is not limited to NMOS transistor M1 and variable current source I1, which can be GS The calibration circuit module outputs a variable current under the calibration action. The PMOS source follower may include but is not limited to a PMOS transistor M2 and a current source I2. The current source I2 may be but is not limited to a constant current source.

[0038] Specifically, the gate of the NMOS transistor M1 is connected to the non-inverting input terminal of the main operational amplifier circuit module A1; the drain of the NMOS transistor M1 is connected to the positive power supply V DD Connection; the source of NMOS transistor M1 is connected to the negative power supply V through the variable current source I1 SSThe gate of the PMOS transistor M2 is connected to the source of the NMOS transistor M1; the drain of the PMOS transistor M2 is connected to the negative power supply V SS The drain of the PMOS transistor M2 is also connected to the protection output terminal GRD through the current limiting resistor R2; the source of the PMOS transistor M2 is connected to the positive power supply V DD connect.

[0039] V GS The calibration circuit module includes V GS Calibrate the logic circuit. Among them, V GS The calibration circuit module is connected to the complementary source follower circuit module to adjust the gate-source voltage of the PMOS source follower. Specifically, V GS The calibration logic circuit is connected to the variable current source I1 and is used to adjust the current of the variable current source I1 so that the absolute value of the gate-source voltage of the NMOS transistor M1 is equal to the absolute value of the gate-source voltage of the PMOS transistor M2. GS When the calibration logic circuit increases the current of the variable current source I1, the gate-source voltage of the NMOS transistor M1 increases accordingly; when V GS When the calibration logic circuit reduces the current of the variable current source I1, the gate-source voltage of the NMOS transistor M1 decreases accordingly. GS The calibration logic circuit adjusts the output current of variable current source I1, synchronously adjusting the gate-source voltage of NMOS transistor M1. When the absolute value of the gate-source voltage of NMOS transistor M1 is equal to the gate-source voltage of PMOS transistor M2, the input bias current of the operational amplifier reaches its minimum. This adjustment method accurately clamps the voltage across the ESD protection device without requiring complex circuit design, improving the overall operational stability and reliability of the operational amplifier.

[0040] The main operational amplifier circuit module A1, as a functional component of the operational amplifier, is used to amplify the current. Among them, the complementary source follower circuit module and V GS The calibration circuit module and the calibration circuit module work together to minimize the input bias current of the main operational amplifier circuit module A1, thereby effectively shielding the interference of leakage current during the current amplification process of the main operational amplifier circuit module A1 and improving the signal-to-noise ratio of the current amplified by the main operational amplifier circuit module A1.

[0041] See also Figure 3 As shown in FIG, in the prior art, when an operational amplifier without an ESD protection circuit module is operating, when the input common mode voltage increases from 1.0V to 3.3V, the leakage current of the operational amplifier changes from 1.49pA to -0.81pA. Figure 4As shown, during the operation of the operational amplifier with fA-level input bias current of the present application, when the input common-mode voltage increases from 1.0V to 3.3V, the leakage current of the operational amplifier changes from 91.43fA to -109.73fA, an overall reduction of 11.5 times. It can be seen that compared with the operational amplifier without ESD protection circuit module in the prior art, the operational amplifier with fA-level input bias current of the present application can significantly reduce the leakage current of the operational amplifier under the condition of the same input common-mode voltage change, thereby effectively reducing the interference effect of leakage current on the operational amplifier.

[0042] The above is only a specific embodiment of the present invention, and any other improvements made based on the concept of the present invention are considered to be within the scope of protection of the present invention.

Claims

1. An operational amplifier with a fA-level input bias current, the operational amplifier is respectively connected to a positive power supply V DD , negative power supply V SS , non-inverting input terminal V in+ , inverting input terminal V in- and connected to the protection output terminal GRD, characterized in that: include: An ESD protection circuit module, the ESD protection circuit module comprising a plurality of interconnected diodes, a current limiting resistor R1, a current limiting resistor R2, and an anti-latch resistor R3; Complementary source follower circuit module, the complementary source follower circuit module includes an NMOS source follower and a PMOS source follower cascaded with each other; the complementary source follower circuit module is respectively connected to the positive power supply V DD , negative power supply V SS , current limiting resistor R1, current limiting resistor R2 are connected, one end of the current limiting resistor R1 is connected to the in-phase input terminal V in+ The other end is connected to the non-inverting input terminal of the main operational amplifier circuit module A1; one end of the current limiting resistor R2 is connected to the inverting input terminal V in- The other end is connected to the inverting input terminal of the main operational amplifier circuit module A1; the NMOS source follower includes an NMOS transistor M1 and a variable current source I1; the PMOS source follower includes a PMOS transistor M2 and a variable current source I 2； The gate of the NMOS transistor M1 is connected to the non-inverting input terminal of the main operational amplifier circuit module A1; the drain of the NMOS transistor M1 is connected to the positive power supply V DD The source of the NMOS transistor M1 is connected to the negative power supply V through the variable current source I1 SS The gate of the PMOS transistor M2 is connected to the source of the NMOS transistor M1; the drain of the PMOS transistor M2 is connected to the negative power supply V SS The source of the PMOS transistor M2 is also connected to the protection output terminal GRD through the current limiting resistor R3; the source of the PMOS transistor M2 is connected to the positive power supply V DD connect; V GS calibration circuit module, the V GS The calibration circuit module includes V GS Calibration logic circuit; the V GS The calibration circuit module is connected to the complementary source follower circuit module and is used to adjust the gate-source voltage of the PMOS source follower; The main operational amplifier circuit module A1 is connected to the current limiting resistor R1 and the current limiting resistor R2 respectively; the main operational amplifier circuit module A1 is used for current amplification.

2. The operational amplifier with fA-level input bias current according to claim 1, wherein: The ESD protection circuit module includes a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, and a diode D6 connected to each other; the anode of the diode D1 is connected to the protection output terminal GRD, and the cathode is connected to the in-phase input terminal V in+ Connect the anode of diode D2 to the non-inverting input terminal V in+ The cathode of diode D3 is connected to the protection output terminal GRD; the anode of diode D3 is connected to the inverting input terminal V in- The cathode of diode D4 is connected to the protection output terminal GRD, and the anode of diode D4 is connected to the protection output terminal GRD, and the cathode of diode D4 is connected to the inverting input terminal V in- Connection: The anode of diode D5 is connected to the protection output terminal GRD, and the cathode is connected to the positive power supply V DD Connect the anode of diode D6 to the negative power supply V SS The cathode is connected to the protection output terminal GRD.

3. The operational amplifier with fA-level input bias current according to claim 2, wherein: One end of the anti-latch resistor R3 is connected to the protection output terminal GRD, and the other end is connected to the output terminal of the complementary source follower circuit module.

4. The operational amplifier with fA-level input bias current according to claim 3, wherein: The V GS Calibrate the V of the circuit module GS The calibration logic circuit is connected to the variable current source I2 and is used to adjust the current of the variable current source I2 so that the absolute value of the gate-source voltage of the NMOS transistor M1 is equal to the absolute value of the gate-source voltage of the PMOS transistor M2.

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