Debug port multiplexing method, device, computer equipment and storage medium
By configuring the enable state of the debug port at different stages, using selectors and judgment circuit control signals, the problem of traditional debug ports being susceptible to strong electric pulse attacks is solved, and the anti-strong electric pulse and debugging functions are achieved.
Patent Information
- Application Number
- CN202210360247.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-07
- Publication Date
- 2025-09-05
- Estimated Expiration
- 2042-04-07
AI Technical Summary
The traditional debug port multiplexing method is susceptible to external strong electric pulse attacks, resulting in damage to internal circuits, and it is impossible to achieve both strong electric pulse resistance and debugging functions.
Before the application is loaded, the debug port is configured as a state where the input is not enabled and the output is not enabled; after loading and before debugging, it is configured as a state where the input is not enabled and the output is not enabled; after debugging, it is configured to achieve input functions and multiplexing through switching of selectors and judgment circuit control signals.
It protects the internal circuit from damage under external strong electric pulse attack, and realizes the input function of the debug port and the reuse of application programs.
Smart Images

Figure CN114661610B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of debug ports, and in particular to a debug port multiplexing method, apparatus, computer equipment, storage medium, and computer program product. Background Art
[0002] Debug ports are typically implemented using PADs (chip pins) with input and output enable functions. In traditional debug port multiplexing, the PAD must be configured as an input before the application runs. This allows the PAD to function as an input during debugging and allows for multiplexing. However, PADs configured as input are highly susceptible to strong external electrical pulses, which can damage internal circuitry. Therefore, addressing the issue of robustness against strong electrical pulses, while building upon traditional debug port multiplexing, is crucial. Summary of the Invention
[0003] Based on this, it is necessary to provide a debug port multiplexing method, device, computer equipment, computer-readable storage medium and computer program product to address the above technical problems, which can solve the problem that the debug port can be resistant to strong electrical pulses, realize the input function during debugging, and realize application reuse.
[0004] In a first aspect, the present application provides a debug port multiplexing method. The method comprises:
[0005] Obtaining a pre-configured initial control signal and an input control signal;
[0006] Before the application is loaded, the debug port is configured to be in an input-disabled and output-disabled state according to the initial control signal;
[0007] After the application is loaded and before being debugged, configuring the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal;
[0008] After the application is debugged, the debug port is configured for reuse.
[0009] In one embodiment, configuring the debug port to an input-disabled state and an output-disabled state according to the initial control signal includes:
[0010] Generate a first selection signal through a judgment circuit, and transmit the first selection signal to a corresponding selector;
[0011] Selecting the initial control signal according to the received first selection signal by the selector, and outputting a first debug port enable control signal;
[0012] The debug port is configured to be in an input-disabled and output-disabled state according to the first debug port enable control signal.
[0013] In one embodiment, configuring the debug port to an input-enabled state and an output-disabled state according to the initial control signal and the input control signal includes:
[0014] Read the tag value from the memory through the loading circuit and send it to the judgment circuit;
[0015] Identifying, by the judgment circuit, whether the tag value is the same as a preset value in the judgment circuit;
[0016] When the flag value is different from the preset value, the judgment circuit transmits the generated second selection signal to the corresponding selector;
[0017] Selecting the input control signal and the initial output signal in the initial control signal respectively by the selector according to the received second selection signal, and outputting a second debug port enable control signal;
[0018] The debug port is configured to be in an input-enabled and output-disabled state according to the second debug port enable control signal.
[0019] In one embodiment, configuring the debug port for multiplexing includes:
[0020] The tag value in the memory is updated to a preset value, and the multiplexing control signal in the memory is enabled and configured according to the debugged application program.
[0021] In one embodiment, enabling and configuring the multiplexing control signal in the memory according to the debugged application program includes:
[0022] Determine target enable configuration information based on the debugged application program;
[0023] The multiplexing control signal in the memory is enabled and configured according to the target configuration information.
[0024] In one embodiment, after configuring the debug port for multiplexing, the method further includes:
[0025] After the application is loaded next time and before debugging, the updated tag value is read from the memory through the loading circuit and sent to the judgment circuit, and the multiplexing control signal after enabling configuration is obtained and transmitted to the corresponding selector;
[0026] When the judgment circuit identifies that the updated flag value is the same as the preset value in the judgment circuit, the judgment circuit transmits the generated third selection signal to the corresponding selector;
[0027] Selecting, by the selector, the multiplexing control signal after enabling the configuration according to the received third selection signal, and outputting the third debug port enable control signal;
[0028] The input enable state and the output enable state of the debug port are controlled according to the third debug port enable control signal.
[0029] In a second aspect, the present application further provides a debug port multiplexing device. The device comprises:
[0030] A signal acquisition module, used to acquire a pre-configured initial control signal and an input control signal;
[0031] A first configuration module is configured to configure the debug port to an input-disabled state and an output-disabled state according to the initial control signal before the application is loaded;
[0032] a second configuration module, configured to configure the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal after the application is loaded but before being debugged;
[0033] The multiplexing configuration module is used to perform multiplexing configuration on the debugging port after the application completes debugging.
[0034] In a third aspect, the present application further provides a computer device. The computer device includes a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are performed:
[0035] Obtaining a pre-configured initial control signal and an input control signal;
[0036] Before the application is loaded, the debug port is configured to be in an input-disabled and output-disabled state according to the initial control signal;
[0037] After the application is loaded and before being debugged, configuring the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal;
[0038] After the application is debugged, the debug port is configured for reuse.
[0039] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the following steps:
[0040] Obtaining a pre-configured initial control signal and an input control signal;
[0041] Before the application is loaded, the debug port is configured to be in an input-disabled and output-disabled state according to the initial control signal;
[0042] After the application is loaded and before being debugged, configuring the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal;
[0043] After the application is debugged, the debug port is configured for reuse.
[0044] In a fifth aspect, the present application further provides a computer program product. The computer program product includes a computer program that, when executed by a processor, implements the following steps:
[0045] Obtaining a pre-configured initial control signal and an input control signal;
[0046] Before the application is loaded, the debug port is configured to be in an input-disabled and output-disabled state according to the initial control signal;
[0047] After the application is loaded and before being debugged, configuring the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal;
[0048] After the application is debugged, the debug port is configured for reuse.
[0049] The above-mentioned debug port multiplexing method, apparatus, computer equipment, storage medium, and computer program product configure the debug port to an input-disabled and output-disabled state according to a pre-configured initial control signal before the application is loaded. At this time, even if the debug port is attacked by an external strong electric pulse, it is not easy to damage the internal circuit. After the application is loaded and before debugging, the debug port is configured to an input-enabled and output-disabled state according to the initial control signal and the input control signal, which can realize the input function of the debug port during debugging. After the application is debugged, the debug port is multiplexed and configured, which can realize the debug port in the input state to be resistant to strong electric pulses and realize the input function during debugging, and also facilitate application reuse. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] Figure 1 1 is a flow chart of a debug port multiplexing method according to an embodiment;
[0051] Figure 21. A flowchart illustrating steps for configuring a debug port to an input-disabled state and an output-disabled state according to an initial control signal in one embodiment;
[0052] Figure 3 Schematic diagram of the principle of a debug port multiplexing method in one embodiment;
[0053] Figure 4 This is a structural block diagram of a debug port multiplexing device in one embodiment;
[0054] Figure 5 FIG. 1 is a schematic diagram of the structure of a computer device in one embodiment. DETAILED DESCRIPTION
[0055] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.
[0056] It should be noted that the terms "first," "second," "third," etc. in the specification and claims of this application and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this manner are interchangeable where appropriate for the purposes of describing the embodiments of the present application.
[0057] The debug port multiplexing method provided in this application can be applied to computer equipment that needs to withstand strong electrical pulses, such as vehicle-mounted equipment. The selector, judgment circuit, non-volatile memory, loading circuit, and reset synchronization circuit involved in this application can be software or hardware.
[0058] In one embodiment, Figure 1 As shown, a debug port multiplexing method is provided, which is described by taking the method applied to an in-vehicle device as an example, and includes the following steps:
[0059] Step 102: Acquire a pre-configured initial control signal and an input control signal.
[0060] The initial control signal is the control signal that controls the debug port to be in the input-disabled and output-disabled states. The input control signal is the control signal that controls the debug port to be in the input-enabled state.
[0061] The debug port can be implemented as a PAD (chip pin) with input enable and output enable. The vehicle-mounted device is pre-configured with initial control signals and input control signals. After powering on, the vehicle-mounted device can obtain the pre-configured initial control signals and input control signals.
[0062] Step 104 : Before the application is loaded, the debug port is configured to be in an input-disabled and output-disabled state according to the initial control signal.
[0063] In this embodiment, the debug port must be in an input-disabled and output-disabled state until the application is loaded. After the vehicle-mounted device is powered on and before the application begins loading, the debug port can be configured to have input and output disabled according to an initial control signal. The application then begins loading, and the application remains in the input-disabled and output-disabled state until loading is complete.
[0064] Step 106 : After the application is loaded and before debugging, the debug port is configured to be input enabled and output disabled according to the initial control signal and the input control signal.
[0065] After the application is loaded, it can be debugged through the debug port. Since the debug port needs to have input functionality during debugging, the vehicle-mounted device can configure the debug port to an input-enabled state based on input control signals and to an output-disabled state based on initial control signals before debugging. This allows the debug port to function as an input during debugging.
[0066] Step 108: After the application program has completed debugging, the debugging port is configured for reuse.
[0067] The onboard device also includes a non-volatile memory and a judgment circuit. The non-volatile memory will be referred to as the memory below. The memory is pre-configured with a multiplexing control signal and a flag value. The multiplexing control signal controls the input and output enable of the debug port. The location of the multiplexing control signal in the memory is also initialized at the factory. To distinguish between the actual multiplexing control signal used by the program and the initial value, a separate flag is used, which is used to distinguish the two. The judgment circuit also stores a preset value, which can be a designer-defined value. By comparing the flag value in the memory with the preset value in the judgment circuit, the validity of the multiplexing control signal can be determined. If valid, this indicates that the debug port can be multiplexed.
[0068] After the application is debugged, the vehicle device can update the flag value in the memory to the preset value to enable the application to reuse the debug port. It can also enable the reuse control signal in the memory according to the debugged application, thereby enabling the debug port reuse. The next time the application is powered on and loaded, the debug port reuse function can be exercised according to the enabled reuse control signal.
[0069] In the above-mentioned debug port multiplexing method, before the application is loaded, the debug port is configured to an input-disabled and output-disabled state according to a pre-configured initial control signal. In this case, even if the debug port is attacked by an external strong electrical pulse, the internal circuit is not easily damaged. After the application is loaded and before debugging, the debug port is configured to an input-enabled and output-disabled state according to the initial control signal and the input control signal, which can realize the input function of the debug port during debugging. After the application is debugged, the debug port is multiplexed, which can ensure that the debug port in the input state is resistant to strong electrical pulses, can also realize the input function during debugging, and can also facilitate application reuse.
[0070] In one embodiment, Figure 2 As shown, in step 104, configuring the debug port to the input disabled and output disabled states according to the initial control signal includes:
[0071] Step 202 : Generate a first selection signal through a judgment circuit, and transmit the first selection signal to a corresponding selector.
[0072] Step 204 : Selecting an initial control signal according to the received first selection signal through a selector, and outputting a first debug port enable control signal.
[0073] Step 206: Configure the debug port to an input-disabled and output-disabled state according to the first debug port enable control signal.
[0074] The vehicle-mounted device includes a debug port, a selector connected to the debug port, and a judgment circuit connected to the selector. The selector includes an input selector and an output selector. The input enable of the debug port is controlled by the input of the input selector, and the output enable of the debug port is controlled by the output of the output selector.
[0075] The first selection signal is a selection signal generated by the judgment circuit before the application is loaded, which is used to instruct the selector to select a control signal that disables the debug port input and output. The first debug port enable control signal is an enable control signal output by the selector before the application is loaded, which is used to disable the debug port input and output.
[0076] Before the application is loaded, the judgment circuit in the vehicle-mounted device generates a first selection signal. The first selection signal may include a first input selection signal and a first output selection signal. The values of the first input selection signal and the first output selection signal are the initial values of the judgment circuit and are respectively used to select the control signals that can disable the input and output of the debug port. The first input selection signal can be used to select the control signal that can disable the input of the debug port, and the first output selection signal can be used to select the control signal that can disable the output of the debug port. The first input selection signal and the first output selection signal are respectively transmitted to the corresponding selectors through the judgment circuit. Specifically, the first input selection signal is transmitted to the input selector, and similarly, the first output selection signal is transmitted to the output selector.
[0077] After powering on, the vehicle-mounted device can transmit the acquired initial control signal and input control signal to the corresponding selector so that the selector can configure the debug port. The initial control signal and input control signal can be pre-configured in the selector and are acquired through the selector. The initial control signal can include an initial input signal and an initial output signal. The initial input signal is used to disable the debug port input. The initial output signal is used to disable the debug port output.
[0078] Before the application is loaded, the selector selects the initial control signal according to the first selection signal after receiving the first selection signal, and the selector converts the selected initial control signal into a first debug port enable control signal. The first debug port enable control signal includes a first debug port input enable control signal and a second debug port output enable control signal. Specifically, the input selector selects the initial input signal according to the first input selection signal, converts the initial input signal into the first debug port input enable control signal, and outputs it. The first debug port input enable control signal is used to control the debug port to be in an input-disabled state. The output selector selects the initial output signal according to the first output selection signal, converts the initial output signal into the first debug port output enable control signal, and outputs it. The first debug port output enable signal is used to control the debug port to be in an output-disabled state.
[0079] In this embodiment, a judgment circuit transmits a generated first selection signal to a corresponding selector, so that the selector selects an initial control signal based on the first selection signal and outputs a first debug port enable control signal. This first debug port enable control signal then configures the debug port to an input-disabled and output-disabled state. When the debug port is in the input-disabled and output-disabled states, even if it is attacked by a strong external electrical pulse, it is unlikely to damage its internal circuitry.
[0080] In one embodiment, in step 106, configuring the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal includes: reading a tag value from a memory via a loading circuit and sending the tag value to a judgment circuit; identifying, via the judgment circuit, whether the tag value is the same as a preset value in the judgment circuit; when the tag value is different from the preset value, the judgment circuit transmitting a generated second selection signal to a corresponding selector; selecting, via the selector, the input control signal and the initial output signal in the initial control signal according to the received second selection signal, and outputting a second debug port enable control signal; and configuring the debug port to an input-enabled and output-disabled state according to the second debug port enable control signal.
[0081] The vehicle-mounted device may include a reset synchronization circuit, a memory, and a loading circuit connected to the memory. The reset synchronization circuit is connected to the loading circuit, and the loading circuit is also connected to the judgment circuit, the input selector, and the output selector respectively.
[0082] The second selection signal is a selection signal generated by the judgment circuit after the application is loaded and before debugging. It is used to instruct the selector to select a control signal that enables the debug port input and disables the debug port output. The second selection signal may include a second input selection signal and a second output selection signal. The second input selection signal is used to instruct the selector to select a control signal that enables the debug port input, and the second output selection signal is used to instruct the selector to select a control signal that disables the debug port output. The initial output signal in the initial control signal is a control signal that disables the debug port output. The initial control signal may include an initial input signal and an initial output signal. The value of the initial input signal is a value that disables the debug port input, and the value of the initial output signal is a value that disables the debug port output. The second debug port enable control signal is an enable control signal output by the selector after the application is loaded and before debugging. It is used to control the debug port to be in the input-enabled state and the output-disabled state. The second debug port enable control signal may include a second debug port input enable control signal and a second debug port output enable control signal. The second debug port input enable control signal is used to control the debug port to be in the input-enabled state. The second debug port output enable control signal is used to control the debug port to be in an output disabled state.
[0083] After the application is loaded and before debugging, the debug port needs to be configured to an input-enabled and output-disabled state. Specifically, the reset synchronization circuit generates a power-on reset signal and transmits it to the loading circuit. The loading circuit then reads a tag value from a memory and sends it to the judgment circuit. The judgment circuit identifies whether the tag value is the same as a pre-stored preset value. If not, the judgment circuit generates a second input selection signal and a second output selection signal, transmits the second input selection signal to the input selector, and transmits the second output selection signal to the output selector. The input selector selects an input control signal based on the second input selection signal, converts the input control signal into a second debug port input enable control signal, and outputs it. The debug port is controlled to be in the input-enabled state based on the second debug port input enable control signal. The output selector selects an initial output signal based on the second output selection signal, converts the initial output signal into a second debug port output enable control signal, and outputs it. The debug port is controlled to be in the output-disabled state based on the second debug port output enable control signal, thereby achieving the debug port being in the input-enabled and output-disabled states.
[0084] In this embodiment, after the application is loaded and before debugging, the determination circuit identifies whether the tag value is the same as a preset value in the determination circuit. When the tag value is different from the preset value, a second selection signal is generated and transmitted to the corresponding selector. The selector selects the input control signal and the initial output signal in the initial control signal based on the received second selection signal, outputs a second debug port enable control signal, and then configures the debug port to an input-enabled and output-disabled state based on the second debug port enable control signal. Since the debug port is in the input-enabled state, the input function during debugging can be realized.
[0085] In one embodiment, configuring the debug port for multiplexing includes: updating a flag value in a memory to a preset value, and enabling a multiplexing control signal in the memory according to a debugged application program.
[0086] The memory is pre-configured with multiplexing control signals and flag values. The location of the multiplexing control signals in the memory is also initialized at the factory. To distinguish between the multiplexing control signals actually used by the program and the initial values, the flag values can be used. The judgment circuit is pre-stored with preset values.
[0087] After debugging an application through the debug port, the tag value in the memory is updated to the preset value. The multiplexing control signal must then be enabled and configured based on the application to implement the debug port's multiplexing configuration. For example, the debug port can be configured as an input port and / or an output port. The next time the application is loaded, if the tag value matches the preset value and the two are identical, indicating that the current multiplexing control signal is valid, the selector will select the configured multiplexing control signal to enable both input and output of the debug port. This facilitates the application's multiplexing of the debug port.
[0088] Furthermore, enabling and configuring the multiplexing control signal in the memory according to the debugged application includes: determining target enabling configuration information according to the debugged application; and enabling and configuring the multiplexing control signal in the memory according to the target enabling configuration information.
[0089] Multiplexed control signals can include multiplexed input signals and multiplexed output signals. The multiplexed input signal controls the debug port's input enable state, while the multiplexed output signal controls the debug port's output enable state. Target enable configuration information refers to the application's requirements for the debug port's input and output enable states. For example, the debug port can be used as an input port, requiring it to be in the input-enabled state and output-disabled. Alternatively, the debug port can be used as an output port, requiring it to be in the input-disabled state and output-enabled state. Alternatively, the debug port can be used as both an input and output port, requiring it to be in both the input-enabled and output-enabled states.
[0090] When the target enable configuration information configures the debug port as an input port, the multiplexed input signal is configured as a signal that enables debug port input, and the multiplexed output signal is configured as a signal that disables debug port output. When the target enable configuration information configures the debug port as an output port, the multiplexed input signal is configured as a signal that disables debug port input, and the multiplexed output signal is configured as a signal that enables debug port output. When the target enable configuration information configures the debug port as both an input port and an output port, the multiplexed input signal is configured as a signal that enables debug port input, and the multiplexed output signal is configured as a signal that enables debug port output.
[0091] In this embodiment, the target configuration information is used to enable the multiplexing control signal in the memory, so that the application program can reuse the debug port, thereby reducing the number of interfaces.
[0092] In one embodiment, after the debug port is multiplexed and configured, the above method further includes: after the next application is loaded and before debugging, reading the updated tag value from the memory through the loading circuit and sending it to the judgment circuit, and obtaining the multiplexing control signal after the enable configuration and transmitting it to the corresponding selector; when the judgment circuit identifies that the updated tag value is the same as the preset value in the judgment circuit, transmitting the generated third selection signal to the corresponding selector through the judgment circuit; selecting the multiplexing control signal after the enable configuration according to the received third selection signal through the selector, and outputting the third debug port enable control signal; and controlling the input enable state and the output enable state of the debug port according to the third debug port enable control signal.
[0093] The multiplexed control signal after enabling configuration may include a multiplexed input signal after enabling configuration and a multiplexed output signal after enabling configuration. The multiplexed input signal after enabling configuration is used to control the input enable state of the debug port, and the multiplexed output signal after enabling configuration is used to control the output enable state of the debug port. The third selection signal is a selection signal generated by the judgment circuit after the next application is loaded and before debugging, which is used to instruct the selector to select the control signal that controls the input enable state and output enable state of the debug port. The third selection signal may include a third input selection signal and a third output selection signal. The third input selection signal is used to instruct the selector to select the control signal that controls the input enable state of the debug port, and the third output selection signal is used to instruct the selector to select the control signal that controls the output enable state of the debug port. The third debug port enable control signal is an enable control signal output by the selector after the next application is loaded and before debugging, which is used to control the input enable state and output enable state of the debug port. The third debug port enable control signal may include a third debug port input enable control signal and a third debug port output enable control signal. The third debug port input enable control signal is used to control the input enable state of the debug port. The third debug port output enable control signal is used to control the output enable state of the debug port.
[0094] After the debug port is configured for multiplexing, its multiplexing function will not be realized until the next power-up. Specifically, the loading circuit reads the updated tag value from the memory and sends the updated tag value to the judgment circuit. The loading circuit can also obtain the multiplexed input signal and the multiplexed output signal after the configuration is enabled, transmit the multiplexed input signal to the input selector, and transmit the multiplexed output signal to the output selector.
[0095] The judgment circuit determines whether the updated tag value is the same as the pre-stored preset value. Since the updated tag value is the preset value, the same result is obtained. At this point, the judgment circuit generates a third input selection signal and a third output selection signal, transmits the third input selection signal to the input selector, and transmits the third output selection signal to the output selector. The input selector selects and enables the configured multiplexed input signal based on the third input selection signal, converts the enabled multiplexed input signal into a third debug port input enable control signal, outputs the signal, and controls the debug port input enable state based on the third debug port input enable control signal. The output selector selects and enables the configured multiplexed output signal based on the third output selection signal, converts the enabled multiplexed input signal into a third debug port output enable control signal, outputs the signal, and controls the debug port output enable state based on the third debug port output enable control signal, thereby achieving communication functionality.
[0096] In this embodiment, after the next application is loaded and before debugging, since the tag value in the judgment circuit has been updated to the preset value, it is the same as the preset value in the loading circuit. The selector can select the multiplexing control signal after enabling the configuration and output the third debug port enable control signal, and then control the output enable state and output enable state of the debug port according to the third debug port enable control signal, thereby facilitating the reuse of the application.
[0097] In one embodiment, Figure 3The figure shows the principle diagram of the debug port multiplexing method. PAD represents the debug port, PAD input enable control signal represents the debug port enable control signal output by selector 1 at different stages, which can be the first debug port input enable control signal, the second debug port input enable control signal or the third debug port input enable control signal, PAD output enable control signal represents the debug port output enable control signal output by selector 2 at different stages, which can be the first debug port output enable control signal, the second debug port output enable signal or the third debug port output enable signal, selector 1 represents the input selector, selector 2 represents the output selector, control signal 1 represents the initial input signal, control signal 2 represents the initial output signal, control signal 3 represents Input control signal, control signal 5 represents the signal pre-configured in the memory for controlling the input enable state of the PAD, which can be a multiplexed input signal or a configured multiplexed input signal, control signal 6 represents the signal pre-configured in the memory for controlling the output enable state of the PAD, which can be a multiplexed output signal or a configured multiplexed output signal, selection signal 1 represents the input selection signal output by the judgment circuit at different stages, which can be the first input selection signal, the second input selection signal, or the third selection signal, selection signal 2 represents the output selection signal output by the judgment circuit at different stages, which can be the first output selection signal, the second output selection signal, or the third output selection signal. The specific workflow is as follows:
[0098] After powering on, the on-board device obtains the pre-configured initial control signal and input control signal. The judgment circuit generates selection signal 1 (first input selection signal) and selection signal 2 (first output selection signal), transmits selection signal 1 to selector 1, and transmits selection signal 2 to selector 2. Selector 1 selects control signal 1 based on the received selection signal 1, outputs the PAD input enable control signal (first debug port input enable control signal), and controls the PAD to be in the input disabled state. Selector 2 selects control signal 2 based on the received selection signal 2, outputs the PAD output enable control signal (first debug port output enable control signal), and controls the PAD to be in the output disabled state, thereby configuring the PAD to the input disabled and output disabled states.
[0099] After the application is loaded and before debugging, the reset synchronization circuit generates a power-on reset signal and sends it to the loading circuit. The loading circuit reads the tag value from the memory and sends it to the judgment circuit. The judgment circuit pre-stores a preset value and determines whether the tag value is the same as the preset value. If the tag value is different from the preset value, the judgment circuit once again generates selection signal 1 (the second input selection signal) and selection signal 2 (the second output selection signal). Selection signal 1 is transmitted to selector 1, and selection signal 2 is transmitted to selector 2. Selector 1 selects control signal 3 based on the received selection signal 1 and outputs the PAD input enable control signal (the second debug port input enable control signal), controlling the PAD to be in the input-enabled state. Selector 2 selects control signal 2 based on the received selection signal 2 and outputs the PAD output enable control signal (the second debug port output enable control signal), controlling the PAD to be in the output-disabled state. At this time, the PAD is in both the input-enabled and output-disabled states.
[0100] After the application is debugged, the tag value in the memory is updated to the preset value, and the target enable configuration information is determined according to the debugged application. The control signal 5 (multiplexed input signal) and the control signal 6 (multiplexed output signal) in the memory are enabled according to the target enable configuration information.
[0101] After the next application is loaded, but before debugging, the loading circuit reads the updated tag value from the memory and sends it to the judgment circuit. It also obtains control signal 5 (the multiplexed input signal after the configuration is enabled) and control signal 6 (the multiplexed input signal after the configuration is enabled), transmits control signal 5 to selector 1, and transmits selection signal 6 to selector 2. The judgment circuit again identifies whether the updated tag value is the same as the pre-stored preset value. Since the updated tag value is the preset value, the same result is obtained. At this time, the judgment circuit generates selection signal 1 (the third output selection signal) and selection signal 2 (the third output selection signal), transmits selection signal 1 to selector 1, and transmits selection signal 2 to selector 2. Selector 1 selects control signal 5 based on the received selection signal 1, outputs the PAD input enable control signal (the third debug port input enable control signal), and controls the input enable state of the PAD. The selector 2 selects the control signal 6 according to the received selection signal 2, outputs the PAD output enable control signal (the third debug port output enable control signal), and controls the output enable state of the PAD, thereby realizing the multiplexing of the debug port.
[0102] It should be understood that, although the various steps in the flowcharts involved in the various embodiments described above are displayed in sequence according to the instructions of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowcharts involved in the various embodiments described above can include multiple steps or multiple stages, and these steps or stages are not necessarily executed and completed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of steps or stages in other steps.
[0103] Based on the same inventive concept, embodiments of the present application also provide a debug port multiplexing device for implementing the debug port multiplexing method described above. The solution provided by this device is similar to the solution described in the method described above. Therefore, the specific limitations in one or more debug port multiplexing device embodiments provided below can be found in the limitations of the debug port multiplexing method described above and will not be further elaborated here.
[0104] In one embodiment, Figure 4 As shown, a debug port multiplexing device is provided, including: a signal acquisition module 402, a first configuration module 404, a second configuration module 406 and a multiplexing configuration module 408, wherein:
[0105] The signal acquisition module 402 is configured to acquire a pre-configured initial control signal and an input control signal.
[0106] The first configuration module 404 is configured to configure the debug port to an input-disabled and output-disabled state according to an initial control signal before the application is loaded.
[0107] The second configuration module 406 is used to configure the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal after the application is loaded but before debugging.
[0108] The multiplexing configuration module 408 is used to configure the debug port for multiplexing after the application program has completed debugging.
[0109] In one embodiment, the first configuration module 404 is further used to generate a first selection signal through a judgment circuit and transmit the first selection signal to a corresponding selector; select an initial control signal according to the received first selection signal through the selector and output a first debug port enable control signal; and configure the debug port to an input disabled and output disabled state according to the first debug port enable control signal.
[0110] In one embodiment, the second configuration module 406 is further configured to read a tag value from a memory through a loading circuit and send the tag value to a judgment circuit; identify through the judgment circuit whether the tag value is the same as a preset value in the judgment circuit; when the tag value is different from the preset value, the judgment circuit transmits the generated second selection signal to a corresponding selector; the selector selects the input control signal and the initial output signal in the initial control signal according to the received second selection signal, and outputs a second debug port enable control signal; and configures the debug port to an input-enabled and output-disabled state according to the second debug port enable control signal.
[0111] In one embodiment, the multiplexing configuration module 408 is further configured to update the flag value in the memory to a preset value, and enable the multiplexing control signal in the memory according to the debugged application program.
[0112] In one embodiment, the multiplexing configuration module 408 is further configured to determine target enabling configuration information according to the debugged application program; and enable configuration of the multiplexing control signal in the memory according to the target enabling configuration information.
[0113] In one embodiment, the above-mentioned device also includes: a debug port multiplexing module, which is used to read the updated tag value from the memory through the loading circuit and send it to the judgment circuit after the next application is loaded and before debugging, and obtain the multiplexing control signal after the enable configuration and transmit it to the corresponding selector; when the judgment circuit identifies that the updated tag value is the same as the preset value in the judgment circuit, the judgment circuit transmits the generated third selection signal to the corresponding selector; the selector selects the multiplexing control signal after the enable configuration according to the received third selection signal, and outputs the third debug port enable control signal; and controls the input enable state and the output enable state of the debug port according to the third debug port enable control signal.
[0114] Each module in the debug port multiplexing device can be implemented in whole or in part through software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in hardware form, or can be stored in a memory in the computer device in software form, so that the processor can call and execute the corresponding operations of each module.
[0115] In one embodiment, a computer device is provided. The computer device may be a vehicle-mounted device, and its internal structure diagram may be as follows: Figure 5As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O) and a communication interface. The processor, memory and input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The database of the computer device is used to store data in a debug port multiplexing method. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a debug port multiplexing method is implemented.
[0116] Those skilled in the art will understand that Figure 3 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.
[0117] In one embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor implements the steps in the above method embodiments when executing the computer program.
[0118] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.
[0119] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.
[0120] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, database or other media used in the embodiments provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory may include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, distributed databases based on blockchains. The processor involved in the various embodiments provided herein may be, but are not limited to, a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, and the like.
[0121] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0122] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.
Claims
1. A debug port multiplexing method, characterized in that: The method comprises: Obtaining a pre-configured initial control signal and an input control signal; Before the application is loaded, the debug port is configured to be in an input-disabled and output-disabled state according to the initial control signal; After the application is loaded and before debugging, the debug port is configured to be in an input-enabled and output-disabled state according to the initial control signal and the input control signal, including: generating a first selection signal through a judgment circuit, and transmitting the first selection signal to a corresponding selector; selecting the initial control signal through the selector according to the received first selection signal, and outputting a first debug port enable control signal; and configuring the debug port to be in an input-disabled and output-disabled state according to the first debug port enable control signal; After the application is debugged, the debug port is configured for reuse.
2. The method according to claim 1, characterized in that The configuring the debug port to an input-enabled state and an output-disabled state according to the initial control signal and the input control signal includes: Read the tag value from the memory through the loading circuit and send it to the judgment circuit; Identifying, by the judgment circuit, whether the tag value is the same as a preset value in the judgment circuit; When the flag value is different from the preset value, the judgment circuit transmits the generated second selection signal to the corresponding selector; Selecting the input control signal and the initial output signal in the initial control signal respectively by the selector according to the received second selection signal, and outputting a second debug port enable control signal; The debug port is configured to be in an input-enabled and output-disabled state according to the second debug port enable control signal.
3. The method according to claim 1, characterized in that The multiplexing configuration of the debug port includes: The tag value in the memory is updated to a preset value, and the multiplexing control signal in the memory is enabled and configured according to the debugged application program.
4. The method according to claim 3, characterized in that The enabling configuration of the multiplexing control signal in the memory according to the debugged application program includes: Determine target enable configuration information based on the debugged application program; The multiplexing control signal in the memory is enabled and configured according to the target configuration information.
5. The method according to any one of claims 1 to 4, characterized in that After configuring the debug port for multiplexing, the method further includes: After the application is loaded next time and before debugging, the updated tag value is read from the memory through the loading circuit and sent to the judgment circuit, and the multiplexing control signal after enabling configuration is obtained and transmitted to the corresponding selector; When the judgment circuit identifies that the updated flag value is the same as the preset value in the judgment circuit, the judgment circuit transmits the generated third selection signal to the corresponding selector; Selecting, by the selector, the multiplexing control signal after enabling the configuration according to the received third selection signal, and outputting the third debug port enable control signal; The input enable state and the output enable state of the debug port are controlled according to the third debug port enable control signal.
6. The method according to claim 1, characterized in that The first selection signal includes a first input selection signal and a first output selection signal, the initial control signal includes an initial input signal and an initial output signal, and the first debug port enable control signal includes a first debug port input enable control signal and a second debug port output enable control signal; transmitting the first selection signal to a corresponding selector; Selecting the initial control signal according to the received first selection signal by the selector, and outputting a first debug port enable control signal; Configuring the debug port to an input-disabled state and an output-disabled state according to the first debug port enable control signal includes: The first input selection signal is transmitted to the input selector, and the first output selection signal is transmitted to the output selector; the initial input signal is selected by the input selector according to the first input selection signal, and the initial input signal is converted into the first debug port input enable control signal for output, and the first debug port input enable control signal is used to control the debug port to be in an input-disabled state; the initial output signal is selected by the output selector according to the first output selection signal, and the initial output signal is converted into the first debug port output enable control signal for output, and the first debug port output enable signal is used to control the debug port to be in an output-disabled state.
7. A debug port multiplexing device, characterized in that: The device comprises: A signal acquisition module, used to acquire a pre-configured initial control signal and an input control signal; A first configuration module is configured to configure the debug port to an input-disabled state and an output-disabled state according to the initial control signal before the application is loaded; a second configuration module, configured to configure the debug port to an input-enabled and output-disabled state according to the initial control signal and the input control signal after the application is loaded but before debugging, comprising: generating a first selection signal through a judgment circuit and transmitting the first selection signal to a corresponding selector; selecting the initial control signal through the selector according to the received first selection signal and outputting a first debug port enable control signal; and configuring the debug port to an input-disabled and output-disabled state according to the first debug port enable control signal; The multiplexing configuration module is used to perform multiplexing configuration on the debugging port after the application completes debugging.
8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.
10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.
Citation Information
Patent Citations
Method and system for downloading and debugging optical module codes
CN111045930A