Semiconductor Structure and Method of Forming the Same

By using different conductivity types of fins and isolation structures in semiconductor structures, the problems of short channel effect and channel leakage current are solved, the performance and isolation effect of the device are improved, and the leakage between the fins is avoided.

CN114664944BActive Publication Date: 2025-07-22SEMICON MFG INT (SHANGHAI) CORP +1
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Patent Information

Application Number
CN202011538721.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-12-23
Publication Date
2025-07-22
Estimated Expiration
2040-12-23

AI Technical Summary

Technical Problem

After the transistor size is reduced, the existing semiconductor structure has problems with short channel effect and channel leakage current increase, and the semiconductor structure formed by the existing methods have poor performance.

Method used

Different types of conductive types are used to form different devices, and an isolation structure is provided between adjacent gate structures. The partial isolation structure is located in the first fin to avoid the influence on the second fin, and the isolation effect is ensured by forming openings in the isolation region and over-etching.

Benefits of technology

The performance of the semiconductor structure is improved, the etching damage of the source-drain doped regions of the effective region by the isolation structure is reduced, the leakage between adjacent fins is avoided, and the good performance of the device is maintained.

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Abstract

A semiconductor structure and a method for forming the same, wherein the method includes: providing a substrate, the substrate including an active region and an isolation region arranged along a first direction, and the active region being located on both sides of the isolation region and adjacent to the isolation region, the substrate having a first fin and a second fin parallel to the first fin, and the first fin and the second fin having different conduction types, the first fin straddling the active region and the isolation region, the second fin being located on the surface of the active region; forming a first gate structure on the isolation region, the first gate structure straddling the first fin; forming an isolation structure between adjacent first gate structures, and a part of the isolation structure being located within the first fin. The semiconductor structure formed by the method has better performance.
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Citation Information

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