Back-illuminated single-photon avalanche diode, formation method, and laser radar

Abstract

An embodiment of the present invention provides a back-illuminated single-photon avalanche diode, a formation method, and a laser radar. The back-illuminated single-photon avalanche diode includes a shallow trench isolation structure, which is located between adjacent diode regions and on the end face of the epitaxial layer away from the substrate. The shallow trench isolation structure can well isolate the adjacent diode regions. In the formation process of the back-illuminated single-photon avalanche diode, after the shallow trench isolation structure is formed, a first doped region is formed. In the process of forming the first doped region, the shallow trench isolation structure plays a blocking role. The shallow trench isolation structure makes it difficult for the doped ions in the first doped region in a diode region to enter the adjacent diode region, so that element crosstalk is less likely to occur between adjacent back-illuminated single-photon avalanche diodes, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

Description

Technical Field

[0001] The present invention relates to the field of laser radar, and in particular to a back-illuminated single-photon avalanche diode, a formation method and a laser radar. Background Art

[0002] LiDAR is a radar system that emits laser beams to detect the position, speed and other characteristic quantities of a target. In autonomous driving, it undertakes important tasks such as curb detection, obstacle recognition, and real-time localization and mapping (SLAM).

[0003] The laser radar includes a receiving optical element and a photodetector. The receiving optical element focuses the echo light reflected by the target onto the photodetector, and the photodetector converts the light into an electrical signal. Components such as a data processing circuit process the electrical signal to obtain distance information of the target. With the miniaturization of the laser radar, there is a continuous demand to reduce the size of the photodetector. Single photon avalanche diodes (SPADs) have a small photosensitive surface and are highly sensitive to the carrier avalanche multiplication effect when triggered by a single photon in the Geiger mode. They are increasingly being used as photodetectors for laser radars.

[0004] Single-photon avalanche diodes are divided into front-side illumination (FSI) and back-side illumination (BSI). Front-illuminated single-photon avalanche diodes receive light from the surface of the SPAD chip, and the front-end circuit is arranged around the SPAD photosensitive surface, thus occupying a certain chip area, resulting in a low fill factor (SPAD photosensitive surface area / total chip area) of the SPAD array chip. Correspondingly, the area of ​​the SPAD photosensitive surface that can be used for receiving light is small, resulting in a low photon detection efficiency (PDE).

[0005] In a back-illuminated (BSI) SPAD chip, the circuitry is located on the chip surface, but the SPAD receives light from the backside of the chip. That is, the photosensitive surface faces away from the surface where the circuitry is located. This reduces the photosensitive surface area occupied by the circuitry or traces, improving the fill factor and, consequently, the photon detection efficiency. However, during the formation of these BSI SPADs, adjacent SPADs are not isolated, which can easily lead to crosstalk between adjacent BSI SPADs. Summary of the Invention

[0006] The problem solved by the present invention is to provide a back-illuminated single-photon avalanche diode, a formation method and a laser radar, so that element crosstalk is less likely to occur between adjacent back-illuminated single-photon avalanche diodes, thereby improving the detection effect of the laser radar.

[0007] The technical solution of the present invention provides a back-illuminated single-photon avalanche diode, comprising: a substrate, comprising a back surface and a front surface opposite to the back surface; a plurality of diode regions, located on the front surface of the substrate, the diode regions comprising: an epitaxial layer; a first doped region, located on the end surface of the epitaxial layer away from the substrate; and a shallow trench isolation structure, located between adjacent diode regions and on the end surface of the epitaxial layer away from the substrate.

[0008] Correspondingly, the technical solution of the present invention also provides a method for forming a back-illuminated single-photon avalanche diode, comprising: providing a substrate, the substrate comprising a back surface and a front surface opposite to the back surface; forming an epitaxial layer on the front surface of the substrate, the epitaxial layer having a plurality of functional regions for forming diode regions; forming a shallow trench isolation structure on the end face of the epitaxial layer away from the substrate, the shallow trench isolation structure being located between adjacent functional regions; and forming a first doped region on the end face of the epitaxial layer away from the substrate.

[0009] Correspondingly, the technical solution of the present invention also provides a laser radar, including: a transmitting unit, used to provide a transmitting light beam, and the transmitting light beam forms an echo light beam after being reflected by a target object; a receiving unit, used to receive the echo light beam, and the receiving unit includes the aforementioned back-illuminated single-photon avalanche diode.

[0010] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0011] In the back-illuminated single-photon avalanche diode provided by an embodiment of the present invention, the shallow trench isolation structure is located between adjacent diode regions and on the end face of the epitaxial layer away from the substrate. The shallow trench isolation structure defines the positions of adjacent diode regions and can well isolate adjacent diode regions. In the formation process of the back-illuminated single-photon avalanche diode, after the shallow trench isolation structure is formed, the first doped region is formed. In the process of forming the first doped region, the shallow trench isolation structure plays a blocking role, making it difficult for the doped ions of the first doped region in one diode region to enter the adjacent diode region, making it difficult for element crosstalk to occur between adjacent back-illuminated single-photon avalanche diodes, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0012] In an optional solution, the back-illuminated single-photon avalanche diode includes: a first isolation layer located on the back surface of the substrate; a first electrode located on the surface of the first isolation layer facing away from the substrate and extending to contact the substrate, with the projection of the first electrode on the front surface of the substrate surrounding the diode region. In an embodiment of the present invention, the back surface serves as a photosensitive surface, and light enters the depletion region from the photosensitive surface. The back-illuminated single-photon avalanche diode array chip includes multiple back-illuminated single-photon avalanche diodes, and the projection of the first electrode on the front surface of the substrate surrounds the diode region. The ratio of the area occupied by the first electrode to the surface area of ​​the first isolation layer is small. Therefore, for chips of the same area, the back-illuminated single-photon avalanche diode array chip of the present invention has a larger fill factor. Therefore, when the back-illuminated single-photon avalanche diode is in operation, more photons pass through the photosensitive surface and enter the depletion region, increasing the probability of photons exciting carriers and / or avalanches, which is beneficial to improving the photon detection efficiency of the back-illuminated single-photon avalanche diode.

[0013] An embodiment of the present invention also provides a laser radar, which includes: a transmitting unit for providing a transmitting light beam, which forms an echo light beam after being reflected by a target object; a receiving unit for receiving the echo light beam, which includes the back-illuminated single-photon avalanche diode. Because element crosstalk is not prone to occur between adjacent back-illuminated single-photon avalanche diodes, the noise output by the receiving unit in the laser radar can be reduced, the detection signal-to-noise ratio can be improved, and the detection effect of the laser radar can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figures 1 to 3 It is a schematic diagram of the structure of a back-illuminated single-photon avalanche diode;

[0015] Figure 4 1 is a schematic structural diagram of an embodiment of a single-photon avalanche diode according to the present invention;

[0016] Figures 5 to 17 1 is a schematic structural diagram of each step in an embodiment of a method for forming a single-photon avalanche diode according to the present invention. DETAILED DESCRIPTION

[0017] As known from the background technology, the currently formed back-illuminated single-photon avalanche diodes have the problem of element crosstalk between adjacent single-photon avalanche diodes.

[0018] refer to Figures 1 to 3 , showing a structural schematic diagram of the key steps in a method for forming a back-illuminated single-photon avalanche diode.

[0019] like Figure 1As shown, the method for forming the back-illuminated single-photon avalanche diode includes: providing a substrate 1, the substrate 1 including a back surface 11 and a front surface 12 opposite to the back surface 11; forming an epitaxial layer 2 on the front surface 12 of the substrate 1, the epitaxial layer 2 having a plurality of functional regions for forming diode regions; forming a first doping region 3 and a second doping region 4 on the end face of the epitaxial layer 2 away from the substrate 1; after forming the first doping region 3, forming an electrode contact region 5 on the top of the first doping region 3; after forming the first doping region 3, forming a guard ring 6 surrounding the side of the first doping region 3 on the end face of the epitaxial layer 2 away from the substrate 1.

[0020] like Figure 2 As shown, an isolation layer 7 is formed to cover the first doped region 3, the guard ring 6, the electrode contact region 5 and the epitaxial layer 2; the isolation layer 7 is etched to form an opening exposing the electrode contact region 5 (not shown in the figure); a metal layer is formed on the surface of the opening and the isolation layer 7, the metal layer in the opening serves as a contact hole plug 8, and the metal layer on the surface of the isolation layer 7 serves as a reflective layer 9.

[0021] like Figure 3 As shown, a deep trench isolation layer 10 extending from the back surface 11 of the substrate 1 to the isolation layer 7 is formed.

[0022] After forming the first doping region 3, the second doping region 4, the electrode contact region 5 and the guard ring 6, the operations of flattening and cleaning the end face of the epitaxial layer 2 away from the substrate 1 are included to improve the flatness and formation quality of the epitaxial layer 2 away from the substrate 1. During the flattening and cleaning process, there is no barrier between adjacent functional regions, and the doped ions of the first doping region 3 and the second doping region 4 in one functional region enter the adjacent functional region, resulting in mutual interference between adjacent back-illuminated single-photon avalanche diodes, thereby reducing the formation quality of the single-photon avalanche diodes.

[0023] In order to solve the above technical problems, an embodiment of the present invention proposes a back-illuminated single-photon avalanche diode, comprising: a substrate, comprising a back surface and a front surface opposite to the back surface; a plurality of diode regions, located on the front surface of the substrate, the diode regions comprising: an epitaxial layer; a first doped region, located on the end surface of the epitaxial layer away from the substrate; and a shallow trench isolation structure, located between adjacent diode regions and on the end surface of the epitaxial layer away from the substrate.

[0024] In the back-illuminated single-photon avalanche diode provided by an embodiment of the present invention, the shallow trench isolation structure is located between adjacent diode regions and on the end face of the epitaxial layer away from the substrate. The shallow trench isolation structure defines the positions of adjacent diode regions and can well isolate adjacent diode regions. In the formation process of the back-illuminated single-photon avalanche diode, after the shallow trench isolation structure is formed, the first doped region is formed. In the process of forming the first doped region, the shallow trench isolation structure plays a blocking role, making it difficult for the doped ions of the first doped region in one diode region to enter the adjacent diode region, making it difficult for element crosstalk to occur between adjacent back-illuminated single-photon avalanche diodes, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0025] Figure 4 It is a structural diagram of an embodiment of a single-photon avalanche diode according to an embodiment of the present invention.

[0026] The back-illuminated single-photon avalanche diode includes: a substrate 100, including a back surface 301 and a front surface 302 opposite to the back surface 301; a plurality of diode regions, located on the front surface 302 of the substrate 100, the diode regions including: an epitaxial layer 101; a first doped region 103, located on the end surface of the epitaxial layer 101 away from the substrate 100; a shallow trench isolation structure 102, located between adjacent diode regions and on the end surface of the epitaxial layer 101 away from the substrate 100.

[0027] In the back-illuminated single-photon avalanche diode provided by an embodiment of the present invention, the shallow trench isolation structure 102 is located between adjacent diode regions and on the end face of the epitaxial layer 101 away from the substrate 100. The shallow trench isolation structure 102 defines the positions of adjacent diode regions and can well isolate the adjacent diode regions. In the formation process of the back-illuminated single-photon avalanche diode, after the shallow trench isolation structure 102 is formed, the first doped region 103 is formed. In the process of forming the first doped region 103, the shallow trench isolation structure 102 plays a blocking role, so that the doped ions of the first doped region 103 in one diode region are not easy to enter the adjacent diode region, so that element crosstalk is not easy to occur in the adjacent diode regions, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0028] In this embodiment, the material of the substrate 100 is a silicon substrate. In other embodiments, the material of the substrate can also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium. The substrate can also be other types of substrates such as a silicon substrate on an insulator or a germanium substrate on an insulator.

[0029] It should be noted that in this embodiment, the substrate 100 is doped with first-type ions. Specifically, the first-type ions are P-type ions, which include one or more of B, Ga, and In. In other embodiments, the first-type ions may also be N-type ions, which include one or more of P, As, and Sb.

[0030] In this embodiment, a PN junction is formed at the interface between the first doped region 103 in the diode region and the epitaxial layer 101 .

[0031] The back-illuminated single-photon avalanche diode further includes a second doped region 104 , which is located on a side of the first doped region 103 facing the substrate 100 and contacts the first doped region 103 .

[0032] The epitaxial layer 101 in the diode region is used to provide a process space for the first doping region 103 and the second doping region 104 .

[0033] In this embodiment, the epitaxial layer 101 is made of silicon doped with first-type ions, that is, the epitaxial layer 101 is doped with P-type dopant ions. In other embodiments, the epitaxial layer may be made of other materials doped with first-type ions, such as silicon germanium, silicon carbide, gallium arsenide, or indium gallium.

[0034] The first doped region 103 and the second doped region 104 also form a PN junction. When the single photon avalanche diode is working, a reverse bias is applied to the PN junction, and the reverse bias is made greater than the breakdown voltage of the PN junction to obtain avalanche multiplication.

[0035] In this embodiment, the first doping region 103 and the second doping region 104 have different conductivity types of doping ions. Specifically, the first doping region 103 is doped with the second type of ions, and the second doping region 104 is doped with the first type of ions. In other words, the first doping region 103 is doped with N-type ions, and the second doping region 104 is doped with P-type ions.

[0036] As an example, in the normal direction of the surface of the substrate 101 , the sizes of the first doping region 103 and the second doping region 104 are both 1 μm to 2 μm.

[0037] As an example, the doping concentration of the second type ions in the first doping region 103 is on the order of E17, and the doping concentration of the first type ions in the second doping region 104 is on the order of E15 to E16.

[0038] It should be noted that the first doping region 103 and the second doping region 104 are both rounded rectangles (eg Figure 9The rectangular shape is intended to improve the area utilization of the substrate 100. Multiple back-illuminated single-photon avalanche diodes can be arranged in a rectangular array to reduce the gap between adjacent back-illuminated single-photon avalanche diodes. The rounded corners are less likely to form electric field concentration and thus less likely to cause edge breakdown.

[0039] The shallow trench isolation structure 102 is made of an insulating material. Specifically, the material of the shallow trench isolation structure 102 includes one or more of silicon oxide, silicon oxynitride, and silicon nitride. In this embodiment, the material of the shallow trench isolation structure includes silicon oxide.

[0040] It should be noted that the cross-sectional width L1 of the shallow trench isolation structure 102 on the surface of the substrate 100 (eg Figure 8 (as shown) should not be too large or too small. If the cross-sectional width L1 is too small, in the process of forming the back-illuminated single-photon avalanche diode, after the shallow trench isolation structure 102 is formed, the first doping region 103 and the second doping region 104 are formed, resulting in that in the process of forming the first doping region 103 and the second doping region 104, the doped ions in the first doping region and the second doping region in one of the diode regions easily cross the shallow trench isolation structure 102 and enter the adjacent diode region, resulting in element crosstalk between adjacent back-illuminated single-photon avalanche diodes. If the cross-sectional width L1 is too large, the area occupied by the corresponding shallow trench isolation structure 102 is too large, which will reduce the integration of the back-illuminated single-photon avalanche diode and is not suitable for meeting the development demand for miniaturization of back-illuminated single-photon avalanche diode devices. In this embodiment, the cross-sectional width of the shallow trench isolation structure 102 on a plane parallel to the surface of the substrate 100 is 1μm to 5μm.

[0041] It should be noted that the shallow trench isolation structure 102 should not be too thick. The steps of forming the shallow trench isolation structure 102 include: etching the end surface of the epitaxial layer 101 away from the substrate 100, forming a groove on the epitaxial layer 101, and forming an isolation material layer in the groove and the end surface of the epitaxial layer 101 away from the substrate 100; removing the isolation material layer exposed outside the groove, and the remaining isolation material layer located in the groove serves as the shallow trench isolation structure 102. If the shallow trench isolation structure 102 is too thick, it will take too much process time to form the shallow trench isolation structure 102, resulting in low formation efficiency of the shallow trench isolation structure 102. In this embodiment, the depth of the shallow trench isolation structure 102 is less than 1μm.

[0042] In this embodiment, the shallow trench isolation structure 102 is spaced apart from the first doped region 103 .

[0043] The first doping region 103 is spaced apart from the shallow trench isolation structure 102. The distance that the doped ions in the first doping region 103 and the second doping region 104 of one diode region need to move to enter the adjacent diode region becomes larger, making it difficult to cross the shallow trench isolation structure 102 to enter other diode regions. This increases the difficulty for the doped ions in the first doping region 103 and the second doping region 104 in one diode region to enter the adjacent diode region, making it less likely for element crosstalk to occur between adjacent back-illuminated single-photon avalanche diodes, which is beneficial to improving the electrical performance of back-illuminated single-photon avalanche diodes. In addition, the first doping region 103 is spaced apart from the shallow trench isolation structure 102, which can reduce the stress and electric field concentration at the edge of the PN junction and reduce the dark count. The PN junction here refers to the PN junction formed by the epitaxial layer 101 and the first doping region 103 and the PN junction formed by the first doping region 103 and the second doping region 104.

[0044] The conductivity types of the doped ions in the first doped region 103 and the second doped region 104 are different, and the conductivity types of the doped ions in the first doped region 103 and the epitaxial layer 101 are different. When the single-photon avalanche diode is operating, a reverse bias is applied to the PN junction, and the reverse bias is greater than the breakdown voltage of the PN junction to achieve avalanche multiplication.

[0045] Specifically, the first doping region 103 is doped with the second type ions, and the second doping region 104 is doped with the first type ions. That is, the first doping region 103 is doped with N type ions, and the second doping region 104 is doped with P type ions.

[0046] It should be noted that the first doping region 103 and the second doping region 104 are both rounded rectangles (eg Figure 9 The rectangular shape is intended to improve the area utilization of the substrate 100. Multiple back-illuminated single-photon avalanche diodes can be arranged in a rectangular array to reduce the gap between adjacent back-illuminated single-photon avalanche diodes. The rounded corners are less likely to form electric field concentration and thus less likely to cause edge breakdown.

[0047] The back-illuminated single-photon avalanche diode further includes an electrode contact region 201 located on the end surface of the first doped region 103 facing away from the substrate 100 .

[0048] The electrode contact region 201 is used to connect to the contact hole plug 108 .

[0049] The electrode contact region 201 is doped with second-type ions, and the doping concentration of the second-type ions in the electrode contact region 201 is greater than the doping concentration of the second-type ions in the first doping region 103 , so as to reduce the contact resistance between the electrode contact region 201 and the contact hole plug 108 .

[0050] The back-illuminated single-photon avalanche diode further includes a guard ring 106 , which is located on the end surface of the epitaxial layer 101 facing away from the substrate 100 , surrounds the first doped region 103 , and is spaced apart from the shallow trench isolation structure 102 .

[0051] When the single-photon avalanche diode is working, the guard ring 106 is used to prevent electric field concentration from occurring around the PN junction, thereby reducing the probability of breakdown at the edge of the PN junction.

[0052] In this embodiment, the guard ring 106 is doped with second-type ions, and the doping concentration of the second-type ions in the guard ring 106 is less than or equal to the doping concentration of the second-type ions in the first doping layer 103 . For example, the doping concentration of the guard ring 106 is one order of magnitude lower than that of the first doping region 103 .

[0053] It should be noted that the distance d between the guard ring 106 and the shallow trench isolation structure 102 should not be too large or too small. If the distance d is too small, in the step of cleaning the surface of the epitaxial layer 101 away from the substrate 100, the first type ions in the guard ring 106 are likely to cross the shallow trench isolation structure 102 and enter the adjacent diode region, resulting in element crosstalk between adjacent back-illuminated single-photon avalanche diodes; and if the distance d is too small, when the back-illuminated single-photon avalanche diode is working, the diode region is easily affected by the edge electric field of the diode region and is prone to breakdown, resulting in poor electrical performance of the back-illuminated single-photon avalanche diode. If the distance d is too large, the integration of the back-illuminated single-photon avalanche diode is not high, which is not suitable for meeting the development needs of miniaturization of single-photon avalanche diode devices. In this embodiment, the distance d between the guard ring 106 and the shallow trench isolation structure 102 is between 1μm and 3μm.

[0054] It should be noted that in the formation process of the back-illuminated single-photon avalanche diode, after the second doping region 104 is formed, after the first doping region 103 is formed, after the electrode contact region 201 is formed, and after the guard ring 106 is formed, the surface of the epitaxial layer 101 facing away from the substrate 100 will be cleaned to improve the accuracy and quality of the film surface. Because the shallow trench isolation structure 102 is located between adjacent functional regions, in the step of cleaning the surface of the epitaxial layer 101 facing away from the substrate 100, the shallow trench isolation structure 102 plays a blocking role, so that the doped ions in the first doping region 103 and the second doping region 104 in one functional region are not easily brought into another functional region, so that element crosstalk is less likely to occur between adjacent back-illuminated single-photon avalanche diodes, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0055] It should be noted that during the formation of the back-illuminated single-photon avalanche diode, after the first doping region 103 and the second doping region 104 are formed, the shallow trench isolation structure 102, the first doping region 103 and the epitaxial layer 101 are flattened, so that the flatness of the surface of the shallow trench isolation structure 102, the first doping region 103 and the epitaxial layer 101 is higher, thereby improving the accuracy and formation quality of the surface of the shallow trench isolation structure 102, the first doping region 103 and the epitaxial layer 101.

[0056] Because the shallow trench isolation structure 102 is located between adjacent functional areas, during the planarization process, the doped ions in the first doped area 103 and the second doped area 104 in one functional area are not easily brought into another functional area, so that element crosstalk is less likely to occur between adjacent back-illuminated single-photon avalanche diodes, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diodes.

[0057] The back-illuminated single-photon avalanche diode also includes: a second isolation layer 107, located on the end surface of the first doped region 103 facing away from the substrate 100, covering the diode region and the electrode contact region 201; a contact plug 108, passing through the second isolation layer 107 and electrically connected to the electrode contact region 201; and a reflective layer 109, located on the surface of the second isolation layer 107 facing away from the first doped region 103.

[0058] The second isolation layer 107 provides space for the contact plug 108 and electrically isolates the first doped region 103 , the electrode contact region 201 and the epitaxial layer 101 from the reflective layer 107 .

[0059] In this embodiment, the material of the second isolation layer 107 includes silicon oxide.

[0060] The contact plug 108 is used to electrically connect the electrode contact region 201 to the reflective layer 109 .

[0061] In this embodiment, the material of the contact hole plug 108 includes one or more of tungsten, aluminum, and copper.

[0062] When the back-illuminated single-photon avalanche diode is working, the reflective layer 109 is used to reflect back photons that pass through the second doped region 104 but do not trigger carriers or avalanches, so that they enter the second doped region 104 again, increasing the probability of photons triggering carriers and / or avalanches, and improving the SPAD photon detection efficiency.

[0063] The back-illuminated single-photon avalanche diode includes a deep trench isolation structure 110 located between adjacent diode regions and extending from the back surface of the substrate 100 to the shallow trench isolation structure 102 .

[0064] The deep trench isolation structure 110 and the shallow trench isolation structure 102 jointly perform photoelectric isolation on adjacent diode regions, preventing photons incident on a diode region and / or photon-excited carriers from entering other adjacent diode regions, thereby suppressing optical and electrical crosstalk between adjacent diode regions.

[0065] In this embodiment, the deep trench isolation structure 110 includes an insulating layer 1101 and a metal layer 1102 filled in the insulating layer 1101 .

[0066] In this embodiment, the material of the insulating layer 1101 includes silicon oxide.

[0067] In this embodiment, the metal layer 1102 is made of tungsten. Using a stack of tungsten and silicon oxide as the deep trench isolation structure 110 provides better isolation than using silicon oxide, nitride, or oxynitride alone as the deep trench isolation structure, thereby reducing photoelectric crosstalk between adjacent single-photon avalanche diodes.

[0068] It should be noted that the cross-sectional width D of the deep trench isolation structure 110 on the surface of the substrate 100 should not be too large or too small. If the cross-sectional width D is too large, the deep trench isolation structure 110 occupies a larger area of ​​the back surface 301, resulting in a lower integration density of the back-illuminated single-photon avalanche diode (BSADD), which is not conducive to meeting the development requirements of device miniaturization. The back surface 301 serves as a photosensitive surface, and the back surface 301 has a first isolation layer 111. The BSADD also includes a first electrode 113 that penetrates the first isolation layer 111 and connects to the substrate 100, and a second electrode 115 that connects to the first electrode 113 in the adjacent diode region. If the cross-sectional width D is too large, the ratio of the area occupied by the first electrode 113 and the second electrode 115 to the area of ​​the first isolation layer is too large. The BSADD array chip includes multiple BSADDs, and the corresponding BSADD array chip has a smaller fill factor, which reduces the photon detection efficiency of the BSADD. If the cross-sectional width D is too small, the deep trench isolation structure 110 will have poor optical and electrical isolation effects on the diode regions on both sides of the structure during operation, and optical and electrical crosstalk will likely occur between adjacent back-illuminated single-photon avalanche diodes. In this embodiment, the cross-sectional width D of the deep trench isolation structure 110 at the end surface of the epitaxial layer 101 facing away from the substrate 100 is in the range of 0.5 μm to 1 μm.

[0069] The back-illuminated single-photon avalanche diode includes: a first isolation layer 111, located on the back surface 301 of the substrate 100; a first electrode 113, located on the surface of the first isolation layer 111 facing away from the substrate 100 and extending into the substrate 100, and the projection of the first electrode 113 on the front surface 302 of the substrate 100 surrounds the diode region.

[0070] In an embodiment of the present invention, the back surface 301 serves as a photosensitive surface, and light enters the depletion region from the photosensitive surface. The back-illuminated single-photon avalanche diode area array chip includes multiple back-illuminated single-photon avalanche diodes. Because the projection of the first electrode 113 on the front surface of the substrate 100 surrounds the diode region, the ratio of the area occupied by the first electrode 113 to the surface area of ​​the first isolation layer 111 is small. For chips of the same size, the back-illuminated single-photon avalanche diode area array chip of the present invention has a larger fill factor, which is beneficial to improving the photon detection efficiency of the back-illuminated single-photon avalanche diodes.

[0071] The first isolation layer 111 provides a process space for the first electrode 113 .

[0072] In this embodiment, the back surface 301 serves as a photosensitive surface. When the back-illuminated single-photon avalanche diode is working, photons enter the depletion region from the photosensitive surface, and the excited carriers can be conducted to the avalanche region under the action of the electric field to stimulate the avalanche effect.

[0073] The material of the first isolation layer 111 is an insulating material. In this embodiment, the material of the first isolation layer 111 includes silicon oxide. In other embodiments, the material of the first isolation layer may also include silicon nitride or silicon oxynitride.

[0074] The first electrode 113 is used to lead out the substrate 100 to facilitate connection with the back-end metal.

[0075] In this embodiment, the material of the first electrode 113 includes one or more of tungsten, aluminum, and copper.

[0076] In order to ensure that the contact resistance between the first electrode 113 and the substrate 100 meets the requirements, the first electrode 113 extends into the substrate 100 by a length of 10 nanometers to 100 nanometers.

[0077] The back-illuminated single-photon avalanche diode further includes a second electrode 115 , which is located on a surface of the first isolation layer 110 facing away from the substrate 100 and is connected to the first electrode 113 in an adjacent diode region.

[0078] In this embodiment, the second electrode 115 is located between the first electrodes 113 of adjacent diode regions and corresponds to the deep trench isolation structure 110, reducing the area of ​​the photosensitive surface occupied by the second electrode 115. When the back-illuminated single-photon avalanche diode is working, more photons enter the depletion region, increasing the probability of photons exciting carriers and / or avalanches, which is beneficial to improving the photon detection efficiency of the back-illuminated single-photon avalanche diode.

[0079] In this embodiment, the second electrode 115 is on the surface of the first isolation layer 111 facing away from the substrate 100, and a partial thickness of the first isolation layer 111 exists between the corresponding second electrode 115 and the deep trench isolation structure 110. That is, a partial thickness of the first isolation layer 111 exists between the second electrode 115 and the metal layer 1102, which can electrically isolate the second electrode 115 and the metal layer 1102.

[0080] It should be noted that the first isolation layer 111 at the bottom of the second electrode 115 should not be too thick or too thin. If the first isolation layer 111 at the bottom of the second electrode 115 is too thick, the size of the back-illuminated single-photon avalanche diode in the normal direction of the substrate 100 will be too large, which is not conducive to meeting the development needs of miniaturization of back-illuminated single-photon avalanche diodes. If the first isolation layer 111 at the bottom of the second electrode 115 is too thin, the second electrode 115 and the metal layer 1102 in the deep trench isolation structure 110 are prone to breakdown, resulting in poor electrical performance of the back-illuminated single-photon avalanche diode. In this embodiment, the thickness of the first isolation layer 111 at the bottom of the groove 114 is 10 nanometers to 20 nanometers.

[0081] As an example, the width dimension L2 of the second electrode 115 is greater than twice the cross-sectional width D of the deep trench isolation structure 110. In this way, even if there is an overlay error in the process of forming the first electrode 113 and the second electrode 115, sufficient space can be left between the first electrode 113 and the deep trench isolation structure 110, thereby reducing the probability of edge breakdown of the diode region.

[0082] It should be noted that the first electrode 113 and the second electrode 115 are arranged on the side of the substrate 100 away from the first doped region 103 to avoid occupying the area of ​​the end face of the epitaxial layer 101 away from the substrate 100, so that the end face of the epitaxial layer 101 away from the substrate 100 can have more area to form the first doped region 103 and the second doped region 104, thereby obtaining a larger depletion region when the back-illuminated single-photon avalanche diode is working, increasing the probability of photons triggering carriers and / or avalanches, and improving the photon detection efficiency of the back-illuminated single-photon avalanche diode. In addition, the first electrode 113 extends into the substrate 100, and a bias can be applied to the PN junction through an interconnection structure or circuit (not shown) electrically connected to the first electrode 113 and the second electrode 115, without the need to prepare a complex structure for connecting the electrodes on the sidewall of the deep trench isolation structure or the side of the epitaxial layer 101 away from the substrate 100. The structures of the first electrode 113 and the second electrode 115 in the embodiment of the present invention can reduce the structural complexity of the back-illuminated single-photon avalanche diode, thereby reducing the process difficulty and cost.

[0083] In this embodiment, the filling factor of the back-illuminated single-photon avalanche diode array chip is increased by 30% to 40% compared with the front-illuminated single-photon avalanche diode. Because the photon detection efficiency of the array detector of the back-illuminated single-photon avalanche diode is proportional to the detection efficiency of a single back-illuminated single-photon avalanche diode, the photon detection efficiency of the array detector of the back-illuminated single-photon avalanche diode is also increased by 30% to 40% compared with the detection efficiency of the front-illuminated single-photon avalanche diode.

[0084] Figures 5 to 17 1 is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a single-photon avalanche diode according to an embodiment of the present invention.

[0085] refer to Figure 5 , providing a substrate 100 , wherein the substrate 100 includes a back surface 301 and a front surface 302 opposite to the back surface 301 .

[0086] The substrate 100 provides a process platform for the subsequent formation of a single photon avalanche diode (SPAD). In this embodiment, the back-illuminated single photon avalanche diode is a back side illumination single photon avalanche diode (BSI).

[0087] In this embodiment, the material of the substrate 100 is a silicon substrate. In other embodiments, the material of the substrate can also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium. The substrate can also be other types of substrates such as a silicon substrate on an insulator or a germanium substrate on an insulator.

[0088] It should be noted that in this embodiment, the substrate 100 is doped with first-type ions. Specifically, the first-type ions are P-type ions, which include one or more of B, Ga, and In. In other embodiments, the first-type ions may also be N-type ions, which include one or more of P, As, and Sb.

[0089] refer to Figure 6 An epitaxial layer 101 is formed on the front surface 302 of the substrate 100 , and the epitaxial layer 101 has a plurality of functional regions for forming diode regions.

[0090] The epitaxial layer 101 is used to prepare for the subsequent formation of a diode region and a shallow trench isolation structure surrounding the diode region.

[0091] In this embodiment, the epitaxial layer 101 is made of silicon doped with first-type ions. In other embodiments, the epitaxial layer may be made of other materials such as silicon germanium, silicon carbide, gallium arsenide, or indium gallium doped with first-type ions.

[0092] Specifically, the step of forming the epitaxial layer 101 includes: forming an initial epitaxial layer (not shown in the figure) on the substrate 100 , and during the process of forming the initial epitaxial layer, doping the initial epitaxial layer with first-type ions to form the epitaxial layer 101 .

[0093] In this embodiment, the initial epitaxial layer is formed by an epitaxy (Epi) process. In this embodiment, the direction from the back surface 301 to the front surface 302 is the growth direction of the initial epitaxial layer.

[0094] Specifically, the epitaxial process can be a selective epitaxial growth process (SEG). The epitaxial process has the advantages of simple process, fast growth, low cost, no need for ultra-high vacuum, and easy industrial mass production. The thin film obtained by the selective epitaxial growth method has high purity and few defects, which is conducive to improving the formation quality of the initial epitaxial layer, and correspondingly makes the formation quality of the epitaxial layer 101 better, which is conducive to improving the electrical performance of the subsequently formed single-photon avalanche diode. In addition, the initial epitaxial layer is epitaxially formed on the substrate 100, and the corresponding epitaxial layer 101 and the substrate 100 have strong adhesion, which is conducive to enhancing the stability of the single-photon avalanche diode structure.

[0095] It should be noted that, in this embodiment, the method of doping the initial epitaxial layer with the first type ions may include: an in-situ doping process (In Suit Doping) or a solid source doping process (Solid Source doped).

[0096] In other embodiments, the step of forming the epitaxial layer may further include: forming an initial epitaxial layer on the substrate using an epitaxial process; after forming the initial epitaxial layer, doping ions in the initial epitaxial layer using an ion implantation process or a diffusion process.

[0097] refer to Figure 7 and Figure 8 A shallow trench isolation (STI) structure 102 is formed on the end surface of the epitaxial layer 101 away from the substrate 100 , and the shallow trench isolation structure 102 is located between adjacent functional regions.

[0098] In an embodiment of the present invention, a shallow trench isolation structure 102 is formed on the end face of the epitaxial layer 101 away from the substrate 100. The shallow trench isolation structure 102 is located between adjacent functional regions, so that in the subsequent process of forming the first doping region, the shallow trench isolation structure 102 plays a blocking role, making it difficult for the doped ions in the first doping region in a diode region to enter the adjacent diode region, making it difficult for element crosstalk to occur in adjacent diode regions, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0099] The shallow trench isolation structure 102 is made of an insulating material. Specifically, the material of the shallow trench isolation structure 102 includes one or more of silicon oxide, silicon oxynitride, and silicon nitride. In this embodiment, the material of the shallow trench isolation structure includes silicon oxide.

[0100] The steps of forming the shallow trench isolation structure 102 include: etching the end surface of the epitaxial layer 101 away from the substrate 100, forming a groove 105 on the epitaxial layer 101, and the groove 105 is located between adjacent functional areas; forming an isolation material layer (not shown in the figure) in the groove 105 and the end surface of the epitaxial layer 101 away from the substrate 100; removing the isolation material layer exposed outside the groove 105, and the remaining isolation material layer located in the groove 105 serves as the shallow trench isolation structure 102.

[0101] In this embodiment, a dry etching process is used to etch the epitaxial layer 101 to form a groove 105 in the epitaxial layer 101. The dry etching process has anisotropic etching characteristics and good controllability of the etching profile, which helps ensure that the morphology of the groove 105 meets process requirements. The dry etching process also facilitates precise control of the depth of the groove 105.

[0102] In this embodiment, the isolation material layer is formed using a flowable chemical vapor deposition (FCVD) process. The FCVD process has excellent filling capabilities, which helps reduce the probability of defects such as voids forming within the isolation material layer, thereby improving the film quality of the shallow trench isolation structure 102.

[0103] In this embodiment, a dry etching process or a chemical mechanical planarization (CMP) process is used to remove the isolation material layer exposed outside the groove 105 .

[0104] It should be noted that the cross-sectional width L1 of the shallow trench isolation structure 102 on the surface of the substrate 100 (eg Figure 8 The cross-sectional width L1 should not be too large or too small. If the cross-sectional width L1 is too small, in the process of subsequently forming the first doping region, the doping ions in the first doping region in one of the functional regions will easily cross the shallow trench isolation structure 102 and enter the adjacent functional region, resulting in element crosstalk between the adjacent back-illuminated single-photon avalanche diodes formed subsequently. If the cross-sectional width L1 is too large, the area occupied by the corresponding shallow trench isolation structure 102 will be too large, which will reduce the integration of the back-illuminated single-photon avalanche diode and will not meet the development needs of miniaturization of back-illuminated single-photon avalanche diode devices. In this embodiment, the cross-sectional width of the shallow trench isolation structure 102 on a plane parallel to the surface of the substrate 100 is 1 μm to 5 μm.

[0105] It should be noted that in the step of forming the shallow trench isolation structure 102, the shallow trench isolation structure 102 should not be too thick. The step of forming the shallow trench isolation structure 102 includes: etching the end surface of the epitaxial layer 101 away from the substrate 100, forming a groove on the epitaxial layer 101, and forming an isolation material layer in the groove and the end surface of the epitaxial layer 101 away from the substrate 100; removing the isolation material layer exposed outside the groove, and the remaining isolation material layer located in the groove serves as the shallow trench isolation structure 102. If the shallow trench isolation structure 102 is too thick, it will take too much process time to form the shallow trench isolation structure 102, resulting in low formation efficiency of the shallow trench isolation structure 102. In this embodiment, the depth of the shallow trench isolation structure 102 is less than 1μm.

[0106] refer to Figure 9 and Figure 10 , Figure 10 for Figure 9 In the top view, a first doped region 103 is formed on the end surface of the epitaxial layer 101 away from the substrate 100.

[0107] In this embodiment, a PN junction is formed at the interface between the first doped region 103 and the epitaxial layer 101 .

[0108] The method for forming a back-illuminated single-photon avalanche diode further includes forming a second doped region 104 in a region near the top of the epitaxial layer 101 before forming the first doped region 103 on the end face of the epitaxial layer 101 away from the substrate 100 .

[0109] The first doping region 103 and the second doping region 104 have different conductivity types of doped ions, and the first doping region 103 and the second doping region 104 also form a PN junction. When the single-photon avalanche diode is operating, a reverse bias is applied to the PN junction, and the reverse bias voltage is greater than the breakdown voltage of the PN junction to achieve avalanche multiplication.

[0110] In this embodiment, the first doping region 103 is doped with second-type ions, and the second doping region 104 is doped with first-type ions. That is, the first doping region 103 is doped with N-type ions, and the second doping region 104 is doped with P-type ions.

[0111] It should be noted that the first doping region 103 and the second doping region 104 are both rounded rectangles (eg Figure 9 The rectangular shape is intended to improve the area utilization of the substrate 100 and reduce the gap between adjacent SPAD units; the rounded corners are less likely to form electric field concentration and cause edge breakdown.

[0112] In this embodiment, a second doping region 104 is first formed in a region near the top of the epitaxial layer 101 . After the second doping region 104 is formed, a first doping region 103 is formed between the second doping region 104 and the surface of the epitaxial layer 101 away from the substrate 100 .

[0113] Specifically, the step of forming the second doped region 104 in the area near the top of the epitaxial layer 101 includes: forming a first mask layer (not shown in the figure) on the epitaxial layer 101, the first mask layer exposing the area of ​​the epitaxial layer 101 where the second doped region 104 is to be formed; and performing ion implantation on the epitaxial layer 101 exposed by the first mask layer to form the second doped region 104.

[0114] In this embodiment, the material of the first mask layer includes photoresist.

[0115] Ion implantation is characterized by simple operation and low process cost. During the step of forming the second doped region 104 using the ion implantation process, the energy of the ion implantation is controlled so that the top of the second doped region 104 is a certain distance from the surface of the epitaxial layer 101 away from the substrate 100, thereby reserving process space for the subsequent formation of the first doped region 103 between the second doped region 104 and the surface of the epitaxial layer 101 away from the substrate 100.

[0116] Specifically, in the process of forming the second doping region 104 by adopting the ion implantation process, the implanted ions are first-type ions, and the first-type ions include P-type ions.

[0117] It should be noted that after removing the first mask layer, the surface of the epitaxial layer 101 facing away from the substrate 100 is cleaned to improve the precision and quality of the surface of the epitaxial layer 101 facing away from the substrate 100. Because the shallow trench isolation structure 102 is located between adjacent functional regions, during the step of cleaning the surface of the epitaxial layer 101 facing away from the substrate 100, the shallow trench isolation structure 102 acts as a barrier, and dopant ions in the first doping region 103 and the second doping region 104 in one functional region are not easily carried into another functional region. This makes element crosstalk less likely to occur in adjacent diode regions, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0118] Specifically, the step of forming the first doping region 103 between the second doping region 104 and the surface of the epitaxial layer 101 away from the substrate 100 includes: ion doping the epitaxial layer 101 exposed by the first mask layer to form the first doping region 103 .

[0119] During the process of forming the first doping region 103 , the doping ions are second-type ions, and the second-type ions include N-type ions.

[0120] Specifically, an ion implantation process is used to implant ions into the epitaxial layer 101 exposed by the first mask layer to form the first doped region 103. Ion implantation is characterized by simplicity and low process cost. During the step of forming the first doped region 103 using the ion implantation process, the energy of the ion implantation is controlled so that the doping ions are located between the second doped region 104 and the surface of the epitaxial layer 101 away from the substrate 100.

[0121] In this embodiment, in the step of forming the first doping region 103 and the second doping region 104 on the end surface of the epitaxial layer 101 away from the substrate 100 , the first doping region 103 is spaced apart from the shallow trench isolation structure 102 .

[0122] The first doping region 103 is spaced apart from the shallow trench isolation structure 102, so that the distance that the doped ions in the first doping region 103 and the second doping region 104 of one diode region need to move to enter the adjacent diode region becomes larger, which increases the difficulty for the doped ions in the first doping region 103 and the second doping region 104 of one diode region to enter the adjacent diode region, making it less likely for element crosstalk to occur between adjacent back-illuminated single-photon avalanche diodes, which is beneficial to improving the electrical performance of back-illuminated single-photon avalanche diodes. In addition, the first doping region 103 is spaced apart from the shallow trench isolation structure 102, which can reduce the stress and electric field concentration at the edge of the PN junction and reduce the dark count. The PN junction here refers to the PN junction formed by the epitaxial layer 101 and the first doping region 103 and the PN junction formed by the first doping region 103 and the second doping region 104.

[0123] The method for forming a back-illuminated single-photon avalanche diode further includes: after forming the first doped region 103 , removing the first mask layer.

[0124] In this embodiment, an ashing process is used to remove the first mask layer.

[0125] It should be noted that after removing the first mask layer, the surface of the epitaxial layer 101 facing away from the substrate 100 and the first doped region 103 are cleaned to improve the precision and quality of the surface of the epitaxial layer 101 facing away from the substrate 100 and the surface of the first doped region 103. Because the shallow trench isolation structure 102 is located between adjacent functional regions, during the step of cleaning the surface of the epitaxial layer 101 facing away from the substrate 100, the shallow trench isolation structure 102 acts as a barrier, making it difficult for dopant ions in the first doped region 103 and the second doped region 104 in one functional region to be carried into another functional region, making it difficult for element crosstalk to occur in adjacent diode regions, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0126] Continue to refer Figure 9 and Figure 10 The back-illuminated single-photon avalanche diode further includes: after forming the first doping region 103 , forming an electrode contact region 201 on the end surface of the first doping region 103 away from the substrate 100 .

[0127] The electrode contact region 201 is used to connect to a contact hole plug formed subsequently.

[0128] The electrode contact region 201 is doped with second-type ions, and the doping concentration of the second-type ions in the electrode contact region 201 is greater than the doping concentration of the second-type ions in the first doping region 103 , so as to reduce the contact resistance between the electrode contact region 201 and the contact hole plug.

[0129] Specifically, the step of forming the electrode contact area 201 includes: forming a second mask layer on the epitaxial layer 101, the second mask layer exposing the area of ​​the epitaxial layer 101 where the electrode contact area 201 is to be formed; and ion doping the epitaxial layer 101 exposed by the second mask layer to form the electrode contact area 201.

[0130] In this embodiment, an ion implantation process is used to perform ion doping on the epitaxial layer 101 exposed by the second mask layer.

[0131] The method for forming a back-illuminated single-photon avalanche diode further includes: after forming the electrode contact region 201 , removing the second mask layer.

[0132] In this embodiment, an ashing process is used to remove the second mask layer.

[0133] It should be noted that after removing the second mask layer, the surface of the epitaxial layer 101 facing away from the substrate 100, the surface of the first doped region 103, and the surface of the electrode contact region 201 are cleaned to improve the precision and quality of the surface of the epitaxial layer 101 facing away from the substrate 100, the surface of the first doped region 103, and the surface of the electrode contact region 201. Because the shallow trench isolation structure 102 is located between adjacent functional regions, during the step of cleaning the surface of the epitaxial layer 101 facing away from the substrate 100, the shallow trench isolation structure 102 acts as a barrier, making it difficult for dopant ions in the first doped region 103 and the second doped region 104 in one functional region to be carried into another functional region, making it difficult for element crosstalk to occur in adjacent diode regions, which is beneficial to improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0134] Continue to refer Figure 9 and Figure 10 The method for forming the back-illuminated single-photon avalanche diode also includes: after forming the first doped region 103, forming a guard ring 106 surrounding the side of the first doped region 103 on the end surface of the epitaxial layer 101 away from the substrate 100, and the guard ring 106 is spaced apart from the shallow trench isolation structure 102.

[0135] When the single-photon avalanche diode is working, the guard ring 106 is used to prevent electric field concentration from occurring around the PN junction, thereby reducing the probability of breakdown at the edge of the PN junction.

[0136] In this embodiment, the guard ring 106 is doped with second-type ions, and the doping concentration of the second-type ions in the guard ring 106 is less than or equal to the doping concentration of the second-type ions in the first doping layer 103 . For example, the doping concentration of the guard ring 106 is one order of magnitude lower than that of the first doping region 103 .

[0137] In this embodiment, the guard ring 106 is formed by an ion implantation process.

[0138] It should be noted that after forming the guard ring 106, the surface of the epitaxial layer 101 facing away from the substrate 100 is cleaned. Because the shallow trench isolation structure 102 is located between adjacent functional regions, during the step of cleaning the surface of the epitaxial layer 101 facing away from the substrate 100, the shallow trench isolation structure 102 acts as a barrier, preventing dopant ions in the first doping region 103 and the second doping region 104 in one functional region from being carried into another functional region. This reduces the risk of element crosstalk between adjacent diode regions, which is beneficial for improving the yield and electrical performance of the back-illuminated single-photon avalanche diode.

[0139] The method for forming the back-illuminated single-photon avalanche diode includes: after forming the first doping region 103 and the second doping region 104, the shallow trench isolation structure 102, the first doping region 103 and the epitaxial layer 101 are flattened, so that the flatness of the surface of the shallow trench isolation structure 102, the first doping region 103 and the epitaxial layer 101 is high, thereby improving the accuracy and formation quality of the surface of the shallow trench isolation structure 102, the first doping region 103 and the epitaxial layer 101.

[0140] In this embodiment, a chemical mechanical planarization (CMP) process is used to perform the planarization process.

[0141] It should be noted that the chemical mechanical polishing process is a global planarization technology. During the planarization process, the flatness of the surface of the shallow trench isolation structure guard ring 106 and the electrode contact area 201 is also improved.

[0142] It should be noted that the distance d between the guard ring 106 and the shallow trench isolation structure 102 should not be too large or too small. If the distance d is too small, in the step of cleaning the surface of the epitaxial layer 101 away from the substrate 100, the first type ions in the guard ring 106 are likely to enter the adjacent diode region, resulting in element crosstalk between the adjacent back-illuminated single-photon avalanche diodes formed subsequently; and if the distance d is too small, when the back-illuminated single-photon avalanche diode is working, the diode region is easily affected by the edge electric field of the diode region and is prone to breakdown, resulting in poor electrical performance of the back-illuminated single-photon avalanche diode. If the distance d is too large, the integration of the back-illuminated single-photon avalanche diode will not be high, which is not suitable for meeting the development needs of miniaturization of single-photon avalanche diode devices. In this embodiment, the distance d between the guard ring 106 and the shallow trench isolation structure 102 is between 1μm and 3μm.

[0143] refer to Figure 11 , forming a second isolation layer 107 covering the first doped region 103 , the electrode contact region 201 and the epitaxial layer 101 .

[0144] The second isolation layer 107 provides a process space for the subsequent formation of the contact plug 108 and a process platform for the subsequent formation of the reflective layer. In addition, the second isolation layer 107 is used to electrically isolate the first doped region 103, the electrode contact region 201 and the epitaxial layer 101 from the subsequently formed reflective layer.

[0145] In this embodiment, the material of the second isolation layer 107 includes silicon oxide.

[0146] In this embodiment, the second isolation layer 107 is formed by a flowable chemical vapor deposition process.

[0147] In other embodiments, after the second isolation layer is formed, a chemical mechanical planarization process may be performed on the second isolation layer to improve the planarity of the second isolation layer.

[0148] It should be noted that in the step of forming the second isolation layer 107 on the first doped region 103, the electrode contact region 201 and the epitaxial layer 101, the second isolation layer 107 is also formed on the shallow trench isolation structure 102, so that the flatness of the surface of the second isolation layer 107 is relatively high.

[0149] refer to Figure 12 The method for forming the back-illuminated single-photon avalanche diode further includes: after forming the second isolation layer 107 , forming a reflective layer 109 on a surface of the second isolation layer 107 away from the first doped region 103 .

[0150] Subsequently, a first isolation layer is formed on the back surface 301 of the substrate 100. When the back-illuminated single-photon avalanche diode is operating, photons pass through the first isolation layer and enter the depletion region. The excited carriers can then be conducted to the avalanche region under the action of the electric field, triggering an avalanche effect. The reflective layer 109 is used to reflect photons that have passed through the second doped region 104 but have not triggered carriers or avalanches, allowing them to re-enter the second doped region 104, thereby increasing the probability of photons triggering carriers and / or avalanches and improving the SPAD's photon detection efficiency.

[0151] The step of forming a reflective layer 109 on the surface of the second isolation layer 107 away from the first doping region 103 includes: forming a reflective metal material layer on the surface of the second isolation layer 107 away from the first doping region 103; and planarizing the reflective metal material layer to form the reflective layer 109.

[0152] In this embodiment, the material of the reflective layer 109 includes one or more of tungsten, aluminum, and copper.

[0153] In this embodiment, the reflective metal material layer is formed using an electrochemical plating process. The electrochemical plating process has the advantages of simple operation, fast deposition speed, and low cost. In other embodiments, the reflective metal material layer can also be formed using metal organic chemical vapor deposition.

[0154] In this embodiment, a chemical mechanical polishing process is used to planarize the reflective metal material layer.

[0155] refer to Figure 13 , forming a contact hole plug 108 electrically connected to the electrode contact area 201.

[0156] The contact plug 108 is used to connect the electrode contact region 201 to a bias source.

[0157] In this embodiment, the material of the contact hole plug 108 includes one or more of tungsten, aluminum, and copper.

[0158] The back-illuminated single-photon avalanche diode further includes a dielectric layer 203 located between the contact plug 108 and the reflective layer 109 , and between the contact plug 108 and the second isolation layer 107 .

[0159] The dielectric layer 203 is made of insulating materials such as silicon oxide.

[0160] refer to Figure 14 The method for forming the back-illuminated single-photon avalanche diode includes: after forming the first doping region 103 and the second doping region 104, forming a deep trench isolation structure 110 extending from the back surface 301 of the substrate 100 to the shallow trench isolation structure 102.

[0161] The deep trench isolation structure 110 and the shallow trench isolation structure 102 jointly perform photoelectric isolation on adjacent diode regions, preventing photons incident on a diode region and / or photon-excited carriers from entering other adjacent diode regions, thereby suppressing optical and electrical crosstalk between adjacent diode regions.

[0162] The steps of forming a deep trench isolation structure extending from the back surface 301 of the substrate 100 to the shallow trench isolation structure 102 include: forming a deep trench (not shown in the figure) extending from the substrate 100 to the shallow trench isolation structure 102; forming an insulating material layer (not shown in the figure) on the bottom and sidewalls of the deep trench and the back surface 301 of the substrate 100; after forming the insulating material layer, forming a metal material layer (not shown in the figure) on the deep trench and the back surface 301 of the substrate 100; removing the insulating material layer and the metal material layer exposed outside the deep trench, and the remaining insulating material layer located in the deep trench serves as the insulating layer 1101, the metal material layer located in the deep trench serves as the metal layer 1102, and the insulating layer 1101 and the metal layer 1102 serve as the deep trench isolation structure 110.

[0163] In this embodiment, a dry etching process is used to etch the substrate 100 and epitaxial layer 101, forming a deep trench extending from the substrate 100 to the shallow trench isolation structure 102. The dry etching process has anisotropic etching characteristics and good controllability of the etching profile, which helps ensure that the morphology of the deep trench meets process requirements. In addition, during the dry etching process, the shallow trench isolation structure 102 is used as the etching stop point, which makes it easy to control the formation area of ​​the deep trench, reduces process difficulty, and prevents the deep trench etching from adversely affecting the shallow trench isolation structure 102 already formed on the surface of the epitaxial layer 101.

[0164] In this embodiment, the deep trench exposes the shallow trench isolation structure 102 , preparing for the subsequent formation of a deep trench isolation structure 110 in the deep trench.

[0165] The insulating layer 1101 electrically isolates the metal layer 1102 from the substrate 100 and the epitaxial layer 101. Furthermore, a first electrode penetrating a portion of the thickness of the substrate 100 is subsequently formed on the side of the deep trench isolation structure 110. The insulating layer 1101 electrically isolates the diode region, the first electrode, and the metal layer 1102, thereby preventing electrical breakdown of the metal layer 1102.

[0166] In this embodiment, the material of the insulating layer 1101 includes silicon oxide.

[0167] In this embodiment, the insulating material layer is formed by a chemical vapor deposition (FCVD) process. In other embodiments, the insulating material layer may be formed by an atomic layer deposition (ALD) process.

[0168] In this embodiment, the metal layer 1102 is made of tungsten. Using a stack of tungsten and silicon oxide as the deep trench isolation structure 110 provides better isolation than using silicon oxide, nitride, or oxynitride alone as the deep trench isolation structure, thereby reducing optical and electrical crosstalk between adjacent single-photon avalanche diodes.

[0169] In this embodiment, the metal material layer is formed by an electrochemical plating process.

[0170] In this embodiment, a dry etching process or a chemical mechanical polishing process is used to remove the isolation material layer exposed outside the deep trench.

[0171] In this embodiment, after the first doping region 103 and the second doping region 104 are formed, a deep trench isolation structure 110 is formed extending from the back surface 301 of the substrate 100 to the shallow trench isolation structure 102, without causing interference to important structures such as the first doping region and the second doping region of the diode region that have already been formed.

[0172] It should be noted that the cross-sectional width D of the deep trench isolation structure 110 on the surface of the substrate 100 should not be too large or too small. If the cross-sectional width D is too large, the deep trench isolation structure 110 occupies a large area of ​​the back surface 301, resulting in a low integration level of the back-illuminated single-photon avalanche diode (BSADD), which is not conducive to meeting the development requirements of device miniaturization. The back surface 301 serves as a photosensitive surface. A first isolation layer is subsequently formed on the back surface 301, and a first electrode is subsequently formed to penetrate the first isolation layer and connect to the substrate 100, forming a second electrode connecting the first electrodes in the adjacent diode regions. The first and second electrodes will occupy the area of ​​the photosensitive surface. If the cross-sectional width D is too large, the area of ​​the photosensitive surface occupied by the first and second electrodes will be too large. The back-illuminated single-photon avalanche diode array chip includes multiple back-illuminated single-photon avalanche diodes, and the corresponding back-illuminated single-photon avalanche diode array chip has a small fill factor, which reduces the photon detection efficiency of the single-photon avalanche diode. If the cross-sectional width D is too small, the deep trench isolation structure 110 will have poor optical and electrical isolation effects on the diode regions on both sides of the structure during operation, and optical and electrical crosstalk will likely occur between adjacent back-illuminated single-photon avalanche diodes. In this embodiment, the cross-sectional width D of the deep trench isolation structure 110 at the end surface of the epitaxial layer 101 facing away from the substrate 100 is in the range of 0.5 μm to 1 μm.

[0173] refer to Figure 15 and Figure 16 The method for forming the back-illuminated single-photon avalanche diode includes: forming a first isolation layer 111 on the back surface 301 of the substrate 100 .

[0174] The first isolation layer 111 provides a process space for subsequently forming a first electrode.

[0175] In this embodiment, the back surface 301 serves as a photosensitive surface. When the back-illuminated single-photon avalanche diode is working, photons enter the depletion region from the photosensitive surface, and the excited carriers can be conducted to the avalanche region under the action of the electric field to stimulate the avalanche effect.

[0176] The material of the first isolation layer 111 is an insulating material. In this embodiment, the material of the first isolation layer 111 includes silicon oxide. In other embodiments, the material of the first isolation layer may also include silicon nitride or silicon oxynitride.

[0177] In this embodiment, the first isolation layer 111 is formed by using a fluid chemical vapor deposition process.

[0178] Continue to refer Figure 15 , etching the first isolation layer 111 and a portion of the thickness of the substrate 100, forming a ring-shaped opening 112 surrounding the diode region on the first isolation layer 111 and the substrate 100 (eg Figure 15 shown).

[0179] The annular opening 112 provides a process space for forming the first electrode. The annular opening 112 surrounds the diode region, so that the subsequently formed first electrode surrounds the diode region. The back surface 301 serves as a photosensitive surface, and light enters the depletion region from the photosensitive surface. Because the projection of the first electrode on the front surface of the substrate 100 surrounds the diode region, the ratio of the area occupied by the first electrode to the surface area of ​​the first isolation layer 111 is small. The back-illuminated single-photon avalanche diode array chip includes multiple back-illuminated single-photon avalanche diodes, and the corresponding back-illuminated single-photon avalanche diode array chip has a large fill factor. Therefore, when the back-illuminated single-photon avalanche diodes are operating, more photons pass through the photosensitive surface and enter the depletion region, increasing the probability of photon excitation of carriers and / or avalanches, which is beneficial for improving the photon detection efficiency of the back-illuminated single-photon avalanche diodes.

[0180] In this embodiment, a dry etching process is used to etch the first isolation layer 111 and a partial thickness of the substrate 100 to form the annular opening 112 surrounding the diode region. The dry etching process has anisotropic etching characteristics and good controllability of the etching profile, which helps ensure that the morphology of the annular opening 112 meets process requirements. Moreover, by changing the etching gas, the first isolation layer 111 and the partial thickness of the substrate 100 can be etched in the same etching equipment, simplifying the process steps.

[0181] In order to ensure that the contact resistance between the first electrode formed in the annular opening 112 and the substrate 100 meets the requirements, in the step of forming the annular opening 112, the substrate 100 is etched to a thickness of 10 nm to 100 nm.

[0182] Continue to refer Figure 15 The method for forming the back-illuminated single-photon avalanche diode further includes: after forming the annular opening 112, etching a portion of the thickness of the first isolation layer 111 to form a groove 114 connecting the annular opening 112 in the adjacent diode region.

[0183] The trench 114 is prepared for the subsequent formation of the second electrode.

[0184] In this embodiment, the groove 114 is located between adjacent annular openings 112, and is used to connect the annular openings 112 in the adjacent diode areas. The corresponding groove 114 corresponds to the deep trench isolation structure 110, and the corresponding second electrode formed subsequently corresponds to the deep trench isolation structure 110, reducing the area of ​​the photosensitive surface occupied by the second electrode 115. When the back-illuminated single-photon avalanche diode is working, more photons enter the depletion region, increasing the probability of photons exciting carriers and / or avalanches, which is beneficial to improving the photon detection efficiency of the back-illuminated single-photon avalanche diode.

[0185] The groove 114 is formed by etching a portion of the thickness of the first isolation layer 111. Accordingly, a portion of the thickness of the first isolation layer 111 exists between the subsequently formed second electrode and the metal layer 1102 of the deep trench isolation structure 110, which can electrically isolate the second electrode and the metal layer 1102.

[0186] It should be noted that the first isolation layer 111 at the bottom of the groove 114 should not be too thick or too thin. If the first isolation layer 111 at the bottom of the groove 114 is too thick, while the second electrode smoothly electrically connects the first electrode in the adjacent diode area, the size of the back-illuminated single-photon avalanche diode formed will be too large in the normal direction of the substrate 100, which is not conducive to meeting the development needs of miniaturization of back-illuminated single-photon avalanche diodes. If the first isolation layer 111 at the bottom of the groove 114 is too thin, the second electrode and the metal layer 1102 in the deep trench isolation structure 110 are prone to breakdown, resulting in poor electrical performance of the back-illuminated single-photon avalanche diode. In this embodiment, the thickness of the first isolation layer 111 at the bottom of the groove 114 is 10 nanometers to 20 nanometers.

[0187] In this embodiment, a dry etching process is used to etch a portion of the thickness of the first isolation layer 111 to form the trench 114. The dry etching process has anisotropic etching characteristics and good controllability of the etching profile, which helps ensure that the morphology of the trench 114 meets process requirements. The dry etching process also allows the formation depth of the trench 114 to be controlled.

[0188] refer to Figure 16 and Figure 17 , Figure 17 for Figure 16 In the cross-sectional view at AA, a first electrode 113 is formed in the annular opening 112 (eg, Figure 16 shown).

[0189] The first electrode 113 is used to lead out the substrate 100 to facilitate connection with the back-end metal.

[0190] In this embodiment, the material of the first electrode 113 includes one or more of tungsten, aluminum, and copper.

[0191] Specifically, the step of forming the first electrode 113 in the annular opening 112 includes: forming an electrode material layer on the annular opening 112 and the first isolation layer 111; removing the electrode material layer exposed outside the annular opening 112, and the remaining electrode material layer located in the annular opening 112 serves as the first electrode 113.

[0192] In the step of forming the first electrode 113 in the annular opening 112 , a second electrode 115 is further formed in the groove 114 . The second electrode 115 is used to connect the first electrode 113 in the adjacent diode region.

[0193] Accordingly, the material of the second electrode 115 is the same as that of the first electrode 113 .

[0194] It should be noted that the first electrode 113 and the second electrode 115 are formed simultaneously, the first electrode 113 and the second electrode 115 are an integrated structure, and the first electrode 113 and the second electrode 115 in the adjacent SPAD are also an integrated structure.

[0195] As an example, the width dimension L of the second electrode 115 is greater than twice the cross-sectional width D of the deep trench isolation structure 110. In this way, even if there is an overlay error in the process of forming the first electrode 113 and the second electrode 115, sufficient space can be left between the first electrode 113 and the deep trench isolation structure 110, thereby reducing the probability of edge breakdown of the diode region.

[0196] It should be noted that in the embodiment of the present invention, the first electrode 113 and the second electrode 115 are arranged on the side of the substrate 100 away from the first doped region 103, so as to avoid occupying the area of ​​the end face of the epitaxial layer 101 away from the substrate 100, so that the end face of the epitaxial layer 101 away from the substrate 100 can have more area to form the first doped region 103 and the second doped region 104, thereby obtaining a larger depletion region when the back-illuminated single-photon avalanche diode is working, increasing the probability of photons triggering carriers and / or avalanches, and improving the photon detection efficiency of the back-illuminated single-photon avalanche diode. In addition, the first electrode 113 extends into the substrate 100, and a bias can be applied to the PN junction through an interconnection structure or circuit (not shown) electrically connected to the first electrode 113 and the second electrode 115, without the need to prepare a complex structure for connecting the electrodes on the sidewall of the deep trench isolation structure or the side of the epitaxial layer 101 away from the substrate 100. The structure of the first electrode 113 and the second electrode 115 in the embodiment of the present invention can reduce the structural complexity of the back-illuminated single-photon avalanche diode, thereby reducing the process difficulty and cost. The PN junction referred to here refers to the PN junction formed by the epitaxial layer 101 and the first doped region 103, and the PN junction formed by the first doped region 103 and the second doped region 104.

[0197] In this embodiment, the filling factor of the back-illuminated single-photon avalanche diode array chip is increased by 30% to 40% compared with the front-illuminated single-photon avalanche diode. Because the photon detection efficiency of the array detector of the back-illuminated single-photon avalanche diode is proportional to the detection efficiency of a single back-illuminated single-photon avalanche diode, the photon detection efficiency of the array detector of the back-illuminated single-photon avalanche diode is also increased by 30% to 40% compared with the detection efficiency of the front-illuminated single-photon avalanche diode.

[0198] Correspondingly, the present invention also provides a laser radar, which includes: a transmitting unit for providing a transmitting light beam, which forms an echo light beam after being reflected by a target object; a receiving unit for receiving the echo light beam, which includes the aforementioned back-illuminated single-photon avalanche diode.

[0199] When the laser radar is working, the shallow trench isolation structure is located between adjacent diode regions and on the end face of the epitaxial layer away from the substrate. The shallow trench isolation structure 102 defines the positions of adjacent diode regions and can well isolate the adjacent diode regions, so that the doped ions in the first doping region and the second doping region in the diode region are not easy to enter the adjacent diode region, so that element crosstalk is not easy to occur between adjacent back-illuminated single-photon avalanche diodes, thereby improving the yield and electrical quality of the back-illuminated single-photon avalanche diodes. Accordingly, it can reduce the noise output by the receiving unit in the laser radar, improve the detection signal-to-noise ratio, and help improve the detection effect of the laser radar.

[0200] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined by the claims. Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined by the claims.

Claims

1. A back-illuminated single-photon avalanche diode, characterized in that: include: a substrate comprising a back surface and a front surface opposite to the back surface; A plurality of diode regions are located on the front surface of the substrate, the diode regions comprising: epitaxial layer; A first doped region is located on an end surface of the epitaxial layer away from the substrate; A shallow trench isolation structure is located between adjacent diode regions and on an end surface of the epitaxial layer away from the substrate; A deep trench isolation structure is located between adjacent diode regions and extends from the back surface of the substrate to the shallow trench isolation structure.

2. The back-illuminated single-photon avalanche diode according to claim 1, wherein: The back-illuminated single-photon avalanche diode includes a second doped region located on a side of the first doped region facing the substrate and in contact with the first doped region.

3. The back-illuminated single-photon avalanche diode according to claim 1, wherein: The back-illuminated single-photon avalanche diode comprises: a first isolation layer, located on the back surface of the substrate; The first electrode is located on a surface of the first isolation layer facing away from the substrate and extends into the substrate. The projection of the first electrode on the front surface of the substrate surrounds the diode region.

4. The back-illuminated single-photon avalanche diode according to claim 3, wherein: The back-illuminated single-photon avalanche diode further comprises: The second electrode is located on a surface of the first isolation layer facing away from the substrate and is connected to the first electrode in an adjacent diode region.

5. The back-illuminated single-photon avalanche diode according to any one of claims 1 to 4, characterized in that: The shallow trench isolation structure is spaced apart from the first doped region.

6. The back-illuminated single-photon avalanche diode according to any one of claims 1 to 4, characterized in that: The material of the shallow trench isolation structure includes one or more of silicon oxide, silicon oxynitride and silicon nitride.

7. The back-illuminated single-photon avalanche diode according to claim 1, wherein: The deep trench isolation structure includes an insulating layer and a metal layer filled in the insulating layer.

8. The back-illuminated single-photon avalanche diode according to claim 1, wherein: The back-illuminated single-photon avalanche diode further comprises: an electrode contact region, located on an end surface of the first doped region facing away from the substrate; a second isolation layer, located on an end surface of the first doped region facing away from the substrate, and covering the diode region and the electrode contact region; A contact hole plug penetrates the second isolation layer and is electrically connected to the electrode contact region.

9. The back-illuminated single-photon avalanche diode according to claim 8, wherein: The back-illuminated single-photon avalanche diode further comprises: The reflective layer is located on a surface of the second isolation layer facing away from the first doping region.

10. The back-illuminated single-photon avalanche diode according to claim 1, wherein: The back-illuminated single-photon avalanche diode further comprises: A guard ring is located on the end surface of the epitaxial layer facing away from the substrate, surrounds the first doped region, and is spaced apart from the shallow trench isolation structure.

11. The back-illuminated single-photon avalanche diode according to claim 10, wherein: The distance between the shallow trench isolation structure and the guard ring is between 1 μm and 3 μm.

12. The back-illuminated single-photon avalanche diode according to claim 2, wherein: The epitaxial layer is doped with P-type dopant ions; The first doping region is doped with N-type dopant ions; The second doping region is doped with P-type doping ions.

13. A method for forming a back-illuminated single-photon avalanche diode, characterized in that: include: providing a substrate comprising a back surface and a front surface opposite to the back surface; forming an epitaxial layer on the front surface of the substrate, the epitaxial layer having a plurality of functional regions for forming diode regions; forming a shallow trench isolation structure on an end surface of the epitaxial layer away from the substrate, wherein the shallow trench isolation structure is located between adjacent functional areas; forming a first doped region on an end surface of the epitaxial layer away from the substrate; The method for forming a back-illuminated single-photon avalanche diode includes: after forming the first doping region, forming a deep trench isolation structure extending from the back surface of the substrate to the shallow trench isolation structure.

14. The method for forming a back-illuminated single-photon avalanche diode according to claim 13, wherein: The method for forming a back-illuminated single-photon avalanche diode further includes: forming a second doping region in a region near the top of the epitaxial layer before forming the first doping region on the end face of the epitaxial layer away from the substrate.

15. The method for forming a back-illuminated single-photon avalanche diode according to claim 13, wherein: The method for forming the back-illuminated single-photon avalanche diode comprises: forming a first isolation layer on the back surface of the substrate; Etching the first isolation layer and a portion of the thickness of the substrate to form a ring-shaped opening surrounding the diode region; A first electrode is formed in the annular opening.

16. The method for forming a back-illuminated single-photon avalanche diode according to claim 15, wherein: The method for forming the back-illuminated single-photon avalanche diode further includes: after forming the annular opening, etching a portion of the thickness of the first isolation layer to form a groove connecting the annular openings in adjacent diode regions; In the step of forming the first electrode in the annular opening, a second electrode is further formed in the trench, wherein the second electrode is used to connect the first electrode in the adjacent diode region.

17. The method for forming a back-illuminated single-photon avalanche diode according to any one of claims 13 to 16, wherein: The steps of forming the shallow trench isolation structure include: Etching the end surface of the epitaxial layer away from the substrate to form a groove on the epitaxial layer, wherein the groove is located between adjacent functional areas; forming an isolation material layer on the groove and the end surface of the epitaxial layer away from the substrate; The isolation material layer exposed outside the groove is removed, and the remaining isolation material layer located in the groove serves as the shallow trench isolation structure.

18. The method for forming a back-illuminated single-photon avalanche diode according to any one of claims 13 to 16, wherein: The material of the shallow trench isolation structure includes one or more of silicon oxide, silicon oxynitride and silicon nitride.

19. The method for forming a back-illuminated single-photon avalanche diode according to any one of claims 13 to 16, wherein: In the step of forming a first doped region on the end surface of the epitaxial layer away from the substrate, the first doped region is spaced apart from the shallow trench isolation structure.

20. The method for forming a back-illuminated single-photon avalanche diode according to claim 13, wherein: The step of forming a deep trench isolation structure extending from the back surface of the substrate to the shallow trench isolation structure includes: forming a deep trench extending from the substrate to the shallow trench isolation structure; forming an insulating material layer on the bottom surface and sidewalls of the deep trench and the back surface of the substrate; After forming the insulating material layer, a metal material layer is formed on the back surface of the deep trench and the substrate; the insulating material layer and the metal material layer exposed outside the deep trench are removed, and the remaining insulating material layer located in the deep trench serves as an insulating layer, and the metal material layer located in the deep trench serves as a metal layer, and the insulating layer and the metal layer serve as the deep trench isolation structure.

21. The method for forming a back-illuminated single-photon avalanche diode according to claim 13, wherein: The method for forming the back-illuminated single-photon avalanche diode comprises: After the first doped region is formed, a guard ring surrounding the side of the first doped region is formed on the end surface of the epitaxial layer facing away from the substrate, and the guard ring is spaced apart from the shallow trench isolation structure.

22. The method for forming a back-illuminated single-photon avalanche diode according to claim 21, wherein: In the step of forming the guard ring, the distance between the guard ring and the shallow trench isolation structure is between 1 μm and 3 μm.

23. The method for forming a back-illuminated single-photon avalanche diode according to claim 13, wherein: The method for forming the back-illuminated single-photon avalanche diode includes: after forming the first doping region, performing a planarization process on the shallow trench isolation structure, the first doping region, and the epitaxial layer.

24. The method for forming a back-illuminated single-photon avalanche diode according to claim 13, wherein: The back-illuminated single-photon avalanche diode further comprises: after forming the first doping region, forming an electrode contact region on an end surface of the first doping region facing away from the substrate; forming a second isolation layer covering the first doped region, the electrode contact region and the epitaxial layer; A contact hole plug is formed to penetrate the second isolation layer and electrically connect to the electrode contact region.

25. The method for forming a back-illuminated single-photon avalanche diode according to claim 24, wherein: The method for forming a back-illuminated single-photon avalanche diode further includes: after forming the second isolation layer, forming a reflective layer on a surface of the second isolation layer facing away from the first doped region.

26. The method for forming a back-illuminated single-photon avalanche diode according to claim 14, wherein: In the step of forming an epitaxial layer on the front surface of the substrate, P-type ions are doped in the epitaxial layer; in the step of forming a first doping region and a second doping region on the end surface of the epitaxial layer away from the substrate, N-type ions are doped in the first doping region and P-type ions are doped in the second doping region.

27. A laser radar, characterized in that: include: A transmitting unit, configured to provide a transmitting light beam, wherein the transmitting light beam is reflected by a target object to form an echo light beam; A receiving unit, configured to receive an echo light beam, wherein the receiving unit comprises the back-illuminated single-photon avalanche diode according to any one of claims 1 to 12.

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