Driving circuit, battery management system and electronic device

Abstract

The application discloses a driving circuit, a battery management system and electronic equipment. The driving circuit is used for driving a plurality of MOS tubes. The driving circuit is interconnected with controlled ends of the plurality of MOS tubes. The driving circuit comprises: a switching circuit, which is used for receiving an external control signal and being turned on / off according to the external control signal; a pull-down circuit, an input end of the pull-down circuit being connected with the switching circuit, the pull-down circuit being used for pulling down a voltage of the input end of the pull-down circuit and outputting a corresponding pull-down signal when the switching circuit is turned on / off; and a push-pull circuit, an input end of the push-pull circuit being connected with an output end of the switching circuit and an output end of the pull-down circuit, the push-pull circuit being used for outputting a corresponding driving signal to the plurality of MOS tubes according to the pull-down signal to drive the plurality of MOS tubes to work when the switching circuit is turned on / off. The technical scheme of the application solves the problem that the driving circuit is easy to cause the MOS tube to be burnt out when driving the MOS tube with heavy load to be disconnected and connected.

Description

Technical Field

[0001] This invention relates to the field of electronic devices, and particularly to a drive circuit, a battery management system, and an electronic device. Background Technology

[0002] Many energy storage products, low-speed electric vehicles, electric bicycles, electric motorcycles, and electric special vehicles on the market use lithium batteries, typically in sets of ten to twenty cells. Due to space constraints, battery management systems mostly use MOSFETs as switches instead of relays because relays are much more expensive and bulky than MOSFETs.

[0003] However, existing drive circuits are prone to burning out MOSFETs when driving them to open and close under heavy loads, which limits the use of MOSFETs as switches. Summary of the Invention

[0004] The main objective of this invention is to provide a driving circuit, a battery management system, and an electronic device, which aims to solve the problem that the driving circuit can easily burn out the MOSFET when driving it to open and close under heavy load.

[0005] To achieve the above objectives, the present invention proposes a driving circuit for driving multiple MOS transistors, wherein the output terminal of the driving circuit is interconnected with the controlled terminals of the multiple MOS transistors, and the driving circuit includes:

[0006] A switching circuit, wherein the switching circuit is used to receive external control signals and to turn on / off according to the external control signals;

[0007] A pull-down circuit, wherein the input terminal of the pull-down circuit is connected to the switching circuit, and the pull-down circuit is used to pull down the voltage at the input terminal of the pull-down circuit and output a corresponding pull-down signal when the switching circuit is turned on / off;

[0008] A push-pull circuit is provided, wherein the input terminal of the push-pull circuit is connected to the output terminal of the switching circuit and the output terminal of the pull-down circuit. The push-pull circuit is used to output a corresponding drive signal to a plurality of MOS transistors according to the pull-down signal when the switching circuit is turned on / off, so as to drive the plurality of MOS transistors to work.

[0009] Optionally, the switching circuit includes a first NPN transistor, a first PNP transistor, and a second resistor. The base of the first NPN transistor is connected to the drive input terminal, the collector of the first NPN transistor is interconnected with the first terminal of the second resistor, the emitter of the first NPN transistor is grounded, the second terminal of the second resistor is connected to the base of the first PNP transistor, the emitter of the first PNP transistor is connected to a first DC power supply, and the collector of the first PNP transistor is connected to the output terminal of the switching circuit.

[0010] Optionally, the pull-down circuit includes a second PNP transistor and a third resistor. The base of the second PNP transistor is interconnected with the first end of the third resistor. The emitter of the second PNP transistor is connected to the output terminal of the switching circuit. The collector of the second PNP transistor and the second end of the third resistor are grounded.

[0011] Optionally, the push-pull circuit includes a second NPN transistor and a third PNP transistor. The base of the second NPN transistor is connected to the output terminal of the switching circuit, the collector of the second NPN transistor is connected to a first DC power supply, the emitter of the second NPN transistor is connected to the drive output terminal, the base of the third PNP transistor is connected to the output terminal of the switching circuit, the emitter of the third PNP transistor is connected to the drive output terminal, and the collector of the third PNP transistor is grounded.

[0012] Optionally, the driving circuit further includes a current limiting circuit, which is connected to the input terminal of the switching circuit and is used to limit the current in the driving circuit.

[0013] Optionally, the current limiting circuit includes a first resistor, a first end of which is connected to the input terminal of the current limiting circuit, and a second end of which is connected to the input terminal of the switching circuit.

[0014] The present invention also proposes a battery management system, which includes a plurality of MOSFETs and a driving circuit as described above. The output terminal of the driving circuit is interconnected with the controlled terminals of the plurality of MOSFETs, and the plurality of MOSFETs are arranged in parallel.

[0015] The present invention also proposes an electronic device comprising the battery management system described above.

[0016] This invention employs a switching circuit, a pull-down circuit, and a push-pull circuit. When the switching circuit receives an external control signal, it enters an on / off state. The pull-down circuit, when the switching circuit is on / off, lowers the input voltage to varying degrees and outputs a pull-down signal to the push-pull circuit. The push-pull circuit, when the switching circuit is on / off, outputs a corresponding drive signal based on the pull-down signal from the pull-down circuit to quickly drive the MOSFET to turn on or off, preventing the MOSFET from burning out due to prolonged periods of incomplete conduction or disconnection. This invention solves the problem of MOSFET burnout when the drive circuit is driving a heavily loaded MOSFET to turn on and off. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0018] Figure 1 This is a functional module diagram of an embodiment of the driving circuit of the present invention;

[0019] Figure 2 This is a schematic diagram of the circuit structure of an embodiment of the driving circuit of the present invention;

[0020] Figure 3 This is a functional module schematic diagram of another embodiment of the driving circuit of the present invention;

[0021] Figure 4 This is a functional module diagram of an embodiment of the battery management system of the present invention;

[0022] Figure 5 This is a schematic diagram of the functional modules of an embodiment of the electronic device of the present invention;

[0023] Figure 6 This is a schematic diagram of a circuit structure of an exemplary technology;

[0024] Figure 7 This is a schematic diagram of the circuit structure of another exemplary technology;

[0025] Figure 8 This is a schematic diagram of the circuit structure of an exemplary technology for driving circuits;

[0026] Figure 9 This is a schematic diagram of the circuit structure of another exemplary technology for driving circuits.

[0027] Explanation of icon numbers:

[0028]

[0029]

[0030] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0031] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0032] It should be noted that if the embodiments of the present invention involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0033] Furthermore, if the embodiments of this invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0034] This invention proposes a driving circuit.

[0035] Currently, the parallel connection method of MOSFETs in battery management systems on the market, such as Figure 6 B1-Bk represent the battery, Rs is the power sampling resistor, RL is the load, Qd1-Qdn are the discharging MOSFETs, Qc1-Qcn are the charging MOSFETs, B- is the total negative interface on the battery management system board, connected to the negative terminal of battery B1 via a wiring harness. P- is the negative interface of the load on the battery management system board, connected to the negative terminal of the load via a wiring harness. The charging or discharging MOSFETs are connected in parallel, and the capacitance between the gate and source terminals (GS) of the MOSFETs is also connected in parallel. When many charging or discharging MOSFETs are connected in parallel, the resulting capacitance cannot be ignored.

[0036] Figure 7 It is an equivalent connection circuit that moves the parasitic capacitances at the gate and gate terminals of the MOSFETs to the outside and connects them in parallel when multiple charging MOSFETs and discharging MOSFETs are connected in parallel.

[0037] Because the circuit requires a very large current to handle, multiple MOSFETs are connected in parallel. Therefore, each MOSFET is chosen with a high current-carrying capacity. However, the higher the current-carrying capacity of a MOSFET, the larger its internal parasitic capacitance, often exceeding ten nanofarads. The capacitance values ​​of the parallel capacitors are cumulative. Figure 7 The total capacitance Cd of the discharge MOSFET is calculated as shown in Formula 1, and the total capacitance Cc of the charging MOSFET is calculated as shown in Formula 2.

[0038] Cd=Cd1+Cd2+Cdn……………………Formula 1.

[0039] Cc=Cc1+Cc2+Ccn……………………Formula 2.

[0040] The essence of driving a MOSFET is charging and discharging the parasitic capacitance between its gate and source (GS). At low currents, the drive circuit is relatively easy to design. However, at higher currents, such as 100 amps, 200 amps, or even larger, the requirements for the MOSFET drive circuit become much higher. If not designed properly, the MOSFET can easily burn out. This is because during high-current operation, the MOSFETs are not disconnected simultaneously; they are disconnected one after the other. If the drive circuit is poorly designed, the time intervals can vary significantly, potentially by milliseconds. Furthermore, one MOSFET will always be the last to disconnect. The load that was originally distributed across all the MOSFETs will then be entirely applied to the last MOSFET to disconnect. If the drive circuit is poorly designed and the capacitor's discharge time is slow, the MOSFET can easily burn out.

[0041] Figure 8 This is one of the most common driver circuits on the market. VCC is the drive power supply, Q6 and Q8 are PNP transistors, Q7 and Q9 are NPN transistors, and R4 is a ground pull resistor. DRV_D is the discharge MOSFET drive signal output by the microcontroller or other dedicated chip, and DRV_DMOS is the voltage driving the discharge MOSFET after passing through a push-pull circuit. Cd is... Figure 7The total capacitance of the discharge MOSFETs. When DRV_D outputs a high level, Q7 and Q6 are turned on. The bases of Q8 and Q9 receive the drive level of the VCC power supply voltage, and the DRV_DMOS output receives a drive voltage of VCC-0.7V to drive the MOSFETs to operate. When DRV_D outputs a low level, Q7 and Q6 are turned off. The base of Q9 is pulled to ground by resistor R4 and is also turned off. The base of Q8 is pulled to ground by resistor R4, and the voltage on the equivalent capacitance Cd is discharged through Q8. When the current through the MOSFET is very small, this drive circuit can drive the MOSFET to turn off. However, when the current through the MOSFET is very large, this drive circuit cannot drive the MOSFET to turn off. This is because if the resistance of resistor R4 is too small in this drive circuit, it is easy to overheat and burn out. If the resistance of resistor R4 is too large, transistor Q8 cannot operate in a fully conducting state. The voltage across the equivalent capacitor Cd will discharge too slowly, resulting in a large current flowing through the MOSFET. When the MOSFET enters semi-conduction, a large voltage will be generated across its drain and source terminals (DS). At this point, the MOSFET will bear a large amount of power, causing it to overheat and burn out. Therefore, this type of drive circuit cannot drive a MOSFET with a large load. Similarly, when the MOSFET is driven under load, the current limiting effect of resistor R5 will cause the PNP transistor Q6 to start charging Cd before it is fully turned on, driving the MOSFET. This results in slow charging of Cd. Likewise, when the MOSFET enters semi-conduction, a large voltage will be generated across its drain and source terminals. Since the MOSFET is already under load, it will bear a large amount of power, causing it to overheat and burn out. This again demonstrates that this type of drive circuit cannot drive a MOSFET with a large load.

[0042] Figure 9 This is another type of drive circuit currently on the market. This type of drive circuit is... Figure 8The improvement to the driver circuit involves adding a PNP transistor Q10. This slightly improves the speed when disconnecting the MOSFET, but the overall performance of the driver circuit is not significantly improved. When the DRV_D output is low, NPN transistor Q7 is off, PNP transistor Q6 is also off, and the base of NPN transistor Q9 is pulled to ground by resistor R4, thus cutting off. The base level of PNP transistor Q10 is also pulled to ground by resistor R4. PNP transistor Q10 amplifies the base current of PNP transistor Q8, thus amplifying the emitter current of PNP transistor Q8. The voltage across the equivalent capacitance Cd is discharged through PNP transistor Q8. This circuit locally accelerates the voltage discharge of the equivalent capacitance Cd. However, in this driving circuit, when PNP transistor Q6 is off, the current consumed by R4 pull-down is too small, and the level of the network at point A is pulled down relatively slowly. This results in a slow turn-off speed for NPN transistor Q9, causing the voltage across the equivalent capacitance Cd of the MOSFET to discharge slowly. Ultimately, this leads to the MOSFET burning out under heavy load due to the long turn-off time and the large power it bears. Similarly, when DRV_D outputs a high level, NPN transistor Q7 and PNP transistor Q6 are turned on. However, during the turn-on process of PNP transistor Q6, a very small emitter current causes the A network to reach the VCC power supply voltage. This causes the base current of NPN transistor Q9 to be amplified by Q9 at a very small time. However, the amplified emitter current is also very small, resulting in a slow voltage rise rate across the equivalent capacitance Cd of the MOSFET. This leads to the MOSFET burning out under heavy load due to the long turn-on time and the large power it bears. Figure 9 The driver circuit does not prevent the MOSFET from burning out when it is turned on and off under heavy load. Therefore, this driver circuit cannot drive a MOSFET under heavy load.

[0043] Reference Figure 1 In one embodiment of the present invention, the driving circuit 100 is used to drive a plurality of MOS transistors, and the output terminal of the driving circuit 100 is interconnected with the controlled terminals of the plurality of MOS transistors. The driving circuit 100 includes:

[0044] A switching circuit 10 is used to receive external control signals and turn on / off according to the external control signals;

[0045] A pull-down circuit 20 is provided, the input terminal of which is connected to the switch circuit 10. The pull-down circuit 20 is used to pull down the voltage at the input terminal of the pull-down circuit 20 and output a corresponding pull-down signal when the switch circuit 10 is turned on / off.

[0046] A push-pull circuit 30 is provided, the input of which is connected to the output of the switch circuit 10 and the output of the pull-down circuit 20. The push-pull circuit 30 is used to output a corresponding drive signal to a plurality of MOS transistors according to the pull-down signal when the switch circuit 10 is turned on / off, so as to drive the plurality of MOS transistors to work.

[0047] In this embodiment, the controlled terminal of the switching circuit 10 in the driving circuit 100 can receive external control signals output by a microcontroller or other dedicated chip. The input terminal of the switching circuit 10 is also connected to the first DC power supply V1. When the external control signal received by the switching circuit 10 is a high-level electrical signal, the switching circuit 10 will be in the on state. When the switching circuit 10 is in the on state, the first DC power supply V1 will be output to the pull-down circuit 20 and the push-pull circuit 30 through the switching circuit 10. When the switching circuit 10 is in the on state, the pull-down circuit 20 will pull down the voltage of the first DC power supply V1, but only by a very small value. Therefore, the first DC power supply V1 The voltage change at the output to the push-pull circuit 30 is very small. At this time, the push-pull circuit 30 will output a high-level drive signal to multiple parallel MOSFETs to turn on the multiple MOSFETs. When the external control signal received by the switching circuit 10 is a low-level electrical signal, the switching circuit 10 will be in the open state. When the switching circuit 10 is in the open state, the first DC power supply V1 will not be output to the pull-down circuit 20 and the push-pull circuit 30. At this time, the pull-down circuit 20 will quickly pull down the voltage at the input terminal of the pull-down circuit 20, which is also the input terminal of the push-pull circuit 30, so that the push-pull circuit 30 outputs a low-level drive signal to multiple parallel MOSFETs to turn off the MOSFETs.

[0048] Understandably, the push-pull circuit 30 shortens the time for the drive signal to transition from low to high and from high to low, thus enabling the MOSFET to turn on and off more quickly. Because multiple MOSFETs are connected in parallel, one will be the last to turn off. The load originally distributed across the MOSFETs will then be entirely applied to the last MOSFET to turn off. Therefore, when the MOSFET is not fully turned on, there will be a large voltage across its drain and source terminals (DS), causing it to bear a large amount of power and potentially burn out. Conversely, a longer off-time will also cause the MOSFET to bear a large amount of power and burn out. Therefore, shortening the time for the drive signal to transition from low to high and from high to low effectively prevents the MOSFET from burning out during operation. The drive circuit 100 also provides short-circuit protection, the principle of which is the same as the principle by which the drive circuit 100 controls the MOSFET to turn off.

[0049] This invention addresses the problem of MOSFETs burning out when driven by a switch circuit 10, a pull-down circuit 20, and a push-pull circuit 30. When the switch circuit 10 receives an external control signal, it is in an on / off state. The pull-down circuit 20 lowers the input voltage to varying degrees and outputs a pull-down signal to the push-pull circuit 30 when the switch circuit 10 is in an on / off state. The push-pull circuit 30 then outputs a corresponding drive signal based on the pull-down signal from the pull-down circuit 20 to quickly drive the MOSFET to turn on or off, preventing the MOSFET from burning out due to prolonged periods of incomplete conduction or disconnection. This invention solves the problem of MOSFETs easily burning out when driven by a drive circuit 100 to turn on and off under heavy loads.

[0050] Reference Figure 2 and Figure 3 In one embodiment, the switching circuit 10 includes a first NPN transistor Q1, a first PNP transistor Q2, and a second resistor R2. The base of the first NPN transistor Q1 is connected to the drive input terminal, the collector of the first NPN transistor Q1 is interconnected with the first end of the second resistor R2, the emitter of the first NPN transistor Q1 is grounded, the second end of the second resistor R2 is connected to the base of the first PNP transistor Q2, the emitter of the first PNP transistor Q2 is connected to the first DC power supply V1, and the collector of the first PNP transistor Q2 is connected to the output terminal of the switching circuit 10.

[0051] In this embodiment, the second resistor R2 acts as a current-limiting resistor to prevent excessive current from damaging the first NPN transistor Q1 and the first PNP transistor Q2. When the switching circuit 10 receives a high-level external control signal, the first NPN transistor Q1 is turned on, and the base level of the first PNP transistor Q2 is pulled to ground, so the first PNP transistor Q2 is turned on. At this time, the switching circuit 10 is in the on state, and the first DC power supply V1 can be output to the pull-down circuit 20 and the push-pull circuit 30 through the switching circuit 10. When the switching circuit 10 receives a low-level external control signal, the first NPN transistor Q1 is turned off, so the first PNP transistor Q2 is also turned off. At this time, the switching circuit 10 is in the off state, and the first DC power supply V1 cannot be output to the pull-down circuit 20 and the push-pull circuit 30 through the switching circuit 10. In this embodiment, the switching circuit 10 can be turned on / off depending on the level of the received external control signal, so that the pull-down circuit 20 and the push-pull circuit 30 can / cannot receive the first DC power supply V1.

[0052] Reference Figure 2, in one embodiment, the pull-down circuit 20 includes a second PNP transistor Q3 and a third resistor R3. The base of the second PNP transistor Q3 is interconnected with the first end of the third resistor R3. The emitter of the second PNP transistor Q3 is connected to the output end of the switch circuit 10. The collector of the second PNP transistor Q3 and the second end of the third resistor R3 are grounded.

[0053] In this embodiment, the base of the second PNP transistor Q3 is grounded through the third resistor R3, so the second PNP transistor Q3 is always in the conducting state. When the switch circuit 10 is turned on, the first DC power supply V1 can be output to the pull-down circuit 20 through the switch circuit 10. The base current of the second PNP transistor Q3 is too small. Although the emitter current of the second PNP transistor Q3 is amplified by dozens of times based on the emitter current of the second PNP transistor Q3, the emitter current of the second PNP transistor Q3 is very small. Therefore, the power consumed by the second PNP transistor Q3 is small, and the voltage of the emitter of the second PNP transistor Q3 to the ground can still be maintained at the power supply voltage of the first DC power supply V1. When the switch circuit 10 is turned off, there is always current at the emitter of the second PNP transistor Q3, so the voltage at the input end of the pull-down circuit 20 and the input end of the push-pull circuit 30 can be quickly discharged to the ground.

[0054] It can be understood that in order to accelerate the disconnection process, the third resistor R3 should take a suitable value. The current Ib at the base of the second PNP transistor Q3 = (Vcc - Vd) / R; Vcc is the voltage value of the first DC power supply V1, R is the resistance value of the third resistor R3, and Vd is the conduction voltage of the diode between the emitter and the base of the second PNP transistor Q3. The current Ic at the collector of the second PNP transistor Q3 = β * Ib, where β is the amplification factor of the second PNP transistor Q3. The actual power W of the second PNP transistor Q3 = Vcc * Ic. The power Pc that the second PNP transistor Q3 itself can withstand and the actual power W should satisfy the relationship: Pc * 15% < W < Pc * 40%. From this, the value range of the resistance value of the third resistor R3 can be obtained.

[0055] Refer to Figure 2 , in one embodiment, the push-pull circuit 30 includes a second NPN transistor Q4 and a third PNP transistor Q5. The base of the second NPN transistor Q4 is connected to the output end of the switch circuit 10. The collector of the second NPN transistor Q4 is connected to the first DC power supply V1. The emitter of the second NPN transistor Q4 is connected to the drive output end. The base of the third PNP transistor Q5 is connected to the output end of the switch circuit 10. The emitter of the third PNP transistor Q5 is connected to the drive output end. The collector of the third PNP transistor Q5 is grounded.

[0056] In this embodiment, when the switching circuit 10 is turned on, the first DC power supply V1 can be output to the push-pull circuit 30 through the switching circuit 10. Since the pull-down circuit 20 has a low pull-down voltage at this time, the voltage received by the push-pull circuit 30 can be considered as the voltage of the first DC power supply V1. The base of the second NPN transistor Q4 receives a high level, and Q4 is turned on. The base of the third PNP transistor Q5 receives a high level, and Q5 is turned off. The push-pull circuit 30 outputs a high-level drive signal to multiple parallel MOSFETs, causing the MOSFETs to... When the S-channel MOSFET is turned on, and the switching circuit 10 is turned off, the first DC power supply V1 cannot be output to the push-pull circuit 30 through the switching circuit 10. The pull-down circuit 20 will then quickly pull the voltage down, so the voltage received by the push-pull circuit 30 is a low-level voltage. The base of the second NPN transistor Q4 receives a low level, and Q4 is turned off. The base of the third PNP transistor Q5 receives a low level, and Q5 is turned on. The push-pull circuit 30 outputs a low-level drive signal to multiple parallel MOSFETs, causing them to turn off. In this embodiment, the push-pull circuit 30 shortens the time required for the drive signal to transition from low to high and from high to low.

[0057] Reference Figure 2 In one embodiment, the driving circuit 100 further includes a current limiting circuit 40, which is connected to the input terminal of the switching circuit 10 and is used to limit the current in the driving circuit 100.

[0058] The current limiting circuit 40 includes a first resistor R1, the first end of which is connected to the input terminal of the current limiting circuit 40, and the second end of which is connected to the input terminal of the switching circuit 10.

[0059] In this embodiment, the driving circuit 100 also includes a current limiting circuit 40. The current limiting circuit 40 can be composed of a first resistor R1. The resistance value of the first resistor R1 can be set according to the voltage output from the microcontroller or other dedicated chip to the driving circuit 100. If the voltage output from the microcontroller or other dedicated chip to the driving circuit 100 is large, such as 10V, then the resistance value of the first resistor R1 should also be set high to prevent excessive current from damaging the components in the circuit. If the voltage output from the microcontroller or other dedicated chip to the driving circuit 100 is large, such as 3V, then the resistance value of the first resistor R1 needs to be set low to prevent insufficient current from affecting normal operation. In this embodiment, the current limiting circuit 40 can limit the current magnitude, enabling the driving circuit 100 to operate normally.

[0060] To better illustrate the inventive concept of this invention, the following description is provided in conjunction with the above embodiments:

[0061] Reference Figure 2 When the MOSFET is under heavy load and conducting: When the external control signal output by the microcontroller or other dedicated chip is high, the first NPN transistor Q1 conducts, the first PNP transistor Q2 also conducts, and the second NPN transistor Q4 also conducts. This causes the push-pull circuit 30 to output a high level close to the VCC power supply voltage, charging the equivalent capacitance of the MOSFET and enabling the MOSFET to conduct. At this time, the output level of the switching circuit 10 in the drive circuit 100 is the voltage level of the first DC power supply V1. The base current of the second PNP transistor Q3 is too small. Although the emitter current of the second PNP transistor Q3 is amplified by tens of times compared to the base current of the third PNP transistor Q5, the emitter current of the second PNP transistor Q3 is still relatively small, and the power consumed by the second PNP transistor Q3 is still relatively small. The voltage between the emitter and ground of the second PNP transistor Q3 can still be maintained at the voltage of the first DC power supply V1. Meanwhile, because the emitter current of the second PNP transistor Q3 is also the base current of the third PNP transistor Q5, and the emitter current of the third PNP transistor Q5 is amplified by tens of times compared to its base current, before the second NPN transistor Q4 is fully turned on, its emitter current is pulled to ground by the third PNP transistor Q5. Only after the second NPN transistor Q4 is fully turned on, and its emitter current is strong enough, can it quickly charge the equivalent capacitance of the MOSFET, causing the MOSFET to close quickly. During this process, the third PNP transistor Q5 absorbs some of the current from the second NPN transistor Q4 to ground, but since it is not fully turned on, the power consumed by the third PNP transistor Q5 is relatively small. Similarly, during the conduction of the first PNP transistor Q2, its collector current is also consumed. After the first PNP transistor Q2 is fully turned on, if its collector current is strong enough, it can quickly drive the second NPN transistor Q4 to turn on, and also accelerate the charging of the equivalent capacitance of the MOSFET, enabling the MOSFET to close quickly. This allows the MOSFET to achieve rapid closing under heavy load.

[0062] When the MOSFET is disconnected under heavy load: When the external control signal output by the microcontroller or other dedicated chip is low, the first NPN transistor Q1 is cut off, and the first PNP transistor Q2 is also cut off. At this time, the input terminal of the pull-down circuit 20 in the driver circuit 100 is in a high-impedance state. Since the base of the second PNP transistor Q3 is pulled down by the third resistor R3, there is always current at the emitter of the second PNP transistor Q3, which quickly discharges the voltage at the input terminal of the pull-down circuit 20 to ground, allowing the second NPN transistor Q4 to be cut off quickly. Because the emitter current of the third PNP transistor Q5 is amplified through the two terminals of the second PNP transistor Q3 and the third PNP transistor Q5, the voltage of the equivalent capacitance of the MOSFET can be discharged to ground even more quickly. Thus, the MOSFET can achieve fast disconnection under heavy load.

[0063] The base of the second PNP transistor Q3 is not connected to the collector of the first PNP transistor Q2; instead, the emitter of the second PNP transistor Q3 is connected to the collector of the first PNP transistor Q2. The resistance of the third resistor R3 cannot be too large or too small. If the resistance of the third resistor R3 is too small, the second PNP transistor Q3 will be in saturation and burn out; if the resistance of the third resistor R3 is too large, the current amplification factor of the second PNP transistor Q3 will be too small, and the current amplification factor of the third PNP transistor Q5 will also be small. Therefore, the voltage of the equivalent capacitor cannot be discharged quickly. Thus, the resistance of the third resistor R3 must be appropriate so that the third PNP transistor Q5 can enter a fully conductive state to ground, allowing the voltage of the equivalent capacitor to be discharged quickly. The range of the resistance value of the third resistor R3 has been described in the above embodiments. In this way, the driving circuit 100 of the present invention can achieve MOS transistor heavy-load disconnection.

[0064] The present invention also proposes a battery management system 200.

[0065] Reference Figure 4 In one embodiment, the battery management system 200 includes a plurality of MOSFETs and a driving circuit 100 as described above. The output terminal of the driving circuit 100 is interconnected with the controlled terminals of the plurality of MOSFETs, and the plurality of MOSFETs are connected in parallel. The specific structure of the driving circuit 100 is as described in the above embodiments. Since the battery management system 200 adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be described in detail here. It is understood that the battery management system 200 is not limited to including the driving circuit 100 and the plurality of MOSFETs; any MOSFET that needs to carry a heavy load can be driven by the driving circuit 100 of the present invention.

[0066] The present invention also proposes an electronic device.

[0067] Reference Figure 5In one embodiment, the electronic device includes the battery management system 200 as described above. The specific structure of the battery management system 200 is the same as described in the above embodiments. Since this electronic device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here.

[0068] The above description is merely an optional embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformations made using the contents of the present invention's specification and drawings under the technical concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A driving circuit for driving a plurality of MOSFETs, wherein the output terminal of the driving circuit is interconnected with the controlled terminals of the plurality of MOSFETs, characterized in that, The driving circuit includes: A switching circuit, wherein the switching circuit is used to receive external control signals and to turn on / off according to the external control signals; A pull-down circuit, wherein the input terminal of the pull-down circuit is connected to the output terminal of the switching circuit, and the pull-down circuit is used to pull down the voltage at the input terminal of the pull-down circuit and output a corresponding pull-down signal when the switching circuit is turned on / off; A push-pull circuit, wherein the input terminal of the push-pull circuit is connected to the output terminal of the switching circuit and the output terminal of the pull-down circuit, and the push-pull circuit is used to output a corresponding drive signal to a plurality of MOS transistors according to the pull-down signal when the switching circuit is turned on / off, so as to drive the plurality of MOS transistors to work; The pull-down circuit includes a second PNP transistor and a third resistor. The base of the second PNP transistor is interconnected with the first end of the third resistor. The emitter of the second PNP transistor is connected to the output terminal of the switching circuit. The collector of the second PNP transistor and the second end of the third resistor are grounded.

2. The driving circuit as described in claim 1, characterized in that, The switching circuit includes a first NPN transistor, a first PNP transistor, and a second resistor. The base of the first NPN transistor is used to receive an external control signal. The collector of the first NPN transistor is interconnected with the first terminal of the second resistor. The emitter of the first NPN transistor is grounded. The second terminal of the second resistor is connected to the base of the first PNP transistor. The emitter of the first PNP transistor is connected to a first DC power supply. The collector of the first PNP transistor is connected to the output terminal of the switching circuit.

3. The driving circuit as described in claim 1, characterized in that, The push-pull circuit includes a second NPN transistor and a third PNP transistor. The base of the second NPN transistor is connected to the output terminal of the switching circuit, the collector of the second NPN transistor is connected to a first DC power supply, the emitter of the second NPN transistor is connected to the drive output terminal, the base of the third PNP transistor is connected to the output terminal of the switching circuit, the emitter of the third PNP transistor is connected to the drive output terminal, and the collector of the third PNP transistor is grounded.

4. The driving circuit as described in claim 1, characterized in that, The driving circuit also includes a current limiting circuit, which is connected to the input terminal of the switching circuit and is used to limit the current in the driving circuit.

5. The driving circuit as described in claim 4, characterized in that, The current limiting circuit includes a first resistor, a first end of which is connected to the input terminal of the current limiting circuit, and a second end of which is connected to the input terminal of the switching circuit.

6. A battery management system, characterized in that, The battery management system includes a plurality of MOSFETs and a driving circuit as described in any one of claims 1-5, wherein the output terminal of the driving circuit is interconnected with the controlled terminals of the plurality of MOSFETs, and the plurality of MOSFETs are arranged in parallel.

7. An electronic device, characterized in that, The electronic device includes the battery management system as described in claim 6.

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