Data transmission method, device, computer equipment and storage medium

Abstract

The present invention provides a data transmission method, device, computer equipment and storage medium. The method comprises: a transmitting board stores each data bit in a current data frame in turn into a plurality of data transmission cache queues; after reframing all data bits in each data transmission cache queue, a node data frame corresponding to each transmitting module is obtained; each receiving module stores each data bit in a node data frame in turn into a corresponding data receiving cache queue; the receiving board reorganizes the data bits in all data receiving cache queues to obtain the current data frame; the problems of poor anti-interference and low transmission efficiency in the data transmission method in the prior art are solved, and the data transmission efficiency is improved by packetizing the data frame into a plurality of channels for parallel transmission; data bits are stored by a plurality of data transmission cache queues and a corresponding plurality of data receiving cache queues, thereby improving the anti-interference of data transmission.

Description

Technical Field

[0001] The present invention relates to the technical field of wireless data transmission, and in particular to a data transmission method, device, computer equipment and storage medium. Background Art

[0002] In recent years, with the development of electronic technology and computer technology, wireless communication technology has been involved in various fields. Traditional short-range wireless data transmission methods include Zig-Bee, BlueTooth, wifi, etc. For Zig-Bee communication, its transmission rate is low, usually 20~250Kbit / s, and its anti-interference performance is poor; for BlueTooth communication, the system stability is poor, and in complex space environments, it is seriously interfered by noise signals; for wifi communication, the system power consumption is large and the security is poor.

[0003] It can be seen that the wireless data transmission method in the prior art has the problems of poor anti-interference and low transmission efficiency, and does not meet the wireless transmission requirements. Summary of the invention

[0004] In view of the deficiencies in the prior art, the data transmission method, device, computer equipment and storage medium provided by the present invention solve the problems of poor anti-interference and low transmission efficiency in the data transmission method in the prior art, and improve the data transmission efficiency by packetizing data frames to multiple channels for parallel transmission; data bits are stored by multiple data transmission cache queues and corresponding multiple data reception cache queues, thereby improving the anti-interference performance of data transmission.

[0005] In a first aspect, the present invention provides a data transmission method, which uses a data transmission device, wherein the data transmission device includes a transmitting board arranged at a data sending end, a plurality of transmitting modules connected to the transmitting board, a receiving board arranged at a data receiving end, and a plurality of receiving modules corresponding to the plurality of transmitting modules and connected to the receiving board; the transmission method includes: establishing a plurality of data transmission cache queues corresponding to the plurality of transmitting modules, and a plurality of data receiving cache queues corresponding to the plurality of receiving modules; the transmitting board stores each data bit in a current data frame into the plurality of data transmission cache queues in sequence; after reframing all the data bits in each data transmission cache queue, a node data frame corresponding to each transmitting module is obtained, so that the transmitting module wirelessly transmits the node data frame to the corresponding receiving module; each receiving module stores each data bit in the node data frame into the corresponding data receiving cache queue in sequence; the receiving board reorganizes the data bits in all data receiving cache queues to obtain the current data frame.

[0006] Optionally, the transmitting board stores each data bit in the current data frame into the multiple data transmission cache queues in sequence, including: obtaining the cycle period for storing all data bits in the data transmission cache queue according to the total number of data bits in the current data frame and the total number of queues of the data transmission cache queues; obtaining the cache number of each data bit according to the cycle number of each cycle period and the queue number of each data transmission cache queue; and storing each data bit and the cache number of each data bit together into the corresponding data transmission cache queue.

[0007] Optionally, the receiving board reorganizes the data bits in all data receiving cache queues to obtain the current data frame, including: the receiving board obtains all data bits in all data receiving cache queues and the cache numbers corresponding to the data bits; classifies and arranges all data bits according to the cycle numbers in the cache numbers to obtain preprocessed data frames; sorts the preprocessed data frames according to the queue numbers in the cache numbers to obtain the current data frame.

[0008] Optionally, when the data transmission device also includes a backup transmitting module and a corresponding backup receiving module, the pre-processed data frame is sorted according to the queue number in the cache number to obtain the current data frame, including: sorting the pre-processed data frame according to the queue number in the cache number to obtain a sorted data frame; judging whether there is an abnormality in the sorted data frame; when there is no abnormality in the sorted data frame, using the sorted data frame as the current data frame.

[0009] Optionally, when the data transmission device also includes a backup transmitting module and a corresponding backup receiving module, the method also includes: when there is an exception in the sorted data frame, obtaining the target queue number where the exception occurs according to the cache number; the backup transmitting module retransmits all target data bits in the corresponding target data transmission cache queue according to the target queue number, so that the backup receiving module receives all target data bits; and inserting all target data bits into the sorted data frame according to the target queue numbers and cycle numbers of all target data bits to obtain the current data frame.

[0010] Optionally, after obtaining the target queue number where the exception occurs according to the cache number, the method also includes: the transmitting board removes the data transmission cache queue corresponding to the target queue number from the multiple data transmission cache queues to obtain multiple data sending cache update queues; the transmitting board stores each data bit in the next data frame into the multiple data sending cache update queues in sequence, so that the multiple transmitting modules send the data bits in the multiple data sending cache update queues to the multiple receiving modules.

[0011] Optionally, before each data bit in the current data frame of the transmitting board is stored in the multiple data transmission cache queues in turn, the method also includes: obtaining the communication parameters of each data transmission module according to different combinations of two pulse repetition rates and multiple center frequencies, so that the receiving board determines the identity of the data transmission module according to the communication parameters of each data transmission module.

[0012] In a second aspect, the present invention provides a data transmission device, which includes: a transmitting board arranged at a data sending end, a plurality of transmitting modules connected to the transmitting board, a receiving board arranged at a data receiving end, and a plurality of receiving modules corresponding to the plurality of transmitting modules and connected to the receiving board; the transmitting board is used to establish a plurality of data transmitting cache queues corresponding to the plurality of transmitting modules, and the receiving board is used to establish a plurality of data receiving cache queues corresponding to the plurality of receiving modules; the transmitting board is also used to store each data bit in a current data frame in turn into the plurality of data transmitting cache queues; each transmitting module is used to reframe all data bits in each data transmitting cache queue to obtain a node data frame corresponding to each transmitting module, and is also used to wirelessly transmit the node data frame to a corresponding receiving module; each receiving module is used to store each data bit in a node data frame in turn into a corresponding data receiving cache queue; the receiving board is used to reorganize the data bits in all data receiving cache queues to obtain the current data frame.

[0013] In a third aspect, the present invention provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program: establishing multiple data transmission cache queues corresponding to the multiple transmission modules, and multiple data reception cache queues corresponding to the multiple reception modules; the transmission board stores each data bit in the current data frame into the multiple data transmission cache queues in sequence; after reframing all the data bits in each data transmission cache queue, a node data frame corresponding to each transmission module is obtained, so that the transmission module wirelessly transmits the node data frame to the corresponding reception module; each reception module stores each data bit in the node data frame into the corresponding data reception cache queue in sequence; the reception board reorganizes the data bits in all the data reception cache queues to obtain the current data frame.

[0014] In a fourth aspect, the present invention provides a readable storage medium having a computer program stored thereon, wherein the computer program implements the following steps when executed by a processor: establishing multiple data transmission cache queues corresponding to the multiple transmission modules and multiple data reception cache queues corresponding to the multiple reception modules; the transmission board stores each data bit in the current data frame in turn into the multiple data transmission cache queues; after reframing all the data bits in each data transmission cache queue, a node data frame corresponding to each transmission module is obtained, so that the transmission module wirelessly transmits the node data frame to the corresponding reception module; each reception module stores each data bit in the node data frame in turn into the corresponding data reception cache queue; the reception board reorganizes the data bits in all the data reception cache queues to obtain the current data frame.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] The present invention splits all data bits in a data frame to be sent, stores them in a plurality of data transmission cache queues respectively, frames and sends the data bits in the plurality of data transmission cache queues respectively through a plurality of transmission modules, so that a plurality of receiving modules in a receiving end respectively store the received plurality of data bits in a plurality of corresponding data receiving cache queues, and finally a viewing receiving board reorganizes the data in all the data receiving cache queues to obtain a number of frames sent by the current transmitting end; therefore, the present invention divides the data frame into packets for parallel transmission in a plurality of channels through a multi-channel transmission module and a corresponding multi-channel receiving module, thereby greatly improving the data transmission efficiency; and through a plurality of data transmission cache queues and a corresponding plurality of data receiving cache queues, the problem of data loss when the processing efficiency is not matched or the environmental interference is strong in the processes of data reception, data transmission, data framing, etc. is prevented, thereby improving the anti-interference and fault tolerance of data transmission, thereby achieving the purpose of improving the accuracy of data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 FIG. 1 is a flow chart of a data transmission method provided by an embodiment of the present invention;

[0018] Figure 2 FIG. 1 is a schematic diagram of the structure of a data transmission device provided by an embodiment of the present invention;

[0019] Figure 3 Shown Figure 1 Specific flow diagram of step S102;

[0020] Figure 4 Shown Figure 1 Specific flow diagram of step S105;

[0021] Figure 5 FIG. 4 is a flow chart of another data transmission method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0023] In a first aspect, the present invention provides a data transmission method, which specifically includes the following embodiments:

[0024] Figure 1 FIG. 1 is a flow chart of a data transmission method provided by an embodiment of the present invention; Figure 1 As shown, the data transmission method specifically includes the following steps:

[0025] Step S101 : establishing a plurality of data transmission buffer queues corresponding to the plurality of transmission modules and a plurality of data reception buffer queues corresponding to the plurality of reception modules.

[0026] In this embodiment, the data transmission method is applied in a data transmission device, such as Figure 2 As shown, the data transmission device 100 includes a transmitting board arranged at a data sending end, a plurality of transmitting modules connected to the transmitting board, a receiving board arranged at a data receiving end, and a plurality of receiving modules corresponding to the plurality of transmitting modules and connected to the receiving board.

[0027] It should be noted that the transmitting board establishes a data transmission cache queue corresponding to each transmitting module, so that the data transmission cache queue stores the data to be sent by the corresponding data transmitting module; the receiving board establishes a data receiving cache queue corresponding to each receiving module, so that the data receiving cache queue stores the data received by the corresponding data receiving module.

[0028] Step S102: the transmitting board stores each data bit in the current data frame into the multiple data transmission buffer queues in sequence.

[0029] In this embodiment, if Figure 3 As shown, the transmitting board stores each data bit in the current data frame into the multiple data transmission buffer queues in sequence, which specifically includes the following steps:

[0030] Step S201, obtaining a cycle period for storing all data bits in the data transmission cache queue according to the total number of data bits in the current data frame and the total number of queues in the data transmission cache queue;

[0031] It should be noted that the current data frame includes multiple data bits, each of which includes one or more bytes, the total number of data bits is the number of data bits included in the current data frame, the total number of queues is the total number of data transmission cache queues, and the cycle period for storing all data bits in the data transmission cache queue is obtained according to the quotient of the total number of data bits and the total number of queues; when there is no remainder, the cycle period is the quotient of the total number of data bits and the total number of queues; when there is a remainder, the cycle period is the quotient of the total number of data bits and the total number of queues plus 1; for example, when the total number of data bits is 24 and the total number of queues is 8, the cycle period is 3; when the total number of data bits is 25 and the total number of queues is 8, the cycle period is 4.

[0032] Step S202, obtaining a cache number for each data bit according to the cycle number of each cycle and the queue number of each data transmission cache queue;

[0033] It should be noted that, if the cycle period is 3, each cycle period is numbered 1, 2 and 3 respectively; if the total number of queues is 8, each queue is numbered 1, 2, 3, 4, 5, 6, 7 and 8 respectively, and the cache number of each data bit is 11, 12, 13...18; 21, 22, 23...28; 31, 32, 33...38 respectively.

[0034] Step S203: storing each data bit and the buffer number of each data bit together into a corresponding data transmission buffer queue.

[0035] In this embodiment, the data format of the current data frame is as shown in Table 1:

[0036] Table 1

[0037] DATA1 DATA2 DATA3 DATA4 …… DATA22 DATA23 DATA24

[0038] After the current data frame is stored in 8 data transmission buffer queues, it can be shown as Table 2:

[0039] Table 2

[0040]

[0041] Step S103, after reframing all data bits in each data transmission buffer queue, a node data frame corresponding to each transmission module is obtained, so that the transmission module wirelessly transmits the node data frame to the corresponding receiving module.

[0042] It should be noted that, as shown in Table 2, the data bits stored in the data transmission cache queue with queue number 1 are: DATA1, DATA9 and DATA17, then the transmitting module 1 frames all the data bits stored in the data transmission cache queue with queue number 1 and the cache number corresponding to the data bit to obtain node data frame 1, and the transmitting module 1 sends the node data frame 1 to the receiving module 1 via wireless transmission; the working process and working principle of other transmitting modules are the same as those of the above-mentioned transmitting module 1, and will not be repeated here.

[0043] Step S104: Each receiving module stores each data bit in the node data frame in turn into a corresponding data receiving buffer queue.

[0044] It should be noted that the form in which each receiving module stores each data bit in the node data frame into the corresponding data receiving cache queue in sequence is the reverse operation of the above step S103, and the final data bit storage form is the same as the above Table 2.

[0045] Step S105 , the receiving board reorganizes the data bits in all data receiving buffer queues to obtain the current data frame.

[0046] In this embodiment, if Figure 4 As shown, the receiving board reorganizes the data bits in all data receiving cache queues to obtain the current data frame, including:

[0047] Step S301, the receiving board obtains all data bits in all data receiving buffer queues and buffer numbers corresponding to the data bits;

[0048] Step S302, classifying and arranging all data bits according to the cycle number in the cache number to obtain a pre-processed data frame;

[0049] Step S303: sort the pre-processed data frames according to the queue numbers in the cache numbers to obtain the current data frames.

[0050] It should be noted that all the data bits acquired by the receiving board may be out of order, for example: 23, DATA11; 31, DATA17; 14, DATA4; ..., 11, DATA1; therefore, when sorting the above-mentioned out-of-order data bits: first, it is necessary to classify them according to the cycle number of each data bit, and put the data bits with the same cycle number together to obtain the pre-processed data frame, for example: 14, DATA4, 11, DATA1, 13, DATA3; ..., 38, DATA24, 31, DATA17; secondly, sort the pre-processed data frames in order from small to large according to the queue number, for example: 11, DATA1, 12, DATA3, 13, DATA3; ..., 37, DATA23, 38, DATA24, so as to obtain the current data frame sent by the transmitter.

[0051] Compared with the prior art, the present invention has the following beneficial effects:

[0052] The present invention splits all data bits in a data frame to be sent, stores them in a plurality of data transmission cache queues respectively, frames and sends the data bits in the plurality of data transmission cache queues respectively through a plurality of transmission modules, so that a plurality of receiving modules in a receiving end respectively store the received plurality of data bits in a plurality of corresponding data receiving cache queues, and finally a viewing receiving board reorganizes the data in all the data receiving cache queues to obtain a number of frames sent by the current transmitting end; therefore, the present invention divides the data frame into packets for parallel transmission to a plurality of channels through a multi-channel transmission module and a corresponding multi-channel receiving module, thereby greatly improving the data transmission efficiency; and storing the data bits through a plurality of data transmission cache queues and a corresponding plurality of data receiving cache queues, thereby preventing the problem of data loss when the processing efficiency is not matched or the environmental interference is strong during the processes of data reception, data transmission, data framing, etc., thereby improving the anti-interference and fault tolerance of data transmission, thereby achieving the purpose of improving the accuracy of data transmission.

[0053] In another embodiment of the present invention, when the data transmission device also includes a backup transmitting module and a corresponding backup receiving module, the pre-processed data frame is sorted according to the queue number in the cache number to obtain the current data frame, including: sorting the pre-processed data frame according to the queue number in the cache number to obtain a sorted data frame; judging whether there is an abnormality in the sorted data frame; when there is no abnormality in the sorted data frame, using the sorted data frame as the current data frame.

[0054] In this embodiment, when the data transmission device also includes a backup transmitting module and a corresponding backup receiving module, the method also includes: when there is an exception in the sorted data frame, obtaining the target queue number where the exception occurs according to the cache number; the backup transmitting module retransmits all target data bits in the corresponding target data transmission cache queue according to the target queue number, so that the backup receiving module receives all target data bits; according to the target queue numbers and cycle numbers of all target data bits, all target data bits are inserted into the sorted data frame to obtain the current data frame.

[0055] It should be noted that in this embodiment, when a certain transmitting module or a certain receiving module fails, the data bits in the corresponding data transmission cache queue cannot be sent or received. The data in the abnormal data transmission cache queue is resent to the spare receiving module through the spare transmitting module, so that the receiving board inserts the received retransmitted data bits into the previously received data frame to combine into the current data frame.

[0056] In another embodiment of the present invention, after obtaining the target queue number where the exception occurs according to the cache number, the method further includes: the transmitting board removes the data transmission cache queue corresponding to the target queue number from the multiple data transmission cache queues to obtain multiple data sending cache update queues; the transmitting board stores each data bit in the next data frame into the multiple data sending cache update queues in sequence, so that the multiple transmitting modules send the data bits in the multiple data sending cache update queues to the multiple receiving modules.

[0057] In another embodiment of the present invention, before each data bit in the current data frame of the transmitting board is sequentially stored in the multiple data transmission buffer queues, the method further includes:

[0058] According to different combinations of two pulse repetition rates and multiple center frequencies, the communication parameters of each data transmission module are obtained, so that the receiving board determines the identity of each data transmission module according to the communication parameters of each data transmission module.

[0059] It should be noted that in this embodiment, the multiple transmitting modules and the multiple receiving modules are all ultra-wideband transceiver modules. In an environment with complex space or severe signal interference, ultra-wideband technology is used for wireless communication to enable safe and effective data transmission.

[0060] In this embodiment, 8 wireless transceiver channels are included, that is, 8 transmitting modules and 8 receiving modules. The pulse repetition rates (PRF) of transmitting modules 1 to transmitting modules 4 and receiving modules 1 to receiving modules 4 are set to 16 MHz, wherein the center frequencies of each transmitting module are 3494.4 MHz, 3993.6 MHz, 4492.8 MHz, and 6489.6 MHz, respectively, and the frequency bandwidth of each node is 499.2 MHz, so that the frequency bands of transmitting / receiving modules 1 to 4 do not interfere with each other, and the four nodes can work simultaneously.

[0061] Furthermore, the pulse repetition rate of the transmitting / receiving modules 5 to 8 is 64MHz, and the center frequencies are 3494.4MHz, 3993.6MHz, 4492.8MHz, and 6489.6MHz, respectively, and the frequency bandwidth of each node is 499.2MHz. The frequency bands of the transmitting / receiving modules 5 to 8 do not interfere with each other, and four nodes can work at the same time. Among them, the PRFs of 16MHz and 64MHz can coexist on the same physical channel without interference, so that eight channels can work simultaneously without interfering with each other.

[0062] In a second aspect, the present invention provides a data transmission device, which specifically includes the following embodiments:

[0063] like Figure 2 As shown, the data transmission device includes: a transmitting board arranged at a data transmitting end, a plurality of transmitting modules connected to the transmitting board, a receiving board arranged at a data receiving end, and a plurality of receiving modules corresponding to the plurality of transmitting modules and connected to the receiving board;

[0064] The transmitting board is used to establish a plurality of data transmission buffer queues corresponding to the plurality of transmitting modules, and the receiving board is used to establish a plurality of data receiving buffer queues corresponding to the plurality of receiving modules; the transmitting board is also used to store each data bit in the current data frame in the plurality of data transmission buffer queues in sequence;

[0065] Each transmitting module is used to reframe all data bits in each data transmission cache queue to obtain a node data frame corresponding to each transmitting module, and is also used to wirelessly transmit the node data frame to the corresponding receiving module; each receiving module is used to store each data bit in the node data frame in turn into the corresponding data receiving cache queue; the receiving board is used to reorganize the data bits in all data receiving cache queues to obtain the current data frame.

[0066] It should be noted that the transmitting / receiving module is composed of the EFM32 main control chip, the DWM1000 ultra-wideband transceiver module and the peripheral circuit. The EFM32 completes the configuration and data interaction of the DWM1000 module through the SPI with a baud rate of 10Mbps; the single-channel DWM1000 wireless transceiver rate is 6.8Mbps, and the total rate of 8 channels is 54.4Mbps. The data transmission bandwidth is improved through frequency division multiplexing; the transmitting board / receiving board is based on FPGA and communicates with peripherals through the UDP / SPI interface. In order to increase system redundancy, the communication rate does not exceed 50Mbps; the transmitting board / receiving board communicates with 8 UWB transmitting nodes / receiving nodes through the RS422 interface, and the single-channel baud rate is 10Mbps. The transmitting board / receiving board provides 5V power supply for each transmitting node / receiving node;

[0067] In this embodiment, the transmitter receives peripheral data, and after receiving the complete data frame, it distributes it to 8 transmitting nodes and sends it out in parallel. The maximum frame length of a single transmission in the standard mode of the DWM1000 module is 127 bytes, including a 2-byte frame check sequence (FCS), that is, the effective data length is 125 bytes. Figure 3 , the length of a single frame data packet of the peripheral is n, where n is an integer multiple of 8 and n does not exceed 1000, and the packetization method is: CH1 is filled with DATA1, DATA9...DATAn-7, CH2 is filled with DATA2, DATA10...DATAn-6, and so on, until CH8 is filled with DATA8, DATA16...DATAn. Among them, the transmitting / receiving board in this embodiment starts to assemble the data after receiving the complete data of 8 nodes, and does not assemble the data if it is incomplete.

[0068] In this embodiment, a receiving timeout mechanism is set, such as Figure 5 As shown, after the transmitting / receiving board receives data from a certain node, it starts the receiving timer. If the receiving timer times out and still has not received data from all nodes, it notifies the peripheral device that the node network is abnormal.

[0069] The present invention uses 8 wireless transceiver channels, and through frequency division multiplexing technology, the 8 channels can simultaneously transmit data without interfering with each other, and the data transmission bandwidth is increased to 8 times that of a single channel. The idea of ​​parallel data transmission of the bus is used to packetize the received data to 8 channels for parallel transmission, which greatly improves the transmission efficiency. A packet loss detection mechanism is set at the receiving end, and the peripheral node failure can be notified in time when the node network is abnormal, and the faulty node can be quickly located.

[0070] In a third aspect, the present invention provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program: establishing multiple data transmission cache queues corresponding to the multiple transmission modules, and multiple data reception cache queues corresponding to the multiple reception modules; the transmission board stores each data bit in the current data frame into the multiple data transmission cache queues in sequence; after reframing all the data bits in each data transmission cache queue, a node data frame corresponding to each transmission module is obtained, so that the transmission module wirelessly transmits the node data frame to the corresponding reception module; each reception module stores each data bit in the node data frame into the corresponding data reception cache queue in sequence; the reception board reorganizes the data bits in all the data reception cache queues to obtain the current data frame.

[0071] In a fourth aspect, the present invention provides a readable storage medium having a computer program stored thereon, wherein the computer program implements the following steps when executed by a processor: establishing multiple data transmission cache queues corresponding to the multiple transmission modules and multiple data reception cache queues corresponding to the multiple reception modules; the transmission board stores each data bit in the current data frame in turn into the multiple data transmission cache queues; after reframing all the data bits in each data transmission cache queue, a node data frame corresponding to each transmission module is obtained, so that the transmission module wirelessly transmits the node data frame to the corresponding reception module; each reception module stores each data bit in the node data frame in turn into the corresponding data reception cache queue; the reception board reorganizes the data bits in all the data reception cache queues to obtain the current data frame.

[0072] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the program can be stored in a non-volatile computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0073] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

Claims

1. A data transmission method, characterized in that: A data transmission device is used, the data transmission device comprising a transmitting board arranged at a data transmitting end, a plurality of transmitting modules connected to the transmitting board, a receiving board arranged at a data receiving end, and a plurality of receiving modules corresponding to the plurality of transmitting modules and connected to the receiving board; The transmission method comprises: Establishing a plurality of data transmission buffer queues corresponding to the plurality of transmission modules and a plurality of data reception buffer queues corresponding to the plurality of reception modules; The transmitting board stores each data bit in the current data frame into the multiple data transmission buffer queues in sequence, including: According to the total number of data bits in the current data frame and the total number of queues in the data transmission cache queue, a cycle period in which all data bits are stored in the data transmission cache queue is obtained; According to the cycle number of each cycle and the queue number of each data transmission cache queue, a cache number of each data bit is obtained; Storing each data bit and the cache number of each data bit together in a corresponding data transmission cache queue; After reframing all data bits in each data transmission buffer queue, a node data frame corresponding to each transmission module is obtained, so that the transmission module wirelessly transmits the node data frame to the corresponding receiving module; Each receiving module stores each data bit in the node data frame in turn into the corresponding data receiving buffer queue; The receiving board reorganizes the data bits in all data receiving buffer queues to obtain the current data frame, including: The receiving board obtains all data bits in all data receiving buffer queues and buffer numbers corresponding to the data bits; Classify and arrange all data bits according to the cycle numbers in the cache numbers to obtain a preprocessed data frame; The pre-processed data frames are sorted according to the queue numbers in the cache numbers to obtain the current data frames.

2. The data transmission method according to claim 1, characterized in that: When the data transmission device further includes a standby transmitting module and a corresponding standby receiving module, the pre-processed data frames are sorted according to the queue numbers in the cache numbers to obtain the current data frames, including: Sorting the pre-processed data frames according to the queue numbers in the cache numbers to obtain sorted data frames; Determine whether the sorted data frame is abnormal; When there is no abnormality in the sorted data frame, the sorted data frame is used as the current data frame.

3. The data transmission method according to claim 2, characterized in that: When the data transmission device further includes a spare transmitting module and a corresponding spare receiving module, the method further includes: When an exception occurs in the sorted data frame, the target queue number where the exception occurs is obtained according to the cache number; The standby transmitting module retransmits all target data bits in the corresponding target data transmitting buffer queue according to the target queue number, so that the standby receiving module receives all target data bits; According to the target queue numbers and cycle numbers of all target data bits, all target data bits are inserted into the sorted data frame to obtain the current data frame.

4. The data transmission method according to claim 3, characterized in that: After obtaining the target queue number where the exception occurs according to the cache number, the method further includes: The transmitting board removes the data transmission cache queue corresponding to the target queue number from the multiple data transmission cache queues to obtain multiple data transmission cache update queues; The transmitting board stores each data bit in the next data frame into the multiple data transmission buffer update queues in sequence, so that the multiple transmitting modules send the data bits in the multiple data transmission buffer update queues to the multiple receiving modules.

5. The data transmission method according to claim 1, characterized in that: Before each data bit in the current data frame of the transmitting board is sequentially stored in the multiple data transmission buffer queues, the method further includes: According to different combinations of two pulse repetition rates and multiple center frequencies, the communication parameters of each data transmission module are obtained, so that the receiving board determines the identity of each data transmission module according to the communication parameters of each data transmission module.

6. A data transmission device, characterized in that: The transmission device comprises: A transmitting board arranged at a data transmitting end, a plurality of transmitting modules connected to the transmitting board, a receiving board arranged at a data receiving end, and a plurality of receiving modules corresponding to the plurality of transmitting modules and connected to the receiving board; The transmitting board is used to establish a plurality of data transmitting cache queues corresponding to the plurality of transmitting modules, and the receiving board is used to establish a plurality of data receiving cache queues corresponding to the plurality of receiving modules; The transmitting board is also used to store each data bit in the current data frame in sequence into the multiple data transmission buffer queues, including: According to the total number of data bits in the current data frame and the total number of queues in the data transmission cache queue, a cycle period in which all data bits are stored in the data transmission cache queue is obtained; According to the cycle number of each cycle and the queue number of each data transmission cache queue, a cache number of each data bit is obtained; Storing each data bit and the cache number of each data bit together in a corresponding data transmission cache queue; Each transmitting module is used to reframe all data bits in each data transmission buffer queue to obtain a node data frame corresponding to each transmitting module, and is also used to wirelessly transmit the node data frame to a corresponding receiving module; Each receiving module is used to store each data bit in the node data frame into the corresponding data receiving buffer queue in sequence; The receiving board is used to reorganize the data bits in all data receiving buffer queues to obtain the current data frame, including: Obtain all data bits in all data receiving buffer queues and buffer numbers corresponding to the data bits; Classify and arrange all data bits according to the cycle numbers in the cache numbers to obtain a preprocessed data frame; The pre-processed data frames are sorted according to the queue numbers in the cache numbers to obtain the current data frames.

7. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 are implemented.

8. A readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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