Effective Value Detection Method and Device Based on Fixed-Frequency Sampling

Abstract

This application relates to effective value measurement technology, and discloses an effective value detection method and device based on fixed-frequency sampling. By using digital phase-locked loop technology to track the power frequency signal frequency and phase in real time and update the power frequency estimation value and zero-crossing information, a method for calculating the effective value at non-integer sampling points is provided, which has the characteristics of low implementation cost, high precision, and short response time, and is very suitable for applications such as voltage fluctuation and transient event detection in power quality detection, and envelope detection of flicker signals.

Description

Technical Field

[0001] This application relates to electronic technology, and particularly to effective value measurement technology. Background Art

[0002] This section aims to provide background or context for the embodiments of the present application described in the claims. The descriptions herein are not admitted to be prior art that has been publicly disclosed just because they are included in this section.

[0003] The effective value includes the effective value of voltage, the effective value of current, etc. Taking the effective value of voltage as an example, the magnitude and direction of the voltage of an alternating current (AC) change with time. If the heat effect of this AC is equal to that of a direct current with a certain voltage, then it can be considered that the voltage of this direct current is the effective value of the voltage of this AC.

[0004] Generally speaking, the calculation of electric energy or effective value by a digital intelligent electric meter needs to be based on the full-cycle sampling of voltage and current signals. And full-cycle sampling requires ensuring that the sampling frequency is an integer multiple of the signal frequency, that is, it must be an integer multiple of the power frequency (such as: 50Hz). However, due to the change of the power grid load and the limitation of the limited speed of the generator set, etc., the actual power frequency is not completely fixed, but fluctuates around 50Hz with time. In this case, a fixed sampling rate cannot ensure that it is always an integer multiple of the power frequency, and the resulting asynchronous sampling will cause calculation errors in the effective value and cannot achieve the expected measurement accuracy.

[0005] It can be seen that non-full-cycle sampling is the main cause of calculation errors. To reduce or eliminate the calculation errors of non-full-cycle sampling, a solution is to use a frequency synchronization device to track the power frequency signal and resample the measured voltage and current signals to ensure that the sampling frequency is an integer multiple of the power frequency. However, to achieve resampling will greatly increase the hardware complexity of the digital electric energy meter. Summary of the Invention

[0006] The purpose of the present application is to provide an effective value detection method and device based on fixed-frequency sampling, which can accurately detect the effective value of a fluctuating power frequency signal only by using fixed-frequency sampling, and avoid the hardware complexity caused by resampling.

[0007] The present application discloses an effective value detection method based on fixed-frequency sampling, including:

[0008] Obtaining the sampling value u of the AC signal at a fixed sampling frequency and obtaining the phase value φ at the sampling moment from the numerically controlled oscillator of the digital phase-locked loop, wherein the digital phase-locked loop is configured to synchronously track the frequency and phase of the AC signal;

[0009] Determine whether an accumulation cycle end event occurs according to the phase value flip. If so, add (1 - φ / dp)*u 2 to the cumulative value of the just-ended accumulation cycle, and add φ / dp*u 2 to the cumulative value of the just-started accumulation cycle; if the accumulation cycle end event does not occur, add u 2 to the cumulative value of the current accumulation cycle; where φ is the residual phase after the phase flip of the numerically controlled oscillator, and dp is the phase increment of the numerically controlled oscillator between the current sampling and the previous sampling;

[0010] For the just-ended accumulation cycle, calculate the effective value of this accumulation cycle according to the cumulative value of this accumulation cycle.

[0011] In a preferred example, the numerically controlled oscillator includes a phase accumulator with L bits. When the value of the phase accumulator changes by 1, it represents a phase change of 2π / 2 of the industrial frequency L .

[0012] In a preferred example, the accumulation cycle is a full cycle, the effective value is the full-wave effective value, and the accumulation cycle end event is a same-direction zero-crossing event; or

[0013] the accumulation cycle is a half cycle, the effective value is the half-wave effective value, and the accumulation cycle end event is a two-way zero-crossing event; or,

[0014] the accumulation cycle is a quarter cycle, the effective value is the quarter-wave effective value, and the accumulation cycle end event is the second highest bit flip of the phase accumulator of the numerically controlled oscillator.

[0015] In a preferred example, if the highest bit of the phase accumulator of the numerically controlled oscillator flips from 1 to 0, it is determined that a positive zero-crossing event occurs; if the highest bit of the phase accumulator of the numerically controlled oscillator flips from 0 to 1, it is determined that a negative zero-crossing event occurs.

[0016] In a preferred example, the sampled value is a voltage value, and the effective value is the voltage effective value; or, the sampled value is a current value, and the effective value is the current effective value.

[0017] In a preferred example, the fixed sampling frequency is a positive integer multiple of the expected value of the industrial frequency.

[0018] In a preferred example, the accumulation cycle is a full cycle, and the effective value is updated according to the half-wave cycle.

[0019] In a preferred example, the accumulation cycle is a full cycle, and the effective value is updated according to the 1 / 4 wave cycle.

[0020] In a preferred example, the numerically controlled oscillator has 24 bits of L bits.

[0021] This application also discloses an effective value detection device based on fixed-frequency sampling, including:

[0022] A digital phase-locked loop configured to synchronously track the frequency and phase of an AC signal;

[0023] A calculation unit configured to obtain a sampled value u of the AC signal at a fixed sampling frequency and obtain a phase value φ at the sampling moment from the numerically controlled oscillator of the digital phase-locked loop. If it is determined that an accumulation cycle end event occurs according to the phase value flip, then (1 - φ / dp)*u 2 is accumulated to the cumulative value of the just-ended accumulation cycle and φ / dp*u 2 is accumulated to the cumulative value of the just-started accumulation cycle. If it is determined that the accumulation cycle end event does not occur, then u 2 is accumulated to the cumulative value of the current accumulation cycle. For the just-ended accumulation cycle, the effective value of this accumulation cycle is calculated according to the cumulative value of this accumulation cycle, where φ is the residual phase after the phase flip of the numerically controlled oscillator, and dp is the phase increment of the numerically controlled oscillator between this sampling and the previous sampling.

[0024] In a preferred example, the numerically controlled oscillator includes a phase accumulator with L bits. Each change of the value of the phase accumulator by 1 represents a phase change of 2π / 2 of the power frequency. L .

[0025] In a preferred example, the accumulation cycle is a full cycle, the effective value is the full-wave effective value, and the accumulation cycle end event is a co-directional zero-crossing event; or

[0026] the accumulation cycle is a half cycle, the effective value is the half-wave effective value, and the accumulation cycle end event is a bi-directional zero-crossing event; or,

[0027] the accumulation cycle is a quarter cycle, the effective value is the quarter-wave effective value, and the accumulation cycle end event is the flip of the second highest bit of the phase accumulator of the numerically controlled oscillator.

[0028] In a preferred example, if the highest bit of the phase accumulator of the numerically controlled oscillator flips from 1 to 0, it is determined that a positive zero-crossing event occurs; if the highest bit of the phase accumulator of the numerically controlled oscillator flips from 0 to 1, it is determined that a negative zero-crossing event occurs.

[0029] In a preferred example, the sampled value is a voltage value and the effective value is the voltage effective value; or, the sampled value is a current value and the effective value is the current effective value.

[0030] In a preferred example, the fixed sampling frequency is a positive integer multiple of the expected value of the power frequency.

[0031] In a preferred example, the accumulation period is a full cycle, and the effective value is updated according to a half-cycle period.

[0032] In a preferred example, the accumulation period is a full cycle, and the effective value is updated according to a 1 / 4 cycle period.

[0033] In a preferred example, the numerically controlled oscillator has a bit number L of 24 bits.

[0034] In the embodiments of the present application, the effective value calculation method based on fixed sampling has relatively great advantages in terms of hardware and software implementation costs compared with similar power frequency synchronous sampling methods. Due to the adoption of digital phase-locked loop technology, it can track the frequency and phase of the power frequency signal in real time, update the power frequency estimation value and zero-crossing information, thereby providing an effective value calculation method for realizing non-integer sampling points, which has the characteristics of low implementation cost, high precision, and fast response time. It is very suitable for applications such as voltage fluctuation and transient event detection in power quality detection, and envelope detection of flicker signals. It can be applied to the estimation of voltage effective values for full cycles, half cycles, and 1 / 4 cycles.

[0035] Each technical feature disclosed in the above-mentioned invention content, each technical feature disclosed in the following embodiments and examples, and each technical feature disclosed in the drawings can be freely combined with each other to form various new technical solutions (these technical solutions should all be regarded as having been recorded in this specification), unless the combination of such technical features is technically infeasible. For example, in one example, features A+B+C are disclosed, and in another example, features A+B+D+E are disclosed, and features C and D are equivalent technical means that play the same role. Only one of them can be used technically and it is impossible to use both at the same time. Feature E can be combined with feature C technically. Then, the solution of A+B+C+D should not be regarded as having been recorded because it is technically infeasible, while the solution of A+B+C+E should be regarded as having been recorded. Description of the Drawings

[0036] Figure 1 is a schematic flowchart of an effective value detection method based on fixed-frequency sampling according to the first embodiment of the present application;

[0037] Figure 2 is a schematic diagram of an effective value approximation algorithm according to an embodiment of the present application;

[0038] Figure 3 is a block diagram of the overall architecture for effective value calculation according to an embodiment of the present application;

[0039] Figure 4Schematic diagram of the full / half-wave effective value calculation according to an embodiment of the present application. Detailed implementation manners

[0040] In the following description, many technical details are presented for the reader to better understand the present application. However, those of ordinary skill in the art can understand that the technical solutions claimed in the present application can be implemented even without these technical details and various changes and modifications based on the following embodiments.

[0041] Explanation of some concepts:

[0042] Power frequency refers to the rated frequency adopted by power generation, transmission, transformation, and distribution equipment of the power system, as well as industrial and civil electrical equipment, with the unit of hertz (Hz).

[0043] PLL: Phase Locked Loop, which is used to uniformly integrate clock signals to synchronize the external input signal with the internal oscillation signal.

[0044] To make the objectives, technical solutions, and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0045] The first embodiment of the present application relates to an effective value detection method based on fixed-frequency sampling. As Figure 1 shown, this method includes:

[0046] In step 101, the sampling value u of the AC signal is obtained at a fixed sampling frequency, and the phase value φ at the sampling moment is obtained from the numerically controlled oscillator of the digital phase-locked loop, where the digital phase-locked loop is configured to synchronously track the power frequency and phase of the AC signal. The fixed sampling frequency is a positive integer multiple of the expected power frequency value (e.g., 50 Hz). Each sampling at the fixed sampling frequency not only obtains the sampling value u but also triggers the acquisition of the phase value φ at the same time. By continuously sampling, a sequence of u and φ sorted by sampling time can be obtained.

[0047] Thereafter, step 102 is entered. It is determined whether the cumulative cycle end event occurs according to the flip event of the phase value φ. If so, step 103 is entered; otherwise, step 105 is entered.

[0048] In step 103, (1 - φ / dp) * u 2 is accumulated to the cumulative value of the just-ended cumulative cycle, and φ / dp * u 2 is accumulated to the cumulative value of the just-started cumulative cycle. Here, dp is the phase increment between the current sampling and the previous sampling. Optionally, in one embodiment, the value of φ ranges from 0 to 2π. Let φ i be the phase value corresponding to the current sampling, and φ i-1is the phase value corresponding to the previous sampling, then φ i =(φ i-1 + dp) mod (2π), that is: take the remainder of (φ i-1 + dp) with 2π (modulo operation), which is the residual phase value after the full-wave event.

[0049] Thereafter, step 104 is entered. For the just-ended accumulation period, the effective value of the accumulation period is calculated according to the accumulated value of the accumulation period.

[0050] In step 105, u 2 is accumulated to the accumulated value of the current accumulation period.

[0051] In this embodiment, since resampling of the input signal is avoided, a large amount of signal processing operations and hardware overhead are saved.

[0052] Optionally, in an embodiment, the numerically controlled oscillator includes a phase accumulator with L bits. Each change of 1 in the value of the phase accumulator represents a phase change of 2π / 2 L of the power frequency. L can be 24 or other positive integers, and can be set according to the application scenario or phase resolution requirements.

[0053] Optionally, in an embodiment, the accumulation period is a full cycle, the effective value is the effective value of the full wave (full period), and the accumulation period end event is a same-direction zero-crossing event (i.e., a positive zero-crossing event or a negative zero-crossing event). If the highest bit of the phase accumulator of the numerically controlled oscillator flips from 1 to 0, it is determined that a positive zero-crossing event occurs. If the highest bit of the phase accumulator of the numerically controlled oscillator flips from 0 to 1, it is determined that a negative zero-crossing event occurs.

[0054] Optionally, in an embodiment, the accumulation period is a half cycle, the effective value is the effective value of the half wave (half period), and the accumulation period end event is a two-way zero-crossing event (i.e., a positive zero-crossing event and a negative zero-crossing event). Equivalently, φ i =(φ i-1 + dp) mod (π), that is: take the remainder of (φ i-1 + dp) with π (modulo operation), which is the residual phase value after the half-wave event.

[0055] Optionally, in an embodiment, the accumulation period is a quarter cycle, the effective value is the effective value of the quarter wave (1 / 4 cycle), and the accumulation period end event is the flip of the second highest bit of the phase accumulator of the numerically controlled oscillator. Equivalently, φ i =(φ i-1 + dp) mod (π / 2), that is: take the remainder of (φ i-1 + dp) with π / 2 (modulo operation), which is the residual phase value after the 1 / 4 wave event

[0056] Optionally, in one embodiment, the accumulation period is a full cycle, and the effective value is updated according to a half-cycle period.

[0057] Optionally, in one embodiment, the accumulation period is a full cycle, and the effective value is updated according to a 1 / 4-cycle period.

[0058] Optionally, in one embodiment, the sampled value is a voltage value, and the effective value is the effective voltage value.

[0059] Optionally, in one embodiment, the sampled value is a current value, and the effective value is the effective current value.

[0060] The effective value calculation method based on fixed sampling in this embodiment has relatively great advantages in terms of hardware and software implementation costs compared with similar power frequency synchronous sampling methods. Since the digital phase-locked loop technology is used to track the power frequency signal frequency and phase in real time, update the power frequency frequency estimation and zero-crossing information, a method for calculating the effective value of non-integer sampling points is provided, which has the characteristics of low implementation cost, high precision, short response time, etc., and is very suitable for applications such as voltage fluctuation and transient event detection in power quality, and envelope detection of flicker signals.

[0061] The second embodiment of this application relates to an effective value detection device based on fixed-frequency sampling, including:

[0062] A digital phase-locked loop configured to synchronously track the power frequency and phase of an AC signal.

[0063] A calculation unit configured to obtain the sampled value u of the AC signal at a fixed sampling frequency and obtain the phase value φ at the sampling moment from the numerically controlled oscillator of the digital phase-locked loop. If it is determined that an accumulation period end event occurs according to the phase value flip event, then (1 - φ / dp)*u 2 is accumulated to the cumulative value of the just-ended accumulation period and φ / dp*u 2 is accumulated to the cumulative value of the just-started accumulation period. If it is determined that the accumulation period end event does not occur, then u 2 is accumulated to the cumulative value of the current accumulation period. For the just-ended accumulation period, the effective value of this accumulation period is calculated according to the cumulative value of this accumulation period, where φ is the residual phase after the phase flip of the numerically controlled oscillator, and dp is the phase increment of the numerically controlled oscillator between this sampling and the previous sampling.

[0064] Optionally, in one embodiment, the numerically controlled oscillator includes a phase accumulator with L bits. Each change in the value of the phase accumulator represents a phase change of 2π / 2 of the power frequency. L L can be 24 or other positive integers, and can be set according to the application scenario or phase resolution requirements.

[0065] Optionally, in one embodiment, the accumulation period is a full cycle, the effective value is the effective value of the full wave (full cycle), and the accumulation period end event is a same-direction zero-crossing event. If the highest bit of the phase accumulator of the numerically controlled oscillator flips from 1 to 0, it is determined that a positive zero-crossing event occurs; if the highest bit of the phase accumulator of the numerically controlled oscillator flips from 0 to 1, it is determined that a negative zero-crossing event occurs.

[0066] Optionally, in one embodiment, the accumulation period is a half cycle, the effective value is the effective value of the half wave (half cycle), and the accumulation period end event is a bidirectional zero-crossing event.

[0067] Optionally, in one embodiment, the accumulation period is a quarter cycle, the effective value is the effective value of the quarter cycle (1 / 4 cycle), and the accumulation period end event is the flipping of the second highest bit of the phase accumulator of the numerically controlled oscillator.

[0068] Optionally, in one embodiment, the accumulation period is a full cycle, and the effective value is updated according to the half wave period.

[0069] Optionally, in one embodiment, the accumulation period is a full cycle, and the effective value is updated according to the 1 / 4 wave period.

[0070] Optionally, in one embodiment, the sampled value is a voltage value, and the effective value is the effective value of the voltage.

[0071] Optionally, in one embodiment, the sampled value is a current value, and the effective value is the effective value of the current.

[0072] The first implementation manner is a method implementation manner corresponding to this implementation manner. The technical details in the first implementation manner can be applied to this implementation manner, and the technical details in this implementation manner can also be applied to the first implementation manner.

[0073] In order to better understand the technical solution of the present application, the principle of the present application will be further described below by taking the effective value of voltage as an example. This principle is only for easy understanding and does not limit the protection scope of the present application.

[0074] The present application relates to high-precision full-wave, half-wave, and 1 / 4 cycle voltage effective value estimation technologies based on a fixed sampling rate. It can be known from the background technology that non-integer cycle sampling is the main cause of calculation errors. Using a frequency synchronization device (such as a digital PLL) to synchronize the sampling frequency and the signal frequency and resample the measured voltage and current signals can reduce calculation errors. However, resampling the voltage and current signals significantly increases the complexity of hardware implementation, so it may not be the best choice in cost-sensitive applications.

[0075] The definition of the effective value of voltage is:

[0076]

[0077] Among them, the normal average length T is the power frequency period, or half period, t is the time, and u is the sampling value (here it is the voltage sampling value). In the digital domain, the integral in the above formula is replaced by digital summation:

[0078]

[0079] Among them, P is the average length, and n is the serial number of the sampling value. For signals of the ideal sine wave type after digital sampling, the following conclusions can be mathematically proven to hold (assuming that the sampling rate already satisfies the most basic sampling theorem):

[0080] a) If the sampling frequency is an integer multiple of the power frequency signal frequency, the full-wave effective value obtained by digital summation is consistent with the result of ideal integration and is independent of the initial phase of the sine wave;

[0081] b) If the sampling frequency is an integer multiple of twice the power frequency signal frequency, the half-wave effective value obtained by digital summation is consistent with the result of ideal integration and is independent of the initial phase of the sine wave;

[0082] c) If the sampling rate has a complete four-fold relationship with the power frequency signal frequency, the 1 / 4-wave effective value obtained by digital summation is consistent with the result of ideal integration. The amplitude of the 1 / 4-wave effective value is related to the phase of the sine wave at the accumulation point (or the starting point of integration). When the accumulation point starts from the zero-crossing point of the sine wave, the 1 / 4-wave effective value is also a constant and is equal to the full-wave and half-wave effective values.

[0083] Therefore, the accurate calculation of electric energy by a digital smart meter needs to be based on the full-cycle sampling of voltage and current signals, and full-cycle sampling requires ensuring that the sampling frequency is an integer multiple of the signal frequency, that is, it must be an integer multiple of the power frequency (such as: 50 Hz). However, due to the changes in the power grid load and the limitations of the limited speed of the generator set, etc., the power frequency signal frequency is generally not fixed but changes around 50 Hz over time, so the fixed sampling rate cannot always be maintained as an integer multiple of the power frequency. This asynchronous sampling will cause calculation errors in active power, and further lead to calculation errors in active electric energy and effective values. For steady-state metering, the calculation error can be eliminated by increasing the average time length, but for some applications that require accurate detection of instantaneous voltage / current fluctuations, such as: voltage transient events in power systems and power user distribution networks, such as: voltage sags, swells, and interruptions, the detection and recording of these events need to record the occurrence time, duration, voltage drop amplitude, and time waveform.

[0084] It can be seen that non-integer cycle sampling is the main cause of calculation errors. Currently, to reduce the calculation errors caused by non-integer cycle sampling, the common solution is to use a frequency synchronization device (such as a digital PLL) to synchronize the sampling frequency and the signal frequency, so as to reduce the calculation errors. However, this variable-frequency sampling will lead to a significant increase in hardware costs. An embodiment of the present application proposes a sampling method based on a fixed frequency. The power frequency is synchronously tracked through a digital phase-locked loop (PLL), and the power frequency and the zero-crossing event are estimated in real time, but no variable sampling process is performed, thus omitting a large amount of signal processing operations and hardware overhead. Specifically, the digital phase-locked loop provides the number of integer sample points (N) within each power frequency cycle, as well as the fractional sample point interval d of the starting sample point s , and the fractional sample point interval d of the ending sample point e (as Figure 2 shown), so the power frequency cycle obtained by the PLL can be expressed as:

[0085] P = d s + N + d e , where 0 ≤ d s <1, and 0 ≤ d e <1

[0086]

[0087] where l represents the l-th cycle, i is the sequence number of the sampling value in the l-th cycle, is the effective value of the voltage in the l-th cycle, u 2 (l,i) is the square of the i-th sampling value in the l-th cycle,

[0088] The cycle length P(l) = d s (l) + N(l) + d e (l), and satisfies

[0089] d s (l) = 1 - d e (l - 1), u(l,N + 1) = u(l + 1,0)

[0090] For example: Suppose P = 16.25, and the initial d s = 0, then there is:

[0091] l <![CDATA[d s > N <![CDATA[d e > 0 0 16 0.25 1 0.75 15 0.5 2 0.5 15 0.75 3 0.25 16 0 4 0 16 0.25

[0092] To sum up, within each calculation cycle, it is necessary to obtain P(l) = d s (l) + N(l) + d e (l) through the digital phase-locked loop, and calculate the corresponding effective value through the effective value calculation unit. In one embodiment, an effective value calculation architecture is as Figure 3 shown, which includes:

[0093] Digital Phase-Locked Loop (PLL) unit: It is used to track the frequency and phase of the power frequency signal and provide the estimated power frequency phase increment dp within each sampling interval in real time. The main components of the digital PLL include: Numerically Controlled Oscillator (NCO), Direct Digital Synthesizer (DDS), which is used to generate controllable sine or cosine waves, a phase-locked loop filter, and a phase detector (PD).

[0094] RMS effective value calculation unit: It is mainly responsible for calculating the start and end calculation controls of the voltage effective value, square accumulation operation, and the calculation of d s (l), d e (l), average normalization operation, and square root operation.

[0095] The function of the Direct Digital Synthesizer (DDS) is to generate orthogonal sine and cosine samples. The Look-Up Table (LUT) method can be used, or the CORDIC can be used to directly generate sine and cosine wave functions. Under the control of the system clock, the phase accumulator of the Numerically Controlled Oscillator (NCO) continuously accumulates the estimated frequency word (dp) to obtain a digital phase with this frequency word as the step. For the implementation of generating sine and cosine wave functions using the Look-Up Table (LUT) method, the digital phase obtained by the NCO can be truncated according to the size of the look-up table, and this value can be used as the sampling address value to look up the sine and cosine signal samples in the table.

[0096] Usually, it is necessary to output the sine value corresponding to the phase value at the current moment, that is, sample the phase at equal controllable intervals with the reference frequency source. As is well known, the ideal sine wave signal S(n) after being sampled at a sampling frequency of F s can be expressed as:

[0097]

[0098] where is the starting phase, f AC is the power frequency, and n is the sampling point sequence number.

[0099] Instantaneous phase can be written in the following iterative form:

[0100]

[0101] The above formula has considered that the sine and cosine wave functions are periodic with 2π. Usually, 2 L is used to represent 2π, and L is the number of bits of the NCO phase accumulator. Then the value of the NCO accumulator can be expressed as:

[0102]

[0103] where represents the rounding operation on x.

[0104] NCO(n + 1) = (NCO(n) + dp(n)) mod 2 L

[0105] where, is the instantaneous phase increment estimation of the power frequency by the PLL.

[0106] To enable the PLL to have a larger capture range and faster convergence speed, a configuration parameter can be introduced: where f AC is the nominal value of the power frequency. For example: f AC = 50Hz, then dp(n) = dphase_fix + dphase_err(n).

[0107] It can be seen that the value of the phase corresponding to the NCO is within 0 to 2π and is equally spaced into 2 L acquisition value points. Therefore, the flipping of the highest bit of the NCO exactly corresponds to the zero-crossing moment of the power frequency signal. The flipping of the highest bit of the NCO from "1" to "0" is a positive zero-crossing, and from "0" to "1" is a negative zero-crossing. The remainder after the NCO wraps around, divided by dp(n), is the ds value. If calculating the full-wave effective value, only the positive zero-crossing event of the NCO needs to be concerned, and at this moment, calculate de(l) of the current cycle and ds(l + 1) of the next cycle. The performance indicators of the NCO include signal frequency resolution, signal-to-noise ratio (SNR), spurious-free dynamic range (SFDR), and the orthogonality of the output signal. These performance indicators depend on the number of bits of the NCO.

[0108] Figure 4 Shows the flowchart of the full-wave effective value calculation in an embodiment. The start and end indications of each effective value calculation period are provided by the NCO state in the digital phase-locked loop. Since the phase-locked loop used in this embodiment can achieve the locking of the power frequency and phase, the flipping of the second highest bit of the NCO is used to trigger the generation of a 1 / 4-cycle calculation start pulse signal to implement the 1 / 4-cycle voltage effective value calculation.

[0109] It should be noted that in the disclosure, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variation thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising one" does not exclude the presence of additional identical elements in the process, method, article or device comprising said element. In this application, if it is mentioned that an act is performed according to a certain element, it means that the act is performed at least according to that element, including two cases: performing the act only according to that element and performing the act according to that element and other elements. Expressions such as "multiple", "many times", "multiple types", etc. include 2, 2 times, 2 types, as well as more than 2, more than 2 times, more than 2 types.

[0110] This specification includes combinations of various embodiments described herein. Separate references to embodiments (such as "one embodiment" or "some embodiments" or "preferred embodiments") are not necessarily to the same embodiment; however, unless indicated to be mutually exclusive or clearly mutually exclusive to those skilled in the art, these embodiments are not mutually exclusive. It should be noted that the word "or" is used in a non-exclusive sense in this specification unless the context clearly dictates otherwise or requires otherwise.

[0111] All documents mentioned in this application are considered to be integrally included in the disclosure of this application so that they can be used as a basis for modification if necessary. In addition, it should be understood that after reading the content of this application, those skilled in the art can make various changes or modifications to this application, and these equivalent forms also fall within the scope claimed by this application.

Claims

1. A method for detecting the effective value based on fixed-frequency sampling, characterized in that Including: Obtaining the sampled value u of the AC signal at a fixed sampling frequency and obtaining the phase value φ at the sampling moment from the numerically controlled oscillator of the digital phase-locked loop, wherein the digital phase-locked loop is configured to synchronously track the power frequency and phase of the AC signal; Determine whether an accumulation cycle end event occurs according to the inversion situation of the phase value. If so, add (1 - φ / dp)*u 2 to the cumulative value of the just-ended accumulation cycle, and add φ / dp*u 2 to the cumulative value of the just-started accumulation cycle; if the accumulation cycle end event does not occur, add u 2 to the cumulative value of the current accumulation cycle; where φ is the residual phase after the phase inversion of the numerically controlled oscillator, and dp is the phase increment between the current sampling and the previous sampling; For the just-ended accumulation period, calculating the effective value of this accumulation period according to the accumulated value of this accumulation period.

2. The effective value detection method based on fixed-frequency sampling according to claim 1, wherein The numerically controlled oscillator includes a phase accumulator with L bits. Each change of the value of the phase accumulator by 1 represents a phase change of 2π / 2 of the power frequency L .

3. The effective value detection method based on fixed-frequency sampling according to claim 2, wherein The accumulation period is a full cycle, the effective value is the full-wave effective value, and the accumulation period end event is the same-direction zero-crossing event; or The accumulation period is a half cycle, the effective value is the half-wave effective value, and the accumulation period end event is the two-way zero-crossing event; or, The accumulation period is a quarter cycle, the effective value is the quarter-wave effective value, and the accumulation period end event is the second highest bit flip of the phase accumulator of the numerically controlled oscillator.

4. The effective value detection method based on fixed-frequency sampling according to claim 3, wherein If the highest bit of the phase accumulator of the numerically controlled oscillator flips from 1 to 0, it is determined that a positive zero-crossing event occurs; If the highest bit of the phase accumulator of the numerically controlled oscillator flips from 0 to 1, it is determined that a negative zero-crossing event occurs.

5. The effective value detection method based on fixed-frequency sampling according to any one of claims 1-4, characterized in that The sampled value is a voltage value, and the effective value is the voltage effective value; or, The sampled value is a current value, and the effective value is the current effective value.

6. The effective value detection method based on fixed-frequency sampling according to any one of claims 1-4, characterized in that The accumulation period is a full cycle, and the effective value is updated according to the half-wave period.

7. The effective value detection method based on fixed-frequency sampling according to any one of claims 1-4, characterized in that, The accumulation period is a full cycle, and the effective value is updated according to the 1 / 4 wave period.

8. The effective value detection method based on fixed-frequency sampling according to claim 2, wherein The numerically controlled oscillator includes that the number of bits L is 24 bits.

9. An effective value detection device based on fixed-frequency sampling, characterized in that, Including: A digital phase-locked loop configured to synchronously track the power frequency and phase of an AC signal; A calculation unit, configured to obtain a sampled value u of the AC signal at a fixed sampling frequency and obtain a phase value φ of the sampling moment from a numerically controlled oscillator of a digital phase-locked loop. If it is determined that an accumulation cycle end event has occurred according to the inversion situation of the phase value, then (1 - φ / dp)*u 2 is accumulated to the cumulative value of the just-ended accumulation cycle and φ / dp*u 2 is accumulated to the cumulative value of the just-started accumulation cycle. If it is determined that the accumulation cycle end event has not occurred, then u 2 is accumulated to the cumulative value of the current accumulation cycle. For the just-ended accumulation cycle, an effective value of the accumulation cycle is calculated according to the cumulative value of the accumulation cycle, where φ is the residual phase after the phase inversion of the numerically controlled oscillator, and dp is the phase increment between the current sampling and the previous sampling.

10. The effective value detection device based on fixed-frequency sampling according to claim 9, characterized in that The numerically controlled oscillator includes a phase accumulator with L bits. A change of 1 in the value of the phase accumulator represents a phase change of 2π / 2 of the power frequency L .

11. The effective value detection device based on fixed-frequency sampling according to claim 10, characterized in that The accumulation period is a full cycle, the effective value is the full-wave effective value, and the accumulation period end event is the same-direction zero-crossing event; or The accumulation period is a half cycle, the effective value is the half-wave effective value, and the accumulation period end event is the two-way zero-crossing event; or, The accumulation period is a quarter cycle, the effective value is the quarter-wave effective value, and the accumulation period end event is the second highest bit flip of the phase accumulator of the numerically controlled oscillator.

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